Method for controlling the aperture size of via holes on TFT substrate

Abstract

The present invention relates to a method for controlling the aperture size of a via hole on a TFT substrate, wherein the via hole penetrates an interlayer insulating layer and a gate insulating layer, and the method comprises: depositing an amphoteric metal layer mask on the interlayer insulating layer; performing a first dry etching on the amphoteric metal layer mask to obtain a via hole pattern; performing a second dry etching on the TFT substrate to form a via hole; and performing an alkaline solution wet etching on the amphoteric metal layer mask. The method provided by the present invention avoids the backlash phenomenon, effectively enhances the control of the aperture size, thereby controlling CD LOSS, and ensuring the overlap resistance and electrical characteristics of the product.

Description

Technical Field

[0001] The invention relates to the technical field of display screens, and in particular to a method for controlling the aperture size of a via hole on a TFT substrate. Background Art

[0002] Currently in the display field, whether it is liquid crystal display technology or active-matrix organic light-emitting diodes, their applications in displays require thin-film transistor (TFT) technology as a backplane driving technology. In liquid crystal displays, TFT controls the liquid crystal molecule matrix of specific pixels to achieve control of the liquid crystal display; in active-matrix organic light-emitting diode displays, TFT controls the light-emitting diodes of specific pixels individually to achieve pixel display.

[0003] Low Temperature Poly-silicon (LTPS) technology has become a new generation of TFT manufacturing technology. In the application of LTPS technology to manufacture TFT substrates, the preparation of vias requires etching the gate insulation layer (GI) and the interlayer insulation layer (ILD). The ILD includes ILD1 and ILD2. GI is SiO x / SiN x Structure, ILD1 is SiN x Structure, ILD2 is SiN x / SiO x During the etching process, due to the change of the film material, it is difficult to control the parameters such as the morphology of the via and the etching deviation (CD Loss), so the etching of the via has become one of the difficulties of the LTPS process. During the etching process, the change of the aperture size of the via will affect the electrical characteristics of the TFT, and then directly affect the display effect, reliability and yield rate of the product.

[0004] In the existing TFT substrate, via etching generally uses photoresist (PR) as a mask through CF 4 , C 4 F 8 , C 2 HF 5 Or other fluorine-containing gases are ionized for dry etching, but due to the thickness of the PR glue, the slope angle and the uniformity of etching, the PR will produce a retreat phenomenon, that is, the aperture becomes larger, the CD LOSS cannot be effectively controlled, and there are fluctuations, which affects the lap resistance and electrical characteristics. Summary of the invention

[0005] In view of the technical problems existing in the prior art, the present invention provides a method for controlling the aperture size of via holes on a TFT substrate. The method avoids the receding phenomenon by depositing an amphoteric metal layer mask on ILD2. The aperture size is only related to the size of the hole during imaging, which effectively enhances the control of the aperture size, thereby controlling CD LOSS and ensuring the overlap resistance and electrical characteristics of the product.

[0006] A method for controlling the aperture size of a via hole on a TFT substrate, wherein the via hole penetrates an interlayer insulating layer and a gate insulating layer, the method comprising:

[0007] S1: depositing an amphoteric metal layer mask on the interlayer insulating layer;

[0008] S2: performing a first dry etching on the amphoteric metal layer mask to obtain a pattern of the via hole;

[0009] S3: performing a second dry etching process on the TFT substrate to form the via hole;

[0010] S4: wet-etching the amphoteric metal layer mask with an alkaline solution.

[0011] Furthermore, the amphoteric metal is any one of aluminum and zinc. Preferably, the amphoteric metal is aluminum.

[0012] Furthermore, the amphoteric metal layer mask is deposited on the second interlayer insulating layer, and the thickness of the amphoteric metal layer mask is 30-80 nm.

[0013] Furthermore, the amphoteric metal layer mask is formed by physical vapor deposition, and the physical vapor deposition method meets the following conditions: argon gas flow rate is 100-130sccm, pressure is 0.3-0.4Pa, power is 40-50KW, and temperature is 100-120°C.

[0014] Further, in step S2, the etching gas used in the first dry etching includes Cl 2 and BCl 3 , satisfying: the pressure is 1-4pa, the Cl 2 The flow rate is 500-1000sccm, the BCl 3 The flow rate is 50-300sccm.

[0015] Furthermore, in step S3, the etching gas used in the second dry etching includes CF 4 and O 2 , satisfying: the CF 4 The flow rate is 300-600sccm, the O 2 The flow rate is 50-200sccm and the chamber pressure is 1-2Pa.

[0016] Furthermore, during the second dry etching process, the amphoteric metal layer mask at the via hole is - , O 2 - Fluoride and oxide generated by the reaction are attached to the sidewalls of the via hole.

[0017] Furthermore, the pH value of the alkaline solution is 10-12, the wet etching time is 3-5 minutes, and the etching temperature is 50-60°C.

[0018] Furthermore, between step S1 and step S2, the method further includes: coating photoresist on the amphoteric metal layer mask, exposing and developing the photoresist to obtain the pattern of the via hole.

[0019] Furthermore, between step S2 and step S3, it also includes: after the amphoteric metal layer mask completes the first dry etching, using a stripping solution to remove the photoresist, so as to obtain a film layer structure with the amphoteric metal layer as a mask.

[0020] Compared with the prior art, the technical solution of the present invention has at least the following beneficial effects: the present invention uses an amphoteric non-metallic layer mask instead of photoresist, the aperture size is only related to the size of the hole when it is imaged, and the substance generated by the reaction of the amphoteric non-metallic layer mask with the etching gas during the etching process can protect the side wall of the via, avoiding the retreat phenomenon, and effectively enhancing the control of the aperture size, thereby controlling CD LOSS and ensuring the overlap resistance and electrical characteristics of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings further illustrate the present invention, but the embodiments in the accompanying drawings do not constitute any limitation to the present invention.

[0022] Figure 1 A flow chart of a method for controlling the aperture size of via holes on a TFT substrate provided by the present invention;

[0023] Figure 2 A schematic diagram of a TFT substrate structure provided in an embodiment.

[0024] The reference numerals are: 1-glass substrate, 2-active layer, 3-gate insulating layer, 31-SiO x Gate insulation layer, 32-SiN x Gate insulating layer, 4-interlayer insulating layer, 41-first interlayer insulating layer, 42-second interlayer insulating layer, 421-SiO x Second interlayer insulating layer, 422-SiN x Second interlayer insulating layer, 5-aluminum layer mask, 6-photoresist. DETAILED DESCRIPTION

[0025] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0026] like Figure 1 As shown, a method for controlling the aperture size of a via hole on a TFT substrate comprises:

[0027] S101: depositing an amphoteric metal layer mask on the interlayer insulating layer;

[0028] The amphoteric metals include aluminum and zinc. Aluminum has a greater price advantage in terms of raw material cost. In this embodiment, preferably, the amphoteric metal is aluminum, and the amphoteric metal layer mask is an aluminum layer mask. Figure 2 As shown, the TFT substrate structure from top to bottom is photoresist 6, aluminum layer mask 5, SiN x The second interlayer insulating layer 422, SiO x The second interlayer insulating layer 421, the first interlayer insulating layer 41, the SiN x Gate insulating layer 32, SiO x The gate insulating layer 31, the active layer 2, and the aluminum layer are deposited as a mask on the SiN x On the second interlayer insulating layer 422 , the aluminum layer mask 5 is coated with a photoresist 6 , which is exposed and developed to obtain the pattern of the via hole. The photoresist 6 is used to form the pattern of the via hole and transfer the pattern to the aluminum layer mask 5 .

[0029] The thickness of the aluminum layer mask 5 is 30-80nm. When the thickness of the aluminum layer mask 5 is greater than 80nm, the time required for dry etching of the aluminum layer is prolonged, causing the photoresist 6 to retreat, and it is impossible to control the size of the aperture; when the thickness of the aluminum layer mask 5 is less than 30nm, the aluminum layer is too thin and is easily etched away when the film layer is etched to form a via, and it is also impossible to control the size of the aperture. When the thickness of the aluminum layer mask 5 is within the range of 30-80nm, the etching time is short, and the photoresist 6 does not retreat significantly during the etching process of the aluminum layer, and the aperture on the aluminum layer mask 5 can maintain the size of the aperture in the photoresist 6.

[0030] The principle of physical vapor deposition (PVD) is that the gas in the reaction chamber generates low-temperature plasma through glow discharge under the action of high voltage, and then uses charged ions to accelerate in the electric field to bombard the target material, so that the target material forms a film on the substrate. In this embodiment, the aluminum layer mask 5 is formed by physical vapor deposition, and the argon gas flow rate is 100-130sccm. The energy provided by the Ar ions ionized by the argon gas within the above flow rate range satisfies the requirement of allowing the atoms on the surface of the target material to break away from the lattice constraints and fly to the substrate to deposit into the aluminum layer mask 5; the pressure is 0.3-0.4Pa. When the pressure is greater than 0.4Pa, the thickness of the aluminum layer mask 5 is less than 30nm, and the aluminum layer mask 5 cannot play a role in controlling the size of the aperture. When the pressure is less than 0.3Pa, the thickness of the aluminum layer mask 5 is greater than 80nm, resulting in the aluminum layer mask 5 losing the function of controlling the size of the aperture; the power is 40-50KW, and the temperature is 100-120℃. Within the above power and temperature range, the film uniformity of the aluminum layer mask 5 is good, which is similar to that of SiN x The second interlayer insulating layer 422 has a high bonding force, and the aluminum mask 5 has a uniform film layer and a stable structure, which can avoid the backlash phenomenon, effectively ensuring that the aperture size does not change during the via etching process, thereby achieving control of the aperture size.

[0031] S102: performing a first dry etching on the amphoteric metal layer mask to obtain a via pattern;

[0032] Development refers to dissolving the soluble area on the photoresist with a developer to form a pattern. After the aluminum layer mask 5 is deposited, a layer of photoresist 6 is coated on the aluminum layer mask 5. After the photoresist 6 undergoes exposure and development processes, the aluminum layer mask 5 is exposed at the lower layer of the photoresist 6, that is, the position where the photoresist 6 is developed. Dry etching is performed on the aluminum layer mask at this position, and the via pattern on the photoresist 6 is transferred to the aluminum layer mask 5.

[0033] In the first dry etching of the aluminum layer mask 5, the pressure is 1-4 Pa, Cl 2 Flow rate is 500-1000sccm, BCl 3 The flow rate is 50-300sccm.

[0034] Cl 2 The aluminum layer mask 5 is etched by reacting with aluminum. 2 Flow rate greater than 1000sccm, Cl 2 The concentration is high, the etching rate is fast, and the vias on the aluminum layer mask 5 are prone to over-etching in the lateral direction, resulting in a large deviation in the aperture size; when Cl 2 Flow rate is less than 500sccm, Cl 2 The concentration is low and the etching rate is slow, so the via hole pattern on the aluminum layer mask 5 cannot be completely etched, which affects the aperture size of the via hole.

[0035] The oxide layer on the surface of the aluminum layer will prevent chlorine from contacting the aluminum. 3 It is used to reduce the oxide layer on the surface of the aluminum layer and promote the etching process. 3 Flow rate greater than 300sccm, BCl 3 If the proportion of etching gas is too large, Cl 2 The proportion of BCl is small, which reduces the etching rate of the aluminum layer mask 5, thereby affecting the aperture size of the via hole; 3 When the flow rate is less than 50 sccm, the oxide layer on the surface of the aluminum layer is not completely removed, and the via hole pattern on the aluminum layer mask 5 cannot be completely etched, which affects the aperture size of the via hole.

[0036] Pressure affects the etching speed. When the pressure is in the range of 1-4 Pa, it can effectively control the etching rate and depth to ensure the etching effect.

[0037] S103: performing a second dry etching process on the TFT substrate to form a via hole;

[0038] After the aluminum layer mask 5 is dry-etched, the photoresist is removed using a stripping solution to obtain a film structure using the aluminum layer as a mask.

[0039] like Figure 2 As shown, the interlayer insulating layer 4 and the gate insulating layer 3 are etched from top to bottom in the film layer to form a via hole. In the second dry etching, CF 4 The flow rate is 300-600sccm, O 2 The flow rate is 50-200sccm and the chamber pressure is 1-2Pa.

[0040] CF 4 Provide etching ion source, CF 4 The flow rate is 300-600sccm. The amount of carbon tetrafluoride affects the size of the vias in the film layer. The size of the vias includes the lateral size and the longitudinal size. When CF 4 When the flow rate is greater than 600sccm, the lateral etching speed of the via is much greater than the longitudinal etching speed, resulting in excessive lateral etching and large lateral dimension deviation of the via. The prepared via does not meet the requirements, resulting in waste of materials and devices. 4 When the flow rate is less than 300 sccm, the etching speed is slow, which increases the processing time cost.

[0041] O 2 The flow rate affects the uniformity of the inclination of the via etching profile in the film layer. 2When the flow rate exceeds 200sccm, the etched profile is rough and stratified, which destroys the uniformity of the via wall layers and the via structure. At the same time, oxygen has the effect of increasing the etching rate. In order to avoid the etching process being out of control due to excessively fast etching, the etched via does not meet the requirements and the device is scrapped. 4 Under the condition of a flow rate of 300-600sccm, the flow rate of oxygen is controlled at 50-200sccm. Within this range, oxygen can accelerate the etching rate on the one hand, and ensure the uniformity between the layers of the via hole wall on the other hand, and no stratification will occur.

[0042] Pressure affects CF 4 and O 2 The concentration of carbon dioxide affects the etching rate and depth. The pressure is 1-2Pa. Within this range, the etching rate and depth can be effectively controlled to ensure the etching effect.

[0043] In the second dry etching, the aluminum layer mask 5 at the via hole and F - , O 2 - The reaction produces AlF 3 、Al 2 O 3 The product adheres to the sidewall of the via hole, protecting the sidewall and avoiding excessive etching of the lateral dimension of the via hole, that is, avoiding the retreat of the mask layer and ensuring the size of the aperture.

[0044] S104: wet-etching the amphoteric metal layer mask with an alkaline solution.

[0045] Wet etching has a high etching selectivity, which is conducive to controlling over-etching and residue, and will not damage other film layers. It has high reliability, simple operation and low cost. After the film layer is etched to form a via, wet etching is used to remove the aluminum layer mask 5. The film layer contains a metal Mo layer, which can be dissolved in an acidic solution. The use of an alkaline solvent can avoid the situation where the Mo layer is dissolved and the device performance is affected. It is precisely to avoid other metals in the film layer from being etched that the inventors chose an amphoteric metal layer as a mask. Amphoteric metals can react with both acidic solutions and alkaline solvents, that is, amphoteric metals can be etched by acidic solvents or alkaline solvents. In this embodiment, the alkaline solvent only etches the aluminum layer mask 5.

[0046] The alkaline solution reacts with the aluminum layer mask 5 to etch. The etching reaction is a reversible reaction. As the etching process proceeds, the Al in the alkaline solution 3+ As the concentration increases, Al 3+ The increase in concentration will promote the reverse reaction and inhibit the main reaction, i.e. the etching reaction, resulting in a decrease in the etching rate. Therefore, the dissolved Al needs to be replaced during the etching process. 3+The inventors have found through experiments that the aluminum layer mask 5 can be completely etched under the conditions of the pH value of the alkaline solution being 10-12, the etching time being 3-5 minutes, and the etching temperature being 50-60°C, and the etching effect is optimal.

[0047] The present invention deposits a uniform amphoteric metal layer mask on the interlayer insulating layer, coats the amphoteric metal layer mask with photoresist, exposes and develops the photoresist to obtain a via pattern, and transfers the pattern to the amphoteric metal layer mask. The present invention has the following advantages: 1. Accurate etching of the amphoteric metal layer mask is achieved by designing the thickness of the amphoteric metal layer mask and regulating the etching gas flow, pressure, and power. The etching time of the amphoteric metal layer mask is short, and the backlash phenomenon is avoided; 2. The aperture on the amphoteric metal layer mask can maintain the size of the aperture in the photoresist, that is, the aperture size is only related to the size when the hole is imaged; 3. In the subsequent via dry etching, the amphoteric metal in the amphoteric metal layer mask reacts with the etching gas to generate a sidewall protection layer, which also plays a role in avoiding backlash. The method for controlling the aperture size of via etching provided by the present invention effectively enhances the control of the aperture size, thereby controlling CD LOSS and ensuring the lap resistance and electrical characteristics of the product.

[0048] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0049] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for controlling the aperture size of a via hole on a TFT substrate, wherein the via hole penetrates an interlayer insulating layer and a gate insulating layer, characterized in that: The method comprises: S1: depositing an amphoteric metal layer mask on the interlayer insulating layer; S2: performing a first dry etching on the amphoteric metal layer mask to obtain a pattern of the via hole; S3: performing a second dry etching process on the TFT substrate to form the via hole; S4: wet etching the amphoteric metal layer mask with an alkaline solution; In step S3, the etching gas used in the second dry etching includes CF4 and O2, and satisfies: the CF4 flow rate is 300-600 sccm, the O2 flow rate is 50-200 sccm, and the chamber pressure is 1-2 Pa; During the second dry etching process, the amphoteric metal layer mask at the via hole reacts with F- and O2- to generate fluoride and oxide attached to the side wall of the via hole.

2. The method for controlling the aperture size of via holes on a TFT substrate according to claim 1, characterized in that: The amphoteric metal is any one of aluminum and zinc.

3. The method for controlling the aperture size of via holes on a TFT substrate according to claim 2, characterized in that: The amphoteric metal layer mask is deposited on the second interlayer insulating layer, and the thickness of the amphoteric metal layer mask is 30-80 nm.

4. The method for controlling the aperture size of via holes on a TFT substrate according to claim 2, characterized in that: The amphoteric metal layer mask is formed by physical vapor deposition, and the physical vapor deposition method meets the following conditions: argon gas flow rate is 100-130sccm, pressure is 0.3-0.4Pa, power is 40-50KW, and temperature is 100-120°C.

5. The method for controlling the aperture size of via holes on a TFT substrate according to claim 1, characterized in that: In step S2, the etching gas used in the first dry etching includes Cl2 and BCl3, which meet the following conditions: the pressure is 1-4 Pa, the Cl2 flow rate is 500-1000 sccm, and the BCl3 flow rate is 50-300 sccm.

6. The method for controlling the aperture size of via holes on a TFT substrate according to claim 1, characterized in that: The pH value of the alkaline solution is 10-12, the wet etching time is 3-5 minutes, and the temperature is 50-60°C.

7. The method for controlling the aperture size of via holes on a TFT substrate according to claim 1, characterized in that: The method further includes coating photoresist on the amphoteric metal layer mask and exposing and developing the photoresist to obtain the pattern of the via hole between step S1 and step S2.

8. The method for controlling the aperture size of via holes on a TFT substrate according to claim 7, characterized in that: The method further includes between step S2 and step S3: after the first dry etching is completed on the amphoteric metal layer mask, using a stripping solution to remove the photoresist, so as to obtain a film structure with the amphoteric metal layer as a mask.

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