Duty cycle generation method for extending linear modulation range in pulse width modulation voltage source inverter

Abstract

The present invention relates to a control system (20) and method for controlling the flow of current between a voltage source (22) and a multiphase motor or other application / load for controlling a multiphase motor (28). The control system includes, between each phase of the multiphase motor and the voltage source: a high-side diode (30A-C) and a high-side switch (34A-C) positioned in parallel between a positive terminal of the voltage source and the motor, wherein the high-side diode is reverse biased with respect to the positive terminal; and a low-side diode (32A-C) and a low-side switch (36A-C) positioned in parallel between a negative terminal of the voltage source and the motor, wherein the low-side diode is reverse biased with respect to the motor. The control system operates the high-side and low-side switches to provide efficient operation of the motor.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application Serial No. 62 / 910,529, filed October 4, 2019, entitled “A METHOD OF DUTY CYCLEGENERATION FOR EXTENDING THE LINEAR MODULATION RANGE IN A PULSE WIDTHMODULATED VOLTAGE SOURCE,” the disclosure of which is incorporated herein by reference. Technical Field

[0003] This invention relates to a method for generating the duty cycle of the linear modulation range in an extended pulse width modulation voltage source inverter. Background Technology

[0004] Using pulse width modulation voltage source inverters with electric motors is becoming increasingly popular.

[0005] When using this pulse-width modulation (PWM) voltage source inverter, each phase of the electric motor typically uses a pair of switching power semiconductor devices (i.e., switches) located between the electric motor and the direct current (DC) voltage source. The switches are controlled to open and close, thereby synthesizing the desired voltage waveform and controlling the flow of current within each phase of the electric motor. This technique of turning the power semiconductor devices on and off to synthesize the desired voltage and / or current waveforms is called pulse-width modulation (PWM).

[0006] One drawback of this arrangement is that the operation of the current-controlling switches requires a measurable amount of time, often referred to as the dead time, during which both switches must be controlled to open. This dead time is needed to prevent short circuits at the positive and negative terminals of the DC voltage source, and it also affects the maximum linear voltage that can be synthesized by the voltage source inverter (VSI) before duty cycle clamping and / or overmodulation are required.

[0007] Besides dead time, there exists a minimum amount of time required for a semiconductor switch to transition from closed to open and back to closed, or from open to closed and back to open. This minimum time is commonly referred to as the minimum pulse width of a power semiconductor device and is a physical characteristic of the device and its associated circuitry. This minimum pulse width also affects the maximum linear voltage that a voltage source inverter (VSI) can synthesize.

[0008] Although some methods for solving such dead time and minimum pulse width are known, further improvements are still needed. Summary of the Invention

[0009] The present invention provides a method and system for generating duty cycles and extending the maximum linear voltage capacity of a pulse width modulation voltage source inverter for powering electric motors or other VSI applications.

[0010] In one form, the invention includes a control system for a multiphase motor, used to control the flow of current between a voltage source and the multiphase motor to operate the motor as a motor or generator. Between each phase of the multiphase motor and the voltage source, the control system includes: a high-side diode and a high-side switch positioned in parallel between the positive terminal of the voltage source and a phase of the motor, wherein the high-side diode is reverse-biased relative to the positive terminal; and a low-side diode and a low-side switch positioned in parallel between the negative terminal of the voltage source and a phase of the motor, wherein the low-side diode is reverse-biased relative to the motor. The control system operates via pulse width modulation at a predetermined PWM frequency, physical components of the system defining a minimum non-zero duty cycle (Dmin), and the control system further defining a dead-time duty cycle (Ddead), wherein the control system is operable to define a variable duty cycle. Dmin is the minimum non-zero duty cycle defined by the control system during motor operation as a motor or generator; and the maximum non-unit duty cycle (Dmax) defined by the control system during motor operation is equal to one minus Dmin.

[0011] In some embodiments of the control system, the maximum non-unit duty cycle (Dmax) defined by the control system is symmetrically oriented within a single PWM cycle, wherein the pre-off time is equal to Dmin / 2 and the post-off time is equal to Dmin / 2.

[0012] In some embodiments of the control system, a carrier signal is used to control the variable duty cycle, i.e., the on-time and off-time of the power semiconductor device defined by the control system, wherein the carrier signal linearly decreases from 1.0 at the beginning of the PWM cycle to 0.0 at the midpoint of the PWM cycle and linearly increases from 0.0 at the midpoint of the PWM cycle to 1.0 at the end of the PWM cycle, and wherein:

[0013] When the current from VSI to the motor phase is positive, the high-side switch opens when the carrier signal is greater than the desired duty cycle and closes when the carrier signal is less than the desired duty cycle; the low-side switch closes when the carrier signal is greater than (desired duty cycle + 2 * Ddead) and opens when the carrier signal is less than (desired duty cycle + 2 * Ddead); and

[0014] When the current from VSI to the motor phase is negative, the high-side switch opens when the carrier signal is greater than (desired duty cycle - 2 * Ddead) and closes when the carrier signal is less than (desired duty cycle - 2 * Ddead); the low-side switch closes when the carrier signal is greater than the desired duty cycle and opens when the carrier signal is less than the desired duty cycle.

[0015] In embodiments using a carrier signal, the control system can be configured such that when the current from VSI to the motor phase is positive and (desired duty cycle + 2 * Ddead) is higher than the maximum duty cycle (Dmax) and the desired duty cycle is equal to or lower than Dmax, the high-side switch closes when the carrier signal is less than the desired duty cycle and opens when the carrier signal is greater than the desired duty cycle; the low-side switch remains open throughout the entire PWM cycle.

[0016] In embodiments using a carrier signal, the control system can be configured such that when the current from VSI to the motor phase is positive and the desired duty cycle is greater than Dmax and equal to or less than (1-Dmin / 2), the high-side switch closes when the carrier signal is less than Dmax and opens when the carrier signal is greater than Dmax; the low-side switch remains open throughout the entire PWM cycle.

[0017] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor phase is positive and the desired duty cycle is higher than (1-Dmin / 2), the high-side switch remains closed throughout the PWM cycle; the low-side switch remains open throughout the PWM cycle.

[0018] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor phase is positive and the desired duty cycle is equal to or lower than the minimum duty cycle (Dmin) and equal to or higher than (Dmin / 2), the high-side switch closes when the carrier signal is less than Dmin and opens when the carrier signal is greater than Dmin; wherein the low-side switch opens when the carrier signal is less than (Dmin+2*Ddead) and closes when the carrier signal is greater than (Dmin+2*Ddead).

[0019] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor phase is positive and the desired duty cycle is less than (Dmin / 2), the high-side switch remains open throughout the PWM cycle; the low-side switch remains closed throughout the PWM cycle.

[0020] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor phase is negative and the desired duty cycle is higher than the maximum duty cycle (Dmax) and equal to or lower than (1-Dmin / 2), the high-side switch closes when the carrier signal is less than (Dmax-2*Ddead) and opens when the carrier signal is greater than (Dmax-2*Ddead); wherein the low-side switch closes when the carrier signal is greater than Dmax and opens when the carrier signal is less than Dmax.

[0021] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor phase is negative and the desired duty cycle is higher than (1-Dmin / 2), the high-side switch remains closed throughout the entire PWM cycle; the low-side switch remains open throughout the entire PWM cycle.

[0022] In embodiments using a carrier signal, the control system can be configured such that when the current from VSI to the motor phase is negative and (desired duty cycle - 2 * Ddead) is lower than the minimum duty cycle (Dmin) and the desired duty cycle is equal to or higher than the minimum duty cycle (Dmin), the high-side switch remains open throughout the entire PWM cycle; the low-side switch closes when the carrier signal is greater than the desired duty cycle and opens when the carrier signal is less than the desired duty cycle.

[0023] In embodiments using a carrier signal, the control system can be configured such that when the current from VSI to the motor phase is negative and the desired duty cycle is lower than the minimum duty cycle (Dmin) and equal to or greater than (1-Dmin / 2), the high-side switch remains open throughout the entire PWM cycle; the low-side switch closes when the carrier signal is greater than Dmin and opens when the carrier signal is less than Dmin.

[0024] In embodiments using carrier signals, the control system can be configured such that when the current from VSI to the motor is negative and the desired duty cycle is less than (Dmin / 2), the high-side switch remains open throughout the entire PWM cycle; the low-side switch remains closed throughout the entire PWM cycle.

[0025] In some embodiments, the motor is a three-phase motor.

[0026] In some embodiments, Dmin and Ddead are determined to be functions of at least one of the following:

[0027] (a) Manufacturer-recommended dead time and / or minimum pulse width;

[0028] (b) Empirical testing of physical components to determine the required dead time and / or minimum pulse width;

[0029] (c) Formula: Ddead=([(Offmax-Onmin)+(PDmax-PDmin)]*SF) / (pulse cycle duration)

[0030] Where Ddead is the dead time duty cycle; Offmax is the maximum disconnect delay of the switch; Onmin is the minimum turn-on delay of the switch; PDmax is the maximum propagation delay of the driver; PDmin is the minimum propagation delay of the driver; and SF is the safety factor.

[0031] Some embodiments also include a motor operatively coupled to the control system.

[0032] In another form, the invention includes a method for operating a multiphase motor as an electric motor using a control system for controlling the current flow of the multiphase motor. The method includes:

[0033] Provided between each phase of the multiphase motor and the voltage source:

[0034] A high-side diode and a high-side switch are connected in parallel between the positive terminal of the voltage source and the motor, wherein the high-side diode is reverse biased relative to the positive terminal; and

[0035] A low-side diode and a low-side switch are positioned in parallel between the negative terminal of the voltage source and the motor, wherein the low-side diode is biased in the opposite direction to the motor.

[0036] The control system is used as a pulse width modulation control system with a predetermined pulse cycle duration, wherein the physical components of the control system define a minimum duty cycle (Dmin) and a dead time duty cycle (Ddead); and

[0037] The operation and control system limits the variable duty cycle:

[0038] Where Dmin is the minimum non-zero duty cycle achieved by the control system during the operation of the motor as a motor or generator; and

[0039] The maximum non-unit duty cycle (Dmax) limited by the control system during the operation of the motor as a motor or generator is equal to one minus Dmin.

[0040] In some embodiments, a carrier signal is used to control a variable duty cycle defined by a control system, wherein the carrier signal linearly decreases from 1.0 at the beginning of the PWM cycle to 0.0 at the midpoint of the PWM cycle and linearly increases from 0.0 at the midpoint of the PWM cycle to 1.0 at the end of the PWM cycle, and wherein:

[0041] When the variable duty cycle is between Dmin and (Dmax – 2 * Ddead) and the current is positive (i.e., entering the motor phase), the high-side switch opens when the carrier signal is greater than (the desired duty cycle) and closes when the carrier signal is less than (the desired duty cycle); the low-side switch closes when the carrier signal is greater than (the desired duty cycle + 2 * Ddead) and opens when the carrier signal is less than (the desired duty cycle + 2 * Ddead); and

[0042] When the variable duty cycle is between (Dmin + 2 * Ddead) and Dmax and the current is negative (i.e., flowing out of the motor phase), the high-side switch opens when the carrier signal is greater than (desired duty cycle - 2 * Ddead) and closes when the carrier signal is less than (desired duty cycle - 2 * Ddead); the low-side switch closes when the carrier signal is greater than (desired duty cycle) and opens when the carrier signal is less than (desired duty cycle).

[0043] When the current is positive and (desired duty cycle + 2 * Ddead) is higher than the maximum duty cycle (Dmax) and the desired duty cycle is equal to or lower than Dmax, the high-side switch closes when the carrier signal is less than the desired duty cycle and opens when the carrier signal is greater than the desired duty cycle; the low-side switch remains open throughout the entire PWM cycle.

[0044] When the current is positive and the desired duty cycle is greater than Dmax and equal to or less than (1-Dmin / 2), the high-side switch closes when the carrier signal is less than Dmax and opens when the carrier signal is greater than Dmax; the low-side switch remains open throughout the entire PWM cycle.

[0045] When the current is positive and the desired duty cycle is higher than (1-Dmin / 2), the high-side switch remains closed throughout the entire PWM cycle; the low-side switch remains open throughout the entire PWM cycle.

[0046] When the current is positive and the desired duty cycle is lower than the minimum duty cycle (Dmin) and equal to or greater than (Dmin / 2), the high-side switch closes when the carrier signal is less than Dmin and opens when the carrier signal is greater than Dmin; and the low-side switch opens when the carrier signal is less than (Dmin+2*Ddead) and closes when the carrier signal is greater than (Dmin+2*Ddead).

[0047] When the current is positive and the desired duty cycle is less than (Dmin / 2), the high-side switch remains open throughout the entire PWM cycle; the low-side switch remains closed throughout the entire PWM cycle.

[0048] When the current is negative and the desired duty cycle is higher than the maximum duty cycle (Dmax) and equal to or lower than (1-Dmin / 2), the high-side switch closes when the carrier signal is less than (Dmax-2*Ddead) and opens when the carrier signal is greater than (Dmax-2*Ddead); the low-side switch closes when the carrier signal is greater than Dmax and opens when the carrier signal is less than Dmax.

[0049] When the current is negative and the desired duty cycle is higher than (1-Dmin / 2), the high-side switch remains closed throughout the entire PWM cycle; the low-side switch remains open throughout the entire PWM cycle.

[0050] When the current is negative and (desired duty cycle - 2 * Ddead) is lower than the minimum duty cycle (Dmin) and the desired duty cycle is equal to or higher than the minimum duty cycle (Dmin), the high-side switch remains open throughout the entire PWM cycle; the low-side switch closes when the carrier signal is greater than the desired duty cycle and opens when the carrier signal is less than the desired duty cycle.

[0051] When the current is negative and the desired duty cycle is lower than the minimum duty cycle (Dmin) but equal to or greater than (1-Dmin / 2), the high-side switch remains open throughout the entire PWM cycle; the low-side switch closes when the carrier signal is greater than Dmin and opens when the carrier signal is less than Dmin; and

[0052] When the current is negative and the desired duty cycle is less than (Dmin / 2), the high-side switch remains open throughout the entire PWM cycle; the low-side switch remains closed throughout the entire PWM cycle.

[0053] In some embodiments, Dmin and Ddead are determined to be functions of at least one of the following:

[0054] (a) Manufacturer-recommended dead time and / or minimum pulse width;

[0055] (b) Empirical testing of physical components to determine the required dead time and / or minimum pulse width;

[0056] (c) Formula: Ddead=([(Offmax-Onmin)+(PDmax-PDmin)]*SF) / (pulse cycle duration)

[0057] Where Ddead is the dead time duty cycle; Offmax is the maximum disconnect delay of the switch; Onmin is the minimum turn-on delay of the switch; PDmax is the maximum propagation delay of the driver; PDmin is the minimum propagation delay of the driver; and SF is the safety factor. Attached Figure Description

[0058] The above and other features of the invention, as well as the ways in which they are implemented, will become more apparent and the invention itself will be better understood by referring to the following description of embodiments of the invention taken in conjunction with the accompanying drawings, wherein:

[0059] Figure 1 This is a schematic diagram of a system that uses a pulse width modulation voltage source inverter and an electric motor.

[0060] Figure 2 This is a schematic diagram of a pair of switching power semiconductors used in one phase of an electric motor.

[0061] Figure 3 is a diagram illustrating a prior art method for inserting and compensating for dead time.

[0062] Figure 4 This is a schematic diagram showing the current flow when there is a positive current (i.e., the current entering the phase of the motor) and both switches are open.

[0063] Figure 5 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switching of the positive current.

[0064] Figure 6 It shows Figure 5 The switching timing diagram shows how the PWM scheme causes the PWM voltage to be generated in the motor.

[0065] Figure 7 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switch near the maximum duty cycle when the desired duty cycle of the positive current approaches one unit.

[0066] Figure 8 This is a diagram illustrating the clamping strategy of the high-side switch near the maximum duty cycle when the desired duty cycle of the positive current is close to one unit.

[0067] Figure 9 It is a switching timing diagram, showing... Figure 8 The restraint strategy and Figure 7 How can a PWM scheme generate a PWM voltage near the maximum duty cycle of the motor when the desired duty cycle of the positive current is close to one unit?

[0068] Figure 10 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switch near the minimum duty cycle when the desired duty cycle of the positive current approaches zero.

[0069] Figure 11 This is a diagram illustrating the clamping strategy of the high-side switch near the minimum duty cycle when the desired duty cycle of the positive current is close to zero.

[0070] Figure 12 This is a diagram illustrating the clamping strategy of the low-side switch near the minimum duty cycle when the desired duty cycle of the positive current is close to zero.

[0071] Figure 13 It is a switching timing diagram, showing... Figure 11 and 12 How does the clamping strategy generate PWM voltage in the motor when the expected duty cycle of the positive current is close to zero and near the minimum duty cycle?

[0072] Figure 14 This is a schematic diagram showing the current flow when there is a negative current (i.e., the current leaving the phase of the motor) and both switches are open.

[0073] Figure 15 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switching of the negative current.

[0074] Figure 16 It shows Figure 15 The switching timing diagram shows how the PWM scheme causes the PWM voltage to be generated in the motor.

[0075] Figure 17 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switch near the maximum duty cycle when the desired duty cycle of the negative current approaches one unit.

[0076] Figure 18 This is a diagram illustrating the clamping strategy of the low-side switch near the maximum duty cycle when the desired duty cycle of the negative current is close to one unit.

[0077] Figure 19 This is a diagram illustrating the clamping strategy of the high-side switch near the maximum duty cycle when the desired duty cycle of the negative current is close to one unit.

[0078] Figure 20 It is a switching timing diagram, showing... Figure 18 and 19 How does the clamping strategy generate PWM voltage in the motor when the expected duty cycle of the negative current is close to one unit, near the maximum duty cycle?

[0079] Figure 21 This is a diagram showing the carrier value within a single PWM cycle and how it interacts with the duty cycle equation to control the switch near the minimum duty cycle when the desired duty cycle of the negative current approaches zero.

[0080] Figure 22 This is a diagram illustrating the clamping strategy of the low-side switch near the minimum duty cycle when the desired duty cycle of the negative current is close to zero.

[0081] Figure 23 It is a switching timing diagram, showing... Figure 22 The restraint strategy and Figure 21 How can a PWM scheme generate a PWM voltage in the motor when the desired duty cycle of the negative current is close to zero, near the minimum duty cycle?

[0082] In the various views, corresponding reference numerals denote corresponding parts. Although the examples set forth herein describe embodiments of the invention in one form, the embodiments disclosed below are not intended to be exhaustive or to be construed as limiting the scope of the invention to the precise forms disclosed. Detailed Implementation

[0083] The control system 20 for the multiphase motor 28 includes a voltage source 22, an inverter circuit 24, and a processor 26. When the AC motor 28 operates as a motor, the control system 20 controls the current to drive the AC motor, such as... Figure 1 As illustrated in the diagram. This system can be used for a variety of different applications.

[0084] Although motor 28 may also be referred to herein as an electric motor, motor 28 may take the form of a motor that can operate only as an electric motor, only as a generator, or selectively as either an electric motor or a generator. For example, in the illustrated embodiment, motor 28 is in the form of a three-phase motor that can operate as either an electric motor or a generator and is used in a hybrid electric vehicle to alternately provide torque to reduce the traction load on the vehicle's internal combustion engine or to generate current to charge one or more energy storage devices (e.g., batteries or battery packs). The following discussion relates to the operation of this motor in its electric mode; therefore, for simplicity and clarity, this motor will be referred to as an electric motor. Thus, as used herein, the term "electric motor" means any motor capable of operating as an electric motor, but does not require or imply that the motor must operate only as an electric motor.

[0085] Voltage source 22 may be in the form of one or more direct current (DC) batteries and provide electrical energy to drive electric motor 28. Inverter circuit 24 converts the DC output of voltage source 22 into alternating current (AC) suitable for driving electric motor 28. Inverter circuit 24 includes a pair of diodes and a pair of switches for each phase of electric motor 28. In the illustrated embodiment, circuit 24 includes high-side diodes 30A, 30B, 30C, high-side switches 34A, 34B, 34C, low-side diodes 32A, 32B, 32C, and low-side switches 36A, 36B, 36C. A pair of diodes and a pair of switches are provided for each individual phase of the motor, which control the voltage supplied to that particular phase of the electric motor. In the illustrated embodiment, diodes 30A, 32A and switches 34A, 36A control the voltage of the first phase; diodes 30B, 32B and switches 34B, 36B control the voltage of the second phase; and diodes 30C, 32C and switches 34C, 36C control the voltage of the third phase.

[0086] Switches 34A-C and 36A-C are controlled by processor 26 and can be in the form of field-effect transistors (FETs) or insulated-gate bipolar transistors (IGBTs). Alternative switching mechanisms, such as bipolar junction transistors (BJTs), such as NPN or PNP transistors, can also be used. Processor 26 generates a PWM signal for each switch, which controls when the switch is turned on (closed) or off (open). The generation of the PWM signal is discussed in more detail below. Dashed line 38 indicates the wires used to transmit the PWM signal to the individual switches to control their operation.

[0087] In the illustrated embodiment, the electric motor 28 includes three phases corresponding to a stator winding 40A of the first phase (phase A), a stator winding 40B of the second phase (phase B), and a stator winding 40C of the third phase (phase C). Each phase has a corresponding pair of diodes and a pair of switches for controlling the current supply therethrough. In the illustrated embodiment, the electric motor 28 is a three-phase motor with a rotor containing permanent magnets.

[0088] Figure 1An example of an AC electric motor is shown; however, this disclosure can be used to provide PWM voltage to any suitable AC electric motor and is not limited to any particular design or type of electric motor. It is not limited to the operation of electric motors and can also be used to drive other 2-level voltage source inverters for other loads. For example, the electric motor 28 shown is a three-phase electric motor; however, alternative embodiments may employ AC electric motors with different numbers of phases. In addition to motors with rotors containing permanent magnets, alternative designs, such as induction motors, may be used. Similarly, although electric motor 28 is shown as having three phases connected in a star or star configuration, electric motor 28 is not limited to this type of configuration and may alternatively employ delta connections between phases. Those skilled in the art will recognize that various other alternative embodiments of electric motor 28 used with system 20 are also possible.

[0089] from Figure 1 As can be seen, each phase of the electric motor 28 has a similar arrangement of diodes 30 and 32 and switches 34 and 36. A single group of diodes 30 and 32 and switches 34 and 36... Figure 2 The following is illustrated and discussed. General switch symbols are used for switches, but such switches can advantageously take the form of FETs or IGBTs. The operation of this arrangement is similar for each phase, and this disclosure can be made by including, for example... Figure 2 The diagram shows a pair of diodes and switches for each phase of an electric motor, applicable to electric motors with an optional number of electrical phases.

[0090] from Figure 1 and Figure 2 As can be seen, between each phase of the electric motor 28 and the voltage source 22, the control system 20 includes a high-side diode 30 and a high-side switch 34 connected in parallel between the positive terminal (+) of the voltage source 22 and the corresponding winding of the electric motor 28. The high-side diode 30 is reverse biased relative to the positive terminal, thereby suppressing the current in the direction from the positive terminal to the electric motor 28.

[0091] Also located between each phase of the electric motor 28 and the voltage source 22, the control system 20 includes a low-side diode 32 and a low-side switch 36 connected in parallel between the negative terminal (-) of the voltage source 22 and the corresponding winding of the electric motor 28. The low-side diode 32 is reverse biased relative to the winding of the electric motor 28, thereby suppressing current in the direction from the electric motor 28 to the negative terminal.

[0092] When both the high-side switch 34 and the low-side switch 36 of a specific phase are open and the electric motor 28 is operating, the connected windings are typically energized. In this case, the positioning of diodes 30 and 32 results in the following: if the current is negative, the high-side diode 30 allows current conduction from the electric motor 28; if the current is positive, the low-side diode 32 allows current conduction from the electric motor 28.

[0093] In this regard, it should be noted that positive current can be considered as flowing into the neutral point of the motor through the connected phases of the motor, while negative current can be considered as flowing out of the motor from the phases of the motor away from the neutral point at the center of the star-connected windings.

[0094] As described above, the PWM signal is used to control the operation of switches 34 and 36, thereby controlling the flow of current through the electric motor 28. When using the PWM signal to control switches 34 and 36, several factors must be considered. First, it is important to note that if switches 34 and 36 are closed simultaneously, a short circuit will occur, sometimes referred to as a bridge shoot-through. This situation is undesirable and can lead to system failure. Another factor involves the practical limitations of the physical circuit components forming the inverter circuit 24, which require a measurable amount of time to open and close the switches. To avoid short circuits, a dead time period is used to separate the closing of the other of the high-side and low-side switches after one of them has opened.

[0095] One characteristic of a PWM signal is its frequency, which is directly related to the duration of each PWM cycle. The PWM cycle, also referred to as the pulse cycle duration in this paper, is... Figure 6 The reference numeral 42 indicates the period. While a variable-duration PWM period is conceivable, it is more common to use a PWM period with a predetermined and constant duration, such as 1 / 10,000 of a second, which directly corresponds to a frequency, such as 10 kHz. For the control operation of an electric motor, such as in the exemplary embodiment, the frequency of the PWM signal is typically in the tens of kHz range; however, this disclosure is not limited to such a frequency range.

[0096] Duty cycle corresponds to the proportion or percentage of the "on" time relative to the entire duration of the PWM cycle. Figure 6 In the figure, reference numeral 44 indicates a graphical representation of the duty cycle. In other words, it is a graphical representation of the ratio between the amount of time the motor's phase terminals are expected to be connected to the positive DC terminals and the amount of time for the pulse cycle duration 42 or the PWM cycle. This is typically expressed as a percentage or fraction of 1. For example, if the duty cycle lasts exactly half the entire duration of the PWM cycle, it would be 50 or 0.5, depending on the numerical convention employed. This disclosure uses a numerical convention from 0.0 to 1.0, but other numerical conventions or methods can be readily adapted to quantify the duty cycle.

[0097] The electric motor 28 is an AC motor, and the current flowing through each phase will alternate between positive and negative current over time, which is achieved by appropriately switching switches 34 and 36. Due to the physical limitations of the circuit components (i.e., the time required to close and open the switches) and to prevent short circuits, the maximum linear voltage that can be synthesized using pulse width modulation of a voltage source inverter is limited.

[0098] Figure 3 illustrates a known method for implementing duty cycle commands. In this example of a conventional PWM method, only a single PWM cycle for one phase is shown. The top line illustrates a description of the original duty cycle command expected for the correct operation of the electric motor. In this example, a positive current is supplied to the phase of the electric motor, and when both switches are open, the positive current from the electric motor flows through the low-side diode, which is shown in Figure 3 by the area labeled "Diode On" with a hash mark. Note that when the current flows through the low-side diode, the voltage applied to the phase of the electric motor is close to the negative AC terminal voltage. To prevent short circuits, a dead time interval is inserted between the low-side switch opening and the high-side switch closing. Similarly, at the end of the duty cycle, a dead time interval is inserted between the high-side switch opening and the low-side switch closing. The bottom waveform of Figure 3 shows the final voltage waveform actually applied to the phase of the electric motor. It can be seen that in this conventional method, the voltage waveform has the same duty cycle as the original duty cycle command. This is achieved by compensating for the dead time interval by adding a known equivalent dead time duty cycle to the original duty cycle command before generating the PWM output. When considering the aforementioned measurable amount of time required for switching on and off, this conventional method of compensating for the dead time interval can limit the maximum achievable linear modulation range of the inverter circuit 24, and thus limit the quality of the voltage waveform synthesized by the control system 20. Furthermore, as seen in this conventional method, the resulting voltage waveform is delayed by half the dead time interval compared to the original command. This delay is undesirable because it causes timing problems in the coordination of sampling and execution within the processor 26.

[0099] Now refer to Figure 4-23The method by which control system 20 performs pulse width modulation is explained. In this illustrated embodiment, control system 20 is a pulse width modulation control system with a predetermined pulse cycle duration 42, and wherein the physical components of the control system define a minimum non-zero duty cycle (Dmin) and a dead-time duty cycle (Ddead). Control system 20 is used to define a variable duty cycle, wherein Dmin is the minimum non-zero duty cycle defined by the control system during motor operation; and wherein the maximum non-unit duty cycle (Dmax) defined by the control system during motor operation is equal to one minus Dmin. Although the exemplary embodiment has a predetermined pulse cycle duration, alternative embodiments may employ a variable pulse cycle duration or a PWM frequency.

[0100] First go to Figure 4-6 These figures illustrate the case where positive current is supplied to the phases of the electric motor 28 for a duty cycle between Dmin and (Dmax-2*Ddead). In the example shown, the variable duty cycle, defined by the control system, is controlled using a carrier signal, which linearly decreases from 1.0 at the beginning of the pulse cycle to 0.0 at the midpoint of the pulse cycle, and linearly increases from 0.0 at the midpoint of the pulse cycle to 1.0 at the end of the pulse cycle. Figure 5 The carrier signal 46 for a single PWM cycle is shown.

[0101] The carrier signal method disclosed in this paper results in the center point of the duty cycle coinciding with the center point of the PWM cycle. However, it is possible to use a duty cycle with a fixed leading edge (start time) or a fixed trailing edge (end time). For example, the leading edge of the duty cycle can be fixed to always start at 0.5 (Dmin) or the trailing edge of the duty cycle can be fixed at 1.0 - 0.5 (Dmin). In such alternative methods, the duration of the duty cycle will be calculated using the same method described herein and positioned within the PWM cycle to start at a fixed start time or end at a fixed end time. However, using a duty cycle whose center point coincides with the center point of the PWM cycle can provide computational efficiency.

[0102] When the current flowing through a phase of the motor is positive (i.e., current flows into a phase of the motor), such as Figure 4-6 As shown in the diagram, when the carrier signal is greater than the desired duty cycle, the high-side switch is open, and when the carrier signal is less than the desired duty cycle, the high-side switch is closed; when the carrier signal is greater than (desired duty cycle + 2 * Ddead), the low-side switch is closed, and when the carrier signal is less than (desired duty cycle + 2 * Ddead), the low-side switch is open.

[0103] exist Figure 5 In the middle, when the carrier signal is parallel to the horizontal line S x,LWhen D* + 2Ddead intersects, the low-side switch opens or closes depending on whether the carrier signal falls below or rises above the horizontal line. The low-side switch closes when the carrier signal is greater than the value of the horizontal line. D* represents the desired duty cycle. Similarly, in Figure 5 In the middle, when the carrier signal is parallel to the horizontal line S x,H When D* intersects, the high-side switch opens or closes, with the high-side switch closing when the carrier signal is less than this value. D* is used to specify... Figure 5 and Figure 6 The duty cycle command in [the context of the command]. Figure 5 In this context, different values ​​represent fractions of the PWM cycle, and therefore are unitless.

[0104] exist Figure 6 In the middle, S x,H The line corresponds to the control signal transmitted to the high-side switch. When this line is in the raised position, the high-side switch is closed ("on"), and when it is in the lowered position, the high-side switch is open or closed ("off"). Similarly, S x,L The line corresponds to the control signal transmitted to the low-side switch. When this line is in the raised position, the low-side switch is closed ("on"), and when it is in the lowered position, the low-side switch is open or closed ("off"). When line Vx rises, the positive terminal of the DC voltage source is applied to a phase of the electric motor 28. When line Vx is not rising, the negative terminal of the DC voltage source is applied to a phase of the electric motor 28. Figure 6 As can be seen, line Vx corresponds to the desired duty cycle D*, and both are located at the center of the PWM cycle. Figure 6 The dashed area marked as diode conduction occurs when both switches are open during the dead time and positive current flows through the low-side diode, thus connecting the phase of the electric motor 28 to the negative terminal of the DC voltage source.

[0105] Figure 14-16 The corresponding scenario is illustrated, where a negative current is supplied to the electric motor 28 for duty cycles between (Dmin + 2 * Ddead) and Dmax. When the current flowing through a phase of the motor is negative (i.e., current flows out of a phase of the motor), the high-side switch opens when the carrier signal is greater than (desired duty cycle - 2 * Ddead) and closes when the carrier signal is less than (desired duty cycle - 2 * Ddead); the low-side switch closes when the carrier signal is greater than the desired duty cycle and opens when the carrier signal is less than the desired duty cycle.

[0106] exist Figure 15 In the middle, when the carrier signal is parallel to the horizontal line S x,L When D* intersects, the low-side switch opens or closes depending on whether the carrier signal falls below or rises above the line. The low-side switch opens when the carrier signal is below the value of the horizontal line. Similarly, in Figure 15In the middle, when the carrier signal is parallel to the horizontal line S x,H When D*-2Ddead intersects, the high-side switch opens or closes, where the high-side switch closes when the carrier signal is less than this value. D* is used to specify... Figure 15 and 16 The command duty cycle in the command. It should be noted that when both switches are open, the high-side diode conducts a negative current. Due to the diode's conduction and the difference between the negative and positive currents, the phase of the motor 28 is connected to the positive terminal of the DC voltage source throughout the entire time the low-side switch is open, including the dead time when both switches are open. This can be achieved in... Figure 16 This can be seen in the Vx line.

[0107] Now turn to the very end of the variable duty cycle. Figure 7-9 This illustrates the case where positive current is supplied to the phase of the electric motor 28 for a duty cycle close to Dmax. Figure 7 and Figure 5 Similar, but illustrating a case where the duty cycle is close to the maximum duty cycle. In the illustrated embodiment, the maximum non-unit duty cycle (Dmax) is equal to one minus the minimum non-zero duty cycle (Dmin).

[0108] When a positive current flows between the DC voltage source and the phase of the motor and (desired duty cycle + 2 * Ddead) is equal to or greater than the maximum duty cycle (Dmax), the low-side switch remains on for the entire PWM cycle. In this case, there is essentially no "dead time" because the low-side switch is never activated. Instead, the low-side switch remains off, and the time the low-side diode conducts is equivalent to the "on time" of the low-side switch. Therefore, the maximum linear voltage that the voltage source inverter can synthesize is not limited by the dead-time insertion. This is a novel and advantageous feature of the disclosed embodiment.

[0109] Figure 8 The clamping strategy of the high-side switch is illustrated when the desired duty cycle is equal to or greater than the maximum duty cycle. As previously described, the low-side switch is clamped open when D* + 2*Ddead is greater than or equal to Dmax. The high-side switch executes D* until D* is greater than Dmax. If D* is greater than Dmax and D* is less than or equal to 1 - (Dmin / 2), the high-side switch executes Dmax. If D* is greater than 1 - (Dmin / 2), the high-side switch executes 1.

[0110] Figure 9 The maximum non-unit duty cycle is shown, where the duty cycle is symmetrically oriented within the pulse cycle, and the pre-off time of the high-side switch is equal to Dmin / 2, and the post-off time of the high-side switch is equal to Dmin / 2.

[0111] Figure 10-13This illustrates the case where positive current is supplied to the phases of the electric motor 28 for a duty cycle close to the minimum duty cycle. When the current flowing through a phase of the motor is positive (i.e., current flows into the phase of the motor) and the desired duty cycle is equal to or lower than the minimum duty cycle (Dmin) and equal to or greater than 0.5*Dmin, the high-side switch closes when the carrier signal is less than Dmin and opens when the carrier signal is greater than Dmin; and the low-side switch opens when the carrier signal is less than (Dmin+2*Ddead) and closes when the carrier signal is greater than (Dmin+2*Ddead). When the current flowing through a phase of the motor is positive (i.e., current flows into the phase of the motor) and the desired duty cycle is less than 0.5*Dmin, the high-side switch is closed throughout the entire PWM cycle, and the low-side switch is open throughout the entire PWM cycle.

[0112] Figure 10 and Figure 7 and Figure 5 Similar, but shows the case where the duty cycle is close to the minimum duty cycle. Figure 13 A chart is provided showing the duty cycle and the operation of the high-side and low-side switches within the expected duty cycle of Dmin. Figure 11 The clamping strategy representing the high-side switch, Figure 12 This represents the clamping strategy for the low-side switch, which is for a desired duty cycle and positive current equal to or below Dmin.

[0113] Figure 17-20 This illustrates the case where a negative current is supplied to the phase of the electric motor 28 for a duty cycle close to the maximum duty cycle. When the current flowing through a phase of the motor is negative (i.e., current flows out of the phase of the motor) and the desired duty cycle is equal to or higher than the maximum duty cycle (Dmax) and equal to or lower than (1–0.5*Dmin), the high-side switch closes when the carrier signal is less than (Dmax-2*Ddead) and opens when the carrier signal is greater than (Dmax-2*Ddead); and the low-side switch closes when the carrier signal is greater than Dmax and opens when the carrier signal is less than Dmax. When the current flowing through a phase of the motor is negative (i.e., current flows out of the phase of the motor) and the desired duty cycle is higher than (1-0.5*Dmin), the high-side switch closes for the entire PWM cycle, and the low-side switch opens for the entire PWM cycle.

[0114] Figure 17 and Figure 15 Similarly, it shows the case where the duty cycle is close to the maximum duty cycle. Figure 20 A chart is provided illustrating the duty cycle and the operation of the high-side and low-side switches when the duty cycle command is equal to Dmax. From Figure 20As can be seen, because this situation involves negative current, the output voltage corresponds to the positive terminal of the DC voltage source whenever both the high-side and low-side switches are open, or whenever the high-side switch is closed and the low-side switch is open.

[0115] Figure 18 and 19 This indicates the clamping strategy used for high-side and low-side switching when the desired duty cycle is equal to or higher than the negative current Dmax. For example... Figure 18 As shown, when the desired duty cycle is higher than 1-0.5*Dmin, the low-side switch is clamped open. Figure 19 As shown, when the desired duty cycle is higher than 1–0.5*Dmin, the high-side switch is clamped closed. When the desired duty cycle is equal to or higher than Dmax and equal to or lower than 1–0.5*Dmin, the high-side switch closes when the carrier signal is less than Dmax and opens when the carrier signal is greater than Dmax; and the low-side switch opens when the carrier signal is less than (Dmax-2*Ddead) and closes when the carrier signal is greater than (Dmax-2*Ddead).

[0116] Figure 21-23 This illustrates the case where a negative current is supplied to the electric motor 28 for a duty cycle close to the minimum duty cycle. When the current flowing through a phase of the motor is negative (i.e., current flows out of a phase of the motor) and (desired duty cycle - 2 * Ddead) is equal to or lower than the minimum duty cycle (Dmin), and the desired duty cycle is equal to or higher than the minimum duty cycle (Dmin), the high-side switch remains open for the entire pulse cycle duration; and the low-side switch is open when the carrier signal is less than the desired duty cycle (D*) and closed when the carrier signal is greater than the desired duty cycle (D*). When the current is negative and the desired duty cycle is lower than the minimum duty cycle, the high-side switch remains open for the entire pulse cycle duration, while the low-side switch remains closed for the entire pulse cycle duration.

[0117] Figure 21 and Figure 15 and 17 Similarly, the case where the duty cycle is close to the minimum duty cycle used for negative current is shown. As the duty cycle approaches the minimum duty cycle, once the desired duty cycle drops below (Dmin + 2 * Ddead), the high-side switch will remain on for the entire PWM cycle. Figure 23 The operation of the high-side and low-side switches is shown, as well as the duty cycle for the minimum duty cycle under negative current.

[0118] Figure 22This describes the clamping strategy used for the low-side switch when the duty cycle is equal to or less than Dmin and the current is negative. In this case, whenever D*-2(Ddead) is less than Dmin, the high-side switch is clamped open. The low-side switch continues to operate at D* until Dmin is reached. When D* is less than Dmin and D* is equal to or greater than (Dmin / 2), the low-side switch operates at Dmin. When D* is less than (Dmin / 2), the low-side switch is clamped on.

[0119] The embodiments of the control system described herein can use one of a variety of methods to determine the minimum duty cycle (Dmin) and dead time duty cycle (Ddead) values ​​used in the system.

[0120] Manufacturers of the electrical components used to manufacture control circuit 24 can provide on / off characteristics for a given power semiconductor device. This information can be used to determine the minimum pulse width and / or the necessary dead time. When generating Ddead or Dmin values ​​based on the manufacturer's technical data, delays caused by other components of the circuit may also need to be incorporated into these values.

[0121] The following formula can also be used to determine dead time:

[0122] Dead = [(Offmax - Omin) + (PDmax - PDmin)] * SF / (PWM period)

[0123] Where Ddead is the dead time; Offmax is the maximum disconnect delay of the switch; Onmin is the minimum turn-on delay of the switch; PDmax is the maximum propagation delay of the driver; PDmin is the minimum propagation delay of the driver; and SF is the safety factor.

[0124] Another method for determining these values ​​is to use empirical testing to determine the Dmin of the actual physical components of the control circuit 24. When this method is used for systems that are to be mass-produced, it is generally recommended to use a safety factor. For example, if empirical testing determines that the circuit can achieve a Dmin of X, then in practice 1.2X might be used as the Dmin value to account for manufacturing tolerances and other inconsistencies when the system is put into production.

[0125] Then, use the values ​​of Dmin and Ddead to set the values ​​used in conjunction with the method described above. At this point, it should be noted that Dmin is set to approximate the dwell time of the switch in one state (on or off) when the switch is operated by the control circuit as quickly as possible. In practice, this value will be slightly larger than the actual minimum time providing a safety margin, for example, 20% larger.

[0126] The control system improves efficiency by setting the minimum pre-disconnect time and minimum post-disconnect time to Dmin / 2. It is important to note that... Figure 9 The diagram illustrates the case where the pre-disconnect time and post-disconnect time of the high-side switch are Dmin / 2. These are the minimum non-zero pre-disconnect time and minimum non-zero post-disconnect time of the high-side switch. Figure 20 The example shows the case where the pre-disconnect time and post-disconnect time of the low-side switch are Dmin / 2. These are the minimum non-zero pre-disconnect time and minimum non-zero post-disconnect time of the low-side switch.

[0127] from Figure 6 , 9 As can be seen in 13, 16, 20, and 23, if the high-side switch is not clamped to either closed or open throughout the entire PWM cycle, the high-side switch begins each PWM cycle in an open or "off" position with a duration of at least Dmin / 2. The high-side switch also ends each PWM cycle in an open or "off" position with a duration of at least Dmin / 2. Therefore, if two such PWM cycles occur in series, the high-side switch will be in an "off" or open position for the total duration of Dmin. This is because the later "off" time of one PWM cycle extends into the earlier "off" time of the next PWM cycle.

[0128] from Figure 6 , 9 As can be seen in 13, 16, 20, and 23, if the high-side switch is not clamped to either closed or open throughout the entire PWM cycle, the low-side switch begins each PWM cycle in a closed or "on" position with a duration at least Dmin / 2. The low-side switch also ends each PWM cycle in a closed or "on" position with a duration at least Dmin / 2. Therefore, if two such PWM cycles occur in series, the low-side switch will be in an "on" or closed position for the total duration of Dmin. This is because the later "on" time of one PWM cycle extends into the earlier "on" time of the next PWM cycle.

[0129] If the desired duty cycle of the positive current Dmax is ( Figure 9 The expected duty cycle of Dmax that follows or precedes the negative current ( Figure 20If the low-side switch has a dwell time of only Dmin / 2 in the closed or "on" position, such rapid switching is physically impossible for the circuit. While this theoretical limitation seems to prevent the use of the control method described above, in practice, this theoretical conflict may not exist or pose a significant problem. In this regard, it should be noted that a single pulse of Dmin / 2 can usually be commanded without any problems. The switch may not be on, or may be on, or may be partially on, but for a single switching cycle, this usually does not have a significant negative impact on the control system 20.

[0130] Several advantageous embodiments are described below. A first embodiment provides a control system (20) for a multiphase motor (28) for controlling the flow of current between a voltage source (22) and the multiphase motor to operate the motor as a motor. The control system includes: high-side diodes (30A-C) and high-side switches (34A-C) positioned in parallel between the positive terminal of the voltage source and the motor, wherein the high-side diodes are reverse biased relative to the positive terminal; and low-side diodes (32A-C) and low-side switches (36A-C) positioned in parallel between the negative terminal of the voltage source and the motor, wherein the low-side diodes are reverse biased relative to the motor; wherein the control system is a pulse width modulation control system having a pulse cycle duration, and wherein the control system... The physical components define a minimum duty cycle (Dmin), the control system further defines a dead-time duty cycle (Ddead) and is operable to define a variable duty cycle (D*) from zero to one, wherein the variable duty cycle defined by the control system is determined using a carrier signal, wherein the carrier signal linearly decreases from 1.0 at the beginning of the pulse cycle to 0.0 at the midpoint of the pulse cycle and linearly increases from 0.0 at the midpoint of the pulse cycle to 1.0 at the end of the pulse cycle, wherein the commands for controlling the high-side switch and the low-side switch are determined as a function of the carrier signal: wherein Dmin is the minimum non-zero duty cycle defined by the control system during motor operation; and wherein the maximum non-unit duty cycle (Dmax) defined by the control system during motor operation is equal to (1-Dmin).

[0131] The second embodiment provides a control system having the features of the first embodiment, wherein when the variable duty cycle is between Dmin and (Dmax-2(Ddead)) and the current is positive, the control system commands: the high-side switch to open when the carrier signal is greater than D* and to close when the carrier signal is less than D*; and the low-side switch to close when the carrier signal is greater than (D*+2(Ddead)) and to open when the carrier signal is less than (D*+2(Ddead)); and wherein when the variable duty cycle (D*) is between (Dmin+2(Ddead)) and Dmax and the current is negative, the control system commands: the high-side switch to open when the carrier signal is greater than (D*-2(Ddead)) and to close when the carrier signal is less than (D*-2(Ddead)); and the low-side switch to close when the carrier signal is greater than D* and to open when the carrier signal is less than D*.

[0132] The third embodiment provides a control system having the features of the first embodiment, wherein when the current is positive and (D*+2(Ddead)) is greater than Dmax and D* is equal to or less than Dmax, the control system commands: the high-side switch to close when the carrier signal is less than D* and to open when the carrier signal is greater than D*; and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and (D*-2(Ddead)) is less than Dmin and D* is greater than or equal to Dmin, the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close when the carrier signal is greater than D* and to open when the carrier signal is less than D*.

[0133] The fourth embodiment provides a control system having the features of the first embodiment, wherein when the current is positive and D* is greater than Dmax and D* is also equal to or less than (1-Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than Dmax and to open when the carrier signal is greater than Dmax; and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is greater than Dmax and D* is also less than or equal to (1-Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than (Dmax-2(Ddead)) and to open when the carrier signal is greater than (Dmax-2(Ddead)); and the low-side switch to close when the carrier signal is greater than Dmax and to open when the carrier signal is less than Dmax.

[0134] The fifth embodiment provides a control system having the features of the first embodiment, wherein when the current is positive and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period).

[0135] The sixth embodiment provides a control system having the features of the first embodiment, wherein when the current is positive and D* is less than Dmin and D* is also greater than or equal to (Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than Dmin and to open when the carrier signal is greater than Dmin; and the low-side switch to open when the carrier signal is less than (Dmin+2(Ddead)) and to close when the carrier signal is greater than (Dmin+2(Ddead)); and wherein when the current is negative and D* is less than Dmin and D* is also greater than or equal to (1-Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM cycle); and the low-side switch to close when the carrier signal is greater than Dmin and to open when the carrier signal is less than Dmin.

[0136] The seventh embodiment provides a control system having the features of the first embodiment, wherein when the current is positive and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period).

[0137] The eighth embodiment provides a control system having the features of any one of embodiments 3-7, wherein when the variable duty cycle is between Dmin and (Dmax-2(Ddead)) and the current is positive, the control system commands: the high-side switch to open when the carrier signal is greater than D* and to close when the carrier signal is less than D*; and the low-side switch to close when the carrier signal is greater than (D*+2(Ddead)) and to open when the carrier signal is less than (D*+2(Ddead)); and wherein when the variable duty cycle (D*) is between (Dmin+2(Ddead)) and Dmax and the current is negative, the control system commands: the high-side switch to open when the carrier signal is greater than (D*-2(Ddead)) and to close when the carrier signal is less than (D*-2(Ddead)); and the low-side switch to close when the carrier signal is greater than D* and to open when the carrier signal is less than D*.

[0138] The ninth embodiment provides a control system having the features of any one of embodiments 2 or 4-7, wherein when the current is positive and (D*+2(Ddead)) is greater than Dmax and D* is equal to or less than Dmax, the control system commands: the high-side switch to close when the carrier signal is less than D* and to open when the carrier signal is greater than D*; and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and (D*-2(Ddead)) is less than Dmin and D* is greater than or equal to Dmin, the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close when the carrier signal is greater than D* and to open when the carrier signal is less than D*.

[0139] The tenth embodiment provides a control system having the features of any one of embodiments 2, 3, or 5-7, wherein when the current is positive and D* is greater than Dmax and D* is also equal to or less than (1-Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than Dmax and to open when the carrier signal is greater than Dmax; and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is greater than Dmax and D* is also less than or equal to (1-Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than (Dmax-2(Ddead)) and to open when the carrier signal is greater than (Dmax-2(Ddead)); and the low-side switch to close when the carrier signal is greater than Dmax and to open when the carrier signal is less than Dmax.

[0140] The eleventh embodiment provides a control system having the features of any one of embodiments 2-4, 6 or 7, wherein when the current is positive and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period).

[0141] The twelfth embodiment provides a control system having the features of any one of embodiments 1-5 or 7, wherein when the current is positive and D* is less than Dmin and D* is also greater than or equal to (Dmin / 2), the control system commands: the high-side switch to close when the carrier signal is less than Dmin and to open when the carrier signal is greater than Dmin; and the low-side switch to open when the carrier signal is less than (Dmin+2(Ddead)) and to close when the carrier signal is greater than (Dmin+2(Ddead)); and wherein when the current is negative and D* is less than Dmin and D* is also greater than or equal to (1-Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close when the carrier signal is greater than Dmin and to open when the carrier signal is less than Dmin.

[0142] The thirteenth embodiment provides a control system having the features of any one of embodiments 2-6, wherein when the current is positive and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period); and wherein when the current is negative and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period).

[0143] The fourteenth embodiment provides a control system (20) for a multiphase motor (28) for controlling the flow of current between a voltage source (22) and the multiphase motor to operate the motor as a motor. The control system includes: a high-side diode (30A-C) and a high-side switch (34A-C) connected in parallel between the positive terminal of the voltage source and the motor, wherein the high-side diode is reverse biased relative to the positive terminal; and a low-side diode (32A-C) and a low-side switch (36A-C) connected in parallel between the negative terminal of the voltage source and the motor, wherein the low-side diode is reverse biased relative to the motor; wherein the control system is a pulse width modulation control system having a pulse cycle duration, and wherein the control system... The physical components of the system define a minimum duty cycle (Dmin), the control system further defines a dead-time duty cycle (Ddead) and is operable to define a variable duty cycle (D*) from zero to one, wherein the variable duty cycle defined by the control system is determined using a carrier signal, wherein the carrier signal linearly decreases from 1.0 at the beginning of the pulse cycle to 0.0 at the midpoint of the pulse cycle and linearly increases from 0.0 at the midpoint of the pulse cycle to 1.0 at the end of the pulse cycle, wherein the commands used to control the high-side switch and the low-side switch are determined as a function of the carrier signal: wherein Dmin is the minimum non-zero duty cycle defined by the control system during motor operation; and wherein the maximum non-unit duty cycle (Dmax) defined by the control system during motor operation is equal to (1-Dmin);

[0144] When the variable duty cycle is between Dmin and (Dmax-2(Ddead)) and the current is positive, the control system commands: the high-side switch opens when the carrier signal is greater than D* and closes when the carrier signal is less than D*; and the low-side switch closes when the carrier signal is greater than (D*+2(Ddead)) and opens when the carrier signal is less than (D*+2(Ddead)); and when the variable duty cycle (D*) is between (Dmin+2(Ddead)) and Dmax and the current is negative, the control system commands: the high-side switch opens when the carrier signal is greater than (D*-2(Ddead)) and closes when the carrier signal is less than (D*-2(Ddead)); and the low-side switch closes when the carrier signal is greater than D* and opens when the carrier signal is less than D*.

[0145] When the current is positive and (D*+2(Ddead)) is greater than Dmax and D* is equal to or less than Dmax, the control system commands: the high-side switch closes when the carrier signal is less than D* and opens when the carrier signal is greater than D*; and the low-side switch opens for the entire pulse cycle duration (PWM period); and when the current is negative and (D*-2(Ddead)) is less than Dmin and D* is greater than or equal to Dmin, the control system commands: the high-side switch opens for the entire pulse cycle duration (PWM period); and the low-side switch closes when the carrier signal is greater than D* and opens when the carrier signal is less than D*.

[0146] When the current is positive and D* is greater than Dmax and D* is equal to or less than (1-Dmin / 2), the control system commands: the high-side switch closes when the carrier signal is less than Dmax and opens when the carrier signal is greater than Dmax; and the low-side switch opens for the entire pulse cycle duration (PWM period); and when the current is negative and D* is greater than Dmax and D* is less than or equal to (1-Dmin / 2), the control system commands: the high-side switch closes when the carrier signal is less than (Dmax-2(Ddead)) and opens when the carrier signal is greater than (Dmax-2(Ddead)); and the low-side switch closes when the carrier signal is greater than Dmax and opens when the carrier signal is less than Dmax.

[0147] When the current is positive and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period); and when the current is negative and D* is greater than (1-Dmin / 2), the control system commands: the high-side switch to close for the entire pulse cycle duration (PWM period); and the low-side switch to open for the entire pulse cycle duration (PWM period).

[0148] When the current is positive and D* is lower than Dmin and D* is also greater than or equal to (Dmin / 2), the control system commands: the high-side switch closes when the carrier signal is less than Dmin and opens when the carrier signal is greater than Dmin; and the low-side switch opens when the carrier signal is less than (Dmin+2(Ddead)) and closes when the carrier signal is greater than (Dmin+2(Ddead)); and when the current is negative and D* is less than Dmin and D* is also greater than or equal to (1-Dmin / 2), the control system commands: the high-side switch opens for the entire pulse cycle duration (PWM period); and the low-side switch closes when the carrier signal is greater than Dmin and opens when the carrier signal is less than Dmin; and

[0149] When the current is positive and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period); and when the current is negative and D* is less than (Dmin / 2), the control system commands: the high-side switch to open for the entire pulse cycle duration (PWM period); and the low-side switch to close for the entire pulse cycle duration (PWM period).

[0150] The fifteenth embodiment provides a control system having the features of any one of embodiments 1-14, wherein Dmin and Ddead are determined to be functions of at least one of the following:

[0151] (a) Manufacturer-recommended dead time and / or minimum pulse width;

[0152] (b) Empirical testing of physical components to determine the required dead time and / or minimum pulse width; and

[0153] (c) Formula: Ddead=([(Offmax-Onmin)+(PDmax-PDmin)]*SF) / (pulse cycle duration);

[0154] Where Ddead is the dead time duty cycle; Offmax is the maximum disconnect delay of the switch; Onmin is the minimum turn-on delay of the switch; PDmax is the maximum propagation delay of the driver; PDmin is the minimum propagation delay of the driver; and SF is the safety factor.

[0155] The sixteenth embodiment provides a control system having the features of any one of embodiments 1-15, wherein the motor is a three-phase motor.

[0156] The present invention may also take the form of a method of operating the control system and motor according to any of the various embodiments or general principles described herein.

[0157] While the invention has been described as having an exemplary design, it may be further modified within the spirit and scope of this disclosure. Therefore, this application is intended to cover any variations, uses, or alterations of the invention using its general principles.

Claims

1. A control system (20) for a multiphase electric machine (28) for controlling the flow of current between a voltage source (22) and the multiphase electric machine to operate the machine as a motor, the control system comprising: wherein between each phase of the multiphase electric machine and the voltage source, the control system comprises: a high-side diode (30A-C) and a high-side switch (34A-C) positioned in parallel between a positive terminal of the voltage source and the machine, wherein the high-side diode is reverse biased with respect to the positive terminal; and a low-side diode (32A-C) and a low-side switch (36A-C) positioned in parallel between a negative terminal of the voltage source and the machine, wherein the low-side diode is reverse biased with respect to the machine; wherein the control system is a pulse width modulation control system having a pulse cycle duration, and wherein the physical components of the control system define a minimum duty cycle (Dmin), the control system further defines a dead time duty cycle (Ddead) and is operable to define a variable duty cycle (D*) from zero to one, wherein the variable duty cycle defined by the control system is determined using a carrier signal, wherein the carrier signal linearly decreases from 1.0 at the start of the pulse cycle to 0.0 at the midpoint of the pulse cycle and linearly increases from 0.0 at the midpoint of the pulse cycle to 1.0 at the end of the pulse cycle, wherein the commands to control the high-side switches and the low-side switches are determined as a function of the carrier signal: wherein the minimum duty cycle (Dmin) is the minimum non-zero duty cycle defined by the control system during operation of the machine as a motor; and wherein the maximum non-unit duty cycle (Dmax) defined by the control system during operation of the machine is equal to 1 minus the minimum duty cycle (1-Dmin).

2. The control system of claim 1, wherein when the variable duty cycle is between the minimum duty cycle (Dmin) and the maximum non-unit duty cycle minus twice the dead time duty cycle (Dmax-2(Ddead)) and the current is positive, the control system commands: The high side switch opens when the carrier signal is greater than the variable duty cycle (D*) and closes when the carrier signal is less than the variable duty cycle (D*). the high-side switches to be open when the carrier signal is less than the variable duty cycle minus twice the dead time duty cycle (D*-2(Ddead)); and the low-side switches to be closed when the carrier signal is greater than the variable duty cycle plus twice the dead time duty cycle (D*+2(Ddead)), open when the carrier signal is less than the variable duty cycle plus twice the dead time duty cycle (D*+2(Ddead)); and wherein when the variable duty cycle (D*) is between the minimum duty cycle plus twice the dead time duty cycle (Dmin+2(Ddead)) and the maximum non-unit duty cycle (Dmax) and the current is negative, the control system commands: the high-side switches to be open when the carrier signal is greater than the variable duty cycle minus twice the dead time duty cycle (D*-2(Ddead)), closed when the carrier signal is less than the variable duty cycle minus twice the dead time duty cycle (D*-2(Ddead)); and the low-side switches to be closed when the carrier signal is greater than the variable duty cycle (D*), open when the carrier signal is less than the variable duty cycle (D*).

3. The control system of claim 1, wherein when the current is positive and the variable duty cycle plus two times the dead time duty cycle (D* + 2(Ddead)) is greater than the maximum nonunity duty cycle (Dmax) and the variable duty cycle (D*) is at or below the maximum nonunity duty cycle (Dmax), the control system commands: The high side switch is closed when the carrier signal is less than the variable duty cycle (D*) and opened when the carrier signal is greater than the variable duty cycle (D*). and the low side switch is open for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle minus two times the dead time duty cycle (D* - 2(Ddead)) is less than the minimum duty cycle (Dmin) and the variable duty cycle (D*) is greater than or equal to the minimum duty cycle (Dmin), the control system commands: the high side switch is open for the entire pulse cycle duration; and the low side switch is closed when the carrier signal is greater than the variable duty cycle (D*) and open when the carrier signal is less than the variable duty cycle (D*).

4. The control system of claim 1, wherein when the current is positive and the variable duty cycle (D*) is greater than the maximum nonunity duty cycle (Dmax) and the variable duty cycle (D*) is also at or below 1 minus one half the minimum duty cycle (1 - Dmin / 2), the control system commands: The high side switch is closed when the carrier signal is less than a maximum non-unity duty cycle (Dmax) and is opened when the carrier signal is greater than the maximum non-unity duty cycle (Dmax); and the low side switch is open for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is greater than the maximum nonunity duty cycle (Dmax) and the variable duty cycle (D*) is also less than or equal to 1 minus one half the minimum duty cycle (1 - Dmin / 2), the control system commands: the high side switch is closed when the carrier signal is less than the maximum nonunity duty cycle minus two times the dead time duty cycle (Dmax - 2(Ddead)) and open when the carrier signal is greater than the maximum nonunity duty cycle minus two times the dead time duty cycle (Dmax - 2(Ddead)); and the low side switch is closed when the carrier signal is greater than the maximum nonunity duty cycle (Dmax) and open when the carrier signal is less than the maximum nonunity duty cycle (Dmax).

5. The control system of claim 1, wherein when the current is positive and the variable duty cycle (D*) is greater than 1 minus one half the minimum duty cycle (1 - Dmin / 2), the control system commands: the high side switch is closed for the entire pulse cycle duration; and the low side switch is open for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is greater than 1 minus one half the minimum duty cycle (1 - Dmin / 2), the control system commands: the high side switch is closed for the entire pulse cycle duration; and the low side switch is open for the entire pulse cycle duration.

6. The control system of claim 1, wherein when the current is positive and the variable duty cycle (D*) is below the minimum duty cycle (Dmin) and the variable duty cycle (D*) is also greater than or equal to one half the minimum duty cycle (Dmin / 2), the control system commands: The high side switch is closed when the carrier signal is less than a minimum duty cycle (Dmin) and opened when the carrier signal is greater than the minimum duty cycle (Dmin); and the low side switch is open when the carrier signal is less than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)) and closed when the carrier signal is greater than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)); and wherein when the current is negative and the variable duty cycle (D*) is below the minimum duty cycle (Dmin) and the variable duty cycle (D*) is also greater than or equal to one half the minimum duty cycle (Dmin / 2), the control system commands: the high side switch is open when the carrier signal is less than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)) and closed when the carrier signal is greater than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)). wherein when the current is positive and the variable duty cycle (D*) is less than one-half the minimum duty cycle (Dmin / 2), the control system commands: the low side switch to be closed for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is less than one-half the minimum duty cycle (Dmin / 2), the control system commands: the high side switch to be open for the entire pulse cycle duration; and the high side switch is open for the entire pulse cycle duration; the low side switch to be closed for the entire pulse cycle duration.

8. The control system of any of claims 3-7, wherein when the variable duty cycle is between the minimum duty cycle (Dmin) and the maximum non-unit duty cycle minus twice the dead time duty cycle (Dmax - 2(Ddead)) and the current is positive, the control system commands: the high side switch to be open when the carrier signal is greater than the variable duty cycle minus twice the dead time duty cycle (D* - 2(Ddead)) and closed when the carrier signal is less than the variable duty cycle minus twice the dead time duty cycle (D* - 2(Ddead)); and the low side switch to be closed when the carrier signal is greater than the variable duty cycle (D*) and open when the carrier signal is less than the variable duty cycle (D*).

9. The control system of any of claims 2 or 4-7, wherein when the current is positive and the variable duty cycle plus twice the dead time duty cycle (D* + 2(Ddead)) is greater than the maximum non-unit duty cycle (Dmax) and the variable duty cycle (D*) is at or below the maximum non-unit duty cycle (Dmax), the control system commands: the low side switch to be open for the entire pulse cycle duration; and The high side switch opens when the carrier signal is greater than the variable duty cycle (D*) and closes when the carrier signal is less than the variable duty cycle (D*). wherein when the current is negative and the variable duty cycle minus twice the dead time duty cycle (D* - 2(Ddead)) is less than the minimum duty cycle (Dmin) and the variable duty cycle (D*) is greater than or equal to the minimum duty cycle (Dmin), the control system commands: the high side switch to be open for the entire pulse cycle duration; and the low side switch to be closed for the entire pulse cycle duration. ​ ​ ​ ​ The high side switch is closed when the carrier signal is less than the variable duty cycle (D*) and opened when the carrier signal is greater than the variable duty cycle (D*). ​ ​ ​ ​ ​ ​ The low side switch is closed when the carrier signal is greater than the variable duty cycle (D*) and open when the carrier signal is less than the variable duty cycle (D*).

10. The control system of any of claims 2, 3, or 5-7, wherein when the current is positive and the variable duty cycle (D*) is greater than the maximum non-unity duty cycle (Dmax) and the variable duty cycle (D*) is also equal to or below the minimum duty cycle one-half (1 - Dmin / 2), the control system commands: The high side switch is closed when the carrier signal is less than a maximum non-unity duty cycle (Dmax) and is opened when the carrier signal is greater than the maximum non-unity duty cycle (Dmax); and the low side switch is open for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is greater than the maximum non-unity duty cycle (Dmax) and the variable duty cycle (D*) is also less than or equal to the minimum duty cycle one-half (1 - Dmin / 2), the control system commands: the high side switch is closed when the carrier signal is less than the maximum non-unity duty cycle minus two times the dead time duty cycle (Dmax - 2(Ddead)) and open when the carrier signal is greater than the maximum non-unity duty cycle minus two times the dead time duty cycle (Dmax - 2(Ddead)); and the low side switch is closed when the carrier signal is greater than the maximum non-unity duty cycle (Dmax) and open when the carrier signal is less than the maximum non-unity duty cycle (Dmax).

11. The control system of any of claims 2-4, 6, or 7, wherein when the current is positive and the variable duty cycle (D*) is greater than the minimum duty cycle one-half (1 - Dmin / 2), the control system commands: the high side switch is closed for the entire pulse cycle duration; and the low side switch is open for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is greater than the minimum duty cycle one-half (1 - Dmin / 2), the control system commands: the high side switch is closed for the entire pulse cycle duration; and the low side switch is open for the entire pulse cycle duration.

12. The control system of any of claims 1-5, or 7, wherein when the current is positive and the variable duty cycle (D*) is below the minimum duty cycle (Dmin) and the variable duty cycle (D*) is also greater than or equal to the minimum duty cycle one-half (Dmin / 2), the control system commands: The high side switch is closed when the carrier signal is less than a minimum duty cycle (Dmin) and opened when the carrier signal is greater than the minimum duty cycle (Dmin); and the low side switch is open when the carrier signal is less than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)) and closed when the carrier signal is greater than the minimum duty cycle plus two times the dead time duty cycle (Dmin + 2(Ddead)); and wherein when the current is negative and the variable duty cycle (D*) is below the minimum duty cycle (Dmin) and the variable duty cycle (D*) is also greater than or equal to the minimum duty cycle one-half (1 - Dmin / 2), the control system commands: the high side switch is open for the entire pulse cycle duration; and the low side switch is closed when the carrier signal is greater than the minimum duty cycle (Dmin) and open when the carrier signal is less than the minimum duty cycle (Dmin).

13. The control system of any one of claims 2-6, wherein when the current is positive and the variable duty cycle (D*) is less than one half of the minimum duty cycle (Dmin / 2), the control system commands: the high side switch is open for the entire pulse cycle duration; the low side switch to be closed for the entire pulse cycle duration; and wherein when the current is negative and the variable duty cycle (D*) is less than one half of the minimum duty cycle (Dmin / 2), the control system commands: the high side switch to be open for the entire pulse cycle duration; and the low side switch to be closed for the entire pulse cycle duration.

14. The control system of any one of claims 1-7, wherein the minimum duty cycle (Dmin) and the dead time duty cycle (Ddead) are determined as a function of at least one of: (a) manufacturer suggested dead time and / or minimum pulse width; (b) empirical testing of the physical components to determine the required dead time and / or minimum pulse width; and (c) the formula: Ddead = ([(Offmax - Onmin) + (PDmax - PDmin)] * SF) / (pulse cycle duration); where Ddead is the dead time duty cycle; Offmax is the maximum turn-off delay time of the switch; Onmin is the minimum turn-on delay time of the switch; PDmax is the maximum propagation delay of the driver; PDmin is the minimum propagation delay of the driver, and SF is a safety factor.

15. The control system of claim 14, wherein the motor is a three-phase motor. ​ ​

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