On-chip capacitor circuit and low-noise crystal oscillator based on the on-chip capacitor circuit

Abstract

The present invention provides an on-chip capacitor circuit and a low-noise crystal oscillator based on the on-chip capacitor circuit. The on-chip capacitor circuit comprises: a first on-chip capacitor array unit connected to the input end of an off-chip crystal; a second on-chip capacitor array unit connected to the output end of the off-chip crystal; and a low-noise power supply generation module connected to the first on-chip capacitor array unit and the second on-chip capacitor array unit, respectively. The low-noise power supply generation module in the present invention independently provides low-noise power to the first on-chip capacitor array unit and the second on-chip capacitor array unit, and at the same time, a filter capacitor is added to the gate of each switch MOS tube of the first on-chip capacitor array unit and the second on-chip capacitor array unit, and a partially fixed capacitor structure is used in the on-chip capacitor array, so that the phase noise performance of the on-chip capacitor crystal oscillator is significantly improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency integrated circuits and signal processing, and relates to a design of an on-chip capacitor in a crystal oscillator operating at a frequency above megahertz, and in particular to an on-chip capacitor circuit and a low-noise crystal oscillator based on the on-chip capacitor circuit. Background Art

[0002] At present, most common integrated crystal oscillators use a Pierce structure or other grounding capacitor three-point oscillator structure. With the continuous development of advanced modern integrated circuit technology, in order to reduce the cost of off-chip materials and achieve a more integrated RF transceiver system, all parts of the traditional crystal oscillator except the crystal are usually integrated on-chip, so the design of crystal oscillators that replace off-chip capacitors with on-chip capacitors has become a general trend. However, for the existing crystal oscillator composed of on-chip capacitor circuits, it is easy to cause the decrease of capacitor quality factor and the occurrence of frequency modulation. Therefore, in practical applications, the phase noise is often very poor and eventually seriously deteriorates the in-band noise of the frequency synthesizer, which greatly limits the application of crystal oscillators based on on-chip capacitors in high-performance wireless communication systems.

[0003] Therefore, how to provide an on-chip capacitor circuit and a low-noise crystal oscillator based on the on-chip capacitor circuit to solve the defects of the existing technology that cannot effectively improve the phase noise performance of the on-chip capacitor circuit crystal oscillator has become a technical problem that needs to be urgently solved by technical personnel in this field. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an on-chip capacitor circuit and a low-noise crystal oscillator based on the on-chip capacitor circuit, so as to solve the problem that the prior art cannot effectively improve the phase noise performance of the on-chip capacitor circuit crystal oscillator.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides an on-chip capacitor circuit on one hand, the on-chip capacitor circuit comprising: a first on-chip capacitor array unit connected to the input end of an off-chip crystal; a second on-chip capacitor array unit connected to the output end of the off-chip crystal; a low-noise power supply generation module connected to the first on-chip capacitor array unit and the second on-chip capacitor array unit, respectively, to independently provide low-noise power to the first on-chip capacitor array unit and the second on-chip capacitor array unit; through the low-noise power supply generation module, the power supply of the first on-chip capacitor array unit and the second on-chip capacitor array unit is isolated from the power supply of the amplifying buffer circuit of the crystal oscillator, the amplifying buffer circuit comprising a reverse amplifying circuit and an output buffer stage circuit; the low-noise power supply generation module generates a bias current source through a current mirror, and inputs the bias current source into a load resistor to form the power supply required by the first on-chip capacitor array unit and the second on-chip capacitor array unit, and the first on-chip capacitor array unit and the second on-chip capacitor array unit perform switch control of the capacitor array after being powered.

[0006] In one embodiment of the present invention, the first on-chip capacitor array unit and the second on-chip capacitor array unit are connected to the same switch control signal receiving end to achieve synchronous control of the capacitor arrays in the first on-chip capacitor array unit and the second on-chip capacitor array unit.

[0007] In one embodiment of the present invention, the first on-chip capacitor array unit includes at least two switched capacitors with input buffer level control and a fixed capacitor; the fixed capacitor is connected in parallel with each of the switched capacitors with input buffer level control and then connected to a common input terminal and a common negative power supply electrode, so as to improve the maximum tuning range and tuning accuracy of the on-chip capacitor.

[0008] In one embodiment of the present invention, the switch capacitor with input buffer level control includes a switch MOS tube, an input buffer level circuit, a controlled capacitor and a gate capacitor; the switch MOS tube is used to control the connection and disconnection of the resonant circuit formed by the controlled capacitor and the off-chip crystal, the input buffer level circuit is used to isolate the noise of the switch control signal received from the digital circuit and enhance the driving capability, and the gate capacitor is used to filter the high-frequency noise of the buffered switch control signal.

[0009] In one embodiment of the present invention, the first on-chip capacitor array unit is provided with a switch control signal receiving end, and the switch control signal receiving end is used to receive the switch control signal, and the switch control signal is sent by a digital circuit.

[0010] In one embodiment of the present invention, the switch control signal receiving end is the input end of the input buffer stage circuit; the input buffer stage circuit is composed of a pair of NMOS transistors and PMOS transistors.

[0011] In one embodiment of the present invention, the low-noise power supply generation module includes a first power MOS tube, a second power MOS tube, a third power MOS tube, a first resistor and a first capacitor; wherein the first resistor is the load resistor; the first power MOS tube and the second power MOS tube constitute a current mirror, the second power MOS tube is used to convert the reference current source input to the first power MOS tube into a bias current source of the first resistor, the third power MOS tube is used to reduce the influence of the channel modulation effect on the current mismatch of the current mirror, and the first capacitor is used to filter the generated power supply voltage.

[0012] On the other hand, the present invention provides a low-noise crystal oscillator based on an on-chip capacitor circuit, the low-noise crystal oscillator based on the on-chip capacitor circuit comprises: an on-chip capacitor circuit, an off-chip crystal, an inverse amplifier circuit and an output buffer stage circuit; the on-chip capacitor circuit is connected in parallel to the two ends of the off-chip crystal to form an LC resonant circuit; the inverse amplifier circuit is also connected in parallel to the two ends of the off-chip crystal, and the output buffer stage circuit is respectively connected to the output end of the off-chip crystal and the output end of the inverse amplifier circuit; the on-chip capacitor circuit comprises a first on-chip capacitor array unit, a second on-chip capacitor array unit and a low-noise power supply generation module; the first on-chip capacitor array unit is connected to the input end of the off-chip crystal; the second on-chip capacitor array unit is connected to the output end of the off-chip crystal; the low-noise power supply generation module The blocks are respectively connected to the first on-chip capacitor array unit and the second on-chip capacitor array unit, and independently provide low-noise power to the first on-chip capacitor array unit and the second on-chip capacitor array unit; through the low-noise power generation module, the power supply of the first on-chip capacitor array unit and the second on-chip capacitor array unit is isolated from the power supply of the amplifying buffer circuit of the crystal oscillator, and the amplifying buffer circuit includes the reverse amplifying circuit and the output buffer stage circuit; the low-noise power generation module generates a bias current source through a current mirror, and inputs the bias current source into a load resistor to form the power supply required by the first on-chip capacitor array unit and the second on-chip capacitor array unit, and the first on-chip capacitor array unit and the second on-chip capacitor array unit perform switch control of the capacitor array after being powered.

[0013] In one embodiment of the present invention, the reverse amplifier circuit includes a second resistor, a first MOS tube and a second MOS tube; one end of the second resistor is respectively connected to the gate of the first MOS tube, the gate of the second MOS tube, the input end of the off-chip crystal, and the first on-chip capacitor array unit, and the other end is respectively connected to the drain of the first MOS tube, the drain of the second MOS tube, the output end of the off-chip crystal, the input end of the output buffer stage circuit, and the second on-chip capacitor array unit; the reverse amplifier circuit forms an active negative impedance with the first on-chip capacitor array unit and the second on-chip capacitor array unit to provide energy to the LC resonant circuit to offset the energy consumption in the circuit.

[0014] In one embodiment of the present invention, the output buffer stage circuit includes a third MOS tube and a fourth MOS tube; the gate of the third MOS tube is respectively connected to the gate of the fourth MOS tube, the output end of the off-chip crystal, the output end of the reverse amplifier circuit, and the second on-chip capacitor array unit to serve as the input end of the output buffer stage circuit, and the drain of the third MOS tube is connected to the drain of the fourth MOS tube and serves as the output end of the crystal oscillator; the third MOS tube and the fourth MOS tube are used to isolate the influence of the load impedance change of the subsequent circuit on the frequency pulling of the crystal oscillator, and ensure the driving capability of the output end of the crystal oscillator.

[0015] As described above, the on-chip capacitor circuit and the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention have the following beneficial effects:

[0016] 1. The on-chip capacitor circuit provided by the present invention utilizes a low-noise power supply generation module to independently power the input buffer stage circuit in the on-chip capacitor array, thereby isolating the input buffer stage circuit from the power supply of the amplifying buffer circuit of the crystal oscillator; at the same time, a filter capacitor is added to the gate of each switching MOS tube, and a partially fixed capacitor structure is adopted in the on-chip capacitor array, thereby significantly improving the phase noise performance of the on-chip capacitor crystal oscillator.

[0017] 2. The low-noise power generation module designed by the present invention has the advantages of simple circuit, easy implementation and high anti-interference ability, and at the same time, it hardly increases the power consumption and chip area of ​​the system.

[0018] 3. The crystal oscillator circuit formed by the on-chip capacitor circuit of the present invention not only ensures the high integration of the entire crystal oscillator and reduces the cost of off-chip materials, but also enables the on-chip capacitor crystal oscillator to better meet the needs of high-performance wireless communication systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 FIG. 4 is a circuit diagram of an on-chip capacitor circuit according to an embodiment of the present invention.

[0020] Figure 2 FIG. 1 is a circuit diagram of an on-chip capacitor array unit in an embodiment of an on-chip capacitor circuit of the present invention.

[0021] Figure 3 A diagram showing a switched capacitor with input buffer stage control in an embodiment of an on-chip capacitor circuit of the present invention is shown.

[0022] Figure 4 Shown is a circuit diagram of a low-noise power generation module of an on-chip capacitor circuit in one embodiment of the present invention.

[0023] Figure 5 FIG. 1 is a circuit diagram of a low-noise crystal oscillator based on an on-chip capacitor circuit according to an embodiment of the present invention.

[0024] Figure 6 The figure is a schematic diagram comparing the phase noise of the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention and the existing on-chip capacitor crystal oscillator.

[0025] Component number description

[0026] 1 On-chip capacitor circuit

[0027] 11 First on-chip capacitor array unit

[0028] 12 Second on-chip capacitor array unit

[0029] 13 Low noise power generation module DETAILED DESCRIPTION

[0030] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0031] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0032] The on-chip capacitor circuit and the low-noise crystal oscillator based on the on-chip capacitor circuit described in the present invention can not only ensure the high integration of the entire crystal oscillator and reduce the cost of off-chip materials, but also break through the bottleneck that the phase noise of the existing on-chip capacitor crystal oscillator is too poor, causing the performance of the frequency synthesizer to deteriorate sharply. It has the advantages of being simple and easy to implement and having high anti-interference ability, and provides a new way to improve the noise performance of the frequency synthesizer and even the entire communication system.

[0033] The following will be combined Figures 1 to 6 The principles and implementation methods of the on-chip capacitor circuit and the low-noise crystal oscillator based on the on-chip capacitor circuit of this embodiment are explained in detail so that those skilled in the art can understand the on-chip capacitor circuit and the low-noise crystal oscillator based on the on-chip capacitor circuit of this embodiment without creative work.

[0034] See also Figure 1 , which is a circuit diagram of an on-chip capacitor circuit of the present invention in one embodiment. Figure 1 As shown, the on-chip capacitor circuit 1 includes: a first on-chip capacitor array unit 11 , a second on-chip capacitor array unit 12 and a low-noise power supply generating module 13 .

[0035] The first on-chip capacitor array unit 11 is connected to the input end of an off-chip crystal.

[0036] The second on-chip capacitor array unit 12 is connected to the output end of the off-chip crystal.

[0037] In this embodiment, the first on-chip capacitor array unit and the second on-chip capacitor array unit are connected to the same switch control signal receiving end to achieve synchronous control of the capacitor arrays in the first on-chip capacitor array unit and the second on-chip capacitor array unit.

[0038] It should be noted that the capacitors in the first on-chip capacitor array unit and the second on-chip capacitor array unit include switch capacitors, gate capacitors and fixed capacitors in the capacitor array. Each capacitor can be a single capacitor or an equivalent capacitor formed by connecting multiple capacitors in series and / or in parallel.

[0039] See also Figure 2 The on-chip capacitor array unit circuit diagram of the on-chip capacitor circuit of the present invention in one embodiment is shown. Figure 2 As shown, the first on-chip capacitor array unit includes at least two switch capacitors with input buffer stage control and a fixed capacitor C6. Figure 2Specifically, there are 5 switched capacitors with input buffer level control, namely, the first switched capacitor with input buffer level control is composed of C1, M1, B1 and C7, the second switched capacitor with input buffer level control is composed of C2, M2, B2 and C8, the third switched capacitor with input buffer level control is composed of C3, M3, B3 and C9, the fourth switched capacitor with input buffer level control is composed of C4, M4, B4 and C10, and the fifth switched capacitor with input buffer level control is composed of C5, M5, B5 and C11.

[0040] The fixed capacitor C6 is connected in parallel with each of the switch capacitors with input buffer stage control and then connected to the common input terminal IN and the common power supply negative electrode V-, which is used to improve the maximum tuning range and tuning accuracy of the on-chip capacitor and further reduce the influence of the switch MOS tube on the phase noise of the crystal oscillator.

[0041] exist Figure 2 In the figure, the first switched capacitor with input buffer level control is taken as an example to further illustrate the circuit connection relationship of all switched capacitors with input buffer level control. The switched capacitor with input buffer level control includes a switch MOS tube M1, an input buffer level circuit B1, a controlled capacitor C1 and a gate capacitor C7.

[0042] The switch MOS tube M1 is used to control the connection and disconnection of the resonant circuit formed by the controlled capacitor C1 and the off-chip crystal. The input buffer stage circuit B1 is used to isolate the noise of the switch control signal received from the digital circuit at the A1 pin and enhance the driving capability. The gate capacitor C7 is a filter capacitor, which is used to filter the high-frequency noise of the buffered switch control signal on the basis of separate power supply, so that the gate of each switch MOS tube obtains an extremely stable voltage control signal, avoiding the change of on-resistance caused by voltage fluctuation when sharing power with other parts and the occurrence of frequency modulation. Further, in the application of frequency synthesizer, the in-band noise performance of the frequency synthesizer can be significantly improved.

[0043] exist Figure 2 In the embodiment, the switch MOS tube M1 , the switch MOS tube M2 , the switch MOS tube M3 , the switch MOS tube M4 and the switch MOS tube M5 are all low-voltage enhancement type NMOS tubes.

[0044] exist Figure 2 In the embodiment, the first on-chip capacitor array unit is provided with switch control signal receiving terminals A1, A2, A3, A4 and A5, and the switch control signal receiving terminals are used to receive the switch control signal, and the switch control signal is sent by the digital circuit. The switch control signal receiving terminals A1, A2, A3, A4 and A5 correspond to the X input pins of the respective input buffer stage circuits one by one.

[0045] exist Figure 2 In the figure, the circuit structure is further described by taking the first switch capacitor with input buffer stage control as an example, and the connection structure of other switch capacitors with input buffer stage control is similar. One end IN of the switch capacitor C1 is connected to the input end XTALI of the off-chip crystal, and the other end is connected to the drain of the switch MOS tube M1. The source of the switch MOS tube M1 is respectively connected to one end of the gate capacitor C7 and the negative end of the power supply V-. The gate of the switch MOS tube M1 is respectively connected to the Y pin of the input buffer stage circuit B1 and the other end of the gate capacitor C7. The P pin of the input buffer stage circuit B1 is connected to the positive end of the power supply V+, and the G pin of the input buffer stage circuit is connected to the negative end of the power supply V-.

[0046] See also Figure 3 , which shows a switched capacitor diagram with input buffer stage control in an embodiment of the on-chip capacitor circuit of the present invention. Figure 3 As shown, the switch control signal receiving terminals A1, A2, A3, A4 and A5 are the input terminals X of the input buffer stage circuit.

[0047] The input buffer stage circuit is composed of paired NMOS tubes and PMOS tubes, wherein the PMOS tube M6 is paired with the NMOS tube M7, and the PMOS tube M8 is paired with the NMOS tube M9.

[0048] Figure 1 The low-noise power supply generation module 13 is connected to the first on-chip capacitor array unit 11 and the second on-chip capacitor array unit 12 respectively, and independently provides low-noise power to the first on-chip capacitor array unit 11 and the second on-chip capacitor array unit 12; through the low-noise power supply generation module 13, the power supply of the first on-chip capacitor array unit 11 and the second on-chip capacitor array unit 12 is isolated from the power supply of the amplifying buffer circuit of the crystal oscillator, and the amplifying buffer circuit includes a reverse amplifying circuit and an output buffer stage circuit. The voltage output by the low-noise power supply generation module 13 has lower noise than the power supply voltage of the amplifying buffer circuit of the crystal oscillator.

[0049] The low-noise power supply generating module 13 is a low-noise power supply generating module, which generates a bias current source through a current mirror, and inputs the bias current source into a load resistor to form the power supply required by the first on-chip capacitor array unit 11 and the second on-chip capacitor array unit 12. After the first on-chip capacitor array unit 11 and the second on-chip capacitor array unit 12 are powered, the switch control of the capacitor array is performed.

[0050] Specifically, a module capable of generating a stable and low-noise power supply is added by using a reference current source to separately power the buffer stage of each switch MOS tube control signal in the on-chip capacitor array. The stable and low-noise power supply voltage generated by the low-noise power supply generation module PG is separately powered for the input buffer stage circuit in the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2, so that the gate of each switch MOS tube obtains an extremely stable voltage control signal, thereby avoiding the change of on-resistance caused by voltage fluctuation when sharing power with the inverting amplifier circuit and output buffer stage circuit of the crystal oscillator and the occurrence of frequency modulation phenomenon, so that the phase noise performance of the on-chip capacitor crystal oscillator is significantly improved.

[0051] See also Figure 4 , which is a circuit diagram of a low noise power supply generation module of an on-chip capacitor circuit of the present invention in one embodiment. Figure 4 As shown, the low-noise power generation module includes a first power MOS transistor MH1, a second power MOS transistor MH2, a third power MOS transistor MH3, a first resistor R1 and a first capacitor C1; wherein the first resistor C1 is the load resistor.

[0052] The low-noise power supply generation module PG includes a high-voltage power supply positive signal access port VH+, a high-voltage power supply negative signal access port VH-, a low-noise power supply generation module reference current source input port IB, and a low-noise power supply generation module power supply voltage output port VO. The first power MOS tube MH1 and the second power MOS tube MH2 form a current mirror, and the second power MOS tube MH2 is used to proportionally amplify the reference current source (input from the IBG terminal) input to the first power MOS tube MH1 and convert it into a bias current source for the first resistor R1, thereby generating a stable, low-noise power supply voltage VO on the first resistor R1. The third power MOS tube MH3 is used to reduce the influence of the channel modulation effect on the current mismatch of the current mirror, and the first capacitor C1 is used to filter the noise of the power supply voltage generated by the low-noise power supply generation module PG.

[0053] The first power MOS transistor MH1 and the second power MOS transistor MH2 are both high-voltage enhancement type PMOS transistors, and the third power MOS transistor MH3 is a high-voltage intrinsic type NMOS transistor.

[0054] See also Figure 5 , which is a circuit diagram of a low-noise crystal oscillator based on an on-chip capacitor circuit according to an embodiment of the present invention. Figure 5As shown, the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention comprises: an on-chip capacitor circuit (composed of PG, CA1 and CA2), an off-chip crystal XTAL, an inverting amplifier circuit and an output buffer stage circuit. In addition to the off-chip crystal, the on-chip capacitor circuit, the inverting amplifier circuit, the output buffer stage circuit and other peripheral circuits of the crystal oscillator are made into a chip, and the chip and the off-chip crystal together constitute a crystal oscillator.

[0055] The on-chip capacitor circuit is connected in parallel to the two ends XTALI and XTALO of the off-chip crystal to form an LC resonant circuit; the reverse amplifier circuit is also connected in parallel to the two ends of the off-chip crystal XTAL, and the output buffer stage circuit is respectively connected to the output end XTALO of the off-chip crystal XTAL and the output end of the reverse amplifier circuit.

[0056] The on-chip capacitor circuit includes a first on-chip capacitor array unit CA1, a second on-chip capacitor array unit CA2 and a low-noise power supply generation module PG; the first on-chip capacitor array unit CA1 is connected to the input end XTALI of the off-chip crystal XTAL; the second on-chip capacitor array unit CA2 is connected to the output end XTALO of the off-chip crystal XTAL; the low-noise power supply generation module PG is connected to the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2 respectively, and independently provides a low-noise power supply V+ to the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2; through the low-noise power supply generation module, the power supply V+ of the first on-chip capacitor array unit and the second on-chip capacitor array unit is connected to the crystal The power supply VDD of the amplifier buffer circuit of the body oscillator is isolated and set, the amplifier buffer circuit includes the reverse amplifier circuit and the output buffer stage circuit, the isolation setting means that V+ and VDD are set as two different power supply loops through electrical signal isolation (optical coupling isolation, magnetic isolation or piezoelectric isolation); the input end of the low-noise power supply generation module PG is the positive end of the high-voltage power supply VDDH, IBG is the reference current source input end, a bias current source is generated through a current mirror, and the bias current source is input into the load resistor to form the power supply V+ required by the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2, and the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2 are powered on to control the switch of the capacitor array.

[0057] exist Figure 5 In the figure, N1, N2, N3, N4, and N5 are 5-bit capacitor array switch control signal input ports, which control the on and off of the switch MOS tube M1, the switch MOS tube M2, the switch MOS tube M3, the switch MOS tube M4, and the switch MOS tube M5 to achieve the connection and disconnection between the controlled capacitor C1, the controlled capacitor C2, the controlled capacitor C3, the controlled capacitor C4, and the controlled capacitor C5 and the off-chip crystal.

[0058] exist Figure 5 In the embodiment, the reverse amplifier circuit includes a second resistor R2, a first MOS tube M1 and a second MOS tube M2. The first MOS tube M1 is a low voltage enhancement type PMOS tube, and the second MOS tube M2 is a low voltage enhancement type NMOS tube.

[0059] One end of the second resistor R2 is respectively connected to the gate of the first MOS tube M1, the gate of the second MOS tube M2, the input end XTALI of the off-chip crystal, and the first on-chip capacitor array unit CA1, and the other end is respectively connected to the drain of the first MOS tube M1, the drain of the second MOS tube M2, the output end XTALO of the off-chip crystal, the input end of the output buffer stage circuit, and the second on-chip capacitor array unit CA2.

[0060] The reverse amplifier circuit forms an active negative impedance with the first on-chip capacitor array unit CA1 and the second on-chip capacitor array unit CA2, providing energy to the LC resonant circuit to offset the energy consumption in the circuit, and finally making the entire circuit enter a stable oscillation working state.

[0061] In this embodiment, the output buffer stage circuit includes a third MOS transistor M3 and a fourth MOS transistor M4, wherein the third MOS transistor M3 is a low voltage enhancement type PMOS transistor, and the fourth MOS transistor M4 is a low voltage enhancement type NMOS transistor.

[0062] The gate of the third MOS tube M3 is respectively connected to the gate of the fourth MOS tube M4, the output end XTALO of the off-chip crystal, the output end of the reverse amplifier circuit (the drain of the first MOS tube or the drain of the second MOS tube), and the second on-chip capacitor array unit CA2 to serve as the input end of the output buffer stage circuit. The drain of the third MOS tube M3 is connected to the drain of the fourth MOS tube M4 and serves as the output end OUT of the entire crystal oscillator.

[0063] The third MOS transistor M3 and the fourth MOS transistor M4 are used to isolate the influence of the load impedance change of the subsequent circuit on the frequency pulling of the crystal oscillator, and ensure the driving capability of the output end of the crystal oscillator.

[0064] Specifically, the input voltage range of the positive terminal VDDH of the high voltage power supply is: 2.1V~4.5V, and the negative terminal GND of the power supply is: 0V.

[0065] The positive terminal VDD of the low voltage power supply is 1.2V voltage outputted by the on-chip low dropout linear regulator (LDO).

[0066] The input current of the crystal oscillator reference current source input port IBG is: 1uA.

[0067] The input voltages of the crystal oscillator 5-bit capacitor array switch control signal input ports N1, N2, N3, N4, and N5 are 0V, 0V, 1.2V, 1.2V, and 0V, respectively.

[0068] The operating frequency of the off-chip crystal XTAL is: 24MHz.

[0069] See also Figure 6 , is a schematic diagram comparing the phase noise of the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention and the existing on-chip capacitor crystal oscillator. Figure 6 As shown, the solid line is the phase noise curve of the crystal oscillator of the present invention as the frequency changes, and the dotted line is the phase noise curve of the crystal oscillator in the prior art as the frequency changes. It can be seen that the phase noise performance of the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention will be improved by 10 to 20 dB in the low frequency band.

[0070] In a specific application of the present invention, the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention is applied to a phase-locked loop frequency synthesizer, and the input reference clock composed of the crystal oscillator is located at the front end of the entire loop, providing a low-noise, high-stability frequency reference source for the phase-locked loop, and its noise performance often has a decisive influence on the performance of the entire system. Since the loop noise transfer function of the crystal oscillator has a low-pass characteristic, its phase noise is the main source of the in-band phase noise of the frequency synthesizer output signal, and the out-of-band phase noise of the output signal mainly comes from the voltage-controlled oscillator (VCO) with a high-pass characteristic, so designing a crystal oscillator with lower phase noise will help to increase the loop bandwidth and thus better suppress the phase noise of the VCO, which plays a very critical role in improving the integrated noise performance of the entire frequency synthesizer.

[0071] In summary, the on-chip capacitor circuit and the low-noise crystal oscillator based on the on-chip capacitor circuit of the present invention provide a crystal oscillator that replaces the off-chip capacitor with the on-chip capacitor, and uses a low-noise power supply generation module to separately power the input buffer stage circuit in the on-chip capacitor array, and isolate it from the power supply of the amplifying buffer circuit of the crystal oscillator; at the same time, a filter capacitor is added to the gate of each switch MOS tube, and a partial fixed capacitor structure is used in the on-chip capacitor array, so that the phase noise performance of the on-chip capacitor crystal oscillator is significantly improved. On the other hand, the low-noise power supply generation module designed by the present invention has the advantages of simple circuit, easy implementation, and high anti-interference ability, and at the same time, it almost does not increase the power consumption and chip area of ​​the system. The crystal oscillator circuit composed of the on-chip capacitor circuit of the present invention not only ensures the high integration of the entire crystal oscillator and the radio frequency transceiver system where the crystal oscillator is located, reduces the cost of off-chip materials, but also enables the on-chip capacitor crystal oscillator to better meet the needs of high-performance wireless communication systems. The present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0072] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. An on-chip capacitor circuit, characterized in that: The on-chip capacitance circuit comprises: A first on-chip capacitor array unit is connected to an input terminal of an off-chip crystal; A second on-chip capacitor array unit is connected to the output end of the off-chip crystal; a low-noise power supply generation module, connected to the first on-chip capacitor array unit and the second on-chip capacitor array unit, respectively, to independently provide low-noise power to the first on-chip capacitor array unit and the second on-chip capacitor array unit; through the low-noise power supply generation module, the power supply of the first on-chip capacitor array unit and the second on-chip capacitor array unit is isolated from the power supply of the amplifying buffer circuit of the crystal oscillator, and the amplifying buffer circuit includes an inverting amplifying circuit and an output buffer stage circuit; The low-noise power supply generation module generates a bias current source through a current mirror, and inputs the bias current source into a load resistor to form the power supply required by the first on-chip capacitor array unit and the second on-chip capacitor array unit. After the first on-chip capacitor array unit and the second on-chip capacitor array unit are powered, switch control of the capacitor array is performed.

2. The on-chip capacitor circuit according to claim 1, characterized in that: The first on-chip capacitor array unit and the second on-chip capacitor array unit are connected to the same switch control signal receiving end to achieve synchronous control of the capacitor arrays in the first on-chip capacitor array unit and the second on-chip capacitor array unit.

3. The on-chip capacitor circuit according to claim 2, characterized in that: The first on-chip capacitor array unit includes at least two switched capacitors with input buffer level control and a fixed capacitor; The fixed capacitor is connected in parallel with each of the switch capacitors with input buffer stage control and then connected to a common input terminal and a common power supply negative electrode, so as to improve the maximum tuning range and tuning accuracy of the on-chip capacitor.

4. The on-chip capacitor circuit according to claim 3, characterized in that: The switch capacitor with input buffer stage control comprises a switch MOS tube, an input buffer stage circuit, a controlled capacitor and a gate capacitor; The switch MOS tube is used to control the connection and disconnection of the resonant circuit formed by the controlled capacitor and the off-chip crystal, the input buffer stage circuit is used to isolate the noise of the switch control signal received from the digital circuit and enhance the driving capability, and the gate capacitor is used to filter the high-frequency noise of the buffered switch control signal.

5. The on-chip capacitor circuit according to claim 4, characterized in that: The first on-chip capacitor array unit is provided with a switch control signal receiving end, and the switch control signal receiving end is used to receive the switch control signal, and the switch control signal is sent by a digital circuit.

6. The on-chip capacitor circuit according to claim 5, characterized in that: The switch control signal receiving end is the input end of the input buffer stage circuit; The input buffer stage circuit is composed of a pair of NMOS tubes and PMOS tubes.

7. The on-chip capacitor circuit according to claim 1, characterized in that: The low-noise power supply generation module includes a first power MOS tube, a second power MOS tube, a third power MOS tube, a first resistor and a first capacitor; wherein the first resistor is the load resistor; The first power MOS tube and the second power MOS tube form a current mirror, the second power MOS tube is used to convert the reference current source input to the first power MOS tube into a bias current source of the first resistor, the third power MOS tube is used to reduce the influence of the channel modulation effect on the current mismatch of the current mirror, and the first capacitor is used to filter the noise of the generated power supply voltage.

8. A low noise crystal oscillator based on an on-chip capacitor circuit, characterized in that: The low-noise crystal oscillator based on the on-chip capacitor circuit comprises: an on-chip capacitor circuit, an off-chip crystal, an inverting amplifier circuit and an output buffer stage circuit; The on-chip capacitor circuit is connected in parallel to the two ends of the off-chip crystal to form an LC resonant circuit; the reverse amplifier circuit is also connected in parallel to the two ends of the off-chip crystal, and the output buffer stage circuit is respectively connected to the output end of the off-chip crystal and the output end of the reverse amplifier circuit; The on-chip capacitor circuit includes a first on-chip capacitor array unit, a second on-chip capacitor array unit and a low-noise power supply generation module; the first on-chip capacitor array unit is connected to the input end of the off-chip crystal; the second on-chip capacitor array unit is connected to the output end of the off-chip crystal; the low-noise power supply generation module is connected to the first on-chip capacitor array unit and the second on-chip capacitor array unit respectively, and independently provides low-noise power to the first on-chip capacitor array unit and the second on-chip capacitor array unit; through the low-noise power supply generation module, the power supply of the first on-chip capacitor array unit and the second on-chip capacitor array unit is isolated from the power supply of the amplifying buffer circuit of the crystal oscillator, and the amplifying buffer circuit includes the reverse amplifying circuit and the output buffer stage circuit; the low-noise power supply generation module generates a bias current source through a current mirror, and inputs the bias current source into a load resistor to form the power supply required by the first on-chip capacitor array unit and the second on-chip capacitor array unit, and the first on-chip capacitor array unit and the second on-chip capacitor array unit perform switch control of the capacitor array after being powered.

9. The low noise crystal oscillator based on the on-chip capacitor circuit according to claim 8, characterized in that: The reverse amplification circuit includes a second resistor, a first MOS tube and a second MOS tube; One end of the second resistor is respectively connected to the gate of the first MOS tube, the gate of the second MOS tube, the input end of the off-chip crystal, and the first on-chip capacitor array unit, and the other end is respectively connected to the drain of the first MOS tube, the drain of the second MOS tube, the output end of the off-chip crystal, the input end of the output buffer stage circuit, and the second on-chip capacitor array unit; The reverse amplifier circuit forms an active negative impedance with the first on-chip capacitor array unit and the second on-chip capacitor array unit to provide energy to the LC resonant circuit to offset the energy consumption in the circuit.

10. The low noise crystal oscillator based on on-chip capacitor circuit according to claim 8, characterized in that: The output buffer stage circuit includes a third MOS tube and a fourth MOS tube; The gate of the third MOS tube is respectively connected to the gate of the fourth MOS tube, the output end of the off-chip crystal, the output end of the reverse amplifier circuit, and the second on-chip capacitor array unit to serve as the input end of the output buffer stage circuit; the drain of the third MOS tube is connected to the drain of the fourth MOS tube and serves as the output end of the crystal oscillator; The third MOS tube and the fourth MOS tube are used to isolate the influence of the load impedance change of the subsequent circuit on the frequency pulling of the crystal oscillator, and ensure the driving capability of the output end of the crystal oscillator.

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