A multi-stage cascaded broadband variable gain amplifier and its in-band adjustment method
Through the design of multi-stage cascaded broadband variable gain amplifiers, combined with fine-tuned and coarse-tuned single-stage amplifiers and feedback amplifier units, the gain control range and volatility problems in the prior art are solved, and high-precision, large-range gain control and low power consumption are achieved.
Patent Information
- Application Number
- CN202111503441.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-09
- Publication Date
- 2025-07-25
- Estimated Expiration
- 2041-12-09
AI Technical Summary
In the prior art, programmable gain amplifiers based on active feedback bandwidth expansion technology and binary weighted switching technology have a large Q value of quality factor, which leads to an increase in in-band fluctuation, making it difficult to achieve a large gain control range without damaging the amplifier performance.
A multi-stage cascaded broadband variable gain amplifier is designed. Through cascaded fine-tuning and coarse adjustment single-stage variable gain amplifier, combined with binary weighted switching technology and feedback amplifier unit, the in-band adjustment method is optimized to ensure the parameter accuracy and bandwidth of each amplifier stage and reduce the gain error of the overall circuit.
It achieves a small chip area, low power consumption, and low gain error, and has high accuracy and large gain range, which improves the in-band volatility of the amplifier and improves the stability and efficiency of signal processing.
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Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to a multi-stage cascaded broadband variable gain amplifier and an in-band adjustment method thereof. Background Art
[0002] In recent years, with the development of big data analysis and artificial intelligence, the bandwidth of received signals has been continuously increasing, and the requirement for signal processing rate has also become higher and higher. This requires an Automatic Generation Control (AGC) amplifier to adapt to a wide range of signal bandwidths, operating frequencies, and power requirements. Based on different gain tuning mechanisms, variable gain amplifiers in AGC amplifiers can be divided into analog control variable gain amplifiers and digital control variable gain amplifiers.
[0003] In the prior art, a programmable gain amplifier is usually designed by combining an active feedback bandwidth expansion technique and a binary weighted switch technique. However, the quality factor Q of the programmable gain amplifier designed by this method is relatively large, and the increase in the Q value will lead to an increase in in-band fluctuations.
[0004] In addition, if a large gain control range is required, multiple variable gain amplifiers need to be cascaded, which will further deteriorate the in-band fluctuations of the circuit, and the deterioration of in-band fluctuations will seriously damage the performance of the amplifier. Summary of the Invention
[0005] In order to solve the above problems existing in the prior art, the present invention provides a multi-stage cascaded broadband variable gain amplifier and an in-band adjustment method thereof. The technical problems to be solved by the present invention are realized through the following technical solutions:
[0006] A multi-stage cascaded broadband variable gain amplifier, in which a plurality of single-stage variable gain amplifiers are cascaded; each single-stage variable gain amplifier includes a first gain amplification unit GM1, a second gain amplification unit GM2, a feedback amplification unit GM f , a first load resistor R o1 , a second load resistor R o2 , a third load resistor R o3 , a fourth load resistor R o4 , a first load capacitor C1, a second load capacitor C2, a third load capacitor C3, and a fourth load capacitor C4.
[0007] In an embodiment of the present invention, the plurality of single-stage variable gain amplifiers include: a fine-tuning single-stage variable gain amplifier and a coarse-tuning single-stage variable gain amplifier.
[0008] In one embodiment of the present invention, in the multi-stage cascaded broadband variable gain amplifier, the single-stage variable gain amplifier at the last stage of the cascade is a fine-tuning single-stage variable gain amplifier, and the rest are coarse-tuning single-stage variable gain amplifiers.
[0009] Advantages of the present invention:
[0010] The multi-stage cascaded broadband variable gain amplifier of the present invention ensures a small chip area, low power consumption, and low gain error, and can also have high precision and a large gain range.
[0011] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Description of the drawings
[0012] Figure 1 is a schematic circuit diagram of a three-stage cascaded broadband programmable gain amplifier provided by an embodiment of the present invention;
[0013] Figure 2 is a schematic diagram of the structure of a single-stage variable gain amplifier provided by an embodiment of the present invention;
[0014] Figure 3 is a schematic diagram of the structure of a first gain amplification unit provided by an embodiment of the present invention;
[0015] Figure 4 is a schematic diagram of the structure of a feedback amplification unit provided by an embodiment of the present invention;
[0016] Figure 5 is a schematic diagram of the effect of a traditional in-band adjustment method provided by an embodiment of the present invention;
[0017] Figure 6 is a schematic diagram of the effect of the in-band adjustment method based on the present invention provided by an embodiment of the present invention. Detailed implementation manners
[0018] The present invention will be further described in detail below with reference to specific embodiments, but the implementation manners of the present invention are not limited thereto.
[0019] Embodiment 1
[0020] A multi-stage cascaded broadband programmable gain amplifier provided by an embodiment of the present invention, wherein a plurality of single-stage variable gain amplifiers are cascaded in the multi-stage cascaded broadband variable gain amplifier.
[0021] Each single-stage variable gain amplifier includes a first gain amplification unit GM1, a second gain amplification unit GM2, a feedback amplification unit GM f , a first load resistor R o1 , a second load resistor R o2 , a third load resistor Ro3 , the fourth load resistor R o4 , the first load capacitor C1, the second load capacitor C2, the third load capacitor C3, and the fourth load capacitor C4.
[0022] It should be noted that the number of single-stage variable gain amplifiers cascaded in the multi-stage cascaded broadband variable gain amplifier of the present invention is not limited by the present invention. For the convenience of description, the present invention takes three single-stage variable gain amplifiers as an example for illustration, that is, a three-stage cascaded broadband variable gain amplifier.
[0023] See Figure 2 , Figure 2 is a schematic structural diagram of a single-stage variable gain amplifier provided by an embodiment of the present invention. The single-stage variable gain amplifier has high-precision dB linear characteristics.
[0024] Since the programmable gain amplifier requires a relatively wide bandwidth, a relatively large gain tuning range, and a relatively fine process, the accuracy requirements for parameters are relatively high during design.
[0025] Optionally, among the multiple single-stage variable gain amplifiers, there are included: a fine-tuning single-stage variable gain amplifier and a coarse-tuning single-stage variable gain amplifier.
[0026] Optionally, in the multi-stage cascaded broadband variable gain amplifier, the single-stage variable gain amplifier in the last stage of the cascade is a fine-tuning single-stage variable gain amplifier, and the rest are coarse-tuning single-stage variable gain amplifiers.
[0027] See Figure 1 , Figure 1 is a schematic circuit structure diagram of a three-stage cascaded broadband programmable gain amplifier provided by an embodiment of the present invention. It includes a first-stage variable gain amplifier PGA1, a second-stage variable gain amplifier PGA2, and a third-stage variable gain amplifier PGA3. Since we need to ensure that the overall circuit has relatively high linearity, generally the third-stage PGA3 is set as a fine-tuning amplifier, its quality factor Q3 has a relatively high value, and its bandwidth ω3 is relatively wide. The other two-stage amplifiers PGA1 and PGA2 are set as coarse-tuning amplifiers, and their quality factors Q1, Q2 and bandwidths ω1, ω2 are relatively small.
[0028] Specifically, the positive differential voltage input terminal V of the first-stage variable gain amplifier PGA1 IP1 is the overall positive differential voltage input terminal of the three-stage cascaded broadband programmable gain amplifier. The negative differential voltage input terminal V of the first-stage variable gain amplifier PGA1 IN1 is the overall negative differential voltage input terminal of the three-stage cascaded broadband programmable gain amplifier. The positive differential voltage output terminal V of the first-stage variable gain amplifier PGA1 OP1Connect the positive input terminal V of the differential voltage signal of the second-stage programmable gain amplifier PGA2 IP2 , the negative output terminal V of the differential voltage of the first-stage variable gain amplifier PGA1 ON1 Connect the negative input terminal V of the differential voltage signal of the second-stage programmable gain amplifier PGA2 IN2 ;
[0029] The positive output terminal V of the differential voltage of the second-stage variable gain amplifier PGA2 OP2 Connect the positive input terminal V of the differential voltage signal of the third-stage programmable gain amplifier PGA3 IP3 , the negative output terminal V of the differential voltage of the second-stage variable gain amplifier PGA2 ON2 Connect the negative input terminal V of the differential voltage signal of the third-stage programmable gain amplifier PGA3 IN3 ;
[0030] The positive output terminal V of the differential voltage of the third-stage variable gain amplifier PGA3 OP3 Connect the positive output terminal of the differential voltage signal of the overall three-stage cascaded broadband programmable gain amplifier, and the negative output terminal V of the differential voltage of the third-stage variable gain amplifier PGA3 ON3 Connect the negative output terminal of the differential voltage signal of the overall three-stage cascaded broadband programmable gain amplifier.
[0031] Optionally, the resistance values of the first load resistor R o1 and the second load resistor R o2 are equal, both being r o1 ; the resistance values of the third load resistor R o3 and the fourth load resistor R o4 are equal, both being r o2 ; the capacitance values of the first load capacitor C1 and the second load capacitor C2 are equal, both being c1; the capacitance values of the third load capacitor C3 and the fourth load capacitor C4 are equal, both being c2.
[0032] Optionally, the first gain amplification unit GM1 includes 2 0 +2 1 +2 2 …+2 N-1 +K1 MOS transistor differential pairs and N control switches S0 - S N-1 ;
[0033] Among them, the control switch S n is connected between the drain of 2 n parallel-connected MOS transistor differential pairs and the differential voltage input terminal of the second gain amplification unit GM2 to control the opening and closing of the 2 n parallel-connected MOS transistor differential pairs; the value range of n is 0 ≤ n ≤ N - 1.
[0034] Control the opening and closing of the 2 n parallel MOS transistor differential pairs, so as to control the number of MOS transistor differential pairs connected to the circuit through N control switches S0 - S N-1 For example, the first control switch S0 is connected between the drain of 2 0 = 1 MOS transistor differential pair and the differential voltage input terminal of the second gain amplification unit GM2 to control the on - off of this MOS transistor differential pair. The second control switch S1 is simultaneously connected between the drains of another 2 1 = 2 MOS transistor differential pairs and the differential voltage input terminal of the second gain amplification unit GM2 to control the on - off of these two MOS transistor differential pairs. The third control switch S2 is simultaneously connected between the drains of another 2 2 MOS transistor differential pairs and the differential voltage input terminal of the second gain amplification unit GM2 to control the on - off of these four MOS transistor differential pairs, ……, and so on. The Nth control switch S N-1 is simultaneously connected between the drains of the next 2 N-1 MOS transistor differential pairs and the differential voltage input terminal of the second gain amplification unit GM2.
[0035] The drains of the remaining K1 MOS transistor differential pairs are directly connected to the differential voltage input terminal of the second gain amplification unit GM2;
[0036] All 2 0 + 2 1 + 2 2 … + 2 N-1 + K1 MOS transistor differential pairs have their gates connected to the differential voltage input terminals V IP and V IN .
[0037] See Figure 3 , Figure 3 is a schematic structural diagram of a first gain amplification unit provided by an embodiment of the present invention.
[0038] Optionally, the gain amplification unit GM f includes 2 0 + 2 1 + 2 2 … + 2 N-1 + K2 MOS transistor differential pairs and multiple control switches
[0039] Among them, the control switch is connected between the drains of 2 n parallel MOS transistor differential pairs and the differential voltage output terminal of the second gain amplification unit GM2 to control the 2 nDisconnection and connection of n parallel MOS transistor differential pairs; the value range of n is 1 ≤ n ≤ N - 1.
[0040] For example, the first control switch is connected between the drain of 2 f = 1 MOS transistor differential pair in the gain amplification unit GM 0 and the differential voltage output terminal of the second gain amplification unit GM2 to control the on / off of this MOS transistor differential pair. The second control switch is simultaneously connected between the drains of another 2 1 = 2 MOS transistor differential pairs and the differential voltage output terminal of the second gain amplification unit GM2 to control the on / off of these two MOS transistor differential pairs. The third control switch is simultaneously connected between the drains of another 2 2 MOS transistor differential pairs and the differential voltage output terminal of the second gain amplification unit GM2 to control the on / off of these four MOS transistor differential pairs,... and so on. The Nth control switch is simultaneously connected between the drains of the next 2 N-1 MOS transistor differential pairs and the differential voltage output terminal of the second gain amplification unit GM2.
[0041] Refer to Figure 4 , Figure 4 which is a schematic structural diagram of a feedback amplification unit provided by an embodiment of the present invention.
[0042] Optionally, the phases of the control switches S0 - S N-1 and the control switch are opposite.
[0043] For example, when the switch S0 is closed, the switch is opened. When the switch S1 is closed, the switch is opened. When the switch S N-1 is closed, the switch is opened.
[0044] In this embodiment, the first gain amplification unit GM1 uses binary weighted switch technology to simultaneously change the sizes and bias currents of the input and load transistors of the amplifier using a binary weighted transistor array; by this method, the current densities of the input and load transistors are fixed, and the voltage gain is changed simultaneously, so a constant overdrive voltage is maintained. Therefore, during actual operation, for the first gain amplification unit including 3 control switches, among the 7 differential pairs connected by the 3 control switches in the first gain amplification unit GM1, B = 2 0 s0 + 2 1 s1 + 2 2Two MOS transistor differential pairs are connected to control the on / off of the switch, that is, the size of B can be controlled according to requirements. Here, B is called the digital control word. Specifically, when the control switch S0 is closed, the value of s0 is 1; when the control switch S0 is open, the value of s0 is 0; when the control switch S1 is closed, the value of s1 is 1; when the control switch S1 is open, the value of s1 is 0; when the control switch S2 is closed, the value of s2 is 1; when the control switch S2 is open, the value of s2 is 0. That is to say, at this time, there are a total of B + K1 differential pairs in the first gain amplification unit GM1.
[0045] The gain amplification unit GM2 has only one differential pair, and the gain amplification unit GM f Utilize the binary weighted switch technology. Since the phases of the control switches S0 - S2 and the control switch are opposite, when B of the 7 differential pairs connected to the control switches S0 - S2 are connected, then 7 - B of the 7 differential pairs connected to the control switch f in GM are connected. connected are connected.
[0046] The multi - stage cascaded broadband programmable gain amplifier of this embodiment is composed of cascading multi - stage programmable gain amplifiers with different precision dB linear characteristics to obtain a larger variable gain range. For example, in a three - stage cascaded broadband programmable gain amplifier, PGA3 is a programmable gain amplifier with high - precision dB linear characteristics, and PGA1 and PGA2 are programmable gain amplifiers with low - precision and high - gain control range dB linear characteristics. In this way, on the premise of ensuring the relatively high precision of the designed three - stage cascaded broadband programmable gain amplifier, the overall gain range can be expanded.
[0047] Optionally, the transfer function of the single - stage variable gain amplifier is expressed as:
[0048]
[0049] where Av0 is the DC gain of the single - stage programmable gain amplifier, ζ is the damping coefficient, and ω n is the natural frequency.
[0050] The present invention can feedback part of the output signal to the output end of the first gain amplification unit GM1 through the feedback amplification unit GM f .
[0051] Optionally, based on the transfer function, in order to facilitate calculation, a bandwidth expansion factor N is introduced, and we get:
[0052]
[0053]
[0054]
[0055] N = 1 + Gm f Gm2R1R2 (5)
[0056] When the bandwidth expansion factor is greater than the preset threshold, the DC gain Av0 can be further simplified to G m1 / G mf ;
[0057] G m1 / G mf The value is only determined by the ratio of the transconductance values of GM1 and GM f Therefore, we can design G m1 and G mf to determine the gain of the single-stage programmable gain amplifier.
[0058] The quality factor Q is expressed by the damping coefficient as:
[0059]
[0060] When designing a single-stage programmable gain amplifier, we can determine the parameters of each stage of the programmable gain amplifier by designing the natural frequency ω n and the quality factor Q that are flat within the passband. We ensured that R1 = R2 = R during the design because this is more in line with the characteristics of the circuit we designed. Since the values of G mf and G m2 are constant values, we can calculate the required resistance values through (5).
[0061] The calculated resistance value is expressed as:
[0062]
[0063] Substitute and further express it as:
[0064]
[0065] The quality factor Q is further expressed as:
[0066]
[0067] We can calculate the required values of the load capacitors C1 and C2 through (8) and (9). It should be noted that we can adjust the value of the bandwidth expansion factor N to ensure that C1 and C2 must have solutions. In the same way, we can design the specific parameters of each stage of the programmable gain amplifier.
[0068] So far, all the parameters of the multi-stage cascaded broadband programmable gain amplifier have been determined, and the desired bandwidth, gain control range, and gain control accuracy can be designed by setting these parameters.
[0069] In summary, the multi-stage cascaded broadband variable gain amplifier designed by the present invention ensures a small chip area, low power consumption, and low gain error, and can also have a high accuracy and a large gain range.
[0070] Embodiment 2
[0071] The embodiment of the present invention provides a method for in-band adjustment of a multi-stage cascaded broadband variable gain amplifier, which is applied to the above multi-stage cascaded broadband variable gain amplifier. The method includes:
[0072] Step 1: Determine the number of single-stage variable gain amplifiers in the multi-stage cascaded broadband variable gain amplifier.
[0073] Step 2: Determine the maximum bandwidth expansion multiple and the maximum quality factor Q value corresponding to each single-stage variable gain amplifier.
[0074] The maximum bandwidth expansion multiple and the maximum quality factor Q value are set according to the business needs of those skilled in the art.
[0075] Step 3: Optimize the maximum bandwidth expansion multiple and the maximum quality factor Q value to achieve in-band adjustment.
[0076] According to performance requirements such as the gain control range and the gain control accuracy, the present invention first determines the number of cascaded stages of the multi-stage amplifier, and then determines the maximum bandwidth expansion multiple and the maximum quality factor Q value of the single-stage amplifier. Because it has a greater impact on the tuning accuracy of the overall amplifier circuit as a fine-tuning amplifier, then the designed bandwidth and Q value of each stage of the amplifier are designed and optimized, and finally the in-band fluctuation of the overall circuit is controlled to the minimum.
[0077] The multi-stage cascaded broadband programmable gain amplifier designed based on the present invention can achieve a relatively wide -3dB bandwidth, accurate dB linear characteristics, and a wide gain adjustment range, while ensuring a small chip area, low power consumption, and low gain error; and the broadband programmable gain amplifier with accurate dB-linear characteristics proposed by the present invention can be used in more receivers due to its wide bandwidth and has a wide application range.
[0078] See Figure 5 , Figure 5 is the frequency response curve of the multi-stage cascaded broadband variable gain amplifier adjusted by the traditional in-band flatness adjustment method. Figure 5 The curve in the left figure is the in-band fluctuation curve of each stage of the gain amplifier, and the curve in the right figure is the in-band fluctuation curve of the overall circuit.
[0079] It can be seen from Figure 5 that when the quality factor Q and bandwidth of a single-stage amplifier are the same, cascading multiple stages will lead to an increase in the quality factor Q of the overall circuit, increasing the in-band ripple of the amplifier and seriously damaging the performance of the amplifier.
[0080] To solve the above problems, through in-depth research on a broadband programmable amplifier with high-precision dB linear characteristics designed based on active feedback bandwidth expansion technology and binary weighted switch technology, the present invention innovatively proposes an in-band adjustment method that can greatly optimize the in-band flatness in the case of cascading multiple broadband programmable amplifiers with high-precision dB linear characteristics.
[0081] Refer to Figure 6 , as Figure 6 shown, where the curve in the left figure is the in-band ripple curve of each stage gain amplifier, and the curve in the right figure is the in-band ripple curve of the overall circuit. As Figure 2 shown, the in-band volatility is small and the flatness is very good. Then, according to the calculated parameters of each stage of the circuit, the sizes of the load resistors and capacitors in each single-stage programmable gain amplifier can be accurately calculated, and the final design can be completed to obtain a multi-stage cascaded broadband programmable gain amplifier with high precision and a large gain range.
[0082] The above content is a further detailed description of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can be made, and all should be regarded as belonging to the protection scope of the present invention.
Claims
1. A multi-stage cascaded broadband variable gain amplifier, characterized in that, In the multi-stage cascaded broadband variable gain amplifier, a plurality of single-stage variable gain amplifiers are cascaded; each single-stage variable gain amplifier includes a first gain amplification unit GM1, a second gain amplification unit GM2, and a feedback amplification unit GM f , a first load resistor R o1 , a second load resistor R o2 , a third load resistor R o3 , a fourth load resistor R o4 , a first load capacitor C1, a second load capacitor C2, a third load capacitor C3, and a fourth load capacitor C4; The first gain amplification unit GM1 includes 2 0 +2 1 +2 2 …+2 N-1 + K1 MOS transistor differential pairs and N control switches S0 - S N-1 ; Among them, the control switch S n is connected between the drains of two n parallel MOS transistor differential pairs and the differential voltage input terminal of the second gain amplification unit GM2 to control the opening and closing of the two n parallel MOS transistor differential pairs; the value range of n is 0 ≤ n ≤ N - 1; The drains of the remaining K1 MOS transistor differential pairs are directly connected to the differential voltage input terminals of the second gain amplification unit GM2; All 2 0 +2 1 +2 2 … +2 N-1 The gates of +K1 MOS transistor differential pairs are all connected to the differential voltage input terminals V IP and V IN ; The feedback amplification unit GM f includes 2 0 +2 1 +2 2 …+2 N-1 + K2 MOS transistor differential pairs and multiple control switches Among them, the control switch is connected between the drains of two parallel MOS transistor differential pairs and the differential voltage output terminal of the second gain amplification unit GM2 to control the disconnection and connection of the two parallel MOS transistor differential pairs; the value range of n is 1 ≤ n ≤ N - 1; n two n two Control switches S0 - S N-1 and the control switch have opposite corresponding phases.
2. The amplifier according to claim 1, characterized in that, The plurality of single-stage variable gain amplifiers include: a fine-tuning single-stage variable gain amplifier and a coarse-tuning single-stage variable gain amplifier.
3. The amplifier according to claim 2, characterized in that, In the multi-stage cascaded broadband variable gain amplifier, the single-stage variable gain amplifier of the last stage in the cascade is a fine-tuning single-stage variable gain amplifier, and the rest are coarse-tuning single-stage variable gain amplifiers.
4. The amplifier according to claim 1, characterized in that, The resistance values of the first load resistor R o1 and the second load resistor R o2 are equal, both being r o1 ; The resistance values of the third load resistor R o3 and the fourth load resistor R o4 are equal, both being r o2 ; The capacitance values of the first load capacitor C1 and the second load capacitor C2 are equal, both being c1; The capacitance values of the third load capacitor C3 and the fourth load capacitor C4 are equal, both being c2.
5. The amplifier according to claim 1, wherein The transfer function of the single-stage variable gain amplifier is expressed as: Among them, Av0 is the DC gain of the single-stage programmable gain amplifier, ζ is the damping coefficient, and ω n is the natural frequency.
6. The amplifier according to claim 5, wherein Based on the transfer function, a bandwidth expansion factor N is introduced to obtain: N = 1 + GM f GM2R1R2; When the bandwidth expansion factor is greater than a preset threshold, the DC gain Av0 can be further simplified to GM1 / GM f ; The quality factor Q is expressed by the damping coefficient as: The calculated resistance value is expressed as: will be further expressed as: The quality factor Q is further expressed as:
7. A method for in-band adjustment of a multi-stage cascaded broadband variable gain amplifier, characterized in that, Applied to the multi-stage cascaded broadband variable gain amplifier according to any one of claims 1 to 6, the method includes: Step 1: Determine the number of single-stage variable gain amplifiers in the multi-stage cascaded broadband variable gain amplifier; Step 2: Determine the maximum bandwidth expansion multiple and the maximum quality factor Q value corresponding to each single-stage variable gain amplifier; Step 3: Optimize the maximum bandwidth expansion multiple and the maximum quality factor Q value to achieve in-band adjustment.
Citation Information
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