Power transistor cell and power transistor

Abstract

A power transistor cell (100, 200, 300, 400, 500, 600) having a layer arrangement (101, 201, 301, 401, 501, 601) with a front side and a back side, wherein the front side is opposite to the back side, wherein a trench (104, 204, 304, 404, 504, 604) extends from the front side and perpendicular to the front side in a first direction (105, 205, 305, 405, 505, 605) into the layer arrangement (101, 201, 301, 401, 501, 601) and reaches at least into a current spreading layer (106, 206, 306, 406, 506, 606), wherein the trench (104, 204, 304, 404, 504, 604) extends along a second direction (107, 207, 307, 407, 507, 607) arranged perpendicular to the first direction (105, 205, 305, 405, 505, 605) and a field shielding region (108, 208, 308, 408, 508, 608) is arranged at least partially in the current spreading layer (106, 206, 306, 406, 506, 606), characterized in that a source region (109, 209, 309, 409, 509, 609) and a field shielding contact region (111, 211, 311, 411, 511, 611) are arranged alternately along the second direction (107, 207, 307, 407, 507, 607), wherein between each source region (109, 209, 309, 409, 509, 609) and each field shielding contact region (111, 211, 311, 411, 511, 611) a portion of a body region (110, 210, 310, 410, 510, 610) is arranged, respectively, wherein the field shielding contact region (111, 211, 311, 411, 511, 611) connects the field shielding region (108, 208, 308, 408, 508, 608) with a first metal region (112, 212, 312, 412, 512, 612) on the front side (102, 202, 302, 402, 502, 602) and the field shielding contact region (111, 211, 311, 411, 511, 611) touches at least partially a side of the trench (104, 204, 304, 404, 504, 604).

Description

TECHNICAL FIELD

[0001] The invention relates to a power transistor unit and to a power transistor. BACKGROUND

[0002] Silicon carbide transistors are used for applications which simultaneously require high blocking strength and low on-resistance. Here, the electric field generated at high blocking voltage is significantly greater compared to power transistors made of semiconductor materials with a narrow band gap, so that measures are required to protect the gate oxide from the high field strength.

[0003] The document US 7700971 B2 describes p-doped regions arranged in the drift region, which are arranged at regular intervals in the horizontal direction and are located under the trench MOSFET structure, wherein the regions are connected to the source potential via contact structures. Here, the source regions of the component are arranged laterally next to the trenches, while the contact structures are achieved by metallization of the surface of the exposed portion of the buried p region outside the gate / trench structure region after etching the SiC material.

[0004] In the reverse operation of the component, the conduction of current here over the longer section of the buried p region up to the external contact structure is disadvantageous, since it causes greater energy losses and requires a slower switching frequency in operation.

[0005] The document US 9306061 A describes p-doped regions arranged in the drift region, which are connected to the source potential via contact regions. Here, the source regions and the contact regions are arranged laterally next to the trenches, wherein the contact regions cross or penetrate the source regions. Here, the source regions are laterally adjacent to the trenches. The contact regions are arranged laterally spaced apart from the trenches and touch the source regions. The sequence of source regions and contact regions remains unchanged. This means that the source regions and the contact regions alternate transversely to the length propagation of the trenches, wherein the source regions always touch the trenches and the contact regions never touch the trenches. The sequence of source regions and contact regions remains unchanged. This means that the source regions and the contact regions alternate transversely to the length propagation of the trenches, wherein the source regions always touch the trenches and the contact regions never touch the trenches.

[0006] It is disadvantageous here that the lateral dimension of the power transistor transversely to the longitudinal propagation of the trenches is large.

[0007] It is the task of the invention to overcome these disadvantages. SUMMARY

[0008] The power transistor unit comprises a layer arrangement having a front side and a back side. Herein, the front side is opposite the back side. A trench extends into the layer arrangement from the front side in a first direction and at least into a current spreading layer. The trench extends along a second direction which is arranged perpendicular to the first direction. A field shielding region is arranged at least partially in the current spreading layer. According to the invention, source regions and field shielding contact regions are arranged alternately along the second direction, wherein between each source region and each field shielding contact region a part or a strip of a body region is arranged respectively. The field shielding contact regions connect the field shielding region with a first metal region on the front side, wherein the field shielding contact regions at least partially touch a side of the trench. In other words, source regions and field shielding contact regions are arranged alternately in the propagation direction of the trench, wherein source regions and field shielding contact regions are indirectly consecutive to each other. This means that source regions and field shielding contact regions are separated from each other by a part or a strip of a body region respectively. Thus, source regions, body regions and field shielding contact regions are at least partially connected to a side of the trench in the length course of the trench alternately. Herein, source regions extend from one trench to the next trench along a third direction which is arranged perpendicular to the first direction and the second direction at least partially without interruption.

[0009] Herein, it is an advantage that the size of the power transistor unit is small. This means that compared to a conventional trench power transistor unit, the pitch of the power transistor unit is reduced, thereby reducing the on-resistance.

[0010] In an extension, the field shielding region is arranged in the current spreading layer and spaced apart from the drift layer.

[0011] Herein, it is advantageous that a high vertical and lateral current conduction at low on-resistance can be achieved.

[0012] In another configuration, the field shielding region has a greater distance to the front side than to the bottom of the trench. In other words, seen from the front side, the field shielding region is deeper than the trench bottom.

[0013] Herein, it is advantageous that the trench is protected from high electric field strengths.

[0014] In another configuration, the current spreading layer is configured bell-shaped laterally to the field shielding region.

[0015] Herein, it is an advantage that the current flow is not negatively affected by the field shielding region, since the field shielding region has a lateral distance to the trench.

[0016] In an extension, the current spreading layer is configured rectangular laterally to the field shielding region.

[0017] Herein, it is advantageous that the area of the current conduction region is maximized.

[0018] In a further configuration, the body contact region within the body region is arranged locally below the source region, wherein the body contact region is connected with the first metal region of the front side of the layer arrangement via the field shield contact region.

[0019] Here, the advantage is an improved body contact. This means that the properties of the flyback diode are improved.

[0020] In an extension, the field shield region is rounded in the direction of the trench and / or the back side.

[0021] Here, it is advantageous to reduce the electrical field strength.

[0022] In a further configuration, the layer arrangement comprises a semiconductor substrate with a wide band gap.

[0023] Here, the advantage is that the resulting component has a greater breakdown voltage, lower losses, a higher operating temperature and a higher switching frequency.

[0024] In an extension, the semiconductor substrate comprises silicon carbide or gallium nitride.

[0025] The power transistor according to the invention comprises a plurality of power transistor cells, which have a layer arrangement with a front side and a back side. Here, the front side is opposite the back side. A trench extends into the layer arrangement from the front side in a first direction and at least into a current spreading layer. The trench extends along a second direction, which is arranged perpendicular to the first direction. A field shield region is arranged at least locally in the current spreading layer. According to the invention, source regions and field shield contact regions are arranged alternately along the second direction, wherein between each source region and each field shield contact region there is arranged a part or a band of body regions, respectively. The field shield contact regions connect the field shield region with a first metal region on the front side, wherein the field shield contact regions at least locally touch the side of the trench.

[0026] Here, the advantage is that the power transistor has a small pitch size, thereby reducing the on-resistance.

[0027] Further advantages emerge from the following description of exemplary embodiments or from the dependent patent claims. BRIEF DESCRIPTION OF DRAWINGS

[0028] The invention is explained below on the basis of preferred embodiments and the drawings. The drawings show:

[0029] Figure 1a Plan view of a power transistor cell;

[0030] Figure 1b Partial view of a cross-sectional view along the plane AA' of a power transistor cell;

[0031] Figure 1c Partial view of a cross-section of the power transistor cell along the plane BB';

[0032] Figure 1d Cross-section of the power transistor cell along the plane CC';

[0033] Figure 2a Plan view of a front power transistor half cell;

[0034] Figure 2b Cross-section of a front power transistor half cell along the plane AA';

[0035] Figure 2c Cross-section of a front power transistor half cell along the plane BB';

[0036] Figure 2d Rear view of a front power transistor half cell;

[0037] Figure 3a Plan view of another front power transistor half cell;

[0038] Figure 3b Cross-section of another front power transistor half cell along the plane AA';

[0039] Figure 3c Cross-section of another front power transistor half cell along the plane BB';

[0040] Figure 3d Rear view of another front power transistor half cell;

[0041] Figure 4a Plan view of another front power transistor half cell;

[0042] Figure 4b Cross-section of another front power transistor half cell along the plane AA';

[0043] Figure 4c Cross-section of another front power transistor half cell along the plane BB';

[0044] Figure 4d Rear view of another front power transistor half cell;

[0045] Figure 5a Plan view of another front power transistor half cell;

[0046] Figure 5b Cross-section of another front power transistor half cell along the plane AA';

[0047] Figure 5c Cross-section of another front power transistor half cell along the plane BB';

[0048] Figure 5d Rear view of another front power transistor half cell;

[0049] Figure 6a Plan view of another front power transistor half cell;

[0050] Figure 6b Cross-sectional view of another front power transistor half cell along plane AA';

[0051] Figure 6c Cross-sectional view of another front power transistor half cell along plane BB';

[0052] Figure 6d Rear view of another front power transistor half cell;

[0053] Figure 7a Plan view of two power transistor cells;

[0054] Figure 7b Plan view of another power transistor cell;

[0055] Figure 8a First hexagonal cell geometry;

[0056] Figure 8b Second hexagonal cell geometry;

[0057] Figure 8c Third hexagonal cell geometry;

[0058] Figure 9a First square cell geometry;

[0059] Figure 9b Second square cell geometry; and

[0060] Figure 9c Third square cell geometry. DETAILED DESCRIPTION

[0061] Figure 1aA plan view of the power transistor cell 100 is shown. The power transistor cell 100 comprises a front power transistor half cell 102 and a back power transistor half cell 103 arranged next to each other along a second direction 107. Here, the front power transistor half cell 102 and the back power transistor half cell 103 are identically built, wherein the front power transistor half cell and the back power transistor half cell are arranged mirror-inverted to each other along the second direction 107. This means that the touch surfaces of the front power transistor half cell 102 and the back power transistor half cell 103 are identical. The power transistor cell 100 comprises a layer arrangement 101. The layer arrangement 101 comprises a semiconductor substrate 115, a buffer layer 116, a drift layer 117, a current spreading layer 106, a field shield region 108, a source region 109, a body region 110 and a field shield contact region 111. Here, the buffer layer 116 is arranged on the semiconductor substrate 115. The drift layer 117 is arranged on the buffer layer 116. The current spreading layer 106 is arranged on the drift layer 117. The source region 109 and the body region 110 are locally arranged on the current spreading layer 106. A first metal region 112 is arranged on a front side of the layer arrangement 101 for contacting the source region 109 and the body region 110. In contact, an ohmic contact is formed between the first metal region 112 and the source region 109 or between the first metal region 112 and the body region 110. The field shield region 108 is at least locally arranged in the current spreading layer 106. Here, the field shield region is electrically connected with the first metal region 112 via the field shield contact region 111. A second metal region 114 is arranged below the semiconductor substrate 115. This second metal region serves as a drain metallization. An ohmic contact is formed between the semiconductor substrate 115 and the second metal region 114. Trenches 104 at least up to the current spreading layer 106 extend from the front side in the first direction 105. The trenches 104 extend in a second direction 107 arranged perpendicular to the first direction 105. Here, the second direction 107 corresponds to a propagation direction or a longitudinal direction of the trenches 104. The trenches 104 have a field oxide 118 on the bottom and a gate oxide 119 on the sidewalls. Here, the field oxide 118 can have a greater layer thickness compared to the gate oxide 119. The trenches 104 are filled with a highly doped n-type or p-type polysilicon. The source regions 109 and the field shield contact regions 111 are alternately arranged along the propagation direction of the trenches 104. Between each source region 109 and each field shield contact region 111, a strip-shaped portion of the body region 110 is arranged, respectively. This means that along the trench length of the power transistor cell 100, a source region 109, a portion of the body region 110, a field shield contact region 111, another portion of the body region 110 and another source region 109 are arranged in the upper region of the trench, respectively. Here, the source regions 109 and the body region 110 are in close proximity to the sidewalls of the trenches 104. The field shield contact regions 111 are likewise locally in close proximity to the sidewalls of the trenches 104 and touch the sidewalls of the trenches 104.Furthermore, the current spreading layer 106 and the drift layer 117 locally adjoin the sidewall of the trench 104.

[0062] In an embodiment, seen from the front side of the layer arrangement 101, the surface of the field shield region 108 is arranged at a smaller distance from the front side than from the bottom of the trench 104. Here, the field shield region 108 extends from the current spreading layer 106 into the drift layer 117.

[0063] The semiconductor substrate 115 is highly n-doped, and the buffer layer 116 is n-doped. The drift layer 117 and the current spreading layer 106 are n-doped, wherein the current spreading layer 106 has a higher doping concentration than the drift layer 117. This leads to a better current conduction below the channel region and thus to a lower on-resistance. The source region 109 is highly n-doped, and the body region 110, the field shield region 108 and the field shield contact region 111 are p-doped.

[0064] The semiconductor substrate 115 can comprise silicon, silicon carbide, gallium nitride or gallium oxide.

[0065] The field shield contact region 111 is manufactured by means of ion implantation or epitaxy.

[0066] Figure 1b A partial view showing a cross-sectional view of the power transistor cell 100 along the plane AA' is shown. Here, the partial view shows a cross-section of the front power transistor half-cell 102 along the plane AA'. Here, the line AA' is arranged parallel to a plane that is unfolded by the first direction 105 and the second direction 107 and extends along the third direction 121 through the center of the trench. Figure 1b The second metal layer 114, the semiconductor substrate 115, the buffer layer 116, the drift layer 117, the field oxide 118, the gate metallization 120 and the first metal layer 112 are shown. The depth of the front power transistor half-cell 102 along the second direction 107 is indicated by the reference sign CPz.

[0067] Figure 1c A partial view showing a cross-sectional view of the power transistor cell 100 along the plane BB' is shown. Here, the partial view shows a cross-section of the front power transistor half-cell 102 along the plane BB'. Here, the plane BB' is arranged parallel to a plane that is unfolded by the first direction 105 and the second direction 107 and extends along the third direction 121 at a lateral distance between the trench 104 and the first metal layer 112. Figure 1cThe second metal layer 114, the semiconductor substrate 115, the buffer layer 116, the drift layer 117, the current spreading layer 106, the body region 110, the source region 109, the field shield contact region 111 and the first metal layer 112 are shown. The depth of the field shield contact region 111 along the second direction 107 is denoted by reference sign WPz and the depth of the front power transistor half cell 102 along the second direction 107 is denoted by reference sign CPz.

[0068] Figure 1d A cross-sectional view of the power transistor cell 100 along the plane CC' is shown. The cross-section shows a back view of the front power transistor half cell 102 of the power transistor cell 100. Here, the cross-section of the power transistor cell 100 is parallel to a plane that is spanned by the first direction 105 and the third direction 121. In the second direction 107, the cross-section extends through a point of a half trench length. Figure 1d The reference signs of Figure 1a correspond to the same components and are described in the same way as in . The field shield contact region 111 and the source region 109 alternate along the propagation direction of the trench 104. It can be seen that the field shield contact region 111 neither adjoins the source region 109 nor breaks through or crosses said source region.

[0069] Figure 2a A plan view of the front power transistor half cell 202 is shown. Figure 2a The two back positions of the reference signs of Figure 1a correspond to the same back reference signs of Figure 1a and describe the same components as in Figure 1a . The difference to is that the field shield region 208 has a larger distance to the front side of the layer arrangement 201 than the trench bottom. In other words, seen from the front side, the field shield region 208 is deeper than the trench bottom. This results in a field shielding that acts in a field-reducing manner at the trench bottom.

[0070] Figure 2b A cross-sectional view of the front power transistor half cell 202 of the power transistor cell 200 along the plane AA' is shown. Figure 2b The two back positions of the reference signs of Figure 1b correspond to the same back reference signs of Figure 1b and describe the same components as in Figure 1b . The difference to Figure 2b is that in the current spreading layer 206 is arranged between the drift layer 217 and the field oxide 218. In other words, the trench is located completely in the current spreading layer 206.

[0071] Figure 2c A cross-sectional view of the front power transistor half cell 202 of the power transistor cell 200 along the plane BB' is shown.Figure 2c The two following positions of the reference mark (which correspond to Figure 1c The same reference numerals as those in the following) are described with Figure 1c Same parts as Figure 1c The difference is that the current spreading layer 206 extends deeper into the layer arrangement 201 starting from the front side of the layer arrangement. Figure 1c In the case of the same structural height, compared with Figure 1c Compared to the drift region 117 in FIG. 1 , the drift region 217 has a lower height.

[0072] Figure 2d A rear view of the front power transistor half-cell 202 is shown. The field shield contact region 211 has a gradual profile below the trench 204. This means that if the profile of the boundary between the field shield contact region 211 and the current spreading layer 206 is followed along the third direction 221, it has a non-uniform depth in the first direction 205. The current spreading layer 206 is bell-shaped or arrow-shaped. As a result, the current spreading layer 206 becomes larger. This results in better current conduction below the channel region in the vertical or first direction 205, in the lateral or second direction 207, and in the third direction 221.

[0073] Figure 3a A plan view of another front power transistor half cell 302 is shown. Figure 3a The two following positions of the reference mark (which correspond to Figure 2a The same reference numerals as those in the following) are described with Figure 2a The same parts in. Figure 3a The plan view of the other front power transistor half unit 302 is Figure 2a There is no difference in the plan view of the front power transistor half cell 202.

[0074] Figure 3b A cross-sectional view of another front power transistor half unit 302 along plane AA' is shown. Figure 3b and Figure 2b There is no difference.

[0075] Figure 3c A cross-sectional view of another front power transistor half cell 202 along plane BB' is shown. Figure 3c and Figure 2c There is no difference.

[0076] Figure 3d A rear view of another front power transistor half cell 302 is shown. The current spreading layer 306 is rectangular. As a result, the current spreading layer 306 extends uniformly or evenly below the trench 304. This results in improved current conduction below the trench 304 in the second direction 307 and the third direction 321.

[0077] Figure 4a A plan view of another front power transistor half-cell 402 is shown. Figure 4a The two back positions of the reference signs of Figure 2a the same back reference signs of Figure 2a the same components as in Figure 2a differ in that Figure 4a Additionally, a body contact region 413 is in contact with the body region 410. Here, the body contact region 413 is arranged below the source region 409. The body contact region 413 is electrically connected with the field shield contact region 411. The body contact region 413 causes that, in case of a very steep drain voltage transient, the power transistor cell is insensitive to the activation of a parasitic npn transistor formed by the current spreading layer 406, the body region 410 and the source region 409. Instead, the body contact region 413 extends into the current spreading layer 406, i.e. the body contact region is arranged partially outside the body region 410.

[0078] Figure 4b A cross-sectional view of another front power transistor half-cell 402 along the plane AA' is shown. Here, Figure 4b is identical to Figure 2b is identical to

[0079] Figure 4c A cross-sectional view of another front power transistor half-cell 402 along the plane BB' is shown. Figure 4c The two back positions of the reference signs of Figure 2c the same back reference signs of Figure 2c the same components as in Figure 2c differ in that Figure 4c Additionally, a body contact region 413 is in contact with the body region 410. The body contact region 413 is flat.

[0080] Figure 4d A back view of another front power transistor half-cell 402 is shown. Figure 4d The two back positions of the reference signs of Figure 2d the same back reference signs of Figure 2d the same components as in Figure 4d Additionally, a body contact region 413 is shown.

[0081] Figure 5a A plan view of another front power transistor half-cell 502 is shown. Figure 5a The two back positions of the reference signs of Figure 4a the same back reference signs of Figure 4a the same components as in Figure 4a differ in that, seen from the front side of the self-layer arrangement 501, theFigure 4a The current spreading layer 506 extends deeper into the layer arrangement 501 than the current spreading layer 406 in the front power transistor half cell 401. In other words, the trench bottom 504 and the field shielding region 508 are completely in the current spreading layer 506 and spaced apart from the drift layer 517. Thereby the JFET effect between adjacent field shielding regions 508 along the third direction 521 is cancelled out, resulting in a smaller on-resistance. Additionally, the corner of the field shielding region 511 can be rounded in the direction of the trench 504 and the semiconductor substrate 515.

[0082] Figure 5b A cross-sectional view of another front power transistor half cell 502 along the plane AA' is shown. Figure 5b The two back positions of the reference signs of Figure 4b the same back reference signs of Figure 4b describe the same components as in Figure 5b Figure 4b differ from Figure 4b in that the current spreading layer 506 extends deeper into the layer arrangement 501 from the front side of the layer arrangement than the current spreading layer 406.

[0083] Figure 5c A cross-sectional view of another front power transistor half cell 502 along the plane BB' is shown. Figure 5c The two back positions of the reference signs of Figure 4c the same back reference signs of Figure 4c describe the same components as in Figure 5c Figure 4c differ from Figure 4c in that the current spreading layer 506 extends deeper into the layer arrangement 501 from the front side of the layer arrangement than the current spreading layer 406.

[0084] Figure 5d A back view of another front power transistor half cell 502 is shown. Figure 5d The two back positions of the reference signs of Figure 4d the same back reference signs of Figure 4d describe the same components as in Figure 4d . Here, the current spreading layer 506 extends deeper into the layer arrangement from the front side of the layer arrangement than the current spreading layer 406 in

[0085] Figure 6a A plan view of another front power transistor half cell 602 is shown. Figure 6a The two back positions of the reference signs of Figure 5a the same back reference signs of Figure 5a describe the same components as in Figure 5a ​​The difference consists in that the width of the source region 609, the body region 610 and the field shield contact region 611 varies over the width of the power transistor cell 600. In other words, the extension of the field shield contact region 611 along the second direction 607 is not constant over the width of the power transistor cell 600, but is largest in the central region between the trenches, i.e. for example when two power transistor cells are connected an einander along the third direction 621. This means that the area of the field shield contact region 611 which touches the sidewall of the trench 604 is small. The extension of the source region 609 behaves in the opposite way. The extension is smallest in the region between the central trenches and largest along the sidewall of the trench 604. This means that the boundary between the source region 609 and the body region 610 extends triangularly at the surface of the transistor cell, wherein the base side or rather the wider side of the triangle adjoins the sidewall of the trench 604. Thus, this embodiment combines a narrow field shield contact region 611 near the trench, a small on-resistance and a wide field shield contact region 611 above the field shield region 608 for a good electrical connection of the field shield region 608.

[0086] Figure 6b A cross-sectional view of the other front power transistor half cell 602 along the plane AA' is shown. Figure 6b The two rear positions of the reference signs which correspond to Figure 5b the same rear reference signs of Figure 5b describe the same components as in

[0087] Figure 6c A cross-sectional view of the other front power transistor half cell 602 along the plane BB' is shown. Figure 6c The two rear positions of the reference signs which correspond to Figure 5c the same rear reference signs of Figure 5c describe the same components as in Figure 6c Figure 5c The difference consists in that the width of the source region 609, the body region 610 and the field shield contact region 611 varies over the width of the power transistor cell 600. In other words, the extension of the field shield contact region 611 along the second direction 607 is not constant over the width of the power transistor cell 600, but is largest in the central region between the trenches, i.e. for example when two power transistor cells are connected an einander along the third direction 621. This means that the area of the field shield contact region 611 which touches the sidewall of the trench 604 is small. The extension of the source region 609 behaves in the opposite way. The extension is smallest in the region between the central trenches and largest along the sidewall of the trench 604. This means that the boundary between the source region 609 and the body region 610 extends triangularly at the surface of the transistor cell, wherein the base side or rather the wider side of the triangle adjoins the sidewall of the trench 604. Thus, this embodiment combines a narrow field shield contact region 611 near the trench, a small on-resistance and a wide field shield contact region 611 above the field shield region 608 for a good electrical connection of the field shield region 608.

[0088] Figure 6d A rear view of the other front power transistor half cell 602 is shown. Figure 6d The two rear positions of the reference signs which correspond to Figure 5d the same rear reference signs of Figure 5d describe the same components as in

[0089] Figure 7a ​A plan view of two power transistor cells 700 arranged along a second direction 707 is shown. The source regions 709, the body regions 710 and the field shield contact regions 711 are configured rectangularly. This means that the width of the source regions 709, the width of the body regions 710 and the width of the field shield contact regions 711 are constant over the width of the power transistor cell 700. The source regions 709, the body regions 710 and the field shield contact regions 711 extend from the side of the trench to the power transistor cell edge, respectively.

[0090] Figure 7b A plan view of another power transistor cell 700 is shown. The source regions 709, the body regions 710 and the field shield contact regions 711 have different widths along a third direction 721.

[0091] The power transistor comprises a plurality of power transistor cells 700. The power transistor cells 700 are connected to each other along the second direction 707 and the third direction 721. Here, it is preferred to connect power transistor cells of the same structure type to each other. However, it is also possible to connect different power transistor cells to each other.

[0092] In another embodiment, in adjacent power transistor cells, the power transistor cells are arranged nested, so that in one strip there is a field shield contact region and in the adjacent strip there is no field shield contact region or only a part of a field shield contact region.

[0093] In addition to the strip-like arrangement of the power transistor cells, other cell geometries can also be realized. Figure 8a 、 Figure 8b and Figure 8c A three hexagonal cell arrangement is shown in a schematic plan view, and Figure 9a 、 Figure 9b and Figure 9c A three square cell arrangement is shown in a schematic plan view. It can be seen that the source regions 809 and 909, and the field shield contact regions 811 and 911, as well as the gate oxides 819 and 919. The source metallization is not shown. The field shield regions 808 and 908 inside the layer arrangement are shown as areas enclosed by dashed lines.

[0094] Instead of n-channel components, p-channel components, which are also built in this dual fashion, should also be described by the present application. Here, all n-doping should be replaced by p-doping, and the sign of the voltages should be reversed.

[0095] The following describes the mode of operation of the power transistor cell in the on case and in the off case. In the on case, a source potential is applied to the first metal region, the source connection. For other embodiments, the source potential serves as a reference potential. The gate metallization has a positive gate potential, and the second metal region, the drain connection, has a small positive drain potential of a few volts. If the gate potential is below the threshold voltage Vth, only a small current flows from the drain connection to the source connection. If the gate voltage is increased, i.e. has a value above the threshold voltage, many electrons are moved to the surface of the body region on the gate oxide side, thus creating a conductive channel. A low-ohmic current path from the drain connection through the semiconductor substrate, the buffer layer, the drift layer, the current spreading layer, the channel formed at the surface of the body region on the gate oxide side, the source region up to the source connection is thus created. The power transistor cell or the component having one or more power transistor cells is thus able to conduct a high current density.

[0096] In the off case, the gate voltage has a value below the threshold voltage. The drain voltage has a positive voltage value. As the drain voltage increases, the space charge region absorbing the off voltage between the pn junctions between the p-doped field shielding region, the p-doped field shielding contact region and the p-doped body region and the adjoining respectively lower n-doped current spreading layer and drift layer essentially extends into the n-doped regions, i.e. the current spreading layer and the drift layer. In the case of an increasing off voltage, the space charge region expands into the buffer layer, wherein the p-doped field shielding region, the p-doped field shielding contact region and the p-doped body region are not completely depleted

[0097] The ratio of the total lateral width WP of the field shielding region to the total lateral spacing CP of the power transistor cells can achieve a compromise between low on resistance and shielding effect. If the ratio becomes larger, the shielding effect of the field shielding contact region is more effective and the on resistance is higher. If the ratio tends to zero, the on resistance is extremely low, however the shielding effect is likewise. A ratio of approximately 0.5 is therefore preferred.

[0098] Due to the internal voltage drop and the high doping, the field shielding region and the field shielding contact region interact with the adjoining drift layer and current spreading layer as an intrinsic diode. If the intrinsic diode is powered, the gate voltage has a value less than the threshold voltage and the drain voltage has a negative voltage.

[0099] The ratio of the extension of the field shielding contact region along the second direction to the extension of the power transistor cell in the second direction can establish a compromise between low on resistance and electrical connection of the field shielding region. If the value of the ratio is close to the value 1, the on resistance is high however the electrical connection is excellent. If the value of the ratio is close to the value zero, the electrical connection is low but the on resistance is extremely low. A ratio of approximately 0.25 is therefore preferred.

[0100] The power transistors can be applied in inverters for industrial drives, inverters for regenerative energy generation such as wind turbines, automotive inverters for electric and hybrid vehicles, traction drives or high voltage rectifiers.

Claims

1. A power transistor cell (100, 200, 300, 400, 500, 600) having a layer arrangement (101, 201, 301, 401, 501, 601) with a front side and a back side, wherein The front side is opposite to the back side, wherein the trench (104, 204, 304, 404, 504, 604) extends from the front side along a first direction (105, 205, 305, 405, 505, 605) into the layer arrangement (101, 201, 301, 401, 501, 601), and the trench (104, 204, 304, 404, 504, 604) reaches at least into the current spreading layer (106, 206, 306, 406, 506, 606), wherein the trench (104, 204, 304, 404, 504, 604) extends along a second direction (107, 207, 307, 407, 507, 607) arranged perpendicular to the first direction (105, 205, 305, 405, 505, 605), and a field shielding region (108, 208, 308, 408, 508, 608) is at least partially arranged in the current spreading layer (106, 206, 306, 406, 506, 606), wherein the source region (109, 209, 309, 409, 509, 60 9) and field shield contact regions (111, 211, 311, 411, 511, 611) are alternately arranged along the second direction (107, 207, 307, 407, 507, 607), wherein a portion of the body region (110, 210, 310, 410, 510, 610) is respectively arranged between each source region (109, 209, 309, 409, 509, 609) and each field shield contact region (111, 211, 311, 411, 511, 611), wherein the field shield contact region (1 11, 211, 311, 411, 511, 611) connects the field shield region (108, 208, 308, 408, 508, 608) to the first metal region (112, 212, 312, 412, 512, 612) on the front side (102, 202, 302, 402, 502, 602), and the field shield contact region (111, 211, 311, 411, 511, 611) at least partially touches the side of the trench (104, 204, 304, 404, 504, 604), It is characterized in that The current spreading layer (106, 206, 306, 406, 506, 606) is configured in a bell shape transversely to the field shielding contact region (111, 211, 311, 411, 511, 611), or, The current spreading layer (106, 206, 306, 406, 506, 606) is configured in a rectangular manner transversely to the field shielding contact region (111, 211, 311, 411, 511, 611).

2. The power transistor unit (100, 200, 300, 400, 500, 600) according to claim 1, characterized in that The field shielding region (108, 208, 308, 408, 508, 608) is arranged in the current spreading layer (106, 206, 306, 406, 506, 606) and is spaced apart from the drift layer (117, 217, 317, 417, 517, 617).

3. The power transistor unit (100, 200, 300, 400, 500, 600) according to claim 1 or 2, characterized in that The field shielding region (108, 208, 308, 408, 508, 608) is at a greater distance from the front side of the layer arrangement (101, 201, 301, 401, 501, 601) than the bottom of the trench (104, 204, 304, 404, 504, 604).

4. The power transistor unit (400, 500, 600) according to claim 1 or 2, characterized in that A body contact region (413, 513, 613) within the body region (410, 510, 610) is locally arranged below the source region (409, 509, 609), wherein the body contact region (413, 513, 613) is connected to a first metal region (412, 512, 612) on the front side of the layer arrangement (401, 501, 601) via the field shield contact region (411, 511, 611).

5. The power transistor unit (100, 200, 300, 400, 500, 600) according to claim 1 or 2, characterized in that The field shield region (108, 208, 308, 408, 508, 608) is rounded in the direction of the trench (104, 204, 304, 404, 504, 604) and / or the back side.

6. The power transistor unit (100, 200, 300, 400, 500, 600) according to claim 1 or 2, characterized in that The layer arrangement (101, 201, 301, 401, 501, 601) comprises a semiconductor substrate having a wide bandgap.

7. The power transistor unit (100, 200, 300, 400, 500, 600) according to claim 6, characterized in that The semiconductor substrate includes silicon carbide or gallium nitride.

8. A power transistor comprising a plurality of power transistor cells (100, 200, 300, 400, 500, 600) according to any one of the preceding claims.

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