173 results about "Fault detection rate" patented technology

The invention relates to a non-linear industrial process fault detection method based on Bayes kernel slow feature analysis. After normalization processing of training data and test data, kernel functions of different types are adopted based on a conventional kernel feature analysis method, and the various kernel functions are configured with different kernel functions, and therefore a series of basic KSFA models are established. Non-linear slow features are more fully extracted from the normalized training data and the normalized test data by using the basic KSFA models, and the basic KSFA models are respectively used to monitor the process. The non-linear industrial process fault detection method is provided with Bayesian inference, and the test data monitoring results of the series of basic KSFA models are weighted in a combined manner by adopting a probability way, and finally the integrated monitoring result of a plurality of models is acquired, and therefore a fault detection result is improved, and a fault detection rate is improved.

The invention discloses an optimization method for a multiple target fault test based on a discrete particle swarm optimization, which takes fault detection rate and fault isolation rate of 100 percent as a primary goal, and as a particle fitness function, carries out optimization to a test point by using the discrete particle swarm optimization. An elite set Xlen1 is introduced for storing a plurality of optimization results which meet the primary goal, a subsequent goal hides and conceals the fault and carries out the optimization in the elite set Xlen1, with the result being a global optimum test set Xlen2. A test set Xlen3 which meets the fault test goal that the number of the test points is smallest and the test cost is lowest is found out on the basis of the global optimum test set Xlen2, then the test set Xlen3 meets the multiple target fault test that the fault detection rate and the fault isolation rate are 100 percent, the average number of fault hiding and fault concealing is smallest, the number of the test points is smallest and the test cost is lowest, thus achieving the aim of the multiple target optimization of the fault test.

The invention provides a hierarchical fault diagnosis method for electronic information equipment, and solves the problems that existing equipment fault diagnosis technology is low in fault detection rate and fault coverage rate, poor in fault isolation capacity and the like. The hierarchical fault diagnosis method includes the steps: firstly, analyzing an equipment fault mode: building an equipment fault model, extracting fault characteristics, and simulating, verifying and evaluating faults; secondly, building a hierarchical fault model: optimizing equipment fault mode analysis results and further reversely guiding system fault model hierarchical optimization; thirdly, building a fault diagnosis system: selecting software and hardware resources according to the fault mode analysis results and the hierarchical fault model obtained by the first step and the second step; fourthly, verifying equipment system-level fault diagnosis: finishing system-level diagnosis testing of the equipment.

The invention discloses a modeling method for a software reliability growth model based on a novel environmental factor function. The modeling method solves the problem of high fitting and prediction errors due to complicated processing of Logistic curve mathematics, NHPP (non-homogenous Poisson process) software reliability models are adopted, parameters of each model are estimated on the basis of existing failure data, fitting errors are computed, an optimal fitting model at a testing stage is selected, then environmental factors are fit according to empirical data, the novel time-varying environmental factor function is provided, fault detection rate at a running stage is obtained by the aid of the environmental factors and fault detection rate of the testing stage, and the software reliability growth model based on the environmental factors of the novel time function is built. The model built by the aid of the modeling method has high estimation precision and practicality, reliability of a software system can be well predicted, and the problem of high fitting and prediction errors due to complicated processing of Logistic curve mathematics is solved.

The invention provides a fuzzy relation matrix generating method based on a comprehensive correlation matrix, which can be used for fuzzy fault diagnosis. The method comprises the following steps of: carding fault modes of a product to acquire upper fault modes and corresponding lower fault modes, acquiring each test according to test configuration, establishing the comprehensive correlation matrix, predicting the fault detection rate of each upper fault mode according to each test, generating a detection rate relation matrix of the upper fault modes and the tests, transforming the detection rate relation matrix to acquire a fuzzy relation matrix, and performing product fault diagnosis by using the fuzzy relation matrix. The fuzzy relation matrix generated by using the method can be applied to fault diagnosis in the product, and solves the problem that the diagnosis accuracy declines because the optional characteristic elements of the artificial subordinate function are unreasonable in the conventional fuzzy relation matrix construction method.

The invention belongs to the technical field of electrical equipment monitoring and relates to a monitoring method and a monitoring system for an overheat fault of a transformer. The technical problems that traditional monitoring methods and monitoring systems in the prior art are not reasonable enough and the like are solved by the invention. The monitoring system comprises the following steps: A, thermal image acquisition; B, image recognition processing; and C, fault diagnosis and processing. The monitoring method and the monitoring system for the overheat fault of the transformer have the advantages that acquired image information is recognized by adopting a non-contact monitoring mode to realize fast recognition and diagnose of the part, the degree the type of the early potential fault of the transformer. The monitoring method and the monitoring system for the overheat fault of the transformer have the characteristics that the safety, the reliability and the efficiency are high. Meanwhile, by utilizing the non-contact monitoring mode, a condition is provided for realizing all-weather state monitoring on the transformer on the premise that the operation of the transformer is not influenced, and therefore, the safe, stable and reliable operation of equipment is ensured, the maintenance level of the transformer is comprehensively promoted, and the maintenance cost is reduced. The system is reasonable in design, simple in structure, good in working stability and high in fault detection rate.

The invention relates to a deep-learning-based method for intermittent process fault detection. According to the method not requiring original data hypothesis, equal-length and scaling processing is carried out on original data, training is carried out on a deep neural network with convolution and a plurality of intermediate layers based on a minimum reconstruction error principle, and stage division and feature extraction are carried out in a non-linear manner automatically and precisely; a Gaussian mixture model is built on a coding layer of the network and clustering is carried out, so thatthe model building calculation load is reduced substantially while features are extracted; and then a global probability detection index is put forward by combining a mahalanobis distance, thereby realizing fault detection. On the basis of the simulation experiment of one kind of semiconductor etching process, the result demonstrates that the fault detection rate can be increased effectively by using the method.

The invention discloses a relevance model-based testability prediction method. The method comprises the following steps: indicating the relevance relationship between each component and a test point through defining the interconnection relationship between the function flow direction of a product and each component as well as the position of the test point, and establishing a test relevance model of the product; obtaining a relevance matrix according to the test relevance model; and calculating the relevance matrix to obtain a fault detection rate and a fault isolation rate index of the product so as to complete the testability prediction work of the product and solve the problem that a project prediction method is not strong in operability. The method is particularly suitable for the testability prediction of products when the data such as fault rates and occurrence frequencies of various fault modes at the initial development stage of the products.

The invention relates to a method for automatically detecting a handle loss fault of an angle cock of a railway wagon in the technical field of image processing. Characteristic vectors required for fault detection are established by adopting gradient encoding histogram characteristics; a positioning classifier and a verification classifier which are required for detection are trained by adopting a linear support vector machine; and by adopting a hierarchical cascading detection idea, firstly, the positioning classifier is utilized to position the integral angle cock and then the verification classifier is utilized to verify whether a handle on the angle cock is lost so as to implement full-automatic detection on the handle loss fault of the angle cock, and any labor does not need to participate in the process. According to the invention, the fault detection rate reaches 99.8 percent, the detection speed reaches 6 frames per second, and the requirements of practical application are met.

The invention provides a computer simulation statistics verification method of database search results based on spectrum similarity calculation. The method comprises the following steps: using a similar spectrum model method to calculate a P value; and using a random spectrum model method to calculate a fault detection rate (FDR). The method uses the P value and the FDR value to represent the reliability of database search results of to-be-evaluated samples. When the P value is bigger and the FDR is smaller, the reliability of a database search result is considered to be better. When the P value is smaller and the FDR is bigger, the reliability of the database search result cannot be ensured. During application, the significance level of the P value and the FDR can be determined through a significance test. If the P value of a to-be-evaluated sample is greater than a corresponding significance level and the FDR is smaller than a corresponding significance level, the reliability of the database result can be guaranteed.

The invention provides a detection method for the pattern offset between exposure areas and a test pattern, capable of rapidly and real-time detecting the pattern offset between exposure areas, as well as increasing the fault detection rate and yield. The method comprises the following steps of: obtaining at least one pair of conductive test patterns with a specific position relationship by two times of exposure and other picture composition techniques; performing an electric characteristic detection to the at least one pair of conductive test patterns, if the electric characteristic is not accord with the specific position relationship, then determining that the exposure pattern offset between the two times of exposure areas is unqualified; if the electric characteristic is accord with the specific position relationship, then determining that the exposure pattern offset between the two times of exposure areas is qualified. The method of the invention is used for the detection of the pattern offset between exposure areas.

The invention relates to a lockstep processor bus monitoring method and computer and is used for achieving real-time high-probability fault detection and isolation of computers. According to the lockstep processor bus monitoring method and computer, bus lockstep monitoring circuit modules perform synchronous bit-bit comparison on the bus periodic operation transactions such as reading, writing, interruption and exception handling of two processors. A first processor is connected with a first bus lockstep monitoring module and a second bus lockstep monitoring module respectively; a second processor is connected with the first bus lockstep monitoring module and the second bus lockstep monitoring module respectively; the first bus lockstep monitoring module and the second bus lockstep monitoring module are mutually connected; a first bus bridge conversion module achieves bridging of the first bus lockstep monitoring module between a PCI (peripheral component interconnect) bus and the like, and a second bus bridge conversion module achieves the bridging between the second bus lockstep monitoring module and the PCI bus and the like. The lockstep processor bus monitoring method and computer is high in fault detection rate, good in fault detection timeliness and convenient to achieve.

The invention discloses a board-level circuit testability index calculation method which comprises the following steps: constructing a dependency matrix Du irrelevant with the signal flow and position by virtue of combining device information in a circuit according to a test information database; calculating according to the dependency matrix Du to obtain the maximal fault detection rate; reconstructing the dependency matrix Du to obtain a restructuring matrix; realizing isolation of devices at different positions in similar devices; calculating according to the restructuring matrix so as to obtain the maximal failure isolation rate; calculating the failure isolation rate selected by the current test according to the Boolean vector selected by the test. Therefore, by virtue of construction and reconstruction of the Dependency matrix Du irrelevant with the signal flow, calculation of various testability indexes in a board-level circuit is realized.

The invention belongs to the field of software reliability researches, and particularly relates to a software reliability detection method taking testing effort into consideration, wherein the method takes the influences of testing resource consumption on software reliability into consideration. The method includes the steps that total testing effort and curve type parameters of anticipated consumption are acquired, and the testing effort is calculated; total number of faults of software and a fault detection rate are acquired and calculated; the fault detection rate used for each unit of testing effort is calculated; software reliability at initial time is acquired. According to the software reliability detection method taking the testing effort into consideration, failure data of a Concave type and an S-shaped type can be represented, and fitting ability and prediction ability are improved greatly.

The invention provides a method for realizing weak fault diagnosis and location of an airplane wire by utilizing local mean decomposition. The method comprises the following steps of: connecting the airplane wire with a time domain reflectometer by an aviation plug; denoising the time domain reflected signal obtained by the time domain reflectometer from the tested wire; carrying out local mean decomposition on the denoised time domain reflected signal to obtain time frequency distribution of the time domain reflected signal; analyzing instantaneous frequency changes of the fault positions by utilizing the time frequency distribution, obtained after local mean decomposition, of the time domain reflected signal; analyzing instantaneous frequency changes of the wire with weak faults after diagnosis by utilizing the time frequency distribution, obtained after local mean decomposition, of the time domain reflected signal to obtain the positions of the weak faults in the wire; and comprehensively analyzing the weak fault diagnosis results of the airplane wire, and analyzing the detection speed and detecting the precision parameters. The method has the following beneficial effect that: the time domain reflectometer is utilized to detect the weak faults of the wire, so the weak fault detection rate is high and the weak fault false alarm rate is low.

The invention relates to a self detection method of electrical equipment, in particular to a refrigerator self detection method, which can be used for extremely and accurately find fault parts by the self detection of original parts of the refrigerator. The refrigerator comprises a CPU, a power supply and a detection port, wherein the CPU is connected with the power supply, the detection port is provided with a socket connected with the CPU, and the power supply of the refrigerator is connected with a power detection instrument. The refrigerator self detection method comprises the following steps: firstly, setting an initial power-on time and inputting a port level state; setting the refrigerator to be in a normal working state if a high level is inputted and setting the refrigerator to bein a self detection state if a low level is inputted; and then judging whether the parts are normal or not according to the display of the power detection instrument. The refrigerator self detectionmethod is easy and practical, has very intuitive fault detection rate and can be widely used in the fields of refrigerator manufacture and maintenance.

The invention relates to a train wheel-rail state detection system and method. Image acquisition devices are arranged on the left side and the right side of a train bogie respectively, and image information between a left wheel flange and a left rail and between a right wheel flange and a right rail of a train is acquired in real time; the left wheel flange, the right wheel flange, the left rail and the right rail in the real-time image information are recognized through a processor, and the position relation between the wheel flanges and the rails is calculated according to the real-time image information; the position relation between the wheel flanges and the rails is output through an output device. By means of the system and method, the matching state between the wheel flanges and the rails of the train can be monitored in real time, the operation abnormity can be found in time, the fault detection rate is increased, and the safe operation of the train is guaranteed.

The invention relates to a method for designing a PHM (Prognostic Health Management) system model development and verification platform, which is used for supporting development and simulation verification for a PHM system model and algorithm of aviation equipment. The design method of the invention comprises a PHM model development method, a data management method and a PHM model simulation verification method. The PHM model development and verification platform can solve a problem of model engineering development and verification, and performs effective modification on the model according toa verification result, thereby improving the fault detection rate and isolation rate of the equipment and system, and achieving a purpose of saving the maintenance time and the maintenance cost.

The invention relates to a multi-variable industrial process fault detection method based on a primary assisted PCA model. The method comprises standardizing a normal data set and a prior fault data set; establishing a PCA model as a master monitoring model for the normal data set; calculating the relative mutual information of the prior fault and the normal data; grouping variables by virtue of generalized Dice; establishing a PCA model as an auxiliary monitoring model for a grouped data set; standardizing the test data set; projecting the test data set onto the master monitoring model and the auxiliary monitoring model separately; calculating the statistics of the test data set projected onto the master monitoring model and the auxiliary monitoring model; integrating the variable group information by using a Bayesian theory to obtain the total monitoring statistics; and determining whether the test data set has a fault according to whether the monitoring statistics exceed a control limit. The method not only reduces the omission and waste of some important prior fault information, but also mines the variable local information by variable grouping so as to improve a fault detection rate and improves fault detection performance.

The invention relates to a built-in test implementation method for circuit board interconnection faults in a boundary scan environment. The improved counting sequence algorithm and the single enable method are used as the test generation algorithms for the drive unit and the control unit respectively. The overall design of the invention is mainly composed of search Table, Test Generator and Response Analyzer are composed of three parts. This method can achieve 100% fault detection rate for all interconnection faults, including short circuit, open circuit and sluggish fault; it can avoid the problem of multi-driver conflict, so that the test can be carried out safely; and the design process is simple and easy for engineering implementation; in addition, it It also has the advantages of high reliability, fast test speed, and small hardware overhead.

The invention relates to a method for detecting intermittent faults in an industrial process. The method comprises the steps of: establishing a canonical variate analysis model according to data in anormal working condition in the industrial process to obtain canonical variates and divide to form two parts consisting of a state space and a residual space, introducing a sliding time window to establish a principal component analysis model for average data matrixes of the state space and the residual space, giving a significance level, calculating the control limit of fault detection indexes, collecting real-time data of the industrial process as test data, employing the established principal component analysis model to calculate the fault detection indexes of the test data, and comparing the fault detection indexes of the test data with the control limit to determine whether faults are generated or not. Based on the traditional canonical variate analysis (CVA), the sliding time windowis introduced to provide a new fault detection index to perform averaging of the data of the state space and the residual space to make the fault detection index more sensitive for faults so as to timely and effectively achieve detection of intermittent faults, effectively improve the fault detection rate and reduce the false alarm rate.

The invention discloses a dual-mode redundant system based on lock step synchronization and an implement method thereof. The system comprises at least a first system and a second system, wherein the first system comprises a computation unit core, an interconnect module, a peripheral bridge, an I / O apparatus, a check control unit, a memory controller, and a memory; and the second system comprises a computation unit core, and also includes at least one of a peripheral bridge, an I / O apparatus, a memory controller and a memory, a check control unit and an interconnect module; the two check control units are connected with the two interconnect modules to simultaneously receive and compare access signals of the two computation unit cores, thereby achieving fault detection. By adding a copy module, the system can improve single-point fault detection rate and repair rate, improve the overall reliability, and obviate system fault caused by single-point failure.

The invention discloses a non-linear dynamic process monitoring method based on the non-linear principal component analysis of a normalized variable, which comprises the following steps: acquiring a data matrix Y, pre-specifying a value of p and a system order n; the Hankel matrix of the past and future observational side values being combined according to the formula; calculating covariance and cross-variance matrices of past and future observations; singular value decomposition of H matrix; calculating a state vector and a residual vector; the state vector being projected onto the high dimensional feature space by explicit second order polynomial mapping; the first k principal components being determined by eigenvalue decomposition in principal component analysis; finally, the T2 statistic, the combined statistic Qc and their corresponding control limits being calculated. The method of the invention is used for monitoring three different types of faults in the Eastman chemical process of Tennessee, and the simulation results show that the proposed CV-NPCA method has high fault detection rate and relatively low fault false alarm rate.

The invention discloses a hardware fault detection method based on a reducing program, and aims at increasing space-time difference when a source program and a redundant program run, overcoming the problems, such as data overflow and the like, and improving the fault detection rate of transient faults and permanent faults. The technical scheme comprises: traversing the source program, pre-processing the source program, finding out the atomic data in the source program, and constructing an atomic data list and a data command association list; then dividing the source program into a plurality of reducible program blocks, constructing a reducible program block list and a control flow chart, and constructing an operation relation chart for each reducible program block; then finding out an optimal reducing path for each reducible program block; and finally inserting a fault-tolerance command into each reducible program block, and encoding the source program into which the fault-tolerance command is inserted as a target code. The invention can be used for detecting the transient faults and the permanent faults, improve the fault detection rate, overcome the problem of data overflow, and save storage resource.

The invention provides a detection system of hardware faults, an electronic device and a method. The detection system comprises an acquisition module, a creating module, a comparison module and an output module, wherein the acquisition module responds to a restart instruction and obtains an attribute value of each piece of hardware in the restart instruction of the electronic device; the creating module creates a current SMBIOS (System Management BIOS) file on the basis of the obtained current attribute value of each piece of hardware, wherein the SMBIOS file records the current attribute value of each piece of hardware in the restart; the comparison module compares whether the current attribute value of each piece of hardware in the current SMBIOS file is consistent with a factory leaving attribute value of the hardware in the initial SMBIOS file or not; and the output module outputs a fault list when the current attribute value of each piece of hardware is not consistent with the factory leaving attribute value of the hardware in the initial SMBIOS file, wherein the fault list records the name of the hardware of which the current attribute value of the hardware is not consistent with the factory leaving attribute value of the hardware as well as the current attribute value and the factory leaving attribute value of the hardware. The detection system of the hardware faults, the electronic device and the method quicken a hardware fault detection rate.

The invention relates to a protocol conformance test case priority ordering method based on risk analysis, and belongs to the field of communication protocol conformance test. The method comprises thefollowing steps that: S1: establishing a fault risk analysis model, and calculating a test case importance degree TITCz; S2: according to the test case importance degree, generating an initial execution sequence Tseq, and executing a test; S3: after a fault is detected, updating the priori entropy HTi(2) of rest cases which are not executed; and S4: selecting the case with a minimum priori entropy value as a next case to be executed, and updating an update test case execution sequence Tseq. By use of the method, a test fault detection rate as well as a requirement coverage rate and a fault error detection rate of a conformance regression test in each regression process can be improved.

The invention provides a conveyor rubber belt longitudinal tearing detecting system based on ultrasonic waves. The conveyor rubber belt longitudinal tearing detecting system comprises an ultrasonic signal generating device and an ultrasonic signal receiving device which are arranged at the two ends of a conveyor rubber belt respectively and an ultrasonic signal analyzing device connected with the ultrasonic signal receiving device. A conveyor rubber belt longitudinal tearing failure detecting method of the system comprises the steps that the ultrasonic signal generating device continuously sends ultrasonic signals on one side of the conveyor rubber belt; the ultrasonic signal receiving device receives the ultrasonic signal in real time and sends the signals to the ultrasonic signal analyzing device after the ultrasonic signals are processed; the ultrasonic signal analyzing device processes received detecting signals in real time, the detecting signals are compared with a built-in failure judgment threshold value to judge whether a failure occurs or not, and when the failure occurs, sound-light alarming is carried out locally. The system is simple in structure, low in cost, capable of greatly improving the failure detection rate, good in real-time performance and detection effect, high in work reliability, suitable for dust, water spraying and other complex work conditions, and high in applicability.

The invention belongs to the technical field of software testing, and discloses a software fault detection method and system, a storage medium, a computer program, a terminal and a unified fault detection and repair framework model. Fault detection is considered under the fault detection rate, and an imperfect debugging framework model is repaired and introduced; and five forms are set for the obtained two unified imperfect troubleshooting framework models under initial conditions, and then five condition cumulative fault detection functions are obtained respectively. A unified fault detectionmodel is provided, a single differential equation capable of being used for implementing FDR research is established, then a test model covering fault detection, repair and introduction is established, and a differential equation set capable of implementing FDR research is established. Through the performance of the two types of reliability models under FDR support, it is possible to distinguishdifferent FDR performance, and the importance of establishing the reliability model containing rich test information to improve reliability is verified.

The invention relates to an ant colony algorithm and related matrix based optimizing method for a sequential fault diagnosis strategy. The method comprises four major steps, namely, encoding and building a model, constructing fitness functions, building a model for the sequential fault diagnosis strategy, and optimizing the model. According to the method, the multi-signal model building technology is carried out to obtain related matrix of representation system faults and test dependency, and the fitness functions, a state transition rule of the ant colony algorithm and an information feedback mechanism are defined to convert the diagnosis strategy optimization into ant colony optimization; three strategies, including dynamic adjusting of permeates, information compressing and adapting of degree of congestion are introduced for improving the rate of convergence and optimization capacity of the ant colony algorithm, and therefore, the precision of the optimal design method of the diagnosis strategy and the robustness of the results are improved. The method is consistent with the principle of the minimum cost, namely, the search cost is minimized on the premise that the fault detection rate and isolation rate are ensured, and the requirement on fault strategy optimization is met.

The invention discloses a collaborative optimization method for test stimulation and test points based on response aliasing measurement, and aims to solve the problems that device fault states and normal states have fuzzy boundaries and the early-stage fault detection rate is relatively low because of existence of device tolerance of a conventional simulation circuit. The method comprises the following steps: I, acquiring characteristic information of N testing points of a circuit in M times of normal operation and M times of fault states of a fault element H within a whole frequency band range, namely acquiring M normal samples and M fault samples; II, acquiring normal distribution curves of the M normal samples and the M fault samples, and a mean value and a standard difference of normal distribution in the whole frequency band; III, calculating response aliasing properties of the normal samples and the fault samples of the whole frequency band; and IV, selecting test stimulation and test points which enable a response aliasing measurement function to meet a minimum value. The collaborative optimization method is applied to the field of circuit fault detection.