Lockstep processor bus monitoring method and computer

A bus monitoring and processor technology, applied in the computer field, can solve the problem of low real-time fault detection, and achieve high integrity and easy system implementation.

Active Publication Date: 2014-01-29
AVIC NO 631 RES INST
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional computer fault detection is mainly realized by watchdog, closed-loop detection and other methods. It is difficult to achieve a fault detection rate of more than 98%. Comparing calculation results and monitoring can achieve a high fault detection rate, but the real-time performance of fault detection is not high.

Method used

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  • Lockstep processor bus monitoring method and computer
  • Lockstep processor bus monitoring method and computer
  • Lockstep processor bus monitoring method and computer

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Experimental program
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Embodiment Construction

[0020] Lock-step processor bus monitoring computer structure:

[0021] The lock-step processor bus monitoring computer composition is as attached figure 1 As shown, the core part is two bus lockstep monitoring modules, one works in master mode and the other works in slave mode, and the rest can be realized by general-purpose devices and circuits; the rest mainly includes the following structure:

[0022] 1. Processor

[0023] The processor includes a first processor and a second processor, and the processor has a 60X bus interface. Such as: POWERPC series processors.

[0024] 2. 60X bus bridge conversion module

[0025] The bus bridge conversion module includes a first bus bridge conversion module and a second bus bridge conversion module, and realizes the conversion between the 60X bus interface and the memory bus interface, the PCI bus interface, the asynchronous serial bus interface and the discrete signal interface.

[0026] 3. ROM memory and RAM memory

[0027] The R...

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Abstract

The invention relates to a lockstep processor bus monitoring method and computer and is used for achieving real-time high-probability fault detection and isolation of computers. According to the lockstep processor bus monitoring method and computer, bus lockstep monitoring circuit modules perform synchronous bit-bit comparison on the bus periodic operation transactions such as reading, writing, interruption and exception handling of two processors. A first processor is connected with a first bus lockstep monitoring module and a second bus lockstep monitoring module respectively; a second processor is connected with the first bus lockstep monitoring module and the second bus lockstep monitoring module respectively; the first bus lockstep monitoring module and the second bus lockstep monitoring module are mutually connected; a first bus bridge conversion module achieves bridging of the first bus lockstep monitoring module between a PCI (peripheral component interconnect) bus and the like, and a second bus bridge conversion module achieves the bridging between the second bus lockstep monitoring module and the PCI bus and the like. The lockstep processor bus monitoring method and computer is high in fault detection rate, good in fault detection timeliness and convenient to achieve.

Description

technical field [0001] The invention belongs to computer technology, and relates to a lock-step processor bus monitoring method and a computer. Background technique [0002] The high fault detection rate of computer is very important for its application in safety-critical fields. Traditional computer fault detection is mainly realized by watchdog, closed-loop detection and other methods. It is difficult to achieve a fault detection rate of more than 98%. Comparing calculation results and monitoring can achieve a high fault detection rate, but the real-time performance of fault detection is not high. . Lock-step (Lock-Step) computer is another method to achieve high-integrity computing. Lock-Step can detect faults with a high probability and detect faults in real time. Contents of the invention [0003] The purpose of the present invention is: in order to solve the problem in background technology, provide a kind of lock-step processor bus monitoring method and computer, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/267
Inventor 张喜民韩强周啸李鹏赵小冬沈华孙允明段小虎谢建春马小博李亚锋
Owner AVIC NO 631 RES INST
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