Detection method for pattern offset between exposure areas and test pattern

A technology for testing patterns and exposing patterns, which is used in microlithography exposure equipment, photolithographic process exposure devices, and patterned surface photolithography processes, etc. Inflow and other problems, to achieve the effect of improving the defect detection rate and yield rate

Inactive Publication Date: 2011-11-16
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, the inventors found that in the prior art, it takes a long time to detect the pattern offset between each exposure area, so that the full inspection of the glass substrate cannot be realized, and it is easy to miss inspection and cause defective products to flow into the subsequent process.

Method used

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  • Detection method for pattern offset between exposure areas and test pattern
  • Detection method for pattern offset between exposure areas and test pattern
  • Detection method for pattern offset between exposure areas and test pattern

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Embodiment Construction

[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0032] The detection method of the graphic offset between exposure areas provided by the present invention, such as figure 2 shown, including:

[0033] S201. Obtain at least one pair of conductive test patterns with a specific positional relationship through double exposure and other patterning processes.

[0034] S202. Perform electrical characteristic detection on at least one pair of conductive test patterns. If the electrical characteristics do not confo...

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PUM

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Abstract

The invention provides a detection method for the pattern offset between exposure areas and a test pattern, capable of rapidly and real-time detecting the pattern offset between exposure areas, as well as increasing the fault detection rate and yield. The method comprises the following steps of: obtaining at least one pair of conductive test patterns with a specific position relationship by two times of exposure and other picture composition techniques; performing an electric characteristic detection to the at least one pair of conductive test patterns, if the electric characteristic is not accord with the specific position relationship, then determining that the exposure pattern offset between the two times of exposure areas is unqualified; if the electric characteristic is accord with the specific position relationship, then determining that the exposure pattern offset between the two times of exposure areas is qualified. The method of the invention is used for the detection of the pattern offset between exposure areas.

Description

technical field [0001] The invention relates to the field of thin film transistor liquid crystal display manufacture, in particular to a method for detecting pattern offset between exposure regions and a test pattern. Background technique [0002] TFT-LCD (Thin Film Transistor-Liquid Crystal Display) occupies a dominant position in the current flat panel display market due to its small size, low power consumption, and no radiation. [0003] The TFT-LCD device is formed by combining an array glass substrate and a color filter glass substrate. On the array substrate, gate lines and signal lines defining pixel areas are arranged to cross each other, and pixel electrodes and thin film transistors are arranged in each pixel area. Driving signals are applied to the gate lines, and image data is applied to the pixel electrodes through the signal lines. A black matrix is ​​arranged on the color filter substrate to prevent light from passing through areas other than the pixel elect...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20
CPCH01L21/027G03F7/20G03F7/70683G03F7/70633G03F9/00G03F7/70658G01B7/003G01B7/14G01B2210/56
Inventor 郭建周伟峰明星
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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