Multi-target fault testing optimization method based on discrete particle swarm algorithm

A discrete particle swarm and fault testing technology, applied in electronic circuit testing and other directions, can solve the problems of increased difficulty in fault diagnosis and difficult diagnosis of multiple fault diagnosis methods, and achieves the effect of ensuring global optimal performance.

Inactive Publication Date: 2008-10-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Problems solved by technology

Hidden faults and cover-up faults are likely to cause multiple faults, and the appearance of the fault characteristics of this multiple fault phenomenon is a single fault feature. The existing multiple fault diagnosis method is not easy to diagnose, and it is necessary to reduce the cover up as much as possible in the circuit design. Number of faults and hidden faults
At the same time, with the increase of the sys

Method used

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  • Multi-target fault testing optimization method based on discrete particle swarm algorithm
  • Multi-target fault testing optimization method based on discrete particle swarm algorithm
  • Multi-target fault testing optimization method based on discrete particle swarm algorithm

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Embodiment

[0038] In this embodiment, the multi-objective fault test optimization of a superheterodyne radio system is taken as an example. In this system, the number of test points N that can be selected is 36, and the number of potential faults in the system is 22. The fault-test dependency matrix is ​​as follows: figure 1 shown.

[0039] The particle is defined as a 1×36 binary vector, the particle population size M is 50, and the maximum number of iterations MaxT is 50 times. Use the discrete particle swarm optimization algorithm to find the elite set Xlen1 that satisfies the fault detection rate and fault isolation rate of 100%. In the elite set Xlen1, use the discrete particle swarm optimization algorithm to find the optimal test set Xlen2 with the least average number of hidden faults. The test set Xlen2 is shown in Table 1:

[0040] [1,1,0,1,1,1,1,1,0,1,0,0,1,0,1,1,1,1,1,1,1,1,1,0,0 ,1,0,1,0,0,1,1,1,1,1,1;

[0041] 1,1,0,1,1,1,1,1,0,0,0,0,1,0,1,1,1,1,1,1,1,1,1,1,1, 1,1,1,1,0...

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Abstract

The invention discloses an optimization method for a multiple target fault test based on a discrete particle swarm optimization, which takes fault detection rate and fault isolation rate of 100 percent as a primary goal, and as a particle fitness function, carries out optimization to a test point by using the discrete particle swarm optimization. An elite set Xlen1 is introduced for storing a plurality of optimization results which meet the primary goal, a subsequent goal hides and conceals the fault and carries out the optimization in the elite set Xlen1, with the result being a global optimum test set Xlen2. A test set Xlen3 which meets the fault test goal that the number of the test points is smallest and the test cost is lowest is found out on the basis of the global optimum test set Xlen2, then the test set Xlen3 meets the multiple target fault test that the fault detection rate and the fault isolation rate are 100 percent, the average number of fault hiding and fault concealing is smallest, the number of the test points is smallest and the test cost is lowest, thus achieving the aim of the multiple target optimization of the fault test.

Description

technical field [0001] The invention relates to the field of electronic system fault testing, in particular to an electronic system multi-objective fault testing optimization method based on particle swarm algorithm. Background technique [0002] Existing fault test optimization methods are mainly based on graph theory and information theory for system test point selection and test cost research. Generally, the research goal is to select the least number of test points, and important testability indicators such as masked faults (MF), hidden faults (HF) and test costs are not considered in the process of test point selection. Hidden faults and cover-up faults are likely to cause multiple faults, and the appearance of the fault characteristics of this multiple faults is a single fault feature. The existing multiple fault diagnosis method is not easy to diagnose, and it is necessary to reduce the cover up as much as possible in the circuit design. Number of faults and hidden f...

Claims

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Application Information

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IPC IPC(8): G01R31/28
Inventor 蒋荣华田书林龙兵
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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