Method for iso 26262 compliance evaluation of pressure sensor signals

Abstract

The invention relates to a device and a method for evaluating signals from one or more Wheatstone bridges. Here, the requirements of ISO 26262 are taken into account, a test signal is mixed with the measurement signal before amplification and before analog-digital conversion. After amplification and analog-digital conversion, the measurement signal is unmixed again with the test signal. If the test signal does not correspond to the expected value, a malfunction of the amplifier and / or the analog-digital converter is indicated. The advantage of this procedure is that it can be used during regular operation without being disturbed.

Description

Technical Field

[0001] The present invention relates to a method for monitoring a sensor system in operation using a sensor element WB, particularly a piezoresistive Wheatstone bridge WB of a pressure sensor, and variations thereof. Background Technology

[0002] In automotive applications, numerous safety-related sensors are used, and these sensors must be monitored during operation to ensure proper functioning. These sensors include, for example, pressure measuring devices in braking systems.

[0003] Existing technology

[0004] Various chopper methods for improving the signal-to-noise ratio in amplifiers are known in the art. In this process, the signal is multiplied and amplified by a chopped signal at the chopper frequency before amplification, and then multiplied again by the chopped signal. During this process, the amplified signal is up-mixed on one hand and down-mixed on the other. Since only the down-mixing portion is considered, the low-pass filter suppresses signal components at the chopper frequency and all higher frequencies. In this way, 1 / f noise in the amplifier stage is typically suppressed.

[0005] If this method is combined with sensor elements, a low-noise sensor system can be obtained.

[0006] Then, in this sensor system, a method for operating the sensor system is implemented, wherein the sensor system has a sensor element WB that generates an input signal Si, the input signal value of which has a time characteristic Si(t). This sensor system has a signal path. At a first position in the signal path, the signal path includes an amplifier DV having an input terminal and an output terminal. The signal path begins with the input signal Si of the sensor element WB and ends with a first output signal out1 of the sensor system. The value of the first output signal out1, or the value of a signal derived therefrom, represents the measured value. A first step of the prior art method is to perform a first mixing of the signal in the signal path with a chopped signal Cs at a second position in the signal path. Here, the second position in the signal path is located between the input signal Si of the sensor element at the beginning of the signal path and the input terminal of the amplifier DV at the first position in the signal path. The chopped signal Cs is typically single-frequency. As a next step, at a third position in the signal path, the signal is subjected to a second mixing as down-mixing with the chopped signal Cs to form a first demodulated signal DM1. The third position is located in the signal path between the output of amplifier DV at the first position in the signal path and the first output signal out1 of the sensor system at the end of the signal path. A first filtering of the first demodulated signal DM1 or a signal derived therefrom is performed at a fourth position in the signal path, located between the third position in the signal path and the sensor system output signal out1 at the end of the signal path. First filtering is performed by applying a first filtering function F1[] to the first demodulated signal DM1 or a signal derived therefrom. The first filtering function F1[] determines the relationship between the time characteristic DM1(t) of the first demodulated signal DM1 or the time characteristic of the signal derived therefrom and the time characteristic of the first filtered signal. The first output signal out1 depends on the signal as a result of the first filtering, or the first output signal is the result of the first filtering.

[0007] The first filter function F1[] is selected so that the filtering of the chopper signal Cs by the first filter function F1[] becomes basically zero, that is, F1[Cs] = 0 is applied, and the filtering of the constant F1[1] = β1 is caused, where β1 is a real or complex value in the form of a constant.

[0008] The downside is that these sensor systems must be shut down during operation to check their functionality. Summary of the Invention

[0009] Purpose

[0010] Therefore, the object of the present invention is to create a solution that does not have the aforementioned disadvantages of the prior art and has other advantages. This object is achieved by the method according to the invention.

[0011] Solution

[0012] To address this problem, a method for monitoring a sensor system in operation is proposed, wherein the sensor system has a sensor element WB that provides an input signal Si, the input signal value of which has a signal time characteristic Si(t) over time. The sensor system has a signal path in which various device elements modify and evaluate signals. At a first location on the signal path, the signal path includes an amplifier DV having input and output terminals. The signal path begins with the input signal Si, which is the output signal of the sensor element WB. The signal path ends at a first output signal out1 of the sensor system. The value of the first output signal out1 of the sensor system, or a value derived therefrom (if necessary, e.g., through amplification, filtering, or other further processing), typically represents a measured value. As an exemplary first step, the proposed method includes performing a first mixing of the signal in the signal path with a chopped signal Cs at a second location on the signal path via a first mixer (e.g., a first multiplier M1), the second location typically different from the first location where the amplifier DV is located. Then, preferably, the mixer or the first multiplier M1 is located at the second location on the signal path. Of course, this mixing can also be considered by appropriately designing the amplifier DV, in which case, for example, the gain of the amplifier DV will depend on the chopping signal Cs. For this purpose, the amplifier DV may include a Gilbert multiplier as an amplifier stage. However, alternatively, it has generally proven useful to design the signal path differentially and implement the first multiplier M1 as a switching switch that swaps the two signals of the differential signal in the signal path according to the chopping signal Cs. This is particularly useful when using a Wheatstone bridge as the sensor element WB, as it already provides the differential signal. The second position for performing the first mixing (e.g., the position of the first multiplier) is typically located in the signal path between the input signal Si (i.e., the output signal of the sensor element) at the beginning of the signal path and the input of the amplifier DV at the first position of the signal path. To ensure reliable suppression of 1 / f noise, the chopping signal Cs is preferably bandwidth-limited or single-frequency. This measure increases the frequency of the chopped signal Cs in the spectrum of the sensor output signal (i.e., the signal time characteristic Si(t) of the typically very low-frequency input signal Si). In this way, the frequency range of the thus frequency-enhanced input signal Si is only contaminated by white noise from subsequent amplifier, analog-to-digital converter, and filter stages, thus improving the signal-to-noise ratio. To reuse the amplified and digitized sensor signal, this process must be reversed. For this purpose, a second mixing of the signal with the chopped signal Cs is typically performed at a third position in the signal path to form a first demodulated signal DM1. This second mixing is typically performed by a second mixer located at the third position in the signal path, which is usually a second multiplier M2.Preferably, the third position of the signal path is located between the output of the amplifier DV (which is indeed located at the first position in the signal path) and the first output signal out1 of the sensor system at the end of the signal path. The first filtering of the first demodulated signal DM1 or the signal derived therefrom occurs at the fourth position of the signal path, which is located between the third position of the signal path and the sensor system output signal out1 at the end of the signal path. Typically, the first low-pass filter LP1 performs the first filtering by a first filtering function F1[]. Therefore, the first filtering is performed by applying the first filtering function F1[] to the first demodulated signal DM1 or the signal derived therefrom through the first low-pass filter LP. In addition to the low-pass filter, other filters may be considered depending on the application. However, it is assumed here that the measurement value to be determined changes only slowly and unpredictably periodically, and therefore the DC component of the measurement value represents basic information. The first filtering function F1[] describes the relationship between the time characteristics DM1(t) of the first demodulated signal DM1 or the time characteristics of the signal derived therefrom and the time characteristics of the signal directly after the first filtering. The first output signal out1 depends on the signal after the first filtering is performed directly using the first filtering function F1[]. However, the first output signal out1 can also be the result of the first filtering performed using the first filtering function F1[]. Now, in order to be able to monitor the signal processing device in the signal path at least to a large extent, contrary to the prior art, the test signal TSS is input into the signal path and output again from the signal path and evaluated after passing through the signal path. The first filtering function F1[] and the test signal TSS are designed such that the first output signal out1 preferably no longer contains any effective component of the test signal TSS. In the sensor system, the first low-pass filter LP1 implements the first filtering function F1[], thereby preventing the transmission of the signal component corresponding to the test signal TSS from its input to its output. In order to perform the injection and extraction of the test signal in the signal path, the proposed method includes additional steps. In particular, this includes adding the quadrature chopper signal Cs90 or the test signal TSS derived therefrom to the signal in the signal path at the fifth position of the signal path. Preferably, the fifth position is located between the input signal Si (i.e., the output signal of sensor element WB) at the beginning of the signal path and the input terminal of amplifier DV at the first position of the signal path. The chopper signal Cs has a time characteristic Cs(t), and the quadrature chopper signal Cs90 has a time characteristic Cs90(t). The time characteristic Cs(t) of the chopper signal Cs must satisfy certain conditions, which will be given later. As long as these conditions are met, the time characteristic of the chopper signal Cs can be chosen relatively freely. However, it is recommended that the bandwidth of the chopper signal not be too wide, otherwise it may affect the response time of the sensor system.The time characteristic Cs90(t) of the quadrature chopper signal Cs90 must also satisfy certain, but narrower, conditions, which will be given later. As long as these conditions are met, the time characteristic of the quadrature chopper signal Cs90 can be chosen relatively freely. However, it is recommended that the bandwidth of the quadrature chopper signal Cs90 not be too wide, otherwise it may also affect the response time of the sensor system. Relative to the first filter function F1[], except for noise and similar signal errors, the time characteristic Cs90(t) of the quadrature chopper signal Cs90 at least sometimes essentially has the characteristic F1[Cs90(t)×Cs(t)]=0. This means that the quadrature chopper signal Cs90 is orthogonal to the chopper signal Cs at a generally predetermined time.

[0013] For the sake of explanation, assume that X(t) is the time characteristic of any undefined signal. As an example, assume that the first filter function F1[X] is the indefinite integral of the time characteristic of the exemplary signal X(t) over time. Therefore, assume:

[0014] F1[X]=∫Xdt

[0015] In this case, the following conditions should apply:

[0016] F1[Cs90(t)xCs(t)]=∫Cs90(t)xCs(t)dt

[0017] In this example, the first filter function F1[] will be the L2 product of the chopped signal Cs and the quadrature chopped signal Cs90. For example, one could consider that the chopped signal Cs follows a time sine function and the quadrature chopped signal Cs90 follows a time cosine function. In this case, it is clear that the condition F1[Cs90(t)xCs(t)]=0 is not always satisfied, but only at certain times. If the first low-pass filter LP1 performs the first filter function, it is useful to set up a hold circuit at the output of the first low-pass filter LP1, which samples the current value of the first filter function F1[] of the first low-pass filter LP1 and freezes it at its output as long as the condition F1[Cs90(t)xCs(t)]=0 is satisfied, until the condition F1[Cs90(t)xCs(t)]=0 is satisfied again. This transforms the indefinite integral of the example into a definite integral.

[0018]

[0019] Here, it is assumed that the chopping signal Cs and the quadrature chopping signal have a period T relative to the common signal. p It is periodic. Given the actual existence of orthogonality (i.e., when the boundary conditions are met), this sampling of the filter output signal should also apply to the following filters and their filtering.

[0020] As a next step, the first demodulated signal DM1 or the signal derived therefrom is mixed with the quadrature chopper signal CS90 or the signal derived therefrom in a third frequency mixing to generate the second demodulated signal DM2, and the second demodulated signal DM2 or the signal derived therefrom is filtered by the second filter function F2[] to obtain the second output signal out2.

[0021] Typically, a second filter function F2[] is chosen such that the conditions F2[Cs(t)] = 0, F2[Cs90(t)] = 0, F2[Cs(t)×Cs90(t)] = 0, and F2[1] = β2 are generally applicable, where β2 is a real or complex value. Furthermore, a first filter function F1[] is typically chosen such that the conditions F1[Cs90(t)] = 0, F1[Cs(t)] = 0, F1[Cs(t)×Cs90(t)] = 0, and F1[1] = β1 are generally applicable, where β1 is a real or complex value. Preferably, the filter output signal of the second low-pass filter LP2 using the second filter function F2[] is always sampled when these conditions of the second filter function F2[] are met. Similarly, the filter output signal of the first low-pass filter LP1 using the first filter function F1[] is always sampled in an analog manner when these conditions of the first filter function F1[] are met. Therefore, preferably, the second output signal out2 consists of sampled values ​​of the output value of the second filter function F2[DM2] of the second low-pass filter LP2 when the condition of the second filter function F2[] is satisfied. Therefore, preferably, the first output signal out1 consists of sampled values ​​of the output value of the first filter function F1[DM1] of the first low-pass filter LP1 when the condition of the first filter function F1[] is satisfied.

[0022] Now, in order to infer the correct function of the device component in the signal path, the value of the second output signal out2 or the value of the signal derived therefrom is compared with the expected value interval, and if the value of the second output signal out2 or the value of the signal derived therefrom is outside the expected value interval, then the device component in the signal path is inferred to be faulty.

[0023] It will be apparent to those skilled in the art that the components of a signal path can be implemented in a signal processor and related signal processing procedures. When discussing a signal path herein, in the case of a program implementation within a signal processor, spatial positioning becomes temporal positioning. Therefore, the location within the signal path is subsequently converted into processing time in the sequence of signal processing steps. Thus, even though the claims suggest spatial positioning and arrangement from the wording, the claims also include temporal positioning and sequence.

[0024] The proposed method can be supplemented by the Dicke method to reduce white noise. The basic idea of ​​the Dicke receiver is to compare the DUT placed in a noisy environment with an equivalent noise source.

[0025] Therefore, in our example of the Wheatstone bridge WB, the second Wheatstone bridge (reference Wheatstone bridge RW) is used as a reference noise source, which is preferably manufactured exactly the same, but preferably does not have a measurement signal. For example, if the sensor element is a piezoresistive micromechanical pressure sensor, where a Wheatstone bridge with piezoresistive resistors is arranged on a diaphragm above the cavity, then the reference element RW can be a second pressure sensor with a second Wheatstone bridge having exactly the same structure and preferably implemented on the same silicon crystal. In the subsequent scheme, a third output signal out3 is generated, which represents the difference between the output signal of the reference element (hereinafter referred to as the reference signal Rs) and the output signal of the sensor element (here, the input signal Si). When the sensor element WB and the reference element RW are identical, the third output signal out3 should be zero. However, due to manufacturing tolerances and slightly different, albeit close, operating parameters (e.g., temperature), as well as unavoidable system noise, the third output signal out3 will never actually be exactly zero. Instead, its value must be within a range of desired values ​​that can be checked. This also applies when the reference element cannot provide a measurement. In the case of an exemplary micromechanical pressure sensor as the sensor element, for example, the reference element RW could also consist only of a reference Wheatstone bridge without a diaphragm and without a cavity, making the influence of pressure significantly smaller. In this example of a piezoresistive pressure sensor, if the pressure sensor's Wheatstone bridge, its diaphragm and cavity, and a reference Wheatstone bridge that is identical (matched) to the Wheatstone bridge are packaged on a silicon crystal, the reference Wheatstone bridge and the Wheatstone bridge will generate noise in the same way, thus noise can be eliminated.

[0026] Therefore, the proposed method for noise reduction includes, as a first step, providing a reference element RW that provides a reference signal Rs. For example, the reference element RW could be a reference Wheatstone bridge, as exemplified. Similar to the processing of the input signal Si in the signal path, the corresponding processing of the reference signal Rs is performed in the reference signal path. Particularly important is that the reference signal path is designed to be identical to the signal path used to process the input signal Si. This means that the reference signal path has processing locations for the reference signal within the reference signal path, which directly correspond to the corresponding processing locations of the signal within the signal path. If processing is performed at a location within the reference signal path by a device within the reference signal path, then a corresponding device of the same design within the signal path performs the same processing of the signal in the same manner. Therefore, the signal processing of the reference signal Rs in the reference signal path is initially a spatially parallel process to the signal processing of the input signal Si in the signal path, performed in a manner as similar as possible to the signal processing of the input signal Si in the signal path.

[0027] Currently, time-division multiplexing can be used in certain parts of the signal path instead of spatial multiplexing. The advantage is that it uses not only the same equipment components and processing steps, but also the same components. Therefore, the equivalence of noise in the reference signal path and noise in the signal path is increased.

[0028] The reference signal path begins at the reference element RW, which has the reference signal Rs. The reference signal path ends at the second output signal out2.

[0029] However, in order to use the reference element RW, the reference signal path at the beginning of the reference signal path (at the reference signal Rs) must be different from the signal path at the beginning of the signal path (at the input signal Si). In the proposed scheme, at least the amplifier DV should be shared for both the reference signal path and the signal path. Therefore, at the first position of the reference signal path, the reference signal path includes the amplifier DV having both input and output terminals. Therefore, the first position of the reference signal path including the amplifier DV having both input and output terminals is also the first position of the signal path including the amplifier DV having both input and output terminals. Therefore, the amplifier DV is a portion of the reference signal path at the first position of the reference signal path, and also a portion of the signal path at the first position of the signal path. Now, at the sixth position between the reference signal Rs at the beginning of the reference signal path and the input terminal of the amplifier DV at the first position of the reference signal path, and at the corresponding sixth position between the input signal Si at the beginning of the signal path and the input terminal of the amplifier DV at the first position of the signal path (shared by the signal path and the reference signal path), a switching switch DS shared by the signal path and the reference signal path and having a first input terminal and a second input terminal is inserted into the reference signal path and the signal path at this common sixth position.

[0030] The common switch DS selects its first and second input terminals as its valid input terminals based on the second chopping signal Cs2.

[0031] The signal path includes the first input terminal of the changeover switch DS, while the reference signal path includes the second input terminal of the changeover switch DS. Therefore, the signal path does not include the second input terminal of the changeover switch DS, and the reference signal path does not include the first input terminal of the changeover switch DS.

[0032] Based on the selection of the second chopping signal Cs2, the common transfer switch DS selects its effective input terminal, and accordingly switches the current value at the effective input terminal of the common transfer switch DS to the output terminal of the common transfer switch DS.

[0033] Therefore, the reference signal path and the signal path are identical in the portion between the output of the common switch DS at the sixth position of the reference signal path and the input of the amplifier DV at the first position of the reference signal path and the signal path.

[0034] However, the first filter using the first filter function F1[] is excluded here, and explicitly, this first filter is not part of the reference signal path. Typically, the first low-pass filter (TP) is not part of the reference signal path.

[0035] The first demodulated signal DM1, or a signal derived therefrom, is mixed with the second chopper signal Cs2 in a fourth frequency to generate the third demodulated signal DM3. This third mixing can be performed in a third mixer (e.g., a third multiplier M3).

[0036] Here, the signal processing ends with a third filtering of the third demodulated signal DM3 or the signal derived therefrom, performed by the third filtering function F3[] (to form the third output signal out3). For example, this third filtering can be performed in a third low-pass filter LP3 that implements the third filtering function F3[].

[0037] To ensure that i) the measurement signal component of the sensor element, ii) the differential signal component obtained by the difference between the measurement signal component of the sensor element WB and the reference signal component of the reference element RW, and iii) the test signal component are clearly separated, the first filtering function F1[] of the exemplary first low-pass filter LP1, the second filtering function F2[] of the exemplary second low-pass filter LP2, and the third filtering function F3[] of the exemplary third low-pass filter LP3 must satisfy certain conditions.

[0038] Therefore, a first filter function F1[] must be selected such that the following conditions are essentially satisfied: F1[Cs(t)] = 0 and F1[Cs2(t)] = 0 and F1[Cs90(t)] = 0 and F1[Cs(t)×Cs2(t)] = 0 and F1[Cs(t)×Cs90(t)] = 0 and F1[Cs2(t)×Cs90(t)] = 0 and F1[Cs(t)×Cs2(t)×Cs90(t)] = 0 and F1[1] = β1, where β1 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary first low-pass filter LP1 is preferably sampled precisely when these conditions are met. Similarly, a second filter function F2[] must be chosen such that the following conditions are essentially satisfied: F2[Cs(t)] = 0 and F2[Cs2(t)] = 0 and F2[Cs90(t)] = 0 and F2[Cs(t)×Cs2(t)] = 0 and F2[Cs(t)×Cs90(t)] = 0 and F2[Cs2(t)×Cs90(t)] = 0 and F2[1] = β2, where β2 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary second low-pass filter LP2 is preferably sampled precisely when these conditions are met. In the same manner, a third filter function F3[] must be selected such that the following conditions are essentially satisfied: F3[Cs(t)] = 0 and F3[Cs2(t)] = 0 and F3[Cs90(t)] = 0 and F3[Cs(t)×Cs2(t)] = 0 and F3[Cs(t)×Cs90(t)] = 0 and F3[Cs2(t)×Cs90(t)] = 0 and F3[1] = β3, where β3 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary third low-pass filter LP3 is preferably sampled precisely when these conditions are met. Now, in order to detect defects in the reference element or sensor element, it is preferable to perform a second comparison between the value of the third output signal out3 or the value of the signal derived therefrom and a third expected value interval, and if the value of the third output signal out3 or the value of the signal derived therefrom is outside the third expected value interval, a conclusion is reached that a defect exists. For example, this second comparison can be performed by a third comparator and a fourth comparator or by a signal processor, wherein the third comparator compares the value of the third output signal out3 with a third threshold, and the fourth comparator compares the value of the third output signal out3 with a fourth threshold.

[0039] The drawback of the above process is that the sensor element (exemplary WB WB in this case) is not part of the signal path tested using the test signal TSS. This will now be remedied by a proposed variation of the method.

[0040] Therefore, an improved method for monitoring a sensor system in operation is now proposed, wherein the sensor system includes a sensor element WB as described above, which provides an input signal Si having an input signal value based on a test signal TSS.

[0041] As previously mentioned, the sensor system has a signal path, which again includes an amplifier DV with input and output at a first location in the signal path.

[0042] As mentioned earlier, the signal path begins with the input signal Si of the sensor element WB and ends with the first output signal out1.

[0043] Here, the value of the output signal out1 also represents the measured value.

[0044] Furthermore, the signal in the signal path and the chopped signal Cs undergo a first mixing at the second position of the signal path, which is located between the input signal Si of the sensor element at the beginning of the signal path and the input terminal of the amplifier DV at the first position of the signal path.

[0045] The chopper signal Cs is again band-limited or single-frequency.

[0046] Similarly, the signal and the chopped signal Cs are mixed again at the third position of the signal path to form the first demodulated signal DM1, wherein the third position of the signal path is located between the output of the amplifier DV at the first position of the signal path and the first output signal out1 of the sensor system at the end of the signal path.

[0047] As previously stated, the first filtering of the first demodulated signal DM1 or the signal derived therefrom is performed at the fourth position in the signal path, which is located between the third position in the signal path and the sensor system output signal out1 at the end of the signal path. This first filtering is performed by applying a first filtering function F1[] to the first demodulated signal DM1 or the signal derived therefrom, wherein the first filtering function F1[] describes the relationship between the time characteristics DM1(t) of the first demodulated signal DM1 or the signal derived therefrom and the time characteristics of the signal directly after the first filtering (i.e., the filter output signal). The first output signal out1 again depends on the signal directly after the first filtering, or is itself a result of the first filtering.

[0048] However, compared with the prior art, a test signal TSS is now generated based on the quadrature chopper signal Cs90, wherein the chopper signal Cs has the time characteristic Cs(t) of the chopper signal Cs, and wherein the quadrature chopper signal Cs90 has the time characteristic Cs90(t) of the quadrature chopper signal Cs90, and wherein, relative to the first filter function F1[], apart from noise and similar signal errors, the time characteristic Cs90(t) of the quadrature chopper signal Cs has at least sometimes (i.e. at the time points already discussed) essentially the characteristic of F1[Cs90(t)×Cs(t)]=0.

[0049] Compared with the prior art, a third mixing is performed between the first demodulated signal DM1 or a signal derived therefrom and the quadrature chopper signal Cs90 or a signal derived therefrom, and a second demodulated signal DM2 is generated.

[0050] The second output signal out2 is generated by filtering the second demodulated signal DM2 or the signal derived therefrom using the second filter function F2[].

[0051] A second filter function F2[] is chosen such that F2[Cs(t)] = 0 and F2[Cs90(t)] = 0 and F2[Cs(t)×Cs90(t)] = 0 and F2[1] = β2, where β2 is a real or complex value. As previously described, when these conditions are met, the second hold circuit (Sample & Hold) samples the output value of an exemplary second low-pass filter LP2 that preferably implements the second filter function F2[DM2].

[0052] A first filter function F1[] is selected such that F1[Cs(t)] = 0, F1[Cs90(t)] = 0, F1[Cs(t)×Cs90(t)] = 0, and F1[1] = β1, where β1 is a real or complex value. As previously described, when these conditions are met, the first hold circuit (Sample & Hold) samples the output value of an exemplary first low-pass filter LP1 that preferably implements the first filter function F1[DM1].

[0053] If applicable, the sensor device may include a first trigger circuit that, when the conditions F1[Cs(t)]=0 and F1[Cs90(t)]=0 and F1[Cs(t)×Cs90(t)]=0 and F1[1]=β1 (where β1 is a real or complex value), signals the first holding circuit to the first holding circuit to sample the result of the first filter function F1[] applied to the first demodulated signal DM1, so that the first holding circuit forms the first output signal out1 through the sample.

[0054] If applicable, the sensor device may include a second trigger circuit that, when the conditions F2[Cs(t)]=0 and F2[Cs90(t)]=0 and F2[Cs(t)×Cs90(t)]=0 and F2[1]=β2 (where β2 is a real or complex value), signals the second holding circuit to the second holding circuit to indicate the sampling of the result of the second filter function F2[] applied to the second demodulated signal DM2, so that the second holding circuit forms the second output signal out2 through the sampling.

[0055] Finally, the value of the second output signal out2, or the value of the signal derived therefrom, is compared again with the expected value interval. If the value of the second output signal out2, or the value of the signal derived therefrom, is outside the expected value interval, an incorrect conclusion is reached. Refer again to the explanation in the preceding paragraphs.

[0056] Similarly, it is meaningful to include the sensor element and the reference element in the test signal path. In this case, a reference element RW that provides the reference signal Rs is also provided. The reference signal Rs is processed in the reference signal path. Again, the reference signal path is designed to be the same as the signal path used to process the input signal Si. At this point, refer to the process already described. The reference signal path again begins with the reference signal Rs and again ends with the second output signal out2.

[0057] As mentioned earlier, the reference signal path at the beginning of the reference signal path (at the reference signal Rs) is different from the signal path at the beginning of the signal path (at the input signal Si).

[0058] As previously stated, the reference signal path at the first position of the reference signal path includes an amplifier DV having input and output terminals. Therefore, as mentioned above, the amplifier DV is also a part of the reference signal path at the first position of the reference signal path, and simultaneously a part of the signal path at the first position of the signal path.

[0059] As previously described, at the sixth position between the reference signal Rs located at the beginning of the reference signal path and the input terminal of the amplifier DV at the first position of the reference signal path, and at the sixth position of the signal path between the input signal Si located at the beginning of the signal path and the input terminal of the amplifier DV (shared by the signal path and the reference signal path) at the first position of the signal path, a switching switch DS shared by the signal path and the reference signal path and having a first input terminal and a second input terminal is inserted into the reference signal path and the signal path at this common sixth position.

[0060] As described above, the switch DS, which is shared by the signal path and the reference signal path, selects its valid input terminal between its first input terminal and its second input terminal according to the second chopping signal Cs2.

[0061] The signal path includes the first input terminal of the changeover switch DS, but does not include the second input terminal of the changeover switch DS. Accordingly, the reference signal path includes the second input terminal of the changeover switch DS, but does not include the first input terminal of the changeover switch DS.

[0062] The common switch DS selects the valid input terminal selected in response to the second chopping signal Cs2, and transmits the value at the valid input terminal of the common switch DS to the output terminal of the common switch DS.

[0063] The reference signal path and the signal path are identical in the portion between the output of the common switch DS at the sixth position of the reference signal path and the input of the amplifier DV at the first position of the reference signal path and the signal path.

[0064] The first filter using the first filter function F1[] (e.g., the first low-pass filter LP1) is not part of the reference signal path.

[0065] For example, in the third low-pass filter LP3, the third output signal out3 is generated by the third filtering function F3[] on the third demodulated signal DM3 or the signal derived therefrom.

[0066] To ensure clear separation of i) the measurement signal component of the sensor element, ii) the differential signal component obtained by the difference between the measurement signal component of the sensor element WB and the reference signal component of the reference element RW, and iii) the test signal component, the first filtering function F1[] of the exemplary first low-pass filter LP1, the second filtering function F2[] of the exemplary second low-pass filter LP2, and the third filtering function F3[] of the exemplary third low-pass filter LP3 must again satisfy certain conditions.

[0067] Therefore, the first filter function F1[] must be selected such that the following conditions are essentially satisfied: F1[Cs(t)] = 0 and F1[Cs2(t)] = 0 and F1[Cs90(t)] = 0 and F1[Cs(t)×Cs2(t)] = 0 and F1[Cs(t)×Cs90(t)] = 0 and F1[Cs2(t)×Cs90(t)] = 0 and F1[1] = β1, where β1 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary first low-pass filter LP1 is preferably sampled precisely when these conditions are met. Similarly, the second filter function F2[] must be chosen such that the following conditions are essentially satisfied: F2[Cs(t)] = 0 and F2[Cs2(t)] = 0 and F2[Cs90(t)] = 0 and F2[Cs(t)×Cs2(t)] = 0 and F2[Cs(t)×Cs90(t)] = 0 and F2[Cs2(t)×Cs90(t)] = 0 and F2[1] = β2, where β2 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary second low-pass filter LP2 is preferably sampled precisely when these conditions are satisfied. In the same manner, a third filter function F3[] must be selected such that the following conditions are essentially satisfied: F3[Cs(t)] = 0 and F3[Cs2(t)] = 0 and F3[Cs90(t)] = 0 and F3[Cs(t)×Cs2(t)] = 0 and F3[Cs(t)×Cs90(t)] = 0 and F3[Cs2(t)×Cs90(t)] = 0 and F3[1] = β3, where β3 is a real or complex value. As mentioned above, if unavoidable slight deviations due to noise and manufacturing errors are ignored, the output of the exemplary third low-pass filter LP3 is preferably sampled precisely when these conditions are met. Now, in order to detect defects in the reference element or sensor element, it is preferable to perform a second comparison between the value of the third output signal out3 or the value of the signal derived therefrom and a third expected value interval, and if the value of the third output signal out3 or the value of the signal derived therefrom is outside the third expected value interval, a conclusion is reached that a defect exists. For example, this second comparison can be performed by a third comparator and a fourth comparator or by a signal processor, wherein the third comparator compares the value of the third output signal out3 with a third threshold, and the fourth comparator compares the value of the third output signal out3 with a fourth threshold.

[0068] In order to perform this process, a specific pressure sensor or sensor is advantageous.

[0069] Therefore, a pressure sensor for use in a method according to one or more of the foregoing methods is proposed. The proposed pressure sensor comprises a Wheatstone bridge with four piezoresistive resistors R1, R2, R3, R4 and a reference Wheatstone bridge with four reference piezoresistive resistors R5, R6, R7, R8. Preferably, the reference resistors R5, R6, R7, R8 of the reference Wheatstone bridge RW are arranged in the same manner as the resistors R1, R2, R3, R4 of the Wheatstone bridge WB. To achieve good thermal coupling and thus better noise uniformity, the pressure sensor having the Wheatstone bridge WB as a sensor element and the reference Wheatstone bridge RW as a reference element are arranged together on a monolithic crystal. This ensures that they are subjected to substantially the same effects during manufacturing and operation. Preferably, equivalence is maximized by identical alignment of components and identical arrangement of components relative to each other.

[0070] The pressure sensor includes at least one first cavity, which is closed on at least one side by a first diaphragm and surrounded by a continuous wall. The cavity surface opposite the first diaphragm can be fully or partially opened to allow the entry of a medium in the case of a differential pressure sensor, or closed in the case of an absolute pressure sensor. Preferably, the piezoresistive resistors R1, R2, R3, and R4 of the Wheatstone bridge WB are at least partially arranged on the first diaphragm. In this case, for example, refer to industrial property EP 2 524 389 B1, EP 2 524 390 B1, EP 2 524 198 B1, EP 2 523 896 B1, and EP 2 523 895 B1.

[0071] Currently, the following options are available for the reference sensor element:

[0072] A) The reference sensor element can be designed to provide a reference signal Rs, which should be equal to the input signal Si. In this case, the reference signal Rs and the input signal Si depend in the same way on the value of a physical quantity that affects the corresponding output signal of the sensor element and the output signal of the reference element, such that a change in the value of this physical quantity results in a change in the same value of the input signal Si and the reference signal Rs. In the example of the pressure sensor discussed here, this exemplary physical quantity is pressure.

[0073] B) The reference sensor element can be designed to provide a reference signal Rs, which should differ in a predetermined manner from the input signal Si provided by the sensor element. In this case, the reference signal Rs and the input signal Si depend differently on the value of a physical quantity that affects the corresponding output signal of the sensor element and the output signal of the reference element, such that a change in the value of this physical quantity results in a non-equal change in the input signal Si and a non-zero change in the reference signal Rs. In the example of the pressure sensor discussed here, this exemplary physical quantity is typically pressure.

[0074] C) The reference sensor element can be designed to provide a reference signal Rs, which should deviate from the input signal Si in a previously known manner (i.e., substantially constant). Therefore, preferably here, the reference signal Rs is substantially independent of the value of the physical quantity affecting the corresponding output signal of the sensor element. Instead, the input signal Si continues to depend on the value of the physical quantity affecting the corresponding output signal of the sensor element, such that a change in the value of this physical quantity causes a change in the input signal Si, while the reference signal Rs has no or only negligible change. In the example of the pressure sensor discussed here, this exemplary physical quantity is pressure.

[0075] Scenario A): The reference element and the sensor element have the same design.

[0076] In the pressure sensor example of scenario A, the pressure sensor includes a reference cavity that is enclosed on at least one side by a second diaphragm and surrounded by a continuous wall. Preferably, the second diaphragm is constructed identically to the first diaphragm. Preferably, the first diaphragm has the same size and shape as the second diaphragm. Preferably, the reference cavity is constructed in the same manner as the first cavity. The cavity surface of the reference cavity opposite the second diaphragm can be fully or partially open to allow the entry of a medium, or it can be closed. Preferably, when the corresponding cavity surface of the first cavity is closed, the cavity surface of the reference cavity is closed. Preferably, when the corresponding cavity surface of the first cavity is open, the cavity surface of the reference cavity is open, in which case the openings of the corresponding cavity surfaces are made in the same manner. When the cavities are closed, the first cavity and the reference cavity are preferably filled with the same gas at the same pressure or preferably with the same vacuum. Preferably, the piezoresistive reference resistors R5, R6, R7, and R8 of the exemplary reference Wheatstone bridge RW are at least partially arranged on the second diaphragm above the reference cavity. In the best case, the behavior of the first Wheatstone bridge WB interacting with the first diaphragm and the first cavity is consistent with the behavior of the reference Wheatstone bridge RW interacting with the second diaphragm and the reference cavity, so that a non-zero signal other than noise is substantially unmeasurable at the third output signal out3. If a non-zero signal can be measured at the third output out3 outside the third desired value interval, an error exists.

[0077] Scenario B): The reference element and the sensor element are designed differently, and the sensitivity of the reference element to physical quantities is different from that of the sensor element.

[0078] In the pressure sensor example of scenario B, the pressure sensor includes a reference cavity that is closed on at least one side by a second diaphragm and surrounded by a continuous wall. In this case, preferably, the mechanical structure obtained through the reference cavity and the second diaphragm differs from the mechanical structure obtained through the first cavity and the first diaphragm. For example, the second diaphragm can be designed differently from the first diaphragm. For example, it can be thicker, thinner, larger, smaller, of a different shape, or of a different structure. The shape of the reference cavity can differ from that of the first cavity. For example, the reference cavity can be smaller or larger, deeper or shallower, or of a different shape or with a different filling. The shape of the cavity surface of the reference cavity facing the second diaphragm can differ from the shape of the cavity surface of the first cavity facing the first diaphragm. The cavity surface of the reference cavity can be closed when the cavity surface of the first cavity is open, or it can be open when the cavity surface of the first cavity is closed. If both are open, the shape of the openings, their location within the respective cavities, and their size can differ. When the cavities are closed, they can be filled with different gases and / or filled at different pressures, where low pressure can be understood to include vacuum. Of course, it's also possible to consider that they can be filled with different gases and / or at different pressures, where low pressure can be understood as including vacuum. It's also possible that the design of the piezoresistive resistors R1, R2, R3, R4 in the Wheatstone bridge WB can differ from the design of the reference piezoresistive resistors R5, R6, R7, R8 in the reference Wheatstone bridge RW. This difference in design may involve resistor values, dimensions, size, design, orientation, doping, etc. In this case, the third output signal out3 and the first output signal out1 together form an output signal vector, the value of which can only be within a predetermined range. Therefore, it's possible to check whether the two-dimensional output signal vector value of this two-dimensional vector is consistent with the two-dimensional expected value range, or to extract two values ​​of two different physical parameters that have different effects on the sensor element and the reference element from this two-dimensional output signal vector value. If the two-dimensional value of the two-dimensional output vector deviates from the two-dimensional expected value range, an erroneous conclusion can be drawn.

[0079] Case C): The reference element and the sensor element are different, and the reference element is not sensitive to physical quantities.

[0080] In case C, the pressure sensor preferably does not include a reference cavity. Therefore, the mechanical structure of the reference element in the form of a Wheatstone bridge RW deviates significantly from that of the sensor element in the form of a Wheatstone bridge WB. Ideally, case C is an extreme case of case B, where the reference element typically appears in the form of a reference Wheatstone bridge RW, in which case the sensor element in the form of a Wheatstone bridge WB no longer has any sensitivity to the physical quantity to be detected. Then, the reference sensor element RW typically detects parasitic parameters such as pressure or humidity. This evaluation is similar to that in case B.

[0081] Preferably, in this exemplary case of the micromechanical pressure sensor, the piezoresistive reference resistors R5, R6, R7, and R8 are arranged such that the deflection of the first diaphragm does not affect the reference resistors R5, R6, R7, and R8 of the reference Wheatstone bridge RW. Preferably, for this purpose, the reference resistors R5, R6, R7, and R8 are not located on the first diaphragm.

[0082] The first resistor R1 of the Wheatstone bridge WB is equivalent to the fifth resistor R5 of the reference Wheatstone bridge WB in that they are constructed in the same way.

[0083] The second resistor R2 of the Wheatstone bridge WB is equivalent to the sixth resistor R6 of the reference Wheatstone bridge WB in that they are constructed in the same way.

[0084] The third resistor R3 of the Wheatstone bridge WB is equivalent to the seventh resistor R7 of the reference Wheatstone bridge WB in that they are constructed in the same way.

[0085] The fourth resistor R4 of the Wheatstone bridge WB is equivalent to the eighth resistor R8 of the reference Wheatstone bridge WB in that they are constructed in the same way.

[0086] Then, in this example, the reference element in the form of a Wheatstone bridge RW is preferably used as a reference noise source for subsequent signal processing of the input signal Si from the sensor element (in this case, a Wheatstone bridge WB).

[0087] Therefore, this paper proposes a sensor, particularly a pressure sensor, for use in one of the aforementioned methods, wherein the sensor includes a first resistor R1 having a first terminal and a second terminal, a second resistor R2 having a first terminal and a second terminal, a third resistor R3 having a first terminal and a second terminal, and a fourth resistor R4 having a first terminal and a second terminal. Now, in order to generate a first differential modulation voltage V mod1The sensor in this embodiment includes a first voltage source V1 having a first terminal and a second terminal, and a second voltage source V2 having a first terminal and a second terminal. The first terminal of the first voltage source V1 is connected to a first power supply voltage line VDD. The second terminal of the first voltage source V1 is connected to a first terminal of a first resistor R1. The second terminal of the first resistor R1 is connected to a first terminal of a second resistor R2. The second terminal of the second resistor R2 is connected to a second power supply voltage line GND. The first terminal of the second voltage source V2 is connected to the first power supply voltage line VDD. The second terminal of the second voltage source V2 is connected to a first terminal of a third resistor R3. The second terminal of the third resistor R3 is connected to a first terminal of a fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the second power supply voltage line GND. The first voltage of the first voltage source V1 depends on a test signal TSS. The second voltage of the second voltage source V2 depends on the test signal TSS in the opposite manner to the first voltage of the first voltage source V1.

[0088] In addition to inputting test signals via voltage sources V1, V2, V1b, and V2b, test signals can also be input via corresponding current source pairs. In this case, the Wheatstone bridge WB and the reference Wheatstone bridge RW must not be excited by voltage source pairs [V1, V2] and [V1b, V2b], but rather by current source pairs. In this scenario, the Wheatstone bridge WB is assigned a first current source pair, and the reference Wheatstone bridge RW is assigned a second current source pair. Each of these current source pairs consists of two current sources, wherein, according to the assignment, the first current source of the current source pair feeds a first current into the first branch of the Wheatstone bridge WB or the reference Wheatstone bridge RW, and wherein, according to the assignment, the second current source of the current source pair feeds a second current into the second branch of the Wheatstone bridge WB or the reference Wheatstone bridge RW. The first and second currents depend on the test signal TSS, which has a different sign. A total of four current sources are required, and they are preferably identical (matched). Since this possibility is obvious to those skilled in the art, no drawings have been made for it.

[0089] In addition to inputting the test signal component to the input signal Si via a voltage or current source, the values ​​of resistors R1, R2, R3, and R4 of the Wheatstone bridge WB and the values ​​of reference resistors R5, R6, R7, and R8 of the reference Wheatstone bridge RW can also be modulated. Therefore, as another embodiment, a sensor, particularly a pressure sensor, is proposed herein, which is typically used in methods according to one or more of the above-described methods. The sensor includes a first resistor R1 having a first terminal and a second terminal, a second resistor R2 having a first terminal and a second terminal, a third resistor R3 having a first terminal and a second terminal, and a fourth resistor R4 having a first terminal and a second terminal. Furthermore, the sensor includes a first variable resistor RV1 having a first terminal and a second variable resistor RV2 having a first terminal and a second terminal.

[0090] The first terminal of the first variable resistor RV1 is connected to the first power supply voltage line VDD. The second terminal of the first variable resistor RV1 is connected to the first terminal of the first resistor R1. The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is connected to the second power supply voltage line GND. The first terminal of the second variable resistor RV2 is connected to the first power supply voltage line VDD. The second terminal of the second variable resistor RV2 is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the second power supply voltage line GND. The resistance value of the first variable resistor RV1 depends on the test signal TSS, and the resistance value of the second variable resistor RV2 depends on the test signal TSS in the opposite manner to that of the first variable resistor RV1. Preferably, the first variable resistor RV1 and the second variable resistor RV2 are the same (matched).

[0091] advantage

[0092] In at least some embodiments, the method and exemplary apparatus shown in the following figures enable verification of signal paths during operation. However, the advantages are not limited thereto. Attached Figure Description

[0093] These figures illustrate exemplary designs presented herein. They are schematic and simplified.

[0094] Figure 1 A simple exemplary embodiment of the present invention is shown.

[0095] Figure 2 It shows that according to Figure 1 An exemplary waveform of the operation of the device.

[0096] Figure 3 It shows the corresponding Figure 1 The diagram shows that the first adder and the first multiplier have been interchanged.

[0097] Figure 4 Basically showed Figure 2 But now applicable Figure 3 An example signal.

[0098] Figure 5 It shows the basis Figure 3 The illustration.

[0099] Figure 6 Corresponding to Figure 5 The excitation voltage of the Wheatstone bridge is modulated by a first differential modulation voltage, and the excitation voltage of the reference Wheatstone bridge RW is modulated by a second differential modulation voltage.

[0100] Figure 7 Corresponding to Figure 6 In this case, the excitation voltage of the Wheatstone bridge is not modulated by the first differential modulation voltage and the excitation voltage of the reference Wheatstone bridge RW is not modulated by the second differential modulation voltage. Specific Implementation

[0101] Figure 1A simple exemplary embodiment of the invention is shown. A Wheatstone bridge WB is selected as an exemplary sensor with differential output terminals. The exemplary Wheatstone bridge WB includes a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. For example, when used for a piezoresistive pressure sensor, the first resistor R1 is a piezoresistive first resistor R1, the second resistor R2 is a piezoresistive second resistor R2, the third resistor R3 is a piezoresistive third resistor R3, and the fourth resistor R4 is a piezoresistive fourth resistor R4. The first resistor R1 and the second resistor R2 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The third resistor R3 and the fourth resistor R4 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the Wheatstone bridge WB operates at a supply voltage between the first power supply voltage line VDD and the second power supply voltage line GND. Therefore, the Wheatstone bridge WB has a first terminal connected to the power supply voltage line VDD and a second terminal connected to the second power supply voltage line GND. For example, the node between the first resistor R1 and the second resistor R2 forms the negative input signal Sin of the differential input signal Si. Similarly, the node between the third resistor R3 and the fourth resistor R4 forms the positive input signal Sip of the differential input signal Si. Wheatstone bridges are used in many sensor systems to convert a physical parameter of interest into a differential voltage signal between the positive input signal Sip and the negative input signal Sin. For example, the Wheatstone bridge WB can be a bridge of piezoresistive resistors R1, R2, R3, and R4 in sensor elements such as piezoresistive micromechanical pressure sensors.

[0102] The positive input signal Sip and the negative input signal Sin form a differential input signal Si. Figure 1 In the example, the first adder A1 adds the differential test signal TSS to the differential input signal Si to form a differential input signal SiT with a test signal component.

[0103] The first multiplier M1 multiplies the differential input signal SiT, which has a test signal component, by the chopping signal Cs to form a differential product input signal MSiT, which also has a test signal component. Preferably, the chopping signal Cs is a digital signal with two logic values, exemplarily specified here using 0 and 1. For example, the first multiplier M1 can be implemented as a switching device. The switching device function is then implemented such that if the value of the chopping signal Cs is logic 0, the differential product input signal MSiT with a test signal component corresponds to the differential input signal SiT with a test signal component, and if the value of the chopping signal Cs is logic 1, the differential product input signal MSiT with a test signal component corresponds to the differential input signal SiT with a test signal component in the case of a switched line.

[0104] The differential amplifier DV amplifies the differential product input signal MSiT, which contains the test signal component, into the amplifier output signal VO.

[0105] The analog-to-digital converter (ADC) converts the amplifier output signal VO into the input signal DFI of the digital filter DF. This input signal DFI of the digital filter DF is typically a digital signal derived from a sampled value of the amplifier output signal VO from the ADC.

[0106] The digital filter DF filters the input signal DFI into the output signal DFO. In this case, the digital filter suppresses any signal components that may be present at the interference frequency. Typically, the digital filter is a decimation filter, used to eliminate conversion artifacts added by sampling using an analog-to-digital converter (ADC).

[0107] An exemplary phase compensator PC corrects the obtained phase error and forms the phase compensator output signal PCO.

[0108] After amplification and digitization, the second multiplier M2 multiplies the phase compensator output signal PCO with the chopper signal Cs to form the first demodulated signal DM1.

[0109] In addition to not suppressing the DC component in the first demodulated signal DM1, the first low-pass filter LP1 suppresses frequencies in the first demodulated signal DM1 corresponding to frequencies in the signal spectrum of the chopped signal Cs, frequencies in the signal spectrum of the quadrature chopped signal Cs90, and mixing frequencies that may be generated by multiplying the chopped signal Cs and the quadrature chopped signal Cs90, and thus forms the first output signal out1. The first output signal out1 has a value corresponding to the value of the differential input signal Si.

[0110] The third multiplier M3 mixes the first demodulated signal DM1 with the quadrature chopper signal Cs90 to form the second demodulated signal DM2. Except for not suppressing the DC component in the second demodulated signal DM2, the second low-pass filter LP2 suppresses frequencies in the second demodulated signal DM2 corresponding to frequencies in the signal spectrum of the chopper signal Cs, frequencies in the signal spectrum of the quadrature chopper signal Cs90, and mixing frequencies that may be generated by multiplying the chopper signal Cs and the quadrature chopper signal Cs90, and in this way forms the second output signal out2.

[0111] exist Figure 1In the example, signal generator G1 generates a chopped signal Cs and a quadrature chopped signal Cs90. Preferably, the chopped signal Cs is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is also bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is different from the chopped signal Cs. The first low-pass filter LP1 has a first filter characteristic of the form of a first filter function F1[], such that: out1 = F1[DM1]. The second low-pass filter LP2 has a filter characteristic of the form of a second filter function F2[], such that: out2 = F2[DM2]. Typically, the first low-pass filter LP1 and the second low-pass filter LP2 have very preferably the same filter characteristics and the same filter function F[] = F1[] = F2[].

[0112] The chopping signal Cs and the quadrature chopping signal Cs90 should be orthogonal to each other with respect to the first filter LP1 and the second filter LP2, respectively. That is, at least at the preferred time points, they should be:

[0113] a) F1[Cs(t)×Cs90(t)]=0

[0114] b) F2[Cs(t)×Cs90(t)]=0

[0115] Here, Cs(t) should represent the time characteristic of the value of the chopper signal Cs, and Cs90(t) should represent the time characteristic of the value of the quadrature chopper signal Cs90.

[0116] Furthermore, the first filter function F1[] should preferably be a substantially linear filter function. That is, it should be applicable to the sum of the signals of any first example signal X1(t) and any second example signal X2(t), and applicable to the real value α:

[0117] A)F1[X1(t)+X2(t)]=F1[X1(t)]+F1[X2(t)]

[0118] B) F1[α×X1(t)]=a×F1[X1]

[0119] Furthermore, the second filter function F2[] should preferably be a substantially linear filter function. That is, it should be applicable to the sum of the signals of any first example signal X1(t) and any second example signal X2(t), and applicable to the real value α:

[0120] C)F2[X1(t)+X2(t)]=F2[X1(t)]+F2[X2(t)]

[0121] D)F2[α×X1(t)]=α×F2[X1]

[0122] Finally, both the first filter function F1[] and the second filter function F2[] should have low-pass characteristics.

[0123] In other words, it should apply to:

[0124] F1[1] = β1 and F2[1] = β2, where β1 is a non-zero real constant and β2 is a non-zero real constant.

[0125] For example, the chopping signal Cs can be a single-frequency PWM signal with values ​​of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Then, the quadrature chopping signal Cs90 can be, for example, a + / -90° phase-shift signal with values ​​of -1 and 1 and a 50% duty cycle. Alternatively, it can be a single-frequency PWM signal with values ​​of -1 and 1, a 50% duty cycle, and a signal frequency, for example, an integer multiple of the chopping signal frequency. The chopping signal Cs can also be a bandwidth-limited non-single-frequency signal. The only important thing is that the quadrature condition is met. Typically, the chopping signal Cs is periodic, and the quadrature chopping signal Cs90 is periodic. If necessary, the first low-pass filter LP1 and the second low-pass filter LP2 can be connected to a sample-hold circuit at their respective outputs. When orthogonality conditions a) and b) are met, the first hold circuit in these hold circuits samples the output of the first low-pass filter LP1 and outputs the sampled first value as the value of the first output signal out1, until the next time orthogonality conditions a) and b) are met. When orthogonality conditions a) and b) are met, the second hold circuit in these hold circuits samples the output of the second low-pass filter LP2 and outputs the sampled second value as the value of the second output signal out2, until the next time orthogonality conditions a) and b) are met.

[0126] exist Figure 1 In the example, the test signal generator TSG, which is also part of the signal generator G1, can generate the test signal TSS from the quadrature chop signal Cs90. The amplitude is set according to a preset value.

[0127] The digital filter DF, phase compensator PC, signal generator G1, test signal generator TSG, second multiplier M2, third multiplier M3, first low-pass filter LP1, and second low-pass filter LP2 can also be implemented using digital circuits or through a signal processor system with appropriate programming.

[0128] Preferably, the comparison device (e.g., a cooperating first and second comparator or the signal processor) compares the value of the second output signal with a range of expected values ​​defined by the first and second expected values. If the value of the second output signal is between the first and second expected values ​​(i.e., within the expected value range), it is inferred that the input stage, including the first multiplier M1, the differential amplifier DV1, the analog-to-digital converter ADC, the digital filter DF, the phase compensator PC, and the second multiplier M2, is operating correctly. Therefore, it is possible to conclude in this way that the function of the input stage is correctly inferred.

[0129] Figure 2 It shows that according to Figure 1 The following are exemplary waveforms illustrating the operation of the device. The levels are arbitrarily chosen. Dashed lines with shorter lines represent the respective zero lines. Dashed lines with longer lines should represent the respective average lines.

[0130] Figure 3 To a large extent correspond to Figure 1 However, the order of the first adder A1 and the first multiplier M1 in the signal path from the sensor to the first output signal out1 is now interchanged. The advantage of this is that the first adder A1 can usually be easily integrated into the input stage of the differential amplifier DV. However, the disadvantage is that the first multiplier M1 is no longer tested via the test signal TSS. Furthermore, another multiplier is required in the test signal generator TSG, which multiplies the quadrature transmission signal Cs90 with the transmission signal Cs and processes it into the test signal TSS.

[0131] Figure 4 Basically, it shows the corresponding Figure 2 But now applicable Figure 3 An example signal.

[0132] Figure 5 based on Figure 3 .exist Figure 5 The example also includes a reference Wheatstone bridge RW.

[0133] Again, the Wheatstone bridge WB is selected as an exemplary sensor with differential output terminals. The Wheatstone bridge WB includes a first piezoresistive resistor R1, a second piezoresistive resistor R2, a third piezoresistive resistor R3, and a fourth piezoresistive resistor R4. The first resistor R1 and the second resistor R2 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The third resistor R3 and the fourth resistor R4 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the Wheatstone bridge WB operates under the power supply voltage. Therefore, the Wheatstone bridge WB has a first terminal connected to the first power supply voltage line VDD and a second terminal connected to the second power supply voltage line GND. For example, the node between the first resistor R1 and the second resistor R2 forms the negative input signal Sin of the differential input signal Si. For example, the node between the third resistor R3 and the fourth resistor R4 forms the positive input signal Sip of the differential input signal Si. Wheatstone bridges are used in many sensor systems to convert a physical parameter of interest into a differential voltage signal between a positive input signal Sip and a negative input signal Sin. For example, a Wheatstone bridge WB can be a bridge of piezoresistive resistors for sensor elements such as piezoresistive micromechanical pressure sensors. In this regard, reference is made, for example, to the following industrial patents as examples of such pressure sensors: EP 2 524 389B1, EP 2 524 390 B1, EP 2 524 198 B1, EP 2 523 896 B1, and EP 2 523 895 B1.

[0134] For example, the reference Wheatstone bridge RW includes a fifth piezoresistive resistor R5, a sixth piezoresistive resistor R6, a seventh piezoresistive resistor R7, and an eighth piezoresistive resistor R8. The fifth resistor R5 and the sixth resistor R6 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The seventh resistor R7 and the eighth resistor R8 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the reference Wheatstone bridge RW operates under the power supply voltage. Therefore, the reference Wheatstone bridge RW has a first terminal connected to the first power supply voltage line VDD and a second terminal connected to the second power supply voltage line GND. For example, the node between the fifth resistor R5 and the sixth resistor R6 forms the negative reference signal Rin of the differential reference signal Rs. Exemplarily, the node between the seventh resistor R7 and the eighth resistor R8 forms the positive reference signal Rip of the differential reference signal Rs. Preferably, the fifth resistor R5, sixth resistor R6, seventh resistor R7, and eighth resistor R8 of the reference Wheatstone bridge RW are manufactured simultaneously with the first resistor R1, second resistor R2, third resistor R3, and fourth resistor R4 of the Wheatstone bridge WB in the same steps. For example, if the Wheatstone bridge WB is the sensing bridge of a piezoresistive micromechanical pressure sensor, for example on a silicon wafer, preferably, the reference Wheatstone bridge RW is manufactured together with the Wheatstone bridge WB on the same silicon wafer with the same resistor orientation. The technical term for this is "matching". For example, the reference Wheatstone bridge RW may be part of a second pressure sensor that is similar to the pressure sensor of the Wheatstone bridge WB and is manufactured in the same substrate (e.g., in the same semiconductor crystal). In that case, the third output signal out3, representing the difference between the differential value Rs of the reference signal and the differential value of the differential input signal Si, should be close to zero.

[0135] When the reference Wheatstone bridge RW is the same as the Wheatstone bridge WB, the deviation between the differential value of the reference signal Rs and the differential value of the differential input signal Si, represented by the value of the third output signal out3, should be zero. Then, if the reference Wheatstone bridge is designed to be the same as the Wheatstone bridge WB, and the value of the third output signal out3 exceeds the allowable expected value range near this zero value, an error is indicated. Furthermore, in this case, the value of the first output signal only represents the average of the signal portion based on the value of the input signal Si and the signal portion based on the value of the reference signal. In this respect, Figure 5The drawback of this system is that the sensitivity is typically halved. Only when the reference Wheatstone bridge RW is affected by a physical parameter (e.g., the pressure of a pressure sensor) in the same way as the Wheatstone bridge WB changes its reference signal Rs according to the value of that physical parameter, does the reference Wheatstone bridge RW change its input signal Si according to that physical parameter, and the value of the first output signal out1 at maximum sensitivity corresponds to the value of that physical parameter.

[0136] However, when the reference Wheatstone bridge RW differs from the Wheatstone bridge WB, the deviation between the differential value of the reference signal Rs and the differential value of the differential input signal Si, represented by the value of the third output signal out3, will not become zero. If the reference Wheatstone bridge is substantially insensitive to the physical parameter sensed by the Wheatstone bridge WB, the value of the third output signal out3 typically represents the value of that physical parameter, which is usually adjusted for such influencing factors that affect both the reference Wheatstone bridge RW and the Wheatstone bridge in the same way.

[0137] However, it is also possible to consider that, in the example of the micromechanical pressure sensor, the reference Wheatstone bridge RW is not located on the diaphragm and therefore should therefore exhibit a signal essentially independent of pressure. Thus, the measured value is... Figure 5 The example shows the value of the third output signal out3.

[0138] Figure 5 The advantage of this arrangement is that if the reference Wheatstone bridge RW and the Wheatstone bridge WB are well thermally coupled, the reference Wheatstone bridge RW will generate noise in the same way as the Wheatstone bridge WB itself. This can also safely suppress 1 / f of the noise of the Wheatstone bridge WB itself, which is... Figure 1 It is impossible in the middle.

[0139] The positive input signal Sip and the negative input signal Sin form the differential input signal Si. The positive reference signal Rip and the negative reference signal Rin form the differential reference signal Rs.

[0140] In response to the second chopping signal Cs2, the Dicke-Schalter DS uses the second chopping signal Cs2 to switch between the differential input signal S1 and the differential reference signal Rs.

[0141] exist Figure 5 In the example, the first multiplier M1 multiplies the resulting differential input signal Si and differential reference signal Rs by the chopping signal Cs to form the product input signal MSi.

[0142] like Figure 5As shown, the first adder A1 adds the differential test signal TSS to the product input signal MSi, forming a differential product input signal MSiT with the test signal component. Preferably, as before, the chopper signal Cs is a digital signal with two logic values ​​(exemplarily specified as 0 and 1 here).

[0143] The differential amplifier DV amplifies the differential product input signal containing the test signal component MSiT into the amplifier output signal VO.

[0144] The analog-to-digital converter (ADC) converts the amplifier output signal VO into the input signal DFI of the digital filter DF. This input signal DFI of the digital filter DF is typically a digital signal derived from a sampled value of the amplifier output signal VO from the ADC.

[0145] The digital filter DF filters the input signal DFI to the output signal DFO. In this process, the digital filter DF suppresses any signal components present at interference frequencies. Typically, the digital filter is a decimation filter used to eliminate conversion artifacts added by sampling using an analog-to-digital converter (ADC).

[0146] The phase error obtained by the phase compensator PC is corrected and the phase compensator output signal PCO is generated.

[0147] After amplification and digitization, the second multiplier M2 multiplies the phase compensator output signal PCO with the chopper signal Cs to form the first demodulated signal DM1.

[0148] In addition to not suppressing the DC component in the first demodulated signal DM1, the first low-pass filter LP1 suppresses frequencies in the first demodulated signal DM1 corresponding to frequencies in the signal spectrum of the chop signal Cs, frequencies corresponding to frequencies in the signal spectrum of the quadrature chop signal Cs90, frequencies corresponding to frequencies in the signal spectrum of the second chop signal Cs2, and mixing frequencies that may be generated by multiplying the chop signal Cs with the quadrature chop signal Cs90 and the second chop signal Cs2, and thus forms the first output signal out1. If the sensor of the reference Wheatstone bridge RW is the same as the sensor of the Wheatstone bridge WB, the value of the first output signal out1 is the same as the value of the differential input signal Si.

[0149] The third multiplier M3 mixes the first demodulated signal DM1 with the quadrature chopper signal Cs90 to form the second demodulated signal DM2. Except for not suppressing the DC component in the second demodulated signal DM2, the second low-pass filter LP3 suppresses frequencies in the second demodulated signal DM2 corresponding to frequencies in the signal spectrum of the chopper signal Cs, frequencies in the signal spectrum of the quadrature chopper signal Cs90, frequencies in the signal spectrum of the second chopper signal Cs2, and mixing frequencies that may be generated by multiplying the chopper signal Cs with the quadrature chopper signal Cs90 and the second chopper signal Cs2, thus forming the second output signal out2. As mentioned earlier, the value of the second output signal out2 is a measure of the correct function of the input stage.

[0150] The fourth multiplier M4 mixes the first demodulated signal DM1 with the second chopped signal Cs2 to form the third demodulated signal DM3. Except for not suppressing the DC component in the third demodulated signal DM3, the third low-pass filter LP3 suppresses frequencies in the third demodulated signal DM3 corresponding to frequencies in the signal spectrum of the chopped signal Cs, frequencies in the signal spectrum of the quadrature chopped signal Cs90, frequencies in the signal spectrum of the second chopped signal Cs2, and mixing frequencies that may be generated by multiplying the chopped signal Cs with the quadrature chopped signal Cs90 and the second chopped signal Cs2, thus forming the third output signal out3. If the sensor of the reference Wheatstone bridge RW is the same as the sensor of the Wheatstone bridge WB, the value of this third output signal out3 can be used as a measure of the correct functioning of the Wheatstone bridge WB.

[0151] exist Figure 5In the example, signal generator G1 generates a chopped signal Cs, a quadrature chopped signal Cs90, and a second chopped signal Cs2. Preferably, the chopped signal Cs is bandwidth-limited or single-frequency. Preferably, the second chopped signal Cs2 is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is different from the chopped signal Cs. Preferably, the second chopped signal Cs2 is different from both the quadrature chopped signal Cs90 and the chopped signal Cs. The first low-pass filter LP1 has filter characteristics of the form of a first filter function F1[], such that: out1 = F1[DM1(t)]. The second low-pass filter LP2 has filter characteristics of the form of a second filter function F2[], such that: out2 = F2[DM2(t)]. The third low-pass filter LP3 has filter characteristics of the form of a third filter function F3[], such that: out3 = F3[DM3(t)]. Typically, the first low-pass filter LP1, the second low-pass filter LP2, and the third low-pass filter LP3 preferably have the same filter characteristics and the same filter function F[] = F1[] = F2[] = F3[].

[0152] The chopping signal Cs, the second chopping signal Cs2, and the quadrature chopping signal Cs90 should be orthogonal to each other with respect to the first filter LP1, the second filter LP2, and the third filter LP3, respectively. In other words, it should apply to:

[0153] i)F1[Cs(t)]=0

[0154] ii) F1[Cs90(t)]=0

[0155] iii) F1[Cs2(t)]=0

[0156] iv)F1[Cs(t)×Cs90(t)]=0

[0157] v)F1[Cs(t)×Cs2(t)]=0

[0158] vi)F1[Cs90(t)×Cs2(t)]=0

[0159] vii)F2[Cs(t)]=0

[0160] viii)F2[Cs90(t)]=0

[0161] ix)F2[Cs2(t)]=0

[0162] x)F2[Cs(t)×Cs90(t)]=0

[0163] xi)F2[Cs(t)×Cs2(t)]=0

[0164] xii)F2[Cs90(t)×Cs2(t)]=0

[0165] xiii)F3[Cs(t)]=0

[0166] xiv)F3[Cs90(t)]=0

[0167] xv)F3[Cs2(t)]=0

[0168] xvi)F3[Cs(t)×Cs90(t)]=0

[0169] xvii)F4[Cs(t)×Cs2(t)]=0

[0170] xviii)F3[Cs90(t)×Cs2(t)]=0

[0171] Here, Cs(t) should represent the time characteristic of the value of the chopping signal Cs, Cs90(t) should represent the time characteristic of the value of the quadrature chopping signal Cs90, and Cs2(t) should represent the time characteristic of the value of the second chopping signal Cs2.

[0172] Furthermore, the first filter function F1[] should preferably be a substantially linear filter function. That is, it should be applicable to the sum of the first example signal X1(t) and the second example signal X2(t), and applicable to the real value α:

[0173] A)F1[X1(t)+X2(t)]=F1[X1(t)]+F1[X2(t)]

[0174] B) F1[α×X1(t)]=α×F1[X1]

[0175] Furthermore, the second filter function F2[] should preferably be a substantially linear filter function. That is, it should be applicable to the sum of the first example signal X1(t) and the second example signal X2(t), and applicable to the real value α:

[0176] C)F2[X1(t)+X2(t)]=F2[X1(t)]+F2[X2(t)]

[0177] D)F2[α×X1(t)]=α×F2[X1]

[0178] Finally, the third filter function F3[] should preferably be a substantially linear filter function. That is, it should be applicable to the sum of the first example signal X1(t) and the second example signal X2(t), and applicable to the real value α:

[0179] E)F3[X1(t)+X2(t)]=F3[X1(t)]+F3[X2(t)]

[0180] F)F3[α×X1(t)]=α×F3[X1]

[0181] Finally, the first filter function F1[], the second filter function F2[], and the third filter function F3[] should each have low-pass characteristics. That is, they are applicable to:

[0182] F1[1]=β1, F2[1]=β2 and F3[1]=β3, where β1 is a non-zero real constant, β2 is a non-zero real constant and β3 is a non-zero real constant.

[0183] For example, the chopping signal Cs can be a single-frequency PWM signal with values ​​of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Then, the quadrature chopping signal Cs90 can be, for example, a + / -90° phase-shift signal with values ​​of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Alternatively, it can be a single-frequency PWM signal with values ​​of -1 and 1, a 50% duty cycle, and a signal frequency that is, for example, an integer multiple of the chopping signal frequency. The chopping signal Cs can also be a band-limited non-single-frequency signal. The quadrature chopping signal Cs90 can also be a band-limited non-single-frequency signal. Similarly, the second chopping signal Cs2 can be a band-limited non-single-frequency signal. The only important thing is that the quadrature conditions i) to xviii) are satisfied. In other respects, the choice of signals is free. Typically, the chopping signal Cs is periodic, and the second chopping signal Cs2 and the quadrature chopping signal Cs90 are periodic.

[0184] If necessary, it is useful to connect the first low-pass filter LP1, the second low-pass filter LP2, and the third low-pass filter LP3 to a sample-hold circuit, and when the quadrature conditions i) to xviii) are satisfied, the first hold circuit of these hold circuits samples the output of the first low-pass filter LP1 and outputs the first value sampled in this manner as the value of the first output signal out1, until the next quadrature conditions i) to xviii) are satisfied. When the quadrature conditions i) to xviii) are satisfied, the second hold circuit of these hold circuits samples the output of the second low-pass filter LP2 and outputs the second value sampled in this manner as the value of the second output signal out2, until the next quadrature conditions i) to xviii) are satisfied. When the quadrature conditions i) to xviii) are satisfied, the third hold circuit of these hold circuits samples the output of the third low-pass filter LP3 and outputs the third value sampled in this manner as the value of the third output signal out3, until the next quadrature conditions i) to xviii) are satisfied.

[0185] exist Figure 5 In the example, the test signal generator TSG, which is also part of the signal generator G1, can generate the test signal TSS from the quadrature chop signal Cs90. The amplitude is set according to a preset value.

[0186] The digital filter DF, phase compensator PC, signal generator G1, test signal generator TSG, second multiplier M2, third multiplier M3, fourth multiplier M4, first low-pass filter LP1, second low-pass filter LP2, and third low-pass filter LP3 can also be implemented using digital circuits or through a signal processor system with appropriate programming.

[0187] Preferably, the comparison device (e.g., a cooperating first and second comparator or the signal processor) compares the value of the second output signal with a range of expected values ​​limited by the first and second expected values. If the value of the second output signal is between the first and second expected values ​​(i.e., within the expected value range), then the input stage, including the first multiplier M1, differential amplifier (DV1), analog-to-digital converter (ADC), digital filter DF, phase compensator PC, and second multiplier M2, is operating correctly. Therefore, it is possible to conclude in this way that the input stage is functioning correctly.

[0188] Preferably, the second comparison device (e.g., a cooperating third and fourth comparator or the signal processor) compares the value of the third output signal out3 with a second expected value range limited by the third and fourth expected values. If the value of the third output signal out3 is between the third and fourth expected values ​​(i.e., within the expected value range), then the Wheatstone bridge WB operates correctly relative to the reference Wheatstone bridge RW. Therefore, it is possible to conclude in this way that the correct functioning of the Wheatstone bridge WB is achieved.

[0189] Therefore, the six main operation options are as follows:

[0190]

[0191]

[0192] Figure 6 To a large extent correspond to Figure 5 The difference lies in that the excitation voltage of the Wheatstone bridge WB is obtained from the first differential modulation voltage V from the first voltage source V1 and the second voltage source V2. mod1 Modulation is performed, the first differential modulation voltage depending on the test signal TSS, the voltages of the first voltage source V1 and the second voltage source V2 preferably depending on the test signal TSS in opposite ways, and the excitation voltage of the reference Wheatstone bridge RW is modulated by the second differential modulation voltage V from the third voltage source V1b and the fourth voltage source V2b.mod2 Modulation is performed such that the second differential modulation voltage depends on the test signal TSS, and the voltages of the third voltage source V1b and the fourth voltage source V2b preferably depend on the test signal TSS in an opposite manner to each other. This modulation of both the differential input signal Si and the differential reference signal Rs is proportional to the test signal TSS. Figure 6 The advantage of this system is that the Wheatstone bridge WB and the reference Wheatstone bridge RW are included in the test signal path. The disadvantage is the significant reduction in the excitation voltage, and therefore the significant reduction in the useful signal swing of the input signal Si. The first adder is then omitted. Signal processing is performed in a manner similar to that shown in the preceding figures.

[0193] For example, a first differential modulation voltage V is generated in the Wheatstone bridge WB. mod1 The differential voltage source consists of a first voltage source V1 connected between a first resistor R1 and a first power supply voltage line VDD, having a voltage dependent on the test signal TSS, and a second voltage source V2 connected between a third resistor R3 and the first power supply voltage line VDD, also having a voltage dependent on the test signal TSS. In this case, the voltages of the first voltage source V1 and the second voltage source V2 depend on the test signal TSS in opposite ways. Apart from this difference in sign depending on the test signal TSS, the first voltage source V1 and the second voltage source V2 are preferably designed identically. They are preferably thermally coupled so that their operation is substantially the same. Therefore, they are preferably fabricated on the same semiconductor substrate.

[0194] For example, a second differential modulation voltage V is generated in the reference Wheatstone bridge RW. mod2 The differential voltage source consists of a third voltage source V1b connected between the fifth resistor R5 and the first power supply voltage line VDD, having a voltage dependent on the test signal TSS, and a fourth voltage source V2b connected between the seventh resistor R7 and the first power supply voltage line VDD, also having a voltage dependent on the test signal TSS. In this case, the voltage of the third voltage source V1b and the voltage of the fourth voltage source V2b depend on the test signal TSS in opposite ways. Apart from this difference in sign depending on the test signal TSS, the third voltage source V1b and the fourth voltage source V2b are preferably designed identically. They are preferably thermally coupled so that their operation is substantially the same. Therefore, it is preferable that they are fabricated on the same semiconductor substrate.

[0195] The voltage of the first voltage source V1 and the voltage of the third voltage source V1b depend on the test signal TSS in the same manner. The voltage of the second voltage source V2 and the voltage of the fourth voltage source V2b depend on the test signal TSS in the same manner. The first voltage source V1 and the third voltage source V1b are preferably designed identically. The second voltage source V2 and the fourth voltage source V2b are preferably designed identically. Preferably, all four are thermally coupled such that, except for the symbols, their operation is substantially the same. Therefore, preferably, they are manufactured to be matched on the same semiconductor substrate.

[0196] Figure 7 To a large extent correspond to Figure 6 The difference lies in that the excitation voltage of the Wheatstone bridge WB is not through the first differential modulation voltage V from the first voltage source V1 and the second voltage source V2. mod1 Modulation is performed, the first differential modulation voltage depends on the test signal TSS, the voltages of the first voltage source V1 and the second voltage source V2 depend on the test signal TSS in opposite ways, and the excitation voltage of the reference Wheatstone bridge RW is not passed by the second differential modulation voltage V from the third voltage source V1b and the fourth voltage source V2b. mod2 Modulation is performed, wherein the second differential modulation voltage depends on the test signal TSS, and the voltages of the third voltage source V1b and the fourth voltage source V2b depend on the test signal TSS in opposite ways. Alternatively, the values ​​of the first resistor R1 and the third resistor R3 are modulated in the Wheatstone bridge WB, and the values ​​of the fifth resistor R5 and the seventh resistor R7 are modulated in the reference Wheatstone bridge RW.

[0197] exist Figure 7 In this method, the effective value of the first resistor R1 is modulated by connecting the first terminal of the first resistor R1 to the second terminal of the first variable resistor RV1, and by connecting the first terminal of the first variable resistor RV1 (instead of the first terminal of the first resistor R1) to the first power supply voltage line VDD. Here, the resistance value of the first variable resistor RV1 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches a transistor connected in parallel with the resistance value of the first variable resistor RV1. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the first variable resistor RV1. Therefore, the transistor of the first variable resistor RV1 is controlled by the test signal TSS, which is inverted by the first inverting amplifier INV1.

[0198] exist Figure 7In this example, the effective value of the third resistor R3 is modulated by connecting the first terminal of the third resistor R3 to the second terminal of the second variable resistor RV2, and connecting the first terminal of the second variable resistor RV2 (but not the first terminal of the third resistor R3) to the first power supply voltage line VDD. Here, the resistance value of the second variable resistor RV2 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the second variable resistor RV2. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the second variable resistor RV2. Therefore, the transistor of the second variable resistor RV2 is controlled by the test signal TSS.

[0199] exist Figure 7 In this example, the effective value of the fifth resistor R5 is modulated by connecting the first terminal of the fifth resistor R5 to the second terminal of the third variable resistor RV3, and connecting the first terminal of the third variable resistor RV3 (instead of the first terminal of the fifth resistor R5) to the first power supply voltage line VDD. Here, the resistance value of the third variable resistor RV3 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the third variable resistor RV3. For the purposes of this paper, this transistor and the resistance value connected in parallel with it together form the third variable resistor RV3. Therefore, the transistor of the third variable resistor RV3 is controlled by the test signal TSS, which is inverted by the second inverting amplifier INV2.

[0200] exist Figure 7 In this example, the effective value of the seventh resistor R7 is modulated by connecting the first terminal of the seventh resistor R7 to the second terminal of the fourth variable resistor RV4, and connecting the first terminal of the fourth variable resistor RV4 (instead of the first terminal of the seventh resistor R7) to the first power supply voltage line VDD. Here, the resistance value of the fourth variable resistor RV4 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the fourth variable resistor RV4. For the purposes of this paper, this transistor and the resistance value connected in parallel with it together form the fourth variable resistor RV4. Therefore, the transistor of the fourth variable resistor RV4 is controlled by the test signal TSS.

[0201] With this exemplary configuration, both the differential input signal Si and the differential reference signal Rs are modulated proportionally to the test signal TSS. Figure 7The advantage of this system is that the Wheatstone bridge WB and the reference Wheatstone bridge RW are included in the test signal path. The disadvantage is the significant reduction in excitation voltage, and therefore the significant reduction in travel. The first adder is then omitted. Signal processing is performed in a manner similar to that shown in the preceding figures.

[0202] Preferably, the resistance values ​​of the first variable resistor RV1 and the third variable resistor RV3 depend on the test signal TSS in the same way.

[0203] Preferably, the resistance values ​​of the second variable resistor RV2 and the fourth variable resistor RV4 depend on the test signal TSS in the same way.

[0204] Therefore, the resistance values ​​of the first variable resistor RV1 and the second variable resistor RV2 are preferably determined in opposite phases but otherwise in the same manner by the test signal TSS.

[0205] Preferably, the resistance values ​​of the third variable resistor RV3 and the fourth variable resistor RV4 depend on the test signal TSS in an out-of-phase but otherwise identical manner.

[0206] Preferably, the first variable resistor RV1 is the same as (matched) to the second variable resistor RV2.

[0207] Preferably, the third variable resistor RV3 is the same as (matched to) the fourth variable resistor RV4.

[0208] Preferably, the first variable resistor RV1 is the same as (matched) to the third variable resistor RV3.

[0209] Preferably, the second variable resistor RV2 is the same as (matched to) the fourth variable resistor RV4.

[0210] List of reference numerals

[0211] A1 First Adder

[0212] ADC (Analog-to-Digital Converter)

[0213] Cs chopping signal

[0214] Cs2 Second Chopper Signal

[0215] CS90 Quadrature Chopper Signal

[0216] DF digital filter

[0217] The input signal of the DFI digital filter DF

[0218] Output signal of DFO digital filter DF

[0219] DM1 first demodulated signal

[0220] DM2 Second Demodulation Signal

[0221] DM3 Third Demodulation Signal

[0222] DS switch

[0223] DV differential amplifier

[0224] G1 signal generator

[0225] GND Second power supply voltage line

[0226] INV1 First Inverting Amplifier or Inverter

[0227] INV2 Second Inverting Amplifier or Inverter

[0228] LP1 First Low-Pass Filter

[0229] LP2 Second Low-Pass Filter

[0230] LP3 Third Low-Pass Filter

[0231] M1 First Multiplier

[0232] M2 Second Multiplier

[0233] M3 Third Multiplication Device

[0234] M4 Fourth Multiplier

[0235] MSi product input signal

[0236] MSiT has a differential product input signal with test signal components.

[0237] out1 First output signal

[0238] out2 Second output signal

[0239] out3 Third output signal

[0240] PC phase compensator

[0241] PCO phase compensator output signal

[0242] R1 is the first resistor.

[0243] R2, the second resistor

[0244] R3 Third resistor

[0245] R4, the fourth resistor

[0246] R5, the fifth resistor

[0247] R6, the sixth resistor

[0248] R7 Seventh Resistor

[0249] R8, the eighth resistor

[0250] Rin negative reference signal

[0251] Rip positive reference signal

[0252] Rs reference signal

[0253] RV1 First Variable Resistor

[0254] RV2 Second Variable Resistor

[0255] RV3 Third Variable Resistor

[0256] RV4 Fourth Variable Resistor

[0257] RW reference Wheatstone bridge

[0258] Si differential input signal

[0259] Sin negative input signal

[0260] Sip positive input signal

[0261] SiT has a differential input signal with a test signal component.

[0262] t time

[0263] TSG Test Signal Generator

[0264] TSS test signal

[0265] WB is a Wheatstone bridge consisting of resistors R1, R2, R3, and R4.

[0266] V1 is the first voltage source;

[0267] V1b is the third voltage source;

[0268] V2 is the second voltage source;

[0269] V2b is the fourth voltage source;

[0270] V mod1 First differential modulation voltage;

[0271] V mod2 Second differential modulation voltage;

[0272] VO amplifier output signal;

[0273] VDD is the first power supply voltage line;

[0274] List of cited references

[0275] EP 2 524 389 B1,

[0276] EP 2 524 390 B1,

[0277] EP 2 524 198 B1,

[0278] EP 2 523 896 B1,

[0279] EP 2523895 B1.

Claims

1. A method for monitoring a sensor system in operation, in, The sensor system includes a sensor element (WB) that provides an input signal (Si), the input signal value of which has a time characteristic (Si(t)), and The sensor system includes a signal path, and Wherein, at a first position on the signal path, the signal path includes an amplifier (DV) having an input terminal and an output terminal, and The signal path begins with the input signal (Si) of the sensor element (WB), and The signal path terminates with the first output signal (out1) of the sensor system, and Wherein, the value of the first output signal (out1), or the value of the signal derived therefrom, represents the measured value. The method includes the following steps: a) At the second position of the signal path, the signal in the signal path is mixed with the chopper signal (Cs) in the first frequency mixing. - Wherein, the second position of the signal path is located between the input signal (Si) of the sensor element at the beginning of the signal path and the input terminal of the amplifier (DV) at the first position of the signal path, and - Wherein, the chopping signal (Cs) is bandwidth-limited or single-frequency; b) At the third position in the signal path, the signal is mixed with the chopped signal (Cs) in a second mixing process to form a first demodulated signal (DM1). - wherein the third position of the signal path is located between the output terminal of the amplifier (DV) at the first position of the signal path and the first output signal (out1) of the sensor system at the end of the signal path; c) At the fourth position of the signal path, perform a first filter on the first demodulated signal (DM1) or a signal derived therefrom, the fourth position being located between the third position of the signal path and the output signal (out1) of the sensor system at the end of the signal path. - Wherein, the first filtering is performed by applying the first filter function F1[] to the first demodulated signal (DM1) or a signal derived therefrom, and - Wherein, the first filter function F1[] describes the relationship between the time characteristics (DM1(t)) of the first demodulated signal (DM1) or the signal derived therefrom and the time characteristics of the signal directly after the first filter, and - Wherein, the first output signal (out1) depends on the signal directly after the first filtering, or the result of the first filtering. Its characteristic is that it also includes additional steps, d) At the fifth position in the signal path, an orthogonal chopping signal (Cs90) is added to the signal in the signal path, the fifth position being located between the input signal (Si) of the sensor element (WB) at the beginning of the signal path and the input terminal of the amplifier (DV) at the first position in the signal path. - Wherein, the chopped signal (Cs) has the time characteristic Cs(t) of the chopped signal (Cs), and - Wherein, the quadrature chopper signal (Cs90) has the time characteristic Cs90(t) of the quadrature chopper signal (Cs90), and - Wherein, apart from signal errors, the time characteristic Cs90(t) of the orthogonal chopper signal (Cs90) relative to the first filter function F1[] has essentially the characteristic F1[Cs90(t)×Cs(t)]=0 at least at a predetermined time point; e) The first demodulated signal (DM1) or a signal derived therefrom is mixed with the quadrature chopper signal (Cs90) or a signal derived therefrom in a third frequency mixing process to generate a second demodulated signal (DM2). f) The second demodulated signal (DM2) or the signal derived therefrom is subjected to a second filter function F2[] to form a second output signal (out2), wherein, - Choose the second filter function F2[], so that it essentially maintains F2[Cs(t)]=0 and F2[Cs90(t)]=0 and F2[Cs(t)×Cs90(t)]=0 and F2[1]=β2, where β2 is a real or complex value, and - Choose the first filter function F1[] such that it essentially maintains F1[Cs(t)]=0 and F1[Cs90(t)]=0 and F1[Cs(t)×Cs90(t)]=0 and F1[1] = β1, where β1 is a real or complex value; g) Perform a first comparison between the value of the second output signal (out2) or the value of the signal derived therefrom and the expected value interval, and if the value of the second output signal (out2) or the value of the signal derived therefrom is outside the expected value interval, then conclude that there is an error.

2. The method of claim 1, further comprising the following additional steps: h) Provide a reference element (RW) for providing the reference signal (Rs), i) Process the reference signal (Rs) in the reference signal path, -in, The reference signal path is designed to be the same as the signal path used to process the input signal (Si), and - Wherein, the reference signal path begins with the reference signal (Rs), and - Wherein, the reference signal path ends with the second output signal (out2), and - Wherein, the reference signal path at the beginning of the reference signal (Rs) is different from the signal path at the beginning of the input signal (Si). - wherein the reference signal path includes, at a first position on the reference signal path, the amplifier (DV) having the input terminal and the output terminal, and - Wherein, the amplifier (DV) is therefore a part of the reference signal path located at the first position of the reference signal path and a part of the signal path located at the first position of the signal path, and -In this context, at the sixth position between the reference signal (Rs) at the beginning of the reference signal path and the input terminal of the amplifier (DV) at the first position of the reference signal path, and at the sixth position between the input signal (Si) at the beginning of the signal path and the input terminal of the amplifier (DV) shared by the signal path and the reference signal path at the first position of the signal path, a switching switch (DS) shared by the signal path and the reference signal path and having a first input terminal and a second input terminal is inserted into the reference signal path and the signal path at the common sixth position of the reference signal path and the signal path, and - Wherein, the common switching switch (DS) responds to a second chopping signal (Cs2) selecting the effective input terminal of the switch between the first and second input terminals, the second chopping signal (Cs2) having a time characteristic Cs2(t), and - Wherein, the signal path includes the first input terminal of the switching switch (DS), and - Wherein, the reference signal path includes the second input terminal of the switching switch (DS), and - Wherein, the signal path does not include the second input terminal of the changeover switch (DS), and - Wherein, the reference signal path does not include the first input terminal of the switching switch (DS), and - Wherein, the common changeover switch (DS) selects its valid input terminal in response to the second chopping signal (Cs2), and transmits the value at the selected valid input terminal of the common changeover switch (DS) to the output terminal of the common changeover switch (DS), and Wherein, in the portion between the output of the common switching switch (DS) at the sixth position of the reference signal path and the sixth position of the signal path and the input of the amplifier (DV) at the first position of the reference signal path and the signal path, the reference signal path and the signal path are identical, and - wherein the first filter using the first filter function F1[] is not part of the reference signal path; j) The first demodulated signal (DM1) or a signal derived therefrom is mixed with the second chopper signal (Cs2) in a fourth frequency mixing to form a third demodulated signal (DM3); k) The third demodulated signal (DM3) or the signal derived therefrom is subjected to a third filter function F3[] to form a third output signal (out3). - Wherein, the first filter function F1[] is selected such that it substantially maintains F1[Cs(t)]=0 and F1[Cs2(t)]=0 and F1[Cs90(t)]=0 and F1[Cs(t)×Cs2(t)]=0 and F1[Cs(t)×Cs90(t)]=0 and F1[Cs2(t)×Cs90(t)]=0 and F1[Cs(t)×Cs2(t)×Cs90(t)]=0 and F1[1]=β1, where β1 is a real or complex value, and - Wherein, the second filter function F2[] is selected such that it essentially maintains F2[Cs(t)]=0, F2[Cs2(t)]=0, F2[Cs90(t)]=0, F2[Cs(t)×Cs2(t)]=0, F2[Cs(t)×Cs90(t)]=0, F2[Cs2(t)×Cs90(t)]=0, F2[Cs(t)×Cs2(t)×Cs90(t)]=0, and F2[1]=β2, where β2 is a real or complex value, and - Wherein, the third filter function F3[] is selected such that it substantially maintains F3[Cs(t)]=0, F3[Cs2(t)]=0, F3[Cs90(t)]=0, F3[Cs(t)×Cs2(t)]=0, F3[Cs(t)×Cs90(t)]=0, F3[Cs2(t)×Cs90(t)]=0, F3[Cs(t)×Cs2(t)×Cs90(t)]=0, and F3[1] = β3, where β3 is a real or complex value; l) Perform a second comparison between the value of the third output signal (out3) or the signal derived therefrom and the third expected value interval, and if the value of the third output signal (out3) or the signal derived therefrom is outside the third expected value interval, then conclude that there is an error.

3. A method for monitoring a sensor system during operation, in, The sensor system includes sensor elements that provide an input signal (Si) having a value dependent on the input signal (TSS), and The sensor system includes a signal path, and The signal path includes an amplifier (DV) with input and output terminals at a first location on the signal path; and The signal path begins with the input signal (Si) of the sensor element (WB), and The signal path ends with a first output signal (out1), and The value of the output signal (out1) represents the measured value. The method includes the following steps: a) At the second position of the signal path, the signal in the signal path is mixed with the chopper signal (Cs) in the first frequency mixing. - Wherein, the second position of the signal path is located between the input signal (Si) of the sensor element at the beginning of the signal path and the input terminal of the amplifier (DV) at the first position of the signal path, and - Wherein, the chopping signal (Cs) is bandwidth-limited or single-frequency; b) At the third position of the signal path, the signal is mixed with the chopped signal (Cs) in a second mixing process to form a first demodulated signal (DM1). - wherein the third position of the signal path is located between the output terminal of the amplifier (DV) at the first position of the signal path and the first output signal (out1) of the sensor system at the end of the signal path; c) At a fourth position in the signal path, perform a first filter on the first demodulated signal (DM1) or a signal derived therefrom, the fourth position being located between the third position in the signal path and the output signal (out1) at the end of the signal path. - Wherein, the first filtering is performed by applying the first filter function F1[] to the first demodulated signal (DM1) or a signal derived therefrom, and - Wherein, the first filter function F1[] describes the relationship between the time characteristics (DM1(t)) of the first demodulated signal (DM1) or the signal derived therefrom and the time characteristics of the signal as a result of filtering the first demodulated signal (DM1) using the first filter function F1[], and - Wherein, the first output signal (out1) depends on the signal, or the result of the first filtering. The method is characterized by including the following steps: d) Generate the test signal (TSS) based on the quadrature chopper signal (Cs90); - Wherein, the chopped signal (Cs) has the time characteristic Cs(t) of the chopped signal (Cs), and - Wherein, the quadrature chopper signal (Cs90) has the time characteristic Cs90(t) of the quadrature chopper signal (Cs90), and - Wherein, relative to the first filter function F1[], apart from noise and similar signal errors, the time characteristic Cs90(t) of the quadrature chop signal (Cs90) has essentially the characteristic F1[Cs90(t)×Cs(t)]=0 at least at a predetermined time point; e) The first demodulated signal (DM1) or a signal derived therefrom is mixed with the quadrature chopper signal (Cs90) or a signal derived therefrom in a third frequency mixing process to generate a second demodulated signal (DM2). f) The second demodulated signal (DM2) or the signal derived therefrom is subjected to a second filter function F2[] to form a second output signal (out2). - Wherein, the second filter function F2[] is selected such that it essentially maintains F2[Cs(t)]=0 and F2[Cs90(t)]=0 and F2[Cs90(t)×Cs90(t)]=0 and F2[Cs(t)×Cs90(t)]=0 and F2[Cs(t)×Cs(t)]=0 and F2[1]=β2, where β2 is a real or complex value, and - Wherein, the first filter function F1[] is selected such that it substantially maintains F1[Cs(t)]=0 and F1[Cs90(t)]=0 and F1[Cs(t)×Cs90(t)]=0 and F1[1] = β1, where β1 is a real or complex value; g) Perform a first comparison between the value of the second output signal (out2) or the value of the signal derived therefrom and the expected value interval, and if the value of the second output signal (out2) or the value of the signal derived therefrom is outside the expected value interval, then conclude that there is an error.

4. The method according to claim 3, h) Provide a reference element (RW) for providing the reference signal (Rs), i) Process the reference signal (Rs) in the reference signal path, -in, The reference signal path is designed to be the same as the signal path used to process the input signal (Si). - Wherein, the reference signal path begins with the reference signal (Rs), and - Wherein, the reference signal path ends with the second output signal (out2), and - Wherein, the reference signal path at the beginning of the reference signal (Rs) is different from the signal path at the beginning of the input signal (Si). -Wherein lies the amplifier (DV) having the input terminal and the output terminal at the first position of the reference signal path. - Wherein, the amplifier (DV) is therefore a part of the reference signal path located at the first position of the reference signal path and a part of the signal path located at the first position of the signal path, and -In this context, at the sixth position between the reference signal (Rs) at the beginning of the reference signal path and the input terminal of the amplifier (DV) at the first position of the reference signal path, and at the sixth position between the input signal (Si) at the beginning of the signal path and the input terminal of the amplifier (DV) shared by the signal path and the reference signal path at the first position of the signal path, a switching switch (DS) shared by the signal path and the reference signal path and having a first input terminal and a second input terminal is inserted into the reference signal path and the signal path at the common sixth position in the reference signal path and the signal path, and - Wherein, the common switching switch (DS) responds to a second chopping signal (Cs2) selecting the effective input terminal of the switching switch between the first and second input terminals, the second chopping signal (Cs2) having a time characteristic Cs2(t), and - Wherein, the signal path includes the first input terminal of the switching switch (DS), and - Wherein, the reference signal path includes the second input terminal of the switching switch (DS), and - Wherein, the signal path does not include the second input terminal of the changeover switch (DS), and - Wherein, the reference signal path does not include the first input terminal of the switching switch (DS), and - Wherein, the common changeover switch (DS) selects its valid input terminal in response to the second chopping signal (Cs2), and transmits the value at the valid input terminal of the common changeover switch (DS) to the output terminal of the common changeover switch (DS), and Wherein, in the portion between the output terminal of the common switching switch (DS) at the sixth position of the reference signal path and the input terminal of the amplifier (DV) at the first position of the reference signal path and the signal path, the reference signal path and the signal path are identical, and - wherein the first filter using the first filter function F1[] is not part of the reference signal path; j) The first demodulated signal (DM1) or a signal derived therefrom is mixed with the second chopper signal (Cs2) in a fourth frequency mixing to form a third demodulated signal (DM3); k) The third demodulated signal (DM3) or the signal derived therefrom is subjected to a third filter function F3[] to form a third output signal (out3). - Wherein, the first filter function F1[] is selected such that it substantially maintains F1[Cs(t)]=0 and F1[Cs2(t)]=0 and F1[Cs90(t)]=0 and F1[Cs(t)×Cs2(t)]=0 and F1[Cs(t)×Cs90(t)]=0 and F1[Cs2(t)×Cs90(t)]=0 and F1[Cs(t)×Cs2(t)×Cs90(t)]=0 and F1[1]=β1, where β1 is a real or complex value, and - Wherein, the second filter function F2[] is selected such that it essentially maintains F2[Cs(t)]=0, and F2[Cs2(t)]=0, and F2[Cs90(t)]=0, and F2[Cs(t)×Cs2(t)]=0, and F2[Cs(t)×Cs90(t)]=0, and F2[Cs2(t)×Cs90(t)]=0, and F2[Cs(t)×Cs2(t)×Cs90(t)]=0, and F2[1]=β2, where β2 is a real or complex value, and - Wherein, the third filter function F3[] is selected such that it substantially maintains F3[Cs(t)]=0, and F3[Cs2(t)]=0, and F3[Cs90(t)]=0, and F3[Cs(t)×Cs2(t)]=0, and F3[Cs(t)×Cs90(t)]=0, and F3[Cs2(t)×Cs90(t)]=0, and F3[Cs(t)×Cs2(t)×Cs90(t)]=0, and F3[1] = β3, where β3 is a real or complex value; l) Perform a second comparison between the value of the third output signal (out3) or the value of the signal derived therefrom and the third expected value interval, and if the value of the third output signal (out3) or the value of the signal derived therefrom is outside the third expected value interval, then conclude that there is an error.

5. A sensor system that monitors by the method according to any one of claims 2 and 4. in, The sensor system includes a pressure sensor, which comprises a Wheatstone bridge (WB) with four piezoresistive resistors (R1, R2, R3, R4). The pressure sensor includes a reference Wheatstone bridge (RW) with four piezoresistive reference resistors (R5, R6, R7, R8), and The reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are arranged in the same manner as the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB), and The pressure sensor is mounted on a monolithic crystal, and The pressure sensor includes a cavity enclosed on one side by a diaphragm, and In this embodiment, the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB) are at least partially arranged on the diaphragm, and In this case, the reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are not arranged on the diaphragm, and The first resistor (R1) of the Wheatstone bridge (WB) is equivalent to the fifth resistor (R5) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The second resistor (R2) of the Wheatstone bridge (WB) is equivalent to the sixth resistor (R6) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The third resistor (R3) of the Wheatstone bridge (WB) is equivalent to the seventh resistor (R7) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The fourth resistor (R4) of the Wheatstone bridge (WB) is equivalent to the eighth resistor (R8) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The reference Wheatstone bridge (RW) is used as a reference noise source for subsequent signal processing.

6. A sensor system that monitors by the method according to any one of claims 2 and 4. in, The sensor system includes a pressure sensor, which comprises a Wheatstone bridge (WB) with four piezoresistive resistors (R1, R2, R3, R4). The pressure sensor includes a reference Wheatstone bridge (RW) with four piezoresistive reference resistors (R5, R6, R7, R8), and The reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are arranged in the same manner as the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB), and The pressure sensor is mounted on a monolithic crystal, and The pressure sensor includes a first cavity enclosed on a first side by a first diaphragm, and The first cavity has a cavity surface opposite to the first side of the first cavity, and The pressure sensor includes a reference cavity enclosed on the second side by a second diaphragm, and The reference cavity has a cavity surface opposite to the second side of the reference cavity, and In this embodiment, the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB) are at least partially arranged on the first diaphragm, and In this embodiment, the reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are at least partially arranged on the second diaphragm, and The first resistor (R1) of the Wheatstone bridge (WB) is equivalent to the fifth resistor (R5) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The second resistor (R2) of the Wheatstone bridge (WB) is equivalent to the sixth resistor (R6) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The third resistor (R3) of the Wheatstone bridge (WB) is equivalent to the seventh resistor (R7) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The fourth resistor (R4) of the Wheatstone bridge (WB) is equivalent to the eighth resistor (R8) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The reference Wheatstone bridge (RW) is used as a reference noise source for subsequent signal processing, and Wherein, the first membrane is different from the second membrane, and / or Wherein, the first cavity is different from the reference cavity, and / or Wherein, the first side of the first cavity opposite to the cavity surface of the first cavity is constructed differently from the second side of the reference cavity opposite to the cavity surface of the reference cavity, and / or The first cavity is filled with a fluid that is different from the fluid in the reference cavity or is in a different state than the fluid in the reference cavity, wherein a vacuum is considered as a fluid.

7. A sensor system that monitors by the method according to any one of claims 3 and 4. in, The sensor system includes a sensor, the sensor including a first resistor (R1) having a first terminal and a second terminal, and The sensor includes a second resistor (R2) having a first terminal and a second terminal, and The sensor includes a third resistor (R3) having a first terminal and a second terminal, and The sensor includes a fourth resistor (R4) having a first terminal and a second terminal, and The sensor includes a first voltage source (V1) having a first terminal and a second terminal, and The sensor includes a second voltage source (V2) having a first terminal and a second terminal, and Wherein, the first terminal of the first voltage source (V1) is connected to the first power supply voltage line (VDD), and The second terminal of the first voltage source (V1) is connected to the first terminal of the first resistor (R1). Wherein, the second terminal of the first resistor (R1) is connected to the first terminal of the second resistor (R2), and The second terminal of the second resistor is connected to the second power supply voltage line (GND), and Wherein, the first terminal of the second voltage source (V2) is connected to the first power supply voltage line (VDD), and The second terminal of the second voltage source (V2) is connected to the first terminal of the third resistor (R3). The second terminal of the third resistor (R3) is connected to the first terminal of the fourth resistor (R4), and The second terminal of the fourth resistor (R4) is connected to the second power supply voltage line (GND), and Wherein, the first voltage of the first voltage source (V1) depends on the test signal (TSS), and The second voltage of the second voltage source (V2) depends on the test signal (TSS) in a manner opposite to the first voltage of the first voltage source (V1).

8. The sensor system according to claim 7, wherein, The sensor is a pressure sensor.

9. A sensor system that monitors by the method according to any one of claims 3 and 4. in, The sensor system includes a sensor, the sensor including a first resistor (R1) having a first terminal and a second terminal, and The sensor includes a second resistor (R2) having a first terminal and a second terminal, and The sensor includes a third resistor (R3) having a first terminal and a second terminal, and The sensor includes a fourth resistor (R4) having a first terminal and a second terminal, and The sensor includes a first variable resistor (RV1) having a first terminal and a second terminal, and The sensor includes a second variable resistor (RV2) having a first terminal and a second terminal, and Wherein, the first terminal of the first variable resistor (RV1) is connected to the first power supply voltage line (VDD), and The second terminal of the first variable resistor (RV1) is connected to the first terminal of the first resistor (R1). Wherein, the second terminal of the first resistor (R1) is connected to the first terminal of the second resistor (R2), and The second terminal of the second resistor is connected to the second power supply voltage line (GND), and Wherein, the first terminal of the second variable resistor (RV2) is connected to the first power supply voltage line (VDD), and The second terminal of the second variable resistor (RV2) is connected to the first terminal of the third resistor (R3). The second terminal of the third resistor (R3) is connected to the first terminal of the fourth resistor (R4). The second terminal of the fourth resistor (R4) is connected to the second power supply voltage line (GND), and The resistance value of the first variable resistor (RV1) depends on the test signal (TSS), and The resistance value of the second variable resistor (RV2) depends on the test signal (TSS) in a manner opposite to that of the first variable resistor (RV1).

10. The sensor system according to claim 9, wherein, The sensor is a pressure sensor.

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