A method for processing a wafer surface
By adopting regional selective grinding and single-side cleaning techniques in the SiC wafer thinning process, the problems of high warpage and incomplete cleaning are solved, and the shape stability and cleaning effect of the wafer are significantly improved.
Patent Information
- Application Number
- CN202010875112.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-08-27
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2040-08-27
AI Technical Summary
The existing SiC wafer thinning process leads to high warpage, and traditional RCA cleaning cannot achieve single-sided cleaning, affecting the alloying effect.
The first type of grinding process is used to grind the second surface of the wafer, and then the second type of grinding process is used to grind only the first area to achieve regional selective stress release. Meanwhile, a cleaning chamber is designed to achieve single-sided cleaning of the second surface and to use atomized nanodroplet particles for cleaning.
The warpage of SiC wafer after thinning is significantly improved, the impact of warpage on subsequent processes is reduced, and the protection of the first surface of the wafer is ensured, achieving an efficient and uniform cleaning effect.
Smart Images

Figure CN114203542B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor process technology, and in particular to a method for processing the back side of a wafer. Background Art
[0002] SiC material has the advantages of wide band gap, high thermal conductivity, high breakdown field strength, high saturation velocity, etc., which is very suitable for making high-temperature and high-power semiconductor devices. SiC-based power devices can greatly exert their characteristics of high temperature, high frequency and low loss, making them have great application prospects in high voltage, high temperature, high frequency, high power, strong radiation and other aspects.
[0003] In the manufacturing process of SiC-based power devices, in order to reduce resistance loss and improve electrical performance, the SiC wafer is usually thinned after the front process of the SiC wafer is completed, and then the substrate is alloyed. At present, the mainstream method of SiC wafer thinning is to use a grinding wheel to thin the entire back area of the SiC. The thinning process steps are to first rough grind the entire back area, and then perform crystal grinding on the entire surface. The warpage of the SiC wafer thinned by this existing back thinning method is very large, and the distribution of the warpage gradually decreases from the center area of the thinning surface to the edge area, that is, the closer to the center of the back, the greater the warpage. Too much warpage will cause instability and unevenness in subsequent processes, and at the same time increase the risk of fragmentation of the subsequent thinning surface during the alloying process.
[0004] In addition, after the SiC wafer is thinned, and before the alloying process is performed, the back of the thinned SiC wafer needs to be RCA cleaned to remove particles generated during the thinning process to prevent the particles from affecting the alloying effect. However, traditional RCA cleaning cannot achieve single-sided cleaning of the thinned surface of the SiC wafer substrate, and its corrosive solution will affect the process that has been completed on the front of the SiC chip. In addition, the chemical stability of SiC wafers is very good, and the hydrogen peroxide in traditional RCA cleaning is difficult to oxidize the surface of the SiC wafer, and it is difficult to remove particles on the back of the SiC wafer. Summary of the invention
[0005] In view of this, the present invention provides a method for processing a wafer surface to solve the problems of high warpage and incomplete cleaning in the existing wafer thinning process.
[0006] A method for processing a wafer surface, comprising:
[0007] Step 1: providing a wafer to be processed, wherein the wafer has a first surface and a second surface opposite to each other, and the distance between the first surface and the second surface is the original thickness of the wafer,
[0008] Step 2: Covering the first surface of the wafer with a protective layer,
[0009] Step 3: performing a first type of grinding process on the second surface to reduce the thickness of the wafer, wherein after the first type of grinding process, a first thickness of a first area of the wafer is greater than a second thickness of a second area of the wafer, and the first thickness is less than the original thickness.
[0010] Step 4: Perform a second type of grinding process on the second surface located in the first area to continue thinning the thickness of the wafer. After the second type of grinding process, the third thickness of the first area is less than the first thickness and greater than the second thickness.
[0011] Preferably, the processing method further comprises:
[0012] Step 5: performing a cleaning process on the second surface located in the first area,
[0013] The steps of the cleaning process include:
[0014] Step 51: providing a cleaning chamber, and fixing the wafer in the cleaning chamber, so that the wafer and the cleaning chamber form a closed space body, the first surface of the wafer is located on the inner surface of the space body, and the second surface located in the first area is located on the outer surface of the space body,
[0015] Step 52: spraying an oxidant on the second surface located in the first region to form an oxide layer on the second surface located in the first region.
[0016] Step 53: spraying an etchant on the oxide layer to remove the oxide layer from the second surface located in the first region,
[0017] Step 54: spraying cleaning agent on the second surface in the first area to clean the chemical substances on the second surface in the first area.
[0018] Step 55: Drying the wafer.
[0019] Preferably, the first type of grinding process is a coarse grinding process, and the second type of grinding process is a fine grinding process, the number of grinding wheels used in the fine grinding process is greater than the number of grinding wheels used in the coarse grinding process, and the size of the abrasive particles used for grinding in the fine grinding process is smaller than the size of the abrasive particles used for grinding in the coarse grinding process.
[0020] Preferably, the step 3 is:
[0021] Step 31: performing the first type of grinding process on the second surface of the entire wafer to reduce the original thickness between the second surface and the first surface of the entire wafer to the first thickness.
[0022] Step 32: Stop performing the first type of grinding process on the second surface located in the first area, and continue performing the first type of grinding process only on the second surface located in the second area, so that the thickness of the second area of the wafer is thinned from the first thickness to the second thickness.
[0023] Preferably, during the process of performing step 31, the grinding wheel is rotated according to a first preset trajectory, and the wafer is rotated on its own. During the process of performing step 32, the grinding wheel is fixed, and the wafer is rotated on its own.
[0024] During the process of performing step 32, the grinding wheel is rotated according to a second preset trajectory, and the wafer is rotated.
[0025] Preferably, there is a carrier at the bottom inner side of the cleaning chamber, and step 51 is as follows: placing the wafer on the carrier with the second surface facing the carrier, the second surface located in the second area is supported by the carrier, and the second surface located in the first area is located between the carriers and is exposed to the outside by the bottom of the cleaning chamber.
[0026] Preferably, the carrier includes a first step and a second step, the lower surfaces of the first step and the second step are the bottom outer surfaces of the cleaning chamber, the upper surface of the first step is lower than the upper surface of the second step, and the lower surface and the upper surface are two opposite surfaces.
[0027] The second surface located in the second area is attached to the upper surface of the first step,
[0028] The space between the side surface of the wafer and the inner wall of the cleaning chamber is filled with a pressure ring, and the side surface of the wafer is a surface between the first surface and the second surface.
[0029] Preferably,
[0030] The step 52 is: introducing first mixed nano-liquid particles formed by atomizing the oxidant and deionized water to the second surface in the second region along a direction forming a first preset angle with the axis to form the oxide layer, wherein the axis is a line perpendicular to the second surface of the wafer.
[0031] The step 53 is: introducing the second mixed nano-liquid particles formed by the atomization of the corrosive agent and deionized water to the second surface in the second area along a direction forming a second preset angle with the axis, so as to remove the oxide layer by the reaction between the corrosive agent and the oxide layer.
[0032] The step 54 is: introducing cleaning liquid particles formed by atomization of the cleaning liquid toward the second surface in the second area along a direction forming a third preset angle with the axis to wash away the corrosive agent on the second surface of the wafer,
[0033] Step 55: Drying the wafer.
[0034] Preferably, the first preset angle, the second preset angle and the third preset angle are not less than 20 degrees and not more than 60 degrees.
[0035] During the process of introducing the first mixed nano-liquid particles and the second mixed nano-particles, the wafer is rotated at a first preset speed and a second preset speed, respectively, and the temperature in the cleaning chamber is controlled to be a first preset temperature and a second preset temperature, respectively.
[0036] The first preset speed and the second preset speed are both less than or equal to 20 r / s, and the first preset temperature and the second preset temperature are both not less than 40 degrees Celsius and not greater than 80 degrees Celsius.
[0037] During the process of introducing the cleaning liquid particles, the temperature of the deionized water liquid particles is controlled to be not less than 25 degrees Celsius and not more than 50 degrees Celsius, and the rotation speed of the wafer is controlled to be less than or equal to 20 r / s.
[0038] The oxidant includes ozone, the corrosive agent includes hydrofluoric acid, the cleaning liquid is deionized water, and during the atomization process of the second mixed nano-liquid particles, the volume ratio between the hydrofluoric acid and the deionized water is not less than 0.01 and not greater than 1,
[0039] The step 55 comprises:
[0040] Step 551: rotating the wafer at a third preset rotation speed to throw off the cleaning liquid particles on the surface of the wafer, wherein the third preset rotation speed is greater than the first preset rotation speed and the second preset rotation speed.
[0041] Step 552: Introduce hot nitrogen into the cleaning chamber to dry the wafer, wherein the temperature of the hot nitrogen is not less than 30 degrees Celsius and not more than 80 degrees Celsius.
[0042] Preferably, between step 4 and step 5, the following steps are further included:
[0043] Step 4: Rinse the wafer with deionized water.
[0044] Step 5: Dry the wafer.
[0045] After step 5, the method further includes removing the protective layer on the first surface.
[0046] The first region is an effective region on the wafer where semiconductor devices are manufactured, and the second region is an ineffective region on the wafer where semiconductor devices are not manufactured, and the second region is located around the first region.
[0047] The first surface is the surface where the active surface of the device on the wafer is located, and the second surface is the back surface of the wafer.
[0048] The wafer is one of a SiC wafer, a Si wafer, a GaN wafer, and a GaAs wafer.
[0049] The first beneficial effect of the present invention is: during the thinning process of the wafer, the present invention first uses the first type of grinding process to grind the entire second surface of the wafer, so that the thinning thickness of the second area is greater than the thinning thickness of the first area, and then uses the second type of grinding process to grind only the first area, thereby performing regional selective stress release on the second surface, so that the stress distribution of the second surface is complementary, thereby significantly improving the warpage of the SiC wafer after thinning and reducing the influence of the warpage on subsequent processes.
[0050] The second beneficial effect of the present invention is: when the present invention places the wafer in the cleaning chamber for cleaning, due to the different thinning thicknesses of the first area and the second area of the wafer, the thin second area is placed on the carrier of the cleaning chamber, so that the cleaning chamber protects the first surface of the wafer and only exposes the second surface to achieve cleaning of only the second surface, thereby ensuring that the first surface of the wafer is not damaged by the cleaning liquid during the cleaning of the second surface.
[0051] The third beneficial effect of the present invention is that the present invention uses atomized nano-droplet particles to clean the wafer, which has stronger cleaning ability and uniformity, and the cleaning is convenient, low-cost and easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS
[0052] Figure 1a-1d The schematic diagram of the cross-sectional structure of a wafer in each step of a wafer thinning process in a wafer surface treatment method provided according to an embodiment of the present invention is shown in FIG.
[0053] Figure 2 The schematic diagram of the structure of fixing the thinned wafer in the cleaning chamber according to an embodiment of the present invention is as follows.
[0054] Figure 3a-3c It is a schematic diagram of a partial cross-sectional structure of a wafer in each step of a wafer cleaning process in a wafer surface treatment method flow provided according to an embodiment of the present invention. DETAILED DESCRIPTION
[0055] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments produced by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In addition, it should be noted that in the specific implementation method, "the..." refers only to the technical attributes or features in the present invention.
[0056] The present invention provides a method for processing the surface of a wafer. The method for processing the surface of the wafer mainly includes a wafer thinning process and a wafer cleaning process. The thinning process mainly includes steps 1 to 4. Figure 1a-1d The thinning process is specifically described with reference to the schematic diagrams of the cross-sectional structure of the wafer in each step of the thinning process.
[0057] Step 1: If Figure 1a As shown, we first provide a wafer to be processed. In this embodiment, the wafer is a SiC wafer. In other embodiments, the wafer can also be a wafer formed of semiconductor materials such as Si wafer, GaN wafer, GaAs wafer, etc. The SiC wafer has a relative first surface F and a second surface B. The distance between the first surface F and the second surface B is the original thickness d0 of the wafer (the thickness before the thinning process), that is, before the thinning process is performed, the SiC wafer is a wafer with uniform thickness. The first surface F is the surface where the active surface of the device on the SiC wafer is located, and the second surface B is the back of the SiC wafer.
[0058] Step 2: If Figure 1b As shown, the first surface of the SiC wafer is covered with a protective layer A, so as to protect the active surface of the device made on the SiC wafer. Specifically, the protective layer A can be covered on the first surface by film bonding, wax coating and bonding.
[0059] Step 3: Performing a first type of grinding process on the second surface to reduce the thickness of the SiC wafer. After performing the first type of grinding process, Figure 1cAs shown, the thickness of the first region B1 of the SiC wafer is thinned from the original thickness d0 to the first thickness d1, and the thickness of the second region B2 of the SiC wafer is thinned from the original thickness d0 to the second thickness d2. The first thickness d1 is greater than the second thickness d2, that is, during the first type of grinding process, the thickness of the second region of the wafer thinned is greater than the thickness of the first region thinned. For example, the first thickness d1 is 20-150 μm thicker than the second thickness d2.
[0060] Step 4: Perform the second type of grinding process on the second surface B located in the first area B1 to continue to thin the thickness of the SiC wafer. In step 4, the second type of grinding process is not performed on the second surface B in the second area B2, so that a stress difference is formed between the first area B1 and the second area B2 of the wafer. Therefore, after performing step 4, the conditions in which the stress in the first area B1 of the wafer formed after step 3 is high and the stress in the second area B2 is low are fully complemented, so that the stress distribution of the second surface of the entire wafer is more uniform, thereby improving the warping of the second surface of the SiC wafer. After performing the second type of grinding process, the thickness of the first area B1 of the wafer is further thinned from the first thickness d1 to the third thickness d3, but the third thickness d3 is greater than the second thickness d2. Figure 1d As shown, after performing step 4, the thickness of the first area B1 of the SiC wafer is the second thickness d3, and the thickness of the second area B2 of the SiC wafer is d2. The first area B1 is an effective area on the SiC wafer where semiconductor devices are manufactured, and the second area B2 is an invalid area on the SiC wafer where no semiconductor devices are manufactured, and the second area B2 is located around the first area B1. For example, the second area B2 is an edge area of the SiC wafer, and the first area B1 is a middle area surrounded by the edge area, and the second area B2 is a circular area extending 2-10 mm from the outermost edge of the SiC wafer to the center of the SiC wafer.
[0061] In this embodiment, step 3 further includes:
[0062] Step 31: Perform a first type of grinding process on the second surface B of the entire SiC wafer to reduce the original thickness d0 between the second surface B and the first surface F of the entire SiC wafer to the first thickness d1.
[0063] Step 32: Stop performing the first type of grinding process on the second surface B located in the first area B1, and continue performing the first type of grinding process only on the second surface B located in the second area B2, so that the thickness of the second area B2 of the SiC wafer is thinned from the first thickness d1 to the second thickness d2.
[0064] In an embodiment of the present invention, the first type of grinding process is a rough grinding process, and the second type of grinding process is a fine grinding process. The number of grinding wheels used in the fine grinding process is greater than the number of grinding wheels used in the rough grinding process, and the size of the grinding particles used for grinding in the fine grinding process is smaller than the size of the grinding particles used for grinding in the rough grinding process. In this embodiment, the grinding wheel is selected as a diamond grinding wheel, and the grinding particles are diamond particles. In the rough grinding process, the mesh number of the grinding wheel used is 2000-4000 mesh, and the second surface B (thinning surface) needs to be rinsed with deionized water DI during the rough grinding process. In the fine grinding process, the mesh number of the grinding wheel used is greater than or equal to 10000 mesh, and the second surface B (thinning surface) needs to be rinsed with deionized water DI during the rough grinding process. In addition, in the step 31, the grinding wheel is rotated according to the first preset trajectory, and the SiC wafer rotates. In the step 32, the grinding wheel is fixed and the SiC wafer rotates.
[0065] After performing step 4, the wafer surface treatment method may further include step 4' and step 5'. Step 4' is to rinse the SiC wafer with a large amount of deionized water to wash away the larger particles attached to the second surface B of the SiC wafer. Step 5' is to spin-dry the SiC wafer, specifically, the SiC wafer may be rotated at a high speed to spin-dry the deionized water on the SiC wafer.
[0066] After the thinning process is completed, we need to perform a cleaning process step 5 on the thinned SiC wafer. During the cleaning process, we need to protect the first surface F of the SiC wafer and only perform a single-sided cleaning on the second surface B in the first area B1, so as to avoid damage to the active area of the first surface F of the SiC wafer.
[0067] Specifically, the cleaning process step 5 includes: according to the treatment method, it also includes steps 51 to 55.
[0068] Step 51: Provide a cleaning chamber and fix the wafer in the cleaning chamber so that the SiC wafer and the cleaning chamber form a closed space body, the first surface of the SiC wafer is located on the inner surface of the space body, and the second surface located in the first area is located on the outer surface of the space body.
[0069] Figure 2 The schematic diagram of the structure of fixing the SiC wafer in the cleaning chamber 1 is shown. The inner bottom of the cleaning chamber 1 has a carrier 11. The step 51 is as follows: the SiC wafer is placed on the carrier 11 in a manner that the second surface faces the carrier 11. The second surface located in the second area B2 is supported by the carrier 11. The second surface located in the first area B1 is located between the carriers 11 and is exposed to the outside by the bottom of the cleaning chamber 1. The carrier 11 includes a first step 111 and a second step 112. The lower surfaces of the first step 111 and the second step 112 are the outer surfaces of the bottom of the cleaning chamber 1. The upper surface of the first step 111 is lower than the upper surface of the second step 112. The lower surface and the upper surface are two opposite surfaces. The second surface located in the second area B2 is attached to the upper surface of the first step 111. Obviously, the carrier is composed of two steps, and the second area of the SiC wafer that is thinned more is placed on the first step, which is conducive to preventing the cleaning night from entering the cleaning chamber 1 during the subsequent cleaning process to protect the first surface of the SiC wafer. In addition, in order to further ensure that the subsequent cleaning night will not enter the cleaning chamber and damage the first surface F, the present invention also makes the space between the side of the SiC wafer and the inner wall of the cleaning chamber be filled with a pressure ring 2, and the side of the SiC wafer is the surface between the first surface and the second surface. Specifically, the pressure ring 2 includes a first part filled in the space between the side of the SiC wafer and the inner wall of the cleaning chamber and on the first surface extending from the first part to the second area B2, and the first part and the second part of the pressure ring 2 are integrally formed. The cleaning chamber also includes a top cover, which is located above the first surface. During the cleaning process, the rotation of the wafer is achieved by rotating the cleaning chamber around the axis on the top cover.
[0070] After the SiC wafer is fixed in the cleaning chamber 1, the second surface located in the first area B1 needs to be cleaned to further remove particles attached to the second surface in the first area B1. Therefore, we need to continue with steps 52 to 55. The schematic diagram of the partial cross-sectional structure of the SiC wafer at each step in the cleaning process is shown in FIG. Figures 3a to 3c shown.
[0071] Step 52: As shown in 3a, there may be smaller particles C attached on the second surface of the SiC wafer after step 5, which need to be further removed. Figure 3b As shown, first we need to spray an oxidant on the second surface located in the first area B1 to form an oxide layer D on the second surface located in the first area, and then proceed to step 53. In the process of forming the oxide layer D, the particles C on the second surface of the SiC wafer will be introduced into the oxide layer D.
[0072] Specifically, in step 52, we pass the first mixed nano liquid particles formed by the oxidant and deionized water after atomization treatment to the second surface located in the second area B2 through the atomizing sprayer 4 fixed on the bracket 3 along the direction of the first preset angle a with the axis to form the oxide layer D. In the process of passing the first mixed nano liquid particles, the SiC wafer is rotated at a first preset speed, and the temperature in the cleaning chamber is controlled to a first preset temperature, so that the first surface in the first area B1 of the SiC wafer is uniformly oxidized. The first preset speed is less than or equal to 20r / s, and the first preset temperature is not less than 40 degrees Celsius and not more than 80 degrees Celsius. The axis is a line perpendicular to the second surface of the SiC wafer. The first preset angle a is not less than 20 degrees and not more than 60 degrees. The oxidant is ozone in this embodiment.
[0073] Step 53: Spray an etchant on the oxide layer D to remove the oxide layer D from the second surface located in the first area B1. Figure 3c The corrosive agent reacts with the oxide layer D, and removes the oxide layer D while taking away the particles C in the oxide layer.
[0074] Specifically, we pass the second mixed nano liquid particles formed by the atomization treatment of the corrosive agent and deionized water to the second surface located in the second area B2 along the direction of the second preset angle a with the axis, so as to remove the oxide layer D by the reaction between the corrosive agent and the oxide layer D. In the process of passing the second mixed nano liquid particles, the SiC wafer is rotated at a second preset speed, and the temperature in the cleaning chamber is controlled to be a second preset temperature. The centrifugal force of the rotation of the SiC wafer combined with the self-gravity of the oxide layer D and the particles C can throw the oxide layer D and the particles C away from the second surface of the SiC wafer, thereby enhancing the cleaning effect. The second preset speed is less than or equal to 20r / s, the first preset temperature is not less than 40 degrees Celsius and not more than 80 degrees Celsius, and the second preset angle a is not less than 20 degrees and not more than 60 degrees. The corrosive agent is a mixture of HF and deionized water, and the volume ratio of HF to deionized water is not less than 0.01 and not more than 1.
[0075] Step 54: Spray cleaning solution on the second surface in the first area to clean the chemical substances on the second surface in the first area.
[0076] Specifically, we pass the cleaning liquid particles formed by atomizing the cleaning liquid to the second surface located in the second area B2 along the direction of the third preset angle a with the axis through the atomizing sprayer 4 to wash away the corrosive agent on the second surface of the SiC wafer. The third preset angle is not less than 20 degrees and not more than 60 degrees. The cleaning liquid is deionized water. During the process of passing the cleaning liquid particles, the temperature of the deionized water liquid particles is controlled to be not less than 25 degrees Celsius and not more than 50 degrees Celsius, and the rotation speed of the SiC wafer is controlled to be less than or equal to 20r / s.
[0077] Step 55: Drying the wafer.
[0078] Specifically, step 55 further includes step 551 and step 552.
[0079] Step 551: Rotate the SiC wafer at a third preset rotation speed to throw out the cleaning liquid particles on the second surface of the SiC wafer. The third preset rotation speed is greater than both the first preset rotation speed and the second preset rotation speed, thereby facilitating the throwing out of the cleaning liquid particles on the second surface of the SiC wafer.
[0080] Step 552: hot nitrogen is introduced into the cleaning chamber 1 to dry the SiC wafer, wherein the temperature of the hot nitrogen is not less than 30 degrees Celsius and not more than 80 degrees Celsius.
[0081] After completing step 5, that is, completing the cleaning process of the SiN wafer, it is still necessary to remove the protective layer A on the first surface in order to perform a subsequent surface metallization process.
[0082] In summary, the present invention uses a first type of grinding process to grind the second surface of the wafer during the thinning process of the wafer, so that the thinning thickness of the second area is greater than the thinning thickness of the first area, and then uses a second type of grinding process to grind only the first area, thereby performing regional selective stress release on the second surface, so that the stress distribution of the second surface is complementary, thereby significantly improving the warpage of the SiC wafer after thinning, and reducing the impact of the warpage on subsequent processes. In addition, when the present invention places the wafer in the cleaning chamber for cleaning, due to the different thinning thicknesses of the first and second areas of the wafer, the thin second area is placed on the carrier of the cleaning chamber, so that the cleaning chamber protects the first surface of the wafer pair, and only exposes the second surface to achieve cleaning of only the second surface, thereby ensuring that the first surface of the wafer is not damaged by the cleaning liquid during the cleaning process of the second surface. In addition, the present invention uses atomized nano droplet particles to clean the wafer, which has stronger cleaning ability and uniformity, and is easy to clean, low cost and easy to implement.
[0083] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. According to the above description, many modifications and changes can be made. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is only limited by the claims and their full scope and equivalents.
Claims
1. A method for processing a wafer surface, characterized in that: include: Step 1: providing a wafer to be processed, wherein the wafer has a first surface and a second surface opposite to each other, and the distance between the first surface and the second surface is the original thickness of the wafer, Step 2: Covering the first surface of the wafer with a protective layer, Step 3: performing a first type of grinding process on the second surface to reduce the thickness of the wafer, wherein after the first type of grinding process, a first thickness of a first area of the wafer is greater than a second thickness of a second area of the wafer, and the first thickness is less than the original thickness. Step 4: performing a second type of grinding process on the second surface located in the first region to continue to thin the thickness of the wafer, wherein after the second type of grinding process is performed, a third thickness of the first region is less than the first thickness and greater than the second thickness; Also includes: Step 5: performing a cleaning process on the second surface located in the first area, The steps of the cleaning process include: Step 51: providing a cleaning chamber, and fixing the wafer in the cleaning chamber, so that the wafer and the cleaning chamber form a closed space body, the first surface of the wafer is located on the inner surface of the space body, and the second surface located in the first area is located on the outer surface of the space body, Step 52: spraying an oxidant on the second surface located in the first region to form an oxide layer on the second surface located in the first region. Step 53: spraying an etchant on the oxide layer to remove the oxide layer from the second surface located in the first region, Step 54: spraying cleaning agent on the second surface in the first area to clean the chemical substances on the second surface in the first area. Step 55: Drying the wafer.
2. The processing method according to claim 1, characterized in that: The first type of grinding process is a coarse grinding process, and the second type of grinding process is a fine grinding process. The number of grinding wheels used in the fine grinding process is greater than the number of grinding wheels used in the coarse grinding process, and the size of the grinding particles used for grinding in the fine grinding process is smaller than the size of the grinding particles used for grinding in the coarse grinding process.
3. The processing method according to claim 2, characterized in that: The step 3 is: Step 31: performing the first type of grinding process on the second surface of the entire wafer to reduce the original thickness between the second surface and the first surface of the entire wafer to the first thickness. Step 32: Stop performing the first type of grinding process on the second surface located in the first area, and continue performing the first type of grinding process only on the second surface located in the second area, so that the thickness of the second area of the wafer is thinned from the first thickness to the second thickness.
4. The processing method according to claim 1, characterized in that: The bottom inner side of the cleaning chamber has a carrier, and step 51 is as follows: placing the wafer on the carrier with the second surface facing the carrier, the second surface in the second area is supported by the carrier, and the second surface in the first area is located between the carriers and is exposed to the outside by the bottom of the cleaning chamber.
5. The processing method according to claim 4, characterized in that: The carrier includes a first step and a second step, the lower surfaces of the first step and the second step are the bottom outer surfaces of the cleaning chamber, the upper surface of the first step is lower than the upper surface of the second step, and the lower surface and the upper surface are two opposite surfaces. The second surface located in the second area is attached to the upper surface of the first step, The space between the side surface of the wafer and the inner wall of the cleaning chamber is filled with a pressure ring, and the side surface of the wafer is a surface between the first surface and the second surface.
6. The processing method according to claim 1, characterized in that: The step 52 is: introducing first mixed nano-liquid particles formed by atomizing the oxidant and deionized water to the second surface in the second region along a direction forming a first preset angle with the axis to form the oxide layer, wherein the axis is a line perpendicular to the second surface of the wafer. The step 53 is: introducing the second mixed nano-liquid particles formed by the atomization of the corrosive agent and deionized water to the second surface in the second area along a direction forming a second preset angle with the axis, so as to remove the oxide layer by the reaction between the corrosive agent and the oxide layer. The step 54 is: introducing cleaning liquid particles formed by atomization of the cleaning liquid toward the second surface in the second area along a direction forming a third preset angle with the axis to wash away the corrosive agent on the second surface of the wafer, Step 55: Drying the wafer.
7. The processing method according to claim 6, characterized in that: The first preset angle, the second preset angle and the third preset angle are not less than 20 degrees and not more than 60 degrees, During the process of introducing the first mixed nano-liquid particles and the second mixed nano-particles, the wafer is rotated at a first preset speed and a second preset speed, respectively, and the temperature in the cleaning chamber is controlled to be a first preset temperature and a second preset temperature, respectively. The first preset speed and the second preset speed are both less than or equal to 20 r / s, and the first preset temperature and the second preset temperature are both not less than 40 degrees Celsius and not greater than 80 degrees Celsius. During the process of introducing the cleaning liquid particles, the temperature of the deionized water liquid particles is controlled to be not less than 25 degrees Celsius and not more than 50 degrees Celsius, and the rotation speed of the wafer is controlled to be less than or equal to 20 r / s. The oxidant includes ozone, the corrosive agent includes hydrofluoric acid, the cleaning liquid is deionized water, and during the atomization process of the second mixed nano-liquid particles, the volume ratio between the hydrofluoric acid and the deionized water is not less than 0.01 and not greater than 1, The step 55 comprises: Step 551: rotating the wafer at a third preset rotation speed to throw off the cleaning liquid particles on the surface of the wafer, wherein the third preset rotation speed is greater than the first preset rotation speed and the second preset rotation speed. Step 552: Introduce hot nitrogen into the cleaning chamber to dry the wafer, wherein the temperature of the hot nitrogen is not less than 30 degrees Celsius and not more than 80 degrees Celsius.
8. The processing method according to claim 2, characterized in that: Also included between step 4 and step 5: Step 4: Rinse the wafer with deionized water. Step 5: Drying the wafer. After step 5, the method further includes removing the protective layer on the first surface. The first region is an effective region on the wafer where semiconductor devices are manufactured, and the second region is an ineffective region on the wafer where semiconductor devices are not manufactured, and the second region is located around the first region. The first surface is the surface where the active surface of the device on the wafer is located, and the second surface is the back surface of the wafer. The wafer is one of a SiC wafer, a Si wafer, a GaN wafer, and a GaAs wafer.
Citation Information
Patent Citations
Process for fabricating a heterostructure with minimized stress
US20110151644A1
Substrate processing system, substrate processing method, and computer storage medium
WO2019013042A1