A pretreatment method for improving silicon wafer conversion efficiency

Abstract

The present invention provides a pretreatment method for improving the conversion efficiency of silicon wafers, comprising: removing the damaged layer on the surface of the silicon wafer; performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and also forming a borosilicate glass layer on the surface of the P+ doped layer; placing the silicon wafer after the boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer; removing the oxide layer and the borosilicate glass layer, retaining the P+ doped layer, and completing the pretreatment. The beneficial effect of the present invention is that boron diffusion is performed on the front surface of the gallium-doped silicon wafer, so that the boron element is doped into the surface of the doped silicon wafer with high resistivity, forming a state of boron-gallium co-doping, and increasing the impurity concentration of the entire silicon wafer. Since the resistivity of the silicon wafer is inversely proportional to the impurity concentration, the resistivity of the silicon wafer can be greatly reduced, thereby increasing the current of the battery cell in the subsequent production process, and then improving the conversion efficiency of the battery cell.

Description

Technical Field

[0001] The invention belongs to the technical field of solar cell preparation, and in particular relates to a pretreatment method for improving silicon chip conversion efficiency. Background Art

[0002] At present, there are many types of silicon wafers used in the photovoltaic field, but most of the methods for controlling the resistivity of silicon wafers are to limit the fluctuation of resistivity through the process during the crystal pulling process. High resistivity will result in poor conversion efficiency of silicon wafers. However, many silicon wafers can be obtained by pulling a crystal once, and all silicon wafers cannot be directly discarded due to resistivity reasons.

[0003] In order to further reduce the light decay value of crystalline silicon battery products, various battery manufacturers have introduced the use of gallium-doped silicon wafers. However, due to the low segregation coefficient of gallium, the resistivity distribution range of single-crystalline silicon wafers is larger, and the high resistivity of gallium-doped silicon wafers will have a great negative impact on the conversion efficiency of the battery cells, thereby reducing the economic efficiency of gallium-doped silicon wafers to a certain extent. Summary of the invention

[0004] The problem to be solved by the present invention is to provide a pretreatment method for improving the conversion efficiency of silicon wafers, which effectively solves the problem that the segregation coefficient of gallium in doped silicon wafers is low, which will lead to a larger resistivity distribution range of single crystal silicon wafers, and the high resistivity gallium-doped silicon wafers will have a great negative impact on the conversion efficiency of the battery cell, thereby reducing the economic efficiency of the gallium-doped silicon wafers to a certain extent.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is: a pretreatment method for improving the conversion efficiency of silicon wafers, comprising:

[0006] Remove the damaged layer on the surface of silicon wafer;

[0007] Performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and further forming a borosilicate glass layer on the surface of the P+ doped layer;

[0008] Placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer;

[0009] The oxide layer and the borosilicate glass layer are removed, and the P+ doped layer is retained, and the pretreatment is completed.

[0010] Preferably, the silicon wafer comprises a gallium-doped silicon wafer.

[0011] Preferably, in the process of removing the damaged layer on the surface of the silicon wafer, a first etching solution is used to etch the surface of the silicon wafer to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein:

[0012] The first etching solution is NaOH with a concentration range of 1.2-1.4% and a etching time of 120-140s.

[0013] Preferably, in the boron diffusion treatment of the front surface of the silicon wafer, the boron source is boron tribromide or boron trichloride, the diffusion temperature is 750-1100° C., and the diffusion time is 7200-9600 s.

[0014] Preferably, the stage of performing boron diffusion treatment on the front surface of the silicon wafer comprises:

[0015] The first heating stage: introducing the boron source into the boron diffusion device, and then heating to a first temperature, wherein the first temperature is 800-900° C., and the first heating time is 1000-1400 s;

[0016] Deposition stage: keeping the first temperature unchanged, the boron source is deposited on the front surface of the silicon wafer, and the deposition time is 1900-2300s;

[0017] The second heating stage: after the boron source is deposited, the temperature is raised again to a second temperature, the second temperature is 900-1100° C., and the second heating time is 700-1100 s;

[0018] Pushing stage: keeping the second temperature unchanged, the boron element is pushed into the inside of the silicon wafer, and the pushing time is 700-1100s;

[0019] The first cooling stage: after the boron element is advanced, the temperature is cooled to a third temperature of 820-900° C., and the third cooling time is 1300-1700 s;

[0020] The second cooling stage: after the first cooling stage is over, the temperature is lowered again to the fourth temperature, the fourth temperature is 750-850° C., and the fourth cooling time is 1600-2000 s.

[0021] Preferably, during the advancement stage, the boron element is advanced to a depth of 0.8-1.2 μm into the silicon wafer.

[0022] Preferably, the silicon wafer after boron diffusion is placed in an oxidation furnace, oxygen is introduced into the oxidation furnace, and during the process of forming an oxide layer on the surface of the borosilicate glass layer, the oxidation temperature is 700-900° C. and the oxidation time is 60-90 minutes.

[0023] Preferably, the oxide layer has a thickness of 10-30 nm.

[0024] Preferably, in the step of removing the oxide layer and the borosilicate glass layer, a second etching solution is used to etch the oxide layer and the borosilicate glass layer, wherein:

[0025] The second etching solution is HF, the concentration range is 45-55%, the etching time is 20-30 minutes, and finally the P+ doped layer is retained, and the pretreatment is completed.

[0026] By adopting the above technical solution, boron is diffused on the positive surface of the gallium-doped silicon wafer, so that the boron element is doped into the surface of the high-resistivity doped silicon wafer, forming a boron-gallium co-doped state, increasing the overall impurity concentration of the silicon wafer, and raising the impurity concentration in the silicon wafer to 10 13 / cm 2 Since the resistivity of silicon wafers is inversely proportional to the impurity concentration, the resistivity of silicon wafers can be greatly reduced, thereby increasing the cell current in the subsequent production process and further improving the conversion efficiency of the cell.

[0027] By adopting the above technical solution, after the boron diffusion is completed, the impurity elements on the surface of the silicon wafer are oxidized and adsorbed into the oxide layer through the oxidation furnace, and then the oxide layer with impurity elements is removed through the subsequent process of removing the oxide layer and borosilicate glass layer, thereby further removing impurities from the silicon wafer and providing support for further improving the efficiency of subsequent battery cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a flow chart of a pretreatment method for improving silicon wafer conversion efficiency according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] The present invention will be further described below in conjunction with embodiments and drawings:

[0030] In the description of the embodiments of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "front surface", "back surface", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0031] like Figure 1 As shown, a pretreatment method for improving silicon wafer conversion efficiency includes:

[0032] S1: Remove the damaged layer on the surface of the silicon wafer, where:

[0033] In order to further reduce the light decay value of crystalline silicon cell products, the silicon wafer is set to be gallium-doped silicon wafer;

[0034] In the process of removing the damaged layer on the surface of the silicon wafer, the damaged layer generally refers to the small damage on the surface of the silicon wafer caused during the cutting process, such as burrs or excessively rough surface defects. After removal, a smoother silicon wafer surface can be obtained;

[0035] The front surface and the back surface of the silicon wafer are corroded by a first corrosive liquid to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein:

[0036] The first etching solution uses NaOH with a concentration range of 1.2-1.4% and an etching time of 120-140s. Since the concentration range of the first etching solution is relatively low, it will not affect the thickness of the silicon wafer, that is, the thickness of the silicon wafer will not change.

[0037] S2: performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and further forming a borosilicate glass layer on the surface of the P+ doped layer, wherein;

[0038] In the boron diffusion treatment of the front surface of the silicon wafer, the boron source is boron tribromide or boron trichloride, the diffusion temperature range is 750-1100°C, and the total diffusion time range is 7200-9600s;

[0039] The stages of boron diffusion treatment of the front surface of the silicon wafer include:

[0040] The first heating stage: a boron source is introduced into the boron diffusion device, and then the temperature is raised to a first temperature, the first temperature is 800-900° C., and the first heating time is 1000-1400s;

[0041] Deposition stage: keep the first temperature unchanged, and deposit the boron source on the front surface of the silicon wafer for 1900-2300s;

[0042] The second heating stage: after the boron source is deposited, the temperature is raised again to the second temperature, the second temperature is 900-1100°C, and the second heating time is 700-1100s;

[0043] Pushing stage: Keep the second temperature unchanged, and push the boron element into the silicon wafer for 700-1100 seconds;

[0044] The first cooling stage: after the boron element is advanced, the temperature is lowered to the third temperature, the third temperature is 820-900°C, and the third cooling time is 1300-1700s;

[0045] The second cooling stage: after the first cooling stage is over, the temperature is lowered again to the fourth temperature, the fourth temperature is 750-850°C, and the fourth cooling time is 1600-2000s.

[0046] During the drive-in phase, the boron element is driven into the silicon wafer to a depth of 0.8-1.2μm.

[0047] By doping the surface of high-resistivity silicon wafers with boron, the overall impurity concentration of the silicon wafer is increased, and a boron-gallium co-doped state can be formed, which greatly reduces the resistivity of the silicon wafer and increases the current of the battery cell in the subsequent process, only to improve the conversion efficiency of the battery cell.

[0048] S3: placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer;

[0049] After all stages of boron diffusion are completed, the boron diffusion equipment is still maintained at a standby temperature of 750-800°C, and the processed silicon wafer is taken out of the boron diffusion equipment and then placed in an oxidation furnace;

[0050] When the silicon wafer is placed in the oxidation furnace, oxygen is introduced into the oxidation furnace to carry out oxidation and impurity absorption reaction. The oxidation temperature is 700-900℃ and the oxidation time is 60-90min. After the oxidation is completed, an oxide layer is formed on the surface of the borosilicate glass layer.

[0051] The thickness of the oxide layer is 10-30nm.

[0052] S4: remove the oxide layer and the borosilicate glass layer, retain the P+ doped layer, and the pretreatment is completed.

[0053] Removing the oxide layer and borosilicate glass layer is also called the BSG removal process. After the silicon wafer comes out of the oxidation furnace, it gradually cools to room temperature and then the removal work is done.

[0054] The oxide layer and the borosilicate glass layer are etched with a second etching solution, wherein:

[0055] The second etching solution is HF, the concentration range of the second etching solution is 45-55%, the etching time is 20-30 minutes, and finally the P+ doped layer is retained, that is, only the silicon wafer and the P+ doped layer on the front surface of the silicon wafer, and the pretreatment is completed.

[0056] The steps of removing the damaged layer on the surface of the silicon wafer, performing boron diffusion, oxidation gettering, and removing the oxide layer and borosilicate glass layer in the present invention are added before the normal PERC process flow. Removing the surface damage can make the surface of the silicon wafer deposit the passivation layer better and make the silicon wafer more beautiful; boron diffusion can increase the impurity concentration of the entire silicon wafer, raising the impurity concentration to 10 18 cm -3Around, forming a boron-gallium co-doped state. Since the resistivity of the silicon wafer is inversely proportional to the impurity concentration, the resistivity of the silicon wafer can be greatly reduced, thereby increasing the current of the battery cell in the subsequent production process, and then improving the conversion efficiency of the battery cell; oxidation gettering can adsorb the impurity elements on the surface of the silicon wafer into the oxide layer, so that through the subsequent BSG removal process, the oxide layer and borosilicate glass layer with impurity elements can be removed, thereby further removing impurities from the silicon wafer, providing support for further improving the efficiency of subsequent batteries.

[0057] Here are some specific examples:

[0058] Example 1

[0059] S1: Remove the damaged layer on the surface of the silicon wafer, where:

[0060] In order to further reduce the light decay value of crystalline silicon cell products, the silicon wafer is set to be gallium-doped silicon wafer;

[0061] In the process of removing the damaged layer on the surface of the silicon wafer, the damaged layer generally refers to the small damage on the surface of the silicon wafer caused during the cutting process, such as burrs or excessively rough surface defects. After removal, a smoother silicon wafer surface can be obtained;

[0062] The front surface and the back surface of the silicon wafer are corroded by a first corrosive liquid to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein:

[0063] The first etching solution uses NaOH with a concentration of 1.3% and an etching time of 130 seconds. Since the concentration range of the first etching solution is relatively low, it will not affect the thickness of the silicon wafer, that is, the thickness of the silicon wafer will not change.

[0064] S2: performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and further forming a borosilicate glass layer on the surface of the P+ doped layer, wherein;

[0065] In the boron diffusion treatment of the front surface of the silicon wafer, the boron source is boron tribromide or boron trichloride.

[0066] The stages of boron diffusion treatment of the front surface of the silicon wafer include:

[0067] The first heating stage: a boron source is introduced into the boron diffusion device, and then the temperature is raised to a first temperature, the first temperature is 865° C., and the first heating time is 1200 s;

[0068] Deposition stage: keeping the first temperature constant, the boron source is deposited on the front surface of the silicon wafer, and the deposition time is 2100s;

[0069] Second heating stage: after the boron source is deposited, the temperature is raised again to the second temperature, the second temperature is 965°C, and the second heating time is 900s;

[0070] Pushing stage: Keep the second temperature unchanged, and push the boron element into the silicon wafer for 900 seconds;

[0071] The first cooling stage: after the boron element is pushed forward, the temperature is cooled to the third temperature, the third temperature is 870°C, and the third cooling time is 1500s;

[0072] Second cooling stage: after the first cooling stage is over, the temperature is lowered again to the fourth temperature, the fourth temperature is 830° C., and the fourth cooling time is 1800 s.

[0073] During the drive-in phase, the boron element is driven into the silicon wafer to a depth of 1 μm.

[0074] By doping the surface of high-resistivity silicon wafers with boron, the overall impurity concentration of the silicon wafer is increased, and a boron-gallium co-doped state can be formed, which greatly reduces the resistivity of the silicon wafer and increases the current of the battery cell in the subsequent process, only to improve the conversion efficiency of the battery cell.

[0075] S3: placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer;

[0076] After all stages of boron diffusion are completed, the boron diffusion equipment is still kept at a standby temperature of 800°C, and the processed silicon wafer is taken out of the boron diffusion equipment and then placed in an oxidation furnace;

[0077] When the silicon wafer is placed in the oxidation furnace, oxygen is introduced into the oxidation furnace to carry out oxidation and impurity absorption reaction. The oxidation temperature is 800°C and the oxidation time is 75 minutes. After the oxidation is completed, an oxide layer is formed on the surface of the borosilicate glass layer.

[0078] The thickness of the oxide layer is 20 nm.

[0079] S4: remove the oxide layer and the borosilicate glass layer, retain the P+ doped layer, and the pretreatment is completed.

[0080] Removing the oxide layer and borosilicate glass layer is also called the BSG removal process. After the silicon wafer comes out of the oxidation furnace, it gradually cools to room temperature and then the removal work is done.

[0081] The oxide layer and the borosilicate glass layer are etched with a second etching solution, wherein:

[0082] The second etching solution is HF, the concentration of the second etching solution is 50%, the etching time is 25 minutes, and finally the P+ doped layer is retained, that is, only the silicon wafer and the P+ doped layer on the front surface of the silicon wafer, and the pretreatment is completed.

[0083] Example 2

[0084] S1: Remove the damaged layer on the surface of the silicon wafer, where:

[0085] In order to further reduce the light decay value of crystalline silicon cell products, the silicon wafer is set to be gallium-doped silicon wafer;

[0086] In the process of removing the damaged layer on the surface of the silicon wafer, the damaged layer generally refers to the small damage on the surface of the silicon wafer caused during the cutting process, such as burrs or excessively rough surface defects. After removal, a smoother silicon wafer surface can be obtained;

[0087] The front surface and the back surface of the silicon wafer are corroded by a first corrosive liquid to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein:

[0088] The first etching solution uses NaOH with a concentration range of 1.2% and an etching time of 40 seconds. Since the concentration range of the first etching solution is relatively low, it will not affect the thickness of the silicon wafer, that is, the thickness of the silicon wafer will not change.

[0089] S2: performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and further forming a borosilicate glass layer on the surface of the P+ doped layer, wherein;

[0090] In the boron diffusion treatment of the front surface of the silicon wafer, the boron source is boron tribromide or boron trichloride.

[0091] The stages of boron diffusion treatment of the front surface of the silicon wafer include:

[0092] The first heating stage: a boron source is introduced into the boron diffusion device, and then the temperature is raised to a first temperature, the first temperature is 800° C., and the first heating time is 1400 s;

[0093] Deposition stage: keeping the first temperature constant, the boron source is deposited on the front surface of the silicon wafer, and the deposition time is 2300s;

[0094] The second heating stage: after the boron source is deposited, the temperature is raised again to the second temperature, the second temperature is 900°C, and the second heating time is 1100s;

[0095] Pushing stage: Keep the second temperature unchanged, and push the boron element into the silicon wafer for 1100s;

[0096] The first cooling stage: after the boron element is pushed forward, the temperature is cooled to the third temperature, the third temperature is 820°C, and the third cooling time is 1700s;

[0097] Second cooling stage: after the first cooling stage is over, the temperature is lowered again to the fourth temperature, the fourth temperature is 750° C., and the fourth cooling time is 2000 s.

[0098] During the drive-in phase, the boron element is driven into the silicon wafer to a depth of 0.9μm.

[0099] By doping the surface of high-resistivity silicon wafers with boron, the overall impurity concentration of the silicon wafer is increased, and a boron-gallium co-doped state can be formed, which greatly reduces the resistivity of the silicon wafer and increases the current of the battery cell in the subsequent process, only to improve the conversion efficiency of the battery cell.

[0100] S3: placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer;

[0101] After all stages of boron diffusion are completed, the boron diffusion equipment is still kept at a standby temperature of 800°C, and the processed silicon wafer is taken out of the boron diffusion equipment and then placed in an oxidation furnace;

[0102] When the silicon wafer is placed in the oxidation furnace, oxygen is introduced into the oxidation furnace to carry out oxidation and impurity absorption reaction. The oxidation temperature is 700°C and the oxidation time is 90 minutes. After the oxidation is completed, an oxide layer is formed on the surface of the borosilicate glass layer.

[0103] The thickness of the oxide layer is 25 nm.

[0104] S4: remove the oxide layer and the borosilicate glass layer, retain the P+ doped layer, and the pretreatment is completed.

[0105] Removing the oxide layer and borosilicate glass layer is also called the BSG removal process. After the silicon wafer comes out of the oxidation furnace, it gradually cools to room temperature and then the removal work is done.

[0106] The oxide layer and the borosilicate glass layer are etched with a second etching solution, wherein:

[0107] The second etching solution is HF, the concentration range of the second etching solution is 45%, the etching time is 30 minutes, and finally the P+ doped layer is retained, that is, only the silicon wafer and the P+ doped layer on the front surface of the silicon wafer, and the pretreatment is completed.

[0108] Example 3

[0109] S1: Remove the damaged layer on the surface of the silicon wafer, where:

[0110] In order to further reduce the light decay value of crystalline silicon cell products, the silicon wafer is set to be gallium-doped silicon wafer;

[0111] In the process of removing the damaged layer on the surface of the silicon wafer, the damaged layer generally refers to the small damage on the surface of the silicon wafer caused during the cutting process, such as burrs or excessively rough surface defects. After removal, a smoother silicon wafer surface can be obtained;

[0112] The front surface and the back surface of the silicon wafer are corroded by a first corrosive liquid to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein:

[0113] The first etching solution uses NaOH with a concentration range of 1.4% and an etching time of 140s. Since the concentration range of the first etching solution is relatively low, it will not affect the thickness of the silicon wafer, that is, the thickness of the silicon wafer will not change.

[0114] S2: performing boron diffusion treatment on the front surface of the silicon wafer with the damaged layer removed to form a P+ doped layer, and further forming a borosilicate glass layer on the surface of the P+ doped layer, wherein;

[0115] In the boron diffusion treatment of the front surface of the silicon wafer, the boron source is boron tribromide or boron trichloride.

[0116] The stages of boron diffusion treatment of the front surface of the silicon wafer include:

[0117] The first heating stage: a boron source is introduced into the boron diffusion device, and then the temperature is raised to a first temperature, the first temperature is 900° C., and the first heating time is 1000 s;

[0118] Deposition stage: keeping the first temperature constant, the boron source is deposited on the front surface of the silicon wafer, and the deposition time is 1900s;

[0119] The second heating stage: after the boron source is deposited, the temperature is raised again to the second temperature, the second temperature is 1000°C, and the second heating time is 700s;

[0120] Pushing stage: Keep the second temperature unchanged, and push the boron element into the silicon wafer for 700s;

[0121] The first cooling stage: after the boron element is advanced, the temperature is lowered to the third temperature, the third temperature is 850°C, and the third cooling time is 1300s;

[0122] Second cooling stage: after the first cooling stage is over, the temperature is lowered again to the fourth temperature, the fourth temperature is 850° C., and the fourth cooling time is 1600 s.

[0123] During the drive-in phase, the boron element is driven into the silicon wafer to a depth of 1.0 μm.

[0124] By doping the surface of high-resistivity silicon wafers with boron, the overall impurity concentration of the silicon wafer is increased, and a boron-gallium co-doped state can be formed, which greatly reduces the resistivity of the silicon wafer and increases the current of the battery cell in the subsequent process, only to improve the conversion efficiency of the battery cell.

[0125] S3: placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer;

[0126] After all stages of boron diffusion are completed, the boron diffusion equipment is still kept at a standby temperature of 800°C, and the processed silicon wafer is taken out of the boron diffusion equipment and then placed in an oxidation furnace;

[0127] When the silicon wafer is placed in the oxidation furnace, oxygen is introduced into the oxidation furnace to carry out oxidation and impurity absorption reaction. The oxidation temperature is 900°C and the oxidation time is 60 minutes. After the oxidation is completed, an oxide layer is formed on the surface of the borosilicate glass layer.

[0128] The thickness of the oxide layer is 30 nm.

[0129] S4: remove the oxide layer and the borosilicate glass layer, retain the P+ doped layer, and the pretreatment is completed.

[0130] Removing the oxide layer and borosilicate glass layer is also called the BSG removal process. After the silicon wafer comes out of the oxidation furnace, it gradually cools to room temperature and then the removal work is done.

[0131] The oxide layer and the borosilicate glass layer are etched with a second etching solution, wherein:

[0132] The second etching solution is HF, the concentration range of the second etching solution is 55%, the etching time is 20 minutes, and finally the P+ doped layer is retained, that is, only the silicon wafer and the P+ doped layer on the front surface of the silicon wafer, and the pretreatment is completed.

[0133] The embodiments of the present invention are described in detail above, but the contents described are only preferred embodiments of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of the patent coverage of the present invention.

Claims

1. A pretreatment method for improving silicon wafer conversion efficiency, comprising: Removing the damaged layer on the surface of the silicon wafer. In the process of removing the damaged layer on the surface of the silicon wafer, a first etching solution is used to etch the surface of the silicon wafer to remove the damaged layer on the front surface and the back surface of the silicon wafer, wherein the first etching solution is NaOH with a concentration range of 1.2-1.4% and an etching time of 120-140s; The front surface of the silicon wafer from which the damaged layer is removed is subjected to boron diffusion treatment to form a P+ doped layer for increasing the impurity concentration of the silicon wafer, and a borosilicate glass layer is further formed on the surface of the P+ doped layer. The stage of performing boron diffusion treatment on the front surface of the silicon wafer includes: The first heating stage: a boron source is introduced into the boron diffusion device, and then the temperature is raised to a first temperature, wherein the first temperature is 800-900° C. and the first heating time is 1000-1400 s; Deposition stage: keeping the first temperature unchanged, the boron source is deposited on the front surface of the silicon wafer, and the deposition time is 1900-2300s; The second heating stage: after the boron source is deposited, the temperature is raised again to a second temperature, the second temperature is 900-1100° C., and the second heating time is 700-1100 s; Pushing stage: keeping the second temperature unchanged, pushing the boron element into the silicon wafer for 700-1100 seconds; The first cooling stage: after the boron element is advanced, the temperature is lowered to a third temperature, the third temperature is 820-900° C., and the third cooling time is 1300-1700s; Second cooling stage: after the first cooling stage is over, the temperature is lowered again to a fourth temperature of 750-850° C., and the fourth cooling time is 1600-2000 s; Placing the silicon wafer after boron diffusion into an oxidation furnace, introducing oxygen into the oxidation furnace, and forming an oxide layer on the surface of the borosilicate glass layer; The oxide layer and the borosilicate glass layer are removed, and the P+ doped layer is retained, and the pretreatment is completed.

2. A pretreatment method for improving silicon wafer conversion efficiency according to claim 1, characterized in that: The silicon wafer comprises a gallium-doped silicon wafer.

3. A pretreatment method for improving silicon wafer conversion efficiency according to claim 1, characterized in that: In the boron diffusion treatment of the front surface of the silicon wafer, boron tribromide or boron trichloride is used as the boron source, the diffusion temperature is 750-1100° C., and the diffusion time is 8000-9000 s.

4. A pretreatment method for improving silicon wafer conversion efficiency according to claim 3, characterized in that: During the advancement stage, the boron element is advanced to a depth of 0.8-1.2 μm in the silicon wafer.

5. The pretreatment method for improving silicon wafer conversion efficiency according to claim 1, characterized in that: The silicon wafer after boron diffusion is placed in an oxidation furnace, oxygen is introduced into the oxidation furnace, and an oxide layer is formed on the surface of the borosilicate glass layer. The oxidation temperature is 700-900° C. and the oxidation time is 60-90 minutes.

6. A pretreatment method for improving silicon wafer conversion efficiency according to claim 1 or 5, characterized in that: The thickness of the oxide layer is 10-30 nm.

7. A pretreatment method for improving silicon wafer conversion efficiency according to claim 1, characterized in that: In the step of removing the oxide layer and the borosilicate glass layer, the oxide layer and the borosilicate glass layer are corroded by using a second etching solution, wherein: The second etching solution is HF, the concentration range is 45-55%, the etching time is 20-30 minutes, and finally the P+ doped layer is retained, and the pretreatment is completed.

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