Power semiconductor module and power conversion device

Abstract

The power semiconductor module (100) comprises: a semiconductor switch element (1); a gate control pattern (6) connected to a gate electrode of the semiconductor switch element; a source control pattern (7) connected to a source electrode of the semiconductor switch element (1); a capacitor (17) for forming a low-pass filter; a capacitor configuration pattern (18) connected to one end of the capacitor (17); and a wire (19). The other end of the capacitor (17) is connected to the source control pattern (7). The wire (19) electrically connects the capacitor configuration pattern (18) and the gate control pattern (6).

Description

Technical Field

[0001] The present invention relates to a power semiconductor module and a power conversion device. Background Art

[0002] In power semiconductor modules used in power conversion devices such as inverters and converters, gate oscillation and noise may occur due to parasitic capacitance of the elements and parasitic inductance between the elements during switching operations of semiconductor switching elements.

[0003] It is known that gate oscillation can be suppressed by disposing a capacitor between the gate and the source of a semiconductor switching element to form a low-pass filter (hereinafter also simply referred to as a “filter”) (see, for example, Patent Documents 1 and 2).

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2000-243905

[0007] Patent Document 2: Japanese Patent Application Publication No. 2003-125574 Summary of the invention

[0008] By forming the filter as described above, gate oscillation can be suppressed, but on the other hand, the element forming the filter (the capacitor) is arranged in parallel with the input capacitance of the semiconductor switch element, so the input capacitance of the semiconductor switch element increases. Therefore, there is a contradiction that the charging and discharging time of the input capacitance becomes longer during the switching operation of the semiconductor switch element, and the switching speed becomes slower.

[0009] Therefore, it is considered to change the performance of the filter to be formed according to the type, or to design with priority on switching speed without forming a filter. However, if the manufacturing process is different for each module according to the performance of the filter and whether a filter needs to be formed, the process becomes complicated and the manufacturing cost increases.

[0010] The present invention is completed to solve the above-mentioned problems, and its purpose is to provide a power semiconductor module that can easily adjust the filter set to suppress gate oscillation and can also easily switch whether the filter needs to be formed, and a power conversion device equipped with the power semiconductor module.

[0011] The power semiconductor module disclosed in the present invention comprises: a first semiconductor switch element; a gate control pattern connected to a gate electrode of the first semiconductor switch element; a source control pattern connected to a source electrode of the first semiconductor switch element; a filter forming element for forming a low-pass filter; a first filter configuration pattern connected to one end of the filter forming element; and a first wire. The other end of the filter forming element is connected to one of the gate control pattern and the source control pattern. The first wire electrically connects the first filter configuration pattern and the other of the gate control pattern and the source control pattern.

[0012] According to the power semiconductor module and the power conversion device equipped with the power semiconductor module, by forming a low-pass filter with the filter forming element, the gate oscillation generated in the first semiconductor switch element can be suppressed. In addition, according to the power semiconductor module, the formed filter can be easily adjusted by adjusting the length and / or thickness of the first wire. In addition, when the switching speed is prioritized without forming a filter, the filter can be disconnected from the circuit as long as the bonding of the first wire is not performed. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a plan view schematically showing the structure of the power semiconductor module according to the first embodiment.

[0014] Figure 2 This is a cross-sectional view schematically showing a part of the cross section of the power semiconductor module.

[0015] Figure 3 It is a plan view schematically showing the structure of a semiconductor element.

[0016] Figure 4 It is shown Figure 1 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0017] Figure 5 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 1 of Embodiment 1.

[0018] Figure 6 It is shown Figure 5 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0019] Figure 7 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 2 of Embodiment 1.

[0020] Figure 8 It is shown Figure 7 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0021] Fig. 9 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 3 of Embodiment 1.

[0022] Fig.10 It is shown Fig. 9 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0023] Fig.11 : is a graph showing the temperature dependency of the resistance value of an NTC thermistor.

[0024] Fig.12 This is a plan view schematically showing the structure of a power semiconductor module according to the second embodiment.

[0025] Fig.13 It is shown Fig.12 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0026] Fig.14 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 1 of Embodiment 2.

[0027] Fig.15 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 2 of Embodiment 2.

[0028] Fig.16 It is shown Fig.15 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0029] Fig.17 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 3 of Embodiment 2.

[0030] Fig.18 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 4 of Embodiment 2.

[0031] Fig.19 It is shown Fig.18 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0032] Fig. 20 : is a graph showing the temperature dependency of the resistance value of a PTC thermistor.

[0033] Fig.21 : is a circuit diagram showing the electrical structure of a power semiconductor device in a comparative example.

[0034] Fig. 22 : is a circuit diagram showing the electrical structure of a power semiconductor device according to a third embodiment.

[0035] Fig.23 It is shown Fig. 22 Shown is a graph of the temperature dependence of the time constant of an RC circuit comprising a thermistor and a capacitor.

[0036] Fig.24 It is a waveform diagram showing the change of the voltage between the terminals of the capacitor with respect to the change of the voltage between the gate and the source.

[0037] Fig.25 : is a circuit diagram showing the electrical structure of a power semiconductor device according to a modification of the third embodiment.

[0038] Fig.26 : is a waveform diagram showing the change of the voltage between the terminals of the thermistor with respect to the change of the voltage between the gate and the source.

[0039] Fig. 27 1 is an equivalent circuit diagram showing an electrical structure of a power semiconductor module according to a fourth embodiment.

[0040] Fig.28 FIG. 1 is a diagram showing an example of gate voltage and operation waveforms of a switching element constituting a filter.

[0041] Fig.29 FIG. 1 is a plan view schematically showing the structure of a power semiconductor module according to a fourth embodiment.

[0042] Fig.30 This is a block diagram showing the configuration of a power conversion system to which a power conversion device according to the fifth embodiment is applied.

[0043] (Explanation of Reference Numerals)

[0044] 1, 1A, 1B: semiconductor switch element; 2, 2A, 2B: diode; 3, 3A, 3B: gate resistor; 4, 70: drain pattern; 5: source pattern; 6, 76: gate control pattern; 7: source control pattern; 8, 8A, 8B: source wire; 9, 9A, 9B: gate wire; 10, 10A, 10B: source control wire; 11: insulating substrate; 12: base plate; 13: drain terminal; 14: source terminal; 15: gate terminal; 16: source control terminal; 17: capacitor; 18, 31: capacitor configuration pattern; 19, 19A, 19B, 78, 80: wire; 20: thermistor; 23, 25: solder; 24 : Back pattern; 26: Insulating film; 27, 74: Source pad; 28, 72: Gate pad; 32, 33, 36, 38: Configuration pattern; 34: Detection terminal; 35: Thermistor detection terminal; 40: Drive circuit; 42, 50: Temperature detection circuit; 44: Voltage source; 46: Resistor element; 48: Resistance value detection circuit; 60: Switching element for filter formation; 62: External terminal; 100, 100A~100I, 100Z: Power semiconductor module; 110, 110A, 500: Power semiconductor device; Power conversion device 200; Main conversion circuit 201; Control circuit 202; Load 300; Power supply 400. DETAILED DESCRIPTION

[0045] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. A plurality of embodiments are described below, but it has been predetermined from the beginning of the application that the structures described in the embodiments are appropriately combined. In addition, the same reference numerals are added to the same or equivalent parts in the drawings without repeating their descriptions.

[0046] Implementation method 1.

[0047] use Figures 1 to 4 , describing the structure of the power semiconductor module according to the first embodiment. Figure 1 This is a plan view schematically showing the structure of the power semiconductor module according to the first embodiment. Figure 2 It is schematically shown Figure 1 A cross-sectional view of a portion of a cross section of a power semiconductor module shown in FIG. Figure 3 It is schematically shown Figure 1 A top view of the structure of the semiconductor element shown. Figure 4 It is shown Figure 1 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0048] Reference Figures 1 to 3The power semiconductor module 100 includes a semiconductor element D, a drain pattern 4 , a source pattern 5 , a gate control pattern 6 , a source control pattern 7 , a source wire 8 , a gate wire 9 , a source control wire 10 , an insulating substrate 11 , and a base plate 12 .

[0049] The base plate 12 is a metal heat sink that radiates heat in the module to the outside. The insulating substrate 11 is made of ceramic and is provided on the base plate 12. The insulating substrate 11 does not necessarily need to be ceramic, and may include a metal substrate having a resin insulating layer.

[0050] like Figure 2 As shown, on the back side (lower side of the figure) of the insulating substrate 11, the back side pattern 24 is joined by soldering or the like, and the insulating substrate 11 is joined to the upper surface of the base plate 12 by solder 23. On the surface (upper side of the figure) of the insulating substrate 11, various wiring patterns (drain pattern 4, source pattern 5, gate control pattern 6, and source control pattern 7) are joined by soldering or the like. Furthermore, on the drain pattern 4, a semiconductor element D is joined by solder 25. In addition, other joining materials may be used instead of solders 23 and 25.

[0051] See also Figure 4 The semiconductor element D is composed of a semiconductor switch element 1, a diode 2, and a gate resistor 3. The semiconductor switch element 1 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The diode 2 is electrically connected to the semiconductor switch element 1 in anti-parallel. The diode 2 is a body diode (sometimes also called a parasitic diode or an internal diode) formed inside the semiconductor switch element 1. The gate resistor 3 is connected to the gate electrode of the semiconductor switch element 1. The gate resistor 3 is also an internal gate resistor formed inside the semiconductor switch element 1.

[0052] As described above, in this example, the semiconductor switch element 1, the diode 2, and the gate resistor 3 are integrally formed into the semiconductor element D, but the diode 2 may be a diode external to the semiconductor switch element 1, and the gate resistor 3 may be an external gate resistor. In addition, in the above, the semiconductor switch element 1 is assumed to be a MOSFET, but it may also be a bipolar transistor such as an IGBT (Insulated Gate Bipolar Transistor), in which case the semiconductor switch element 1, the diode 2, and the gate resistor 3 are formed by different chips.

[0053] The semiconductor element D includes a wide bandgap semiconductor. The wide bandgap semiconductor is, for example, silicon carbide (SiC), gallium nitride (GaN), or diamond (C). The wide bandgap semiconductor has better voltage resistance than the conventional silicon semiconductor. By including the wide bandgap semiconductor in the semiconductor element D, it is possible to control the same voltage with less than half the thickness compared to the conventional silicon-based semiconductor element. As a result, the chip constituting the semiconductor element D can be reduced. In addition, compared to the conventional silicon-based semiconductor element, the resistance becomes smaller as the thickness becomes thinner, so the loss can be reduced.

[0054] The semiconductor element D is bonded to the drain pattern 4 ( Figure 2 ). For the source pad 27 of the semiconductor element D ( Figure 3 ) is connected to one end of the source wire 8, and the other end of the source wire 8 is connected to the source pattern 5. One end of the source control wire 10 is also connected to the source pad 27, and the other end of the source control wire 10 is connected to the source control pattern 7. The gate pad 28 ( Figure 3 ) is connected to one end of the gate wire 9, and the other end of the gate wire 9 is connected to the gate control pattern 6.

[0055] The drain pattern 4 and the source pattern 5 are connected to the drain terminal 13 and the source terminal 14 ( Figure 4 ) are connected, the gate control pattern 6 and the source control pattern 7 are connected to the gate terminal 15 and the source control terminal 16 ( Figure 4 The drain terminal 13, the source terminal 14, the gate terminal 15, and the source control terminal 16 are exposed to the outside of the power semiconductor module 100 (at Figure 1 (not shown in the figure).

[0056] Furthermore, the power semiconductor module 100 according to the first embodiment further includes a capacitor 17, a capacitor arrangement pattern 18, and a wire 19. The reason why the capacitor 17, the capacitor arrangement pattern 18, and the wire 19 are provided will be described below.

[0057] In the power semiconductor module having the above-described structure, during the switching operation of the semiconductor switching element, unintended oscillation or noise may occur in the gate voltage of the semiconductor switching element.

[0058] For example, in a double pulse switch using an L load (inductor), a large amplitude vibration is sometimes observed in the gate-source voltage of the semiconductor switch element when it is disconnected. This is caused by the parasitic capacitance of the semiconductor switch element and the parasitic inductance of the wiring connected to the semiconductor switch element, and is called gate oscillation. Gate oscillation damages the oxide film of the semiconductor switch element, and in addition to being a cause of degradation and destruction of the element, it also causes radiation noise to the outside of the module, transmission noise to the external circuit, etc. In addition, such a phenomenon also occurs when multiple semiconductor switch elements are connected in parallel.

[0059] As a method of suppressing gate oscillation, there are known methods of increasing gate resistance, arranging a capacitor between the gate and the source, or providing a ferrite core in the gate wiring. Among these methods, the present disclosure focuses on the method of arranging a capacitor between the gate and the source.

[0060] When a capacitor is arranged between the gate and the source, a low-pass filter is formed by the capacitor part, and gate oscillation is suppressed. On the other hand, when such a capacitor is provided, the input capacitance of the semiconductor switch element increases, and the switching speed of the semiconductor switch element slows down. Therefore, it is also conceivable that a design that prioritizes switching speed is desired without forming a filter depending on the type.

[0061] In addition, the performance of the formed filter is not determined only by the capacitance of the capacitor, but the effect of the filter varies according to the surrounding parasitic inductance and the characteristics of the semiconductor switch element. Therefore, when forming the filter, it is necessary to pay attention to the inductance of the surrounding pattern and other aspects to design it. However, when the manufacturing process is different for each module according to the performance of the filter and whether a filter needs to be formed, the process becomes complicated and the manufacturing cost increases.

[0062] Therefore, the power semiconductor module 100 according to the first embodiment includes the capacitor 17 , the capacitor arrangement pattern 18 , and the wire 19 , thereby making it easy to adjust the filter formed using the capacitor 17 and to easily switch whether or not to form the filter.

[0063] Specifically, the capacitor arrangement pattern 18 is arranged close to both the gate control pattern 6 and the source control pattern 7. Figure 1 As shown, the gate control pattern 6 and the source control pattern 7 are on the side of the drain pattern 4 ( Figure 1 The length of the gate control pattern 6 is shorter than that of the source control pattern 7, and a capacitor configuration pattern 18 is configured in the space thus vacated.

[0064] Then, one end of the capacitor 17 is bonded to the capacitor arrangement pattern 18 by solder or the like, and the other end of the capacitor 17 is bonded to the source control pattern 7 . The capacitor arrangement pattern 18 and the gate control pattern 6 are connected by a wire 19 .

[0065] With such a structure, the capacitor 17 is arranged between the gate and the source of the semiconductor switch element 1, and an LC filter (low-pass filter) is formed by the inductance of each pattern and the wire 19 and the capacitance of the capacitor 17. Moreover, by appropriately designing the length and / or thickness of the wire 19, the wiring inductance can be changed to adjust the performance of the LC filter. That is, the performance of the filter formed using the capacitor 17 can be easily adjusted by simply changing (adjusting) the length and / or thickness of the wire 19.

[0066] Furthermore, when a filter is not required in order to prioritize the switching speed of the semiconductor switch element 1, it is sufficient not to perform bonding of the wire 19. This allows the filter (capacitor 17) to be easily disconnected from the circuit.

[0067] In addition, in the above, a circuit composed of a passive element or an active element or a combination thereof that forms a filter with the inductance of each pattern and the wire 19 may be used instead of the capacitor 17 or together with the capacitor 17. For example, a diode having a capacitance component, a MOSFET whose capacitance and resistance can be changed by external control, etc. may be used instead of the capacitor 17.

[0068] Modification 1 of Implementation Example 1.

[0069] In the above-mentioned embodiment 1, the capacitor configuration pattern 18 is arranged on the gate control pattern 6 side of the gate control pattern 6 and the source control pattern 7 arranged in parallel, and the capacitor configuration pattern 18 and the gate control pattern 6 are connected by the wire 19, but the capacitor configuration pattern can also be arranged on the source control pattern 7 side.

[0070] Figure 5 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 1 of Embodiment 1. Figure 6 It is shown Figure 5 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0071] Reference Figure 5 as well as Figure 6 The power semiconductor module 100A is Figure 1 In the structure of the power semiconductor module 100 according to the first embodiment shown, a capacitor arrangement pattern 31 is provided instead of the capacitor arrangement pattern 18 .

[0072] The capacitor placement pattern 31 is also arranged close to both the gate control pattern 6 and the source control pattern 7. In this example, the length of the source control pattern 7 is shorter than that of the gate control pattern 6, and the capacitor placement pattern 31 is arranged in the space left therefrom.

[0073] Then, one end of the capacitor 17 is bonded to the capacitor arrangement pattern 31 by solder or the like, and the other end of the capacitor 17 is bonded to the gate control pattern 6 . The capacitor arrangement pattern 31 and the source control pattern 7 are connected by a wire 19 .

[0074] With such a structure, similarly to the first embodiment, the performance of the filter formed using the capacitor 17 can be easily adjusted by simply changing (adjusting) the length and / or thickness of the wire 19. In addition, when the filter is not required in order to prioritize the switching speed, the filter (capacitor 17) can be easily disconnected from the circuit by not bonding the wire 19.

[0075] Modification 2 of Implementation Example 1.

[0076] The capacitor arrangement pattern may be provided on both the gate control pattern 6 side and the source control pattern 7 side.

[0077] Figure 7 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 2 of Embodiment 1. Figure 8 It is shown Figure 7 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0078] Reference Figure 7 as well as Figure 8 The power semiconductor module 100B is Figure 1 The structure of the power semiconductor module 100 according to the first embodiment shown further includes a capacitor placement pattern 31 , and includes conductive wires 19A and 19B instead of the conductive wire 19 .

[0079] Regarding the capacitor arrangement pattern 31, as in the above-mentioned Modification 1 and Figure 5 Furthermore, one end of the capacitor 17 is joined to the capacitor configuration pattern 18 by solder or the like, and the other end of the capacitor 17 is joined to the capacitor configuration pattern 31. In addition, the capacitor configuration pattern 18 and the gate control pattern 6 are connected by a wire 19A, and the capacitor configuration pattern 31 and the source control pattern 7 are connected by a wire 19B.

[0080] With such a structure, similar to the first embodiment and its variation 1, the performance of the filter formed using the capacitor 17 can be easily adjusted by simply changing (adjusting) the length and / or thickness of the wires 19A and 19B. In addition, when the filter is not required in order to prioritize the switching speed, the filter (capacitor 17) can be easily disconnected from the circuit by not bonding at least one of the wires 19A and 19B.

[0081] Furthermore, according to the second modification, since the two conductive wires 19A and 19B are used, the adjustment range of the inductance of the filter formed using the capacitor 17 can be expanded (increase direction).

[0082] Modification 3 of Implementation Example 1.

[0083] The above structures including the capacitor 17, the capacitor arrangement pattern 18 (31), and the conductors 19 (19A, 19B) are suitable for a power semiconductor module including a plurality of semiconductor elements that operate in parallel. That is, in order to realize a power semiconductor module that performs switching operation with a large current, a plurality of semiconductor elements are mounted in the module and operate in parallel. However, in this case, between adjacent semiconductor elements, the gate control pattern and the like become an amplification path, and the high-frequency part of the gate voltage is amplified mutually, and gate oscillation may occur.

[0084] Therefore, in this modification 3, in a power semiconductor module having a plurality of semiconductor elements operating in parallel, Figure 1 The capacitor 17, the capacitor arrangement pattern 18, and the wire 19 are shown.

[0085] Fig. 9 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 3 of Embodiment 1. Fig.10 It is shown Fig. 9 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0086] Reference Fig. 9 as well as Fig.10 The power semiconductor module 100C is Figure 1 In the structure of the power semiconductor module 100 shown, a plurality of semiconductor elements DA and DB are provided instead of the semiconductor element D. The semiconductor element DB is connected in parallel with the semiconductor element DA. In this example, the power semiconductor module 100C includes two semiconductor elements DA and DB, but the number of semiconductor elements connected in parallel may be three or more.

[0087] Semiconductor device DA includes semiconductor switch device 1A, diode 2A, and gate resistor 3A. Semiconductor device DB includes semiconductor switch device 1B, diode 2B, and gate resistor 3B. The structures of semiconductor devices DA and DB are the same as those of semiconductor device D described above.

[0088] One end of a source wire 8A is connected to the source pad of the semiconductor element DA, and the other end of the source wire 8A is connected to the source pattern 5. One end of a source control wire 10A is also connected to the source pad of the semiconductor element DA, and the other end of the source control wire 10A is connected to the source control pattern 7. One end of a gate wire 9A is connected to the gate pad of the semiconductor element DA, and the other end of the gate wire 9A is connected to the gate control pattern 6.

[0089] One end of a source wire 8B is connected to the source pad of the semiconductor element DB, and the other end of the source wire 8B is connected to the source pattern 5. One end of a source control wire 10B is also connected to the source pad of the semiconductor element DB, and the other end of the source control wire 10B is connected to the source control pattern 7. One end of a gate wire 9B is connected to the gate pad of the semiconductor element DB, and the other end of the gate wire 9B is connected to the gate control pattern 6. With such a structure, the semiconductor elements DA and DB operate in parallel.

[0090] The structures of the capacitor 17, the capacitor arrangement pattern 18, and the conductor 19 are similar to Figure 1 The power semiconductor modules 100 shown are the same.

[0091] According to the third modification, in the power semiconductor module 100C including a plurality of semiconductor devices operating in parallel, a filter is formed using the capacitor 17 , thereby making it possible to effectively suppress gate oscillation occurring in the semiconductor elements DA and DB.

[0092] Moreover, the performance of the filter formed using the capacitor 17 can be easily adjusted by simply changing (adjusting) the length and / or thickness of the wire 19. In addition, when the filter is not required in order to prioritize the switching speed, the filter (capacitor 17) can be easily disconnected from the circuit by not bonding the wire 19.

[0093] In addition, the above describes an example in which semiconductor elements DA and DB are provided instead of semiconductor element D in the structure of the power semiconductor module 100 according to embodiment 1, but in the structure of the power semiconductor module 100A according to variant example 1 or the power semiconductor module 100B according to variant example 2, semiconductor elements DA and DB may also be provided instead of semiconductor element D.

[0094] Implementation method 2.

[0095] In a power semiconductor module, it is also important to monitor the temperature inside the module. In particular, in a power semiconductor module that operates at a large current, there is a possibility that the semiconductor element and / or peripheral components may exceed the allowable temperature, and when the allowable temperature is exceeded, there is a possibility that the element and / or component may deteriorate or fail.

[0096] Regarding the temperature monitoring inside the module, the thermal resistance of the power semiconductor module is sometimes known in advance and the temperature inside the module is estimated based on the input power and the base temperature of the module. However, errors occur in the estimated temperature due to the warping degree of the base plate, the deviation in the thickness of the grease between the cooler and the module, etc., and when the value of the thermal resistance known in advance is different from the actual module, errors also occur in the estimated temperature.

[0097] In order to improve the accuracy of the estimated temperature, a thermistor can be installed inside the power semiconductor module to detect the temperature. The temperature inside the module can be detected by detecting the resistance value of the thermistor that changes with the temperature using a detection circuit.

[0098] Here, it is known empirically that the gate oscillation described in the first embodiment tends to occur easily when the semiconductor element is at a high temperature. Therefore, in the second embodiment, an NTC (Negative Temperature Coefficient) thermistor is provided in the power semiconductor module. The NTC thermistor is connected in series with the capacitor 17 provided to suppress the gate oscillation.

[0099] like Fig.11 As shown, the resistance value of the NTC thermistor is large at low temperatures and small at high temperatures. Therefore, by connecting the NTC thermistor in series with the capacitor 17, the function of the capacitor 17 can be suppressed at low temperatures, and the capacitor 17 can function to suppress gate oscillation at high temperatures.

[0100] In addition, the temperature in the power semiconductor module also affects the switching speed of the semiconductor element. In MOSFET, when the temperature reaches a high temperature, the gate threshold voltage Vth decreases and the turn-on speed becomes faster, so that the current waveform sometimes vibrates. In addition, it is not preferable that the behavior of the semiconductor module changes with temperature, and it is best not to change the switching speed of the semiconductor element with temperature. Therefore, by forming a structure in which the NTC thermistor and the capacitor 17 are connected in series as described above, the capacitor 17 can function at high temperatures and the increase in the switching speed can be suppressed.

[0101] Fig.12 This is a plan view schematically showing the structure of a power semiconductor module according to the second embodiment. Fig.13 It is shown Fig.12An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0102] Reference Fig.12 as well as Fig.13 The power semiconductor module 100D includes a semiconductor element D, a drain pattern 4, a source pattern 5, a gate control pattern 6, a source control pattern 7, a source wire 8, a gate wire 9, a source control wire 10, an insulating substrate 11, and a base plate 12. In addition, the power semiconductor module 100D further includes a capacitor 17, a thermistor 20, and a configuration pattern 32 for configuring the capacitor 17 and the thermistor 20.

[0103] The thermistor 20 is an NTC thermistor. The arrangement pattern 32 is arranged close to both the gate control pattern 6 and the source control pattern 7. In this example, the length of the source control pattern 7 is shorter than the length of the gate control pattern 6, and the arrangement pattern 32 is arranged in the space left therefrom.

[0104] Then, one end of the capacitor 17 and the thermistor 20 is bonded to the arrangement pattern 32 , the other end of the thermistor 20 is bonded to the gate control pattern 6 , and the other end of the capacitor 17 is bonded to the source control pattern 7 by solder or the like.

[0105] The configuration other than the capacitor 17 , the thermistor 20 , and the arrangement pattern 32 is the same as that described in the first embodiment.

[0106] With the above configuration, capacitor 17 and thermistor 20 are arranged in series between the gate and source of semiconductor switch element 1. Thus, gate oscillation can be effectively suppressed by forming an LC filter that suppresses the function of capacitor 17 at low temperatures and enables capacitor 17 to function at high temperatures.

[0107] Furthermore, the capacitor 17 functions at high temperatures, thereby increasing the input capacitance of the semiconductor switch element 1. This can suppress an increase in switching speed at high temperatures, and can suppress a change in behavior of the power semiconductor module 100D due to temperature.

[0108] In addition, in the above description, a circuit composed of passive elements or active elements or a combination of these forming a filter may be used instead of the capacitor 17 or together with the capacitor 17 .

[0109] Modification 1 of Implementation Method 2.

[0110] In the second embodiment, the arrangement pattern 32 is provided on the source control pattern 7 side of the gate control pattern 6 and the source control pattern 7 which are provided in parallel, but the arrangement pattern may be provided on the gate control pattern 6 side.

[0111] Fig.14 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 1 of Embodiment 2.

[0112] Reference Fig.14 The power semiconductor module 100E is Fig.12 The structure of the power semiconductor module 100D shown in the figure includes an arrangement pattern 33 instead of the arrangement pattern 32 .

[0113] The arrangement pattern 33 is also arranged close to both the gate control pattern 6 and the source control pattern 7. In this example, the gate control pattern 6 is shorter than the source control pattern 7, and the arrangement pattern 33 is arranged in the space left therefrom.

[0114] Furthermore, one end of the capacitor 17 and the thermistor 20 is bonded to the arrangement pattern 33 by solder or the like, the other end of the thermistor 20 is bonded to the gate control pattern 6, and the other end of the capacitor 17 is bonded to the source control pattern 7. Fig.13 The circuit of the power semiconductor module 100D according to the second embodiment shown is the same.

[0115] With such a structure, similar to the second embodiment, the function of the capacitor 17 can be suppressed at low temperatures and the capacitor 17 can be made to function at high temperatures to effectively suppress gate oscillation. In addition, the switching speed of the semiconductor switch element 1 can be suppressed from increasing at high temperatures, and the behavior of the power semiconductor module 100E can be suppressed from changing according to temperature.

[0116] Modification 2 of Implementation Method 2.

[0117] In the second embodiment in which thermistor 20 is provided together with capacitor 17 , a lead wire of the filter (capacitor 17 ) can be easily disconnected from the circuit while easily adjusting the performance of the filter formed using capacitor 17 .

[0118] Fig.15 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 2 of Embodiment 2. Fig.16 It is shown Fig.15 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0119] Reference Fig.15 as well as Fig.16 The power semiconductor module 100F is Fig.12 The structure of the power semiconductor module 100D according to the second embodiment shown further includes arrangement patterns 33 and 36 and conductive wires 19A and 19B.

[0120] The arrangement pattern 36 is arranged between the arrangement pattern 32 and the source control pattern 7. The arrangement pattern 33 is as described in the above-mentioned modification examples 1 and Fig.14 Furthermore, one end of the capacitor 17 and the thermistor 20 is bonded to the configuration pattern 32, the other end of the thermistor 20 is bonded to the configuration pattern 33, and the other end of the capacitor 17 is bonded to the configuration pattern 36. Furthermore, the configuration pattern 33 and the gate control pattern 6 are connected by the wire 19A, and the configuration pattern 36 and the source control pattern 7 are connected by the wire 19B.

[0121] According to this modification example 2, in addition to the effects described in the above-mentioned embodiment 2, the performance of the filter formed using the capacitor 17 can be easily adjusted by simply changing (adjusting) the length and / or thickness of the wires 19A and 19B. In addition, when the filter is not required in order to prioritize the switching speed, the filter (capacitor 17) can be easily disconnected from the circuit by not bonding at least one of the wires 19A and 19B. Furthermore, since two wires 19A and 19B are used, the adjustment range (increase direction) of the inductance of the filter formed using the capacitor 17 can be expanded.

[0122] In addition, although two wires 19A and 19B are provided in the above, it is also possible to have a structure that only has any one of the wires 19A and 19B. That is, it is also possible to not have the arrangement pattern 36 and the wire 19B, and to connect the other end of the capacitor 17 to the source control pattern 7. Alternatively, it is also possible to not have the arrangement pattern 33 and the wire 19A, and to connect the other end of the thermistor 20 to the gate control pattern 6.

[0123] Modification 3 of Implementation 2.

[0124] In the above-mentioned modification 2, the additional arrangement pattern 36 is arranged between the arrangement pattern 32 and the source control pattern 7 , but the additional arrangement pattern may be provided between the arrangement pattern 33 and the gate control pattern 6 .

[0125] Fig.17 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 3 of Embodiment 2.

[0126] Reference Fig.17 The power semiconductor module 100G is Fig.15 The structure of the power semiconductor module 100F according to the second modification shown includes an arrangement pattern 38 instead of the arrangement pattern 36 .

[0127] The configuration pattern 38 is arranged between the configuration pattern 33 and the gate control pattern 6. Furthermore, one end of the capacitor 17 and the thermistor 20 is bonded to the configuration pattern 33, the other end of the thermistor 20 is bonded to the configuration pattern 38, and the other end of the capacitor 17 is bonded to the configuration pattern 32. Furthermore, the configuration pattern 38 and the gate control pattern 6 are connected by the wire 19A, and the configuration pattern 32 and the source control pattern 7 are connected by the wire 19B.

[0128] In addition, an equivalent circuit showing the electrical structure of the power semiconductor module 100G is shown. Fig.16 The circuit of the power semiconductor module 100F according to the second modification of the second embodiment shown is the same.

[0129] This modification example 3 can also provide the same effects as those of the above-mentioned modification example 2.

[0130] In addition, in the above, two wires 19A and 19B are provided, but it is also possible to have a structure that only has any one of the wires 19A and 19B. That is, it is also possible to not have the arrangement pattern 32 and the wire 19B, and to connect the other end of the capacitor 17 to the source control pattern 7. Alternatively, it is also possible to not have the arrangement pattern 38 and the wire 19A, and to connect the other end of the thermistor 20 to the gate control pattern 6.

[0131] Modification 4 of Implementation Method 2.

[0132] In this modification 4, a capacitor 17 and a thermistor 20 are provided in a power semiconductor module including a plurality of semiconductor elements that operate in parallel.

[0133] Fig.18 This is a plan view schematically showing the structure of a power semiconductor module according to Modification 4 of Embodiment 2. Fig.19 It is shown Fig.18 An equivalent circuit diagram of the electrical structure of the power semiconductor module shown.

[0134] Reference Fig.18 as well as Fig.19 The power semiconductor module 100H is Fig.12 The structure of the power semiconductor module 100D shown in FIG. 1 includes a plurality of semiconductor elements DA and DB instead of the semiconductor element D. Regarding the semiconductor elements DA and DB, as shown in FIG. Fig. 9 Instructions in .

[0135] According to the fourth modification, also in the power semiconductor module 100H including a plurality of semiconductor devices operating in parallel, the same effects as those of the second embodiment can be obtained.

[0136] In addition, in the above, an example is described in which the semiconductor element D is replaced by the semiconductor elements DA and DB in the structure of the power semiconductor module 100D according to embodiment 2, but the semiconductor elements DA and DB may be replaced by the semiconductor element D in the structure of the power semiconductor module 100E according to variant example 1, the power semiconductor module 100F according to variant example 2, or the power semiconductor module 100G according to variant example 3.

[0137] In the above-mentioned Embodiment 2 and its Modifications 1 to 4, the semiconductor element D (or the semiconductor elements DA and DB) is assumed to include a wide bandgap semiconductor (e.g., SiC-MOSFET). Moreover, it is known empirically that gate oscillation is likely to occur in a wide bandgap semiconductor when the element is at a high temperature, so an NTC thermistor whose resistance value decreases at a high temperature is used as the thermistor 20 to form a filter using the capacitor 17 at a high temperature.

[0138] On the other hand, when a semiconductor element is formed of a conventional silicon semiconductor (e.g., Si-IGBT), gate oscillation may occur when the element is at a low temperature. Therefore, gate oscillation is more significant at a low temperature than at a high temperature. If it is desired to suppress gate oscillation occurring at a low temperature, it is also possible to Fig. 20 As shown, a PTC (Positive Temperature Coefficient) thermistor having a small resistance value at a low temperature and a large resistance value at a high temperature is used as the thermistor 20 .

[0139] Implementation method 3.

[0140] In the third embodiment, a circuit configuration for detecting the temperature of thermistor 20 is shown in the power semiconductor module according to the second embodiment and its respective modifications in which capacitor 17 and thermistor 20 are provided.

[0141] Fig.21 is a circuit diagram showing the electrical structure of a power semiconductor device in a comparative example. Fig.21 This is a diagram showing an example of a conventional temperature detection circuit as a comparative example regarding a temperature detection circuit that detects the temperature of the thermistor 20 .

[0142] Reference Fig.21 The power semiconductor device 500 includes a power semiconductor module 100Z, a drive circuit 40, and a temperature detection circuit 42. The power semiconductor module 100Z includes a semiconductor switch element 1, a diode 2, a gate resistor 3, a capacitor 17, and a thermistor 20.

[0143] The capacitor 17 is electrically connected between the gate electrode and the source electrode of the semiconductor switch element 1. The drive circuit 40 is connected to the gate terminal 15 and the source control terminal 16 of the power semiconductor module 100Z. The gate terminal 15 is electrically connected to the gate control pattern (not shown) of the power semiconductor module 100Z, and the source control terminal 16 is electrically connected to the source control pattern (not shown) of the power semiconductor module 100Z. In addition, the drive circuit 40 generates a gate voltage for driving the semiconductor switch element 1.

[0144] One end of the thermistor 20 is connected to the source electrode of the semiconductor switch element 1, and the other end is connected to the thermistor detection terminal 35. Furthermore, the temperature detection circuit 42 is connected to the source control terminal 16 and the thermistor detection terminal 35.

[0145] The temperature detection circuit 42 includes a voltage source 44, a resistor element 46, and a resistance value detection circuit 48. The voltage source 44 generates a constant voltage. The resistance value detection circuit 48 calculates the resistance value of the thermistor 20 by detecting the voltage generated in the resistor element 46. Specifically, the voltage of the resistor element 46 changes according to the resistance value of the thermistor 20, so by obtaining the relationship between the voltage of the resistor element 46 and the resistance value of the thermistor 20 in advance, the resistance value of the thermistor 20 can be obtained from the detection voltage of the resistance value detection circuit 48. In addition, it is possible to use Fig.11 The resistance value of thermistor 20 is converted into temperature based on the relationship shown in FIG.

[0146] However, the temperature detection circuit 42 requires a dedicated voltage source 44 in order to detect the resistance value of the thermistor 20. Therefore, in this third embodiment, a temperature detection circuit that does not use such a voltage source is shown.

[0147] Fig. 22 2 is a circuit diagram showing an electrical structure of a power semiconductor device according to Embodiment 3. Fig. 22 The power semiconductor device 110 includes a power semiconductor module 100D ( Fig.12 , Fig.13 ), a driving circuit 40, and a temperature detection circuit 50.

[0148] The power semiconductor module 100D is as described in the above-mentioned second embodiment ( Fig.12 , Fig.13 ). In addition, the drive circuit 40 is also as in Fig.21 Instructions in .

[0149] The temperature detection circuit 50 is connected to the detection terminal 34 and the source control terminal 16 of the power semiconductor module 100D. The detection terminal 34 is connected to the connection node between the thermistor 20 and the capacitor 17, and more specifically, to the detection terminal 34. Fig.12The arrangement shown is electrically connected by pattern 32. The source control terminal 16 is electrically connected to the Fig.12 The temperature detection circuit 50 detects the voltage between the terminals of the capacitor 17 and detects the temperature of the thermistor 20 based on the change of the detected voltage. The temperature detection method of the thermistor 20 using the temperature detection circuit 50 will be described in detail below.

[0150] Fig.23 It is shown Fig. 22 The temperature dependence of the time constant of the RC circuit including thermistor 20 and capacitor 17 is shown. Fig.23 As the temperature rises, the time constant of the RC circuit including thermistor 20 and capacitor 17 decreases, and as the temperature falls, the time constant of the RC circuit increases.

[0151] Fig.24 2 is a waveform diagram showing the change in the voltage Vc between the terminals of the capacitor 17 relative to the change in the gate-source voltage Vgs. Fig.24 , assuming that the gate-source voltage Vgs (hereinafter referred to as “gate voltage Vgs”) is a simple rectangular wave, at time t1, the gate voltage Vgs rises.

[0152] In the voltage Vc between the terminals of the capacitor 17 (hereinafter referred to as "voltage Vc"), the solid line k1 represents the change of the voltage Vc at a relatively low temperature, and the dotted line k2 represents the change of the voltage Vc at a relatively high temperature. Fig.23 As shown, at low temperatures, the time constant of the RC circuit becomes larger, so at time t3, the voltage Vc reaches the predetermined set voltage, but at high temperatures, the time constant of the RC circuit becomes smaller, so the voltage Vc reaches the set voltage at time t2 earlier than time t3.

[0153] Therefore, the relationship between the time from when the gate voltage Vgs changes to when the voltage Vc reaches the set voltage and the temperature is obtained in advance. Using this relationship, the temperature detection circuit 50 detects the temperature of the thermistor 20 by detecting the time from the moment t1 when the gate voltage Vgs changes to the moment when the voltage Vc reaches the predetermined set voltage.

[0154] According to this embodiment 3, there is no need to use Fig.21 The dedicated voltage source 44 is shown to detect the temperature of the thermistor 20 .

[0155] In the above description, the temperature detection circuit 50 is connected to the detection terminal 34 and the source control terminal 16 of the power semiconductor module 100D, but may be connected to the source terminal 14 instead of the source control terminal 16. With such a configuration, the temperature detection circuit 50 can also detect the temperature of the thermistor 20.

[0156] In the above description, the drive circuit 40 and the temperature detection circuit 50 are provided independently of the power semiconductor module 100D, but the drive circuit 40 and / or the temperature detection circuit 50 may be built in the power semiconductor module 100D.

[0157] In the above description, the power semiconductor device 110 includes the power semiconductor module 100D according to the second embodiment, but may include any of the power semiconductor modules 100E to 100H according to Modifications 1 to 4 of the second embodiment instead of the power semiconductor module 100D.

[0158] A variation of implementation example 3.

[0159] In the third embodiment, the temperature of the thermistor 20 is detected by detecting the voltage Vc of the capacitor 17 using the temperature detection circuit 50 . Alternatively, the temperature of the thermistor 20 may be detected by detecting the voltage of the thermistor 20 using the temperature detection circuit 50 .

[0160] Fig.25 2 is a circuit diagram showing an electrical structure of a power semiconductor device according to a modification of the third embodiment. Fig.25 In the power semiconductor device 110A, Fig. 22 In the structure of the power semiconductor device 110 according to the third embodiment shown, the temperature detection circuit 50 is connected to the gate terminal 15 and the detection terminal 34 of the power semiconductor module 100D.

[0161] The temperature detection circuit 50 detects the voltage between the terminals of the thermistor 20, and detects the temperature of the thermistor 20 based on the change in the detected voltage. Hereinafter, a method of detecting the temperature of the thermistor 20 using the temperature detection circuit 50 in this modification will be described.

[0162] Fig.26 2 is a waveform diagram showing the change in the voltage Vt between the terminals of the thermistor 20 relative to the change in the voltage Vgs between the gate and the source. Fig.26 , assuming that the gate voltage Vgs is a simple rectangular wave, at time t11, the gate voltage Vgs rises.

[0163] In the voltage Vt between the terminals of the thermistor 20 (hereinafter referred to as "voltage Vt"), the solid line k3 represents the change of the voltage Vt at a relatively low temperature, and the dotted line k4 represents the change of the voltage Vt at a relatively high temperature. Fig.23 As shown, at low temperatures, the time constant of the RC circuit becomes larger, so at time t13, the voltage Vc reaches the predetermined set voltage, but at high temperatures, the time constant of the RC circuit becomes smaller, so the voltage Vt reaches the set voltage at time t12 earlier than time t13.

[0164] Therefore, the relationship between the time from when the gate voltage Vgs changes to when the voltage Vt reaches the set voltage and the temperature is obtained in advance. Using this relationship, the temperature detection circuit 50 detects the temperature of the thermistor 20 by detecting the time from the moment t11 ​​when the gate voltage Vgs changes to the moment when the voltage Vt reaches the predetermined set voltage.

[0165] According to the variation of the third embodiment, there is no need to use Fig.21 The dedicated voltage source 44 is shown to detect the temperature of the thermistor 20 .

[0166] In this modification, the power semiconductor device 110A also includes the power semiconductor module 100D according to the second embodiment. However, the power semiconductor module 100D may be replaced with any of the power semiconductor modules 100E to 100H according to modifications 1 to 4 of the second embodiment.

[0167] Implementation method 4.

[0168] As described above, it is known empirically that gate oscillation tends to occur easily when the semiconductor element is at a high temperature. However, in reality, it does not always occur at high temperatures, but tends to occur when the semiconductor switch element 1 is switching, and sometimes occurs when switching at low temperatures. On the other hand, as described above, the filter for suppressing gate oscillation formed by using the capacitor 17 has a violation of reducing the switching speed, so it is not desirable to always make the filter function.

[0169] Therefore, this fourth embodiment shows a configuration of a filter that can function only at a timing when gate oscillation is likely to occur during the switching operation of the semiconductor switch element 1 .

[0170] Fig. 27 2 is an equivalent circuit diagram showing the electrical structure of a power semiconductor module according to Embodiment 4. Fig. 27 The power semiconductor module 100I includes a semiconductor switching element 1, a diode 2, a gate resistor 3, a capacitor 17, and a filter-configuring switching element 60.

[0171] The filter-forming switching element 60 (hereinafter sometimes simply referred to as "switching element 60") is connected in series with the capacitor 17, and the capacitor 17 and the switching element 60 connected in series are electrically connected between the gate electrode and the source electrode of the semiconductor switching element 1. The switching element 60 is driven by a driving circuit (not shown) connected to the external terminal 62.

[0172] When the switch element 60 is off, the switch element 60 has a high resistance, so the filter formed by the capacitor 17 does not function. On the other hand, when the switch element 60 is on, the resistance value of the switch element 60 decreases, so the filter formed by the capacitor 17 functions.

[0173] Fig.28 2 is a diagram showing an example of the gate voltage Vgs and the operation waveform of the filter configuration switching element 60. Fig.28 In this example, at time t21, the gate voltage Vgs starts to rise, and gate oscillation occurs immediately after time t22 when the rise of the gate voltage Vgs ends. In addition, at time t24, the gate voltage Vgs starts to decrease, and gate oscillation also occurs immediately after time t25 when the mirror period ends.

[0174] Therefore, in this example, the switching element 60 is turned on during the period from time t22 to time t23 (the first period) when gate oscillation is likely to occur when the semiconductor switching element 1 is turned on, and during the period from time t25 to time t26 (the second period) when gate oscillation is likely to occur when the semiconductor switching element 1 is turned off, and the switching element 60 is turned off during the other periods.

[0175] Thus, the capacitance of the filter formed by the capacitor 17 becomes large and the filter functions only during the period from time t22 to time t23 when gate oscillation is likely to occur, and the period from time t25 to time t26. On the other hand, during the other periods, the capacitance of the filter is small and the filter does not function because the switch element 60 is cut off.

[0176] In this way, by adjusting the on-period of the filter-constituting switching element 60 in accordance with the occurrence timing of the gate oscillation, the gate oscillation can be effectively suppressed. In addition, the occurrence timing of the gate oscillation can be obtained by a previous evaluation experiment or the like.

[0177] Fig.29 FIG. 2 is a plan view schematically showing the structure of a power semiconductor module according to Embodiment 4. Fig.29 The power semiconductor module 100I includes a semiconductor element D, a drain pattern 4, a source pattern 5, a gate control pattern 6, a source control pattern 7, a source wire 8, a gate wire 9, a source control wire 10, an insulating substrate 11, and a base plate 12. In addition, the power semiconductor module 100I further includes a capacitor 17, a switching element 60, a drain pattern 70, a gate control pattern 76, and wires 78 and 80.

[0178] The capacitor 17 is bonded to the drain pattern 70 at one end by solder or the like, and is bonded to the gate control pattern 6 at the other end. The switching element 60 is bonded to the drain pattern 70 at a drain pad (not shown) by solder or the like.

[0179] Furthermore, the gate pad 72 of the switching element 60 is connected to the gate control pattern 76 via a wire 78 , and the source pad 74 of the switching element 60 is connected to the source control pattern 76 via a wire 80 .

[0180] In addition, other structures and Figure 1 The same as the power semiconductor module 100 shown in FIG. Fig. 27 The electrical circuit shown.

[0181] As described above, according to the fourth embodiment, the gate oscillation can be effectively suppressed by adjusting the on-period of the filter configuring switching element 60 in accordance with the timing of occurrence of the gate oscillation.

[0182] Implementation method 5.

[0183] Embodiment 5 is an example in which the power semiconductor module according to the above embodiments and their modifications is applied to a power conversion device. The present invention is not limited to a specific power conversion device, but the following describes a case in which the present invention is applied to a three-phase inverter as Embodiment 5.

[0184] Fig.30 This is a block diagram showing the configuration of a power conversion system to which a power conversion device according to the fifth embodiment is applied.

[0185] Reference Fig.30 The power conversion system includes a power conversion device 200, a load 300, and a power supply 400. The power supply 400 is a DC power supply, and supplies DC power to the power conversion device 200. The power supply 400 can be composed of various power supplies, for example, it can include a DC system, a solar cell, a storage battery, etc., and can also include a rectifier circuit connected to an AC system, an AC / DC converter, etc. In addition, the power supply 400 can also be composed of a DC / DC converter that converts the DC power output from the DC system into a predetermined power.

[0186] The power conversion device 200 is a three-phase inverter connected between the power source 400 and the load 300, and converts the DC power supplied from the power source 400 into AC power, and supplies the AC power to the load 300. The power conversion device 200 is configured to include: a main conversion circuit 201 that converts the DC power into AC power and outputs it; and a control circuit 202 that outputs a control signal to control the main conversion circuit 201 to the main conversion circuit 201.

[0187] Load 300 is a three-phase motor driven by AC power supplied from power converter 200. Load 300 is not limited to a specific use, and is a motor mounted on various electrical devices, such as a motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioners.

[0188] The power conversion device 200 will be described in detail below. The main conversion circuit 201 is configured to include a switching element and a diode (not shown), and the DC power supplied from the power supply 400 is converted into AC power by switching the switching element, and is supplied to the load 300. There are various examples of the specific circuit structure of the main conversion circuit 201, but the main conversion circuit 201 in the fifth embodiment is a two-level three-phase full-bridge circuit, which can include 6 switching elements and 6 diodes connected in anti-parallel to each switching element. Each switching element and each diode of the main conversion circuit 201 includes a power semiconductor module 100 (100A to 100I) corresponding to any one of the above-mentioned embodiments and their respective modified examples. Every two switching elements of the 6 switching elements are connected in series to form upper and lower branches, and each upper and lower branch constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. In addition, the output terminals of each upper and lower branch, that is, the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0189] In addition, the main conversion circuit 201 is provided with a driving circuit (not shown) for driving each switching element, and as described in Embodiment 3, the driving circuit can be provided independently of the power semiconductor module 100 (100A to 100I), or can be built into the power semiconductor module 100 (100A to 100I). The driving circuit generates a driving signal for driving the switching element of the main conversion circuit 201, and provides it to the control electrode of the switching element of the main conversion circuit 201. Specifically, according to the control signal from the control circuit 202 described later, a driving signal for turning the switching element into a conductive state and a driving signal for turning the switching element into an off state are output to the control electrode of each switching element. When the switching element is maintained in a conductive state, the driving signal is a voltage signal (conduction signal) above the threshold voltage of the switching element, and when the switching element is maintained in an off state, the driving signal is a voltage signal (off signal) below the threshold voltage of the switching element.

[0190] The control circuit 202 controls the switch elements of the main conversion circuit 201 in such a manner that the desired power is supplied to the load 300. Specifically, the control circuit 202 calculates the time (on-time) that each switch element of the main conversion circuit 201 should be in the on state according to the power to be supplied to the load 300. For example, the control circuit 202 can control the main conversion circuit 201 by PWM (Pulse width modulation) control that modulates the on time of the switch element according to the voltage to be output. In addition, the control circuit 202 outputs a control instruction (control signal) to the drive circuit of the main conversion circuit 201 in such a manner that an on signal is output to the switch element that should be in the on state and an off signal is output to the switch element that should be in the off state at each time point. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switch element in accordance with the control signal.

[0191] In the power conversion device according to the fifth embodiment, power semiconductor modules 100 (100A to 100I) according to the above-mentioned embodiments and their variations are used as switching elements and diodes of the main conversion circuit 201, so the same effect as these power semiconductor modules 100 (100A to 100I) can be achieved.

[0192] In addition, in the above, an example of applying the present invention to a 2-level three-phase inverter is described, but the present invention is not limited to this and can be applied to various power conversion devices. In the present embodiment, a 2-level power conversion device is used, but a 3-level or multi-level power conversion device can also be used. When supplying power to a single-phase load, the present invention can also be applied to a single-phase inverter. In addition, when supplying power to a DC load, the present invention can also be applied to a DC / DC converter or an AC / DC converter.

[0193] In addition, the application of the power conversion device of the present invention is not limited to the case where the above-mentioned load is an electric motor. For example, it can be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0194] In addition, in the above-mentioned embodiments and their variations, the semiconductor element D (DA, DB) is assumed to include a wide bandgap semiconductor, but the application scope of the present invention is not limited to power semiconductor modules and power conversion devices in which the semiconductor element includes a wide bandgap semiconductor, but also includes power semiconductor modules and power conversion devices composed of conventional silicon-based semiconductor elements.

[0195] The embodiments disclosed this time are also intended to be implemented in appropriate combinations within the scope of technical non-contradiction. Moreover, the embodiments disclosed this time should be considered to be illustrative in all aspects and not restrictive. The scope of the present invention is not indicated by the description of the above-mentioned embodiments, but by the claims, and is intended to include all changes within the meaning and scope equivalent to the claims.

Claims

1. A semiconductor module for electric power, comprising: a first semiconductor switching element; a gate control pattern connected to a gate electrode of the first semiconductor switch element; a source control pattern connected to a source electrode of the first semiconductor switch element; A filter forming element for forming a low-pass filter; and a first filter arrangement pattern to which one end of the filter forming element is connected, The other end of the filter-forming element is connected to one of the gate control pattern and the source control pattern.

2. The power semiconductor module according to claim 1, wherein: further comprising at least one second semiconductor switch element provided in parallel with the first semiconductor switch element, The gate electrode of the second semiconductor switch element is connected to the gate control pattern. A source electrode of the second semiconductor switch element is connected to the source control pattern.

3. The power semiconductor module according to claim 1 or 2, wherein: The power semiconductor module further includes a first conductive wire that electrically connects the other of the gate control pattern and the source control pattern and the first filter placement pattern.

4. The power semiconductor module according to claim 3, wherein: The one of the gate control pattern and the source control pattern comprises: a pattern to which the gate electrode or the source electrode is connected; and The second filter arrangement pattern is connected to the other end of the filter forming element. The power semiconductor module further includes a second conductive wire electrically connecting the second filter placement pattern and the pattern.

5. The power semiconductor module according to claim 1, wherein: A thermistor connected in series with the filter forming element is further provided between the gate control pattern and the source control pattern.

6. A semiconductor module for electric power, comprising: a first semiconductor switching element; a gate control pattern connected to a gate electrode of the first semiconductor switch element; a source control pattern connected to a source electrode of the first semiconductor switch element; A filter forming element for forming a low-pass filter; a thermistor connected in series with the filter forming element; and a configuration pattern to which one end of the filter forming element and one end of the thermistor are connected, The other end of the filter forming element is connected to one of the gate control pattern and the source control pattern. The other end of the thermistor is connected to the other of the gate control pattern and the source control pattern.

7. The power semiconductor module according to claim 6, wherein: further comprising at least one second semiconductor switch element provided in parallel with the first semiconductor switch element, The gate electrode of the second semiconductor switch element is connected to the gate control pattern. A source electrode of the second semiconductor switch element is connected to the source control pattern.

8. The power semiconductor module according to any one of claims 5 to 7, wherein: A temperature detection device is further provided. The temperature detection device is connected between the terminals of the filter-forming element and detects the temperature of the thermistor based on a change in the voltage between the terminals of the filter-forming element.

9. The power semiconductor module according to any one of claims 5 to 7, wherein: A temperature detection device is further provided. The temperature detection device is connected between the terminals of the thermistor and detects the temperature of the thermistor based on a change in the voltage between the terminals of the thermistor.

10. The power semiconductor module according to any one of claims 5 to 7, wherein: The thermistor is an NTC thermistor.

11. A semiconductor module for electric power, comprising: a first semiconductor switching element; a gate control pattern connected to a gate electrode of the first semiconductor switch element; a source control pattern connected to a source electrode of the first semiconductor switch element; A filter forming element for forming a low-pass filter; and a second semiconductor switch element connected in series with the filter forming element; The second semiconductor switch element is configured to be turned on for a first period when the first semiconductor switch element is turned on.

12. The power semiconductor module according to claim 11, wherein: The second semiconductor switch element is further configured to be turned on for a second period when the first semiconductor switch element is turned off.

13. The power semiconductor module according to any one of claims 1, 2, 4 to 7, 11, and 12, wherein: The filter-forming element is a capacitor.

14. The power semiconductor module according to any one of claims 1, 2, 4 to 7, 11, and 12, wherein: The first semiconductor switch element includes a wide bandgap semiconductor.

15. The power semiconductor module according to claim 14, wherein: The wide bandgap semiconductor is any material selected from silicon carbide, gallium nitride and diamond.

16. A power conversion device comprising: A main conversion circuit, comprising the power semiconductor module according to any one of claims 1 to 15; and The control circuit is configured to generate a control signal for controlling the main conversion circuit and output the control signal to the main conversion circuit.

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