A preparation method of a composite substrate, the composite substrate, and an electronic component

Abstract

The present application provides a method for preparing a composite substrate, a composite substrate, and an electronic component. The method for preparing the composite substrate includes: first preparing a first polysilicon thin film layer on a substrate, and then obtaining a polysilicon seed layer by first annealing to further grow the grains of the first polysilicon thin film layer. Then, continue to prepare a second polysilicon thin film layer on the polysilicon seed layer to improve the influence of the substrate layer on the grains caused by low lattice matching degree, improve the lattice matching degree, reduce the difference in lattice size between the first polysilicon thin film layer and the second polysilicon thin film layer, and improve the resistance uniformity of the polysilicon layer. At the same time, by performing a second annealing treatment on the second polysilicon thin film layer, the degree of reconstruction of polysilicon grains in the subsequent high-temperature process stage can be suppressed, the difference in polysilicon lattice size can be reduced, and a polysilicon layer with large and uniformly distributed grain sizes near the substrate layer and the insulating layer can be obtained.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and particularly to a method for preparing a composite substrate, a composite substrate, and an electronic component. Background Art

[0002] In recent years, a thin film structure material applied on an insulator has attracted increasing attention in the industrial community. This material meets various requirements of electronic components and has become increasingly important in the semiconductor industry. The thin film structure material sequentially includes an active layer, an insulating layer, and a substrate layer. Among them, the active layer and the insulating layer are the main functional layers, which realize the propagation of signals such as light, electricity, and sound. This thin film structure material applied on an insulator exhibits good application performance in devices such as CPU chips, memories, amplifiers, filters, and modulators.

[0003] When an insulator is in direct contact with a semiconductor material, a surface parasitic conductance effect (PSC) will be generated in the substrate layer, and this effect will reduce the effective resistivity of the substrate. To improve the effective resistivity, a trap layer rich in carrier traps is currently often introduced between the insulating layer and the substrate layer to suppress PSC. In the currently more mature solutions, a polysilicon layer is introduced into the insulating layer and the substrate layer to suppress PSC.

[0004] PolycrystalSilicon is composed of many small silicon grains with different crystal orientations. Some grain boundaries between the crystals contain many stacking faults, dislocations, and defects. Polycrystalline silicon is usually manufactured by chemical vapor deposition (CVD, chemical vapor deposition). The polysilicon layer prepared by the prior art has too small grains growing near the substrate interface due to the mismatch with the substrate lattice. The polysilicon grains prepared in a certain period of time are larger, and the uniformity of the polysilicon grains is poor. And in the subsequent high-temperature process, the above polysilicon layer will undergo a large degree of grain reconstruction, which further leads to poor uniformity of the polysilicon layer grains and low surface flatness, and cannot meet the application requirements. Therefore, how to eliminate the abnormal growth problem of polysilicon at the substrate interface and prepare a polysilicon layer with high grain uniformity and high surface roughness on the substrate has become a difficult problem that needs to be solved urgently by those skilled in the art. Summary of the Invention

[0005] This application provides a method for preparing a composite substrate, a composite substrate, and an electronic component to solve the problem of abnormal growth of polysilicon at the substrate interface in the prior art and the problem of preparing a polysilicon layer with low grain uniformity and low surface roughness on the substrate.

[0006] On the one hand, this application provides a method for preparing a composite substrate, including the following steps:

[0007] At a first process temperature, a first polysilicon thin film layer is prepared on a support substrate;

[0008] The obtained first polysilicon thin film layer is subjected to a first annealing treatment to obtain a polysilicon seed layer;

[0009] At the first process temperature, a second polysilicon thin film layer is prepared on the polysilicon seed layer to obtain a composite substrate; wherein, the temperature of the first annealing treatment is higher than the first process temperature.

[0010] Optionally, the thickness of the first polysilicon thin film layer is 1 - 30 nm, and the polysilicon grains of the polysilicon seed layer are larger than those of the first polysilicon thin film layer.

[0011] Optionally, after preparing the second polysilicon thin film layer, a second annealing treatment is further included, and the temperature of the second annealing treatment is higher than the first process temperature.

[0012] Optionally, the first process temperature is 600 - 700 °C, and the temperature ranges of the first annealing treatment and the second annealing treatment are 700 - 900 °C.

[0013] Optionally, before preparing the first polysilicon thin film layer, a high-temperature pretreatment is further included: performing a high-temperature pretreatment on the support substrate, wherein the temperature of the high-temperature pretreatment is 1100 - 1300 °C.

[0014] Optionally, after preparing the second polysilicon thin film layer, it further includes:

[0015] Preparing an insulating layer on the second polysilicon thin film layer; the insulating layer is one of silicon dioxide, silicon oxynitride, and silicon nitride.

[0016] Optionally, preparing the insulating layer on the second polysilicon thin film layer includes:

[0017] At a second process temperature, the second polysilicon thin film layer is oxidized to obtain an insulating layer, and the second process temperature is 900 - 1000 °C; wherein, the insulating layer is a silicon dioxide layer partially oxidized from the second polysilicon thin film layer; the unoxidized second polysilicon thin film layer and the seed layer form a polysilicon layer.

[0018] Optionally, after preparing the insulating layer, it further includes: preparing an active layer on the insulating layer to obtain a composite substrate.

[0019] Optionally, the active layer includes one or more of lithium niobate, lithium tantalate, ceramics, lithium tetraborate, quartz, potassium titanyl phosphate, rubidium titanyl phosphate, silicon, and gallium arsenide.

[0020] Second aspect, the present application provides a composite substrate, which is prepared by the method as described above, and the composite substrate includes a substrate, a polysilicon layer, an insulating layer, and an active layer.

[0021] Third aspect, the present application further provides an electronic component, and the electronic component includes the above-mentioned composite substrate.

[0022] The preparation method of a composite substrate provided by the present application is as follows: first, a first polysilicon thin film layer is prepared on the substrate, and then the grains of the first polysilicon thin film layer are further grown by a first annealing to obtain a polysilicon seed layer. A second polysilicon thin film layer is continuously prepared on the polysilicon seed layer to improve the influence of the substrate layer on the grains caused by low lattice matching degree, improve the lattice matching degree, reduce the difference in lattice size between the first polysilicon thin film layer and the second polysilicon thin film layer, and improve the resistance uniformity of the polysilicon layer. At the same time, by performing a second annealing treatment on the second polysilicon thin film layer, the degree of reconstruction of polysilicon grains in the subsequent high-temperature process stage can be suppressed, the difference in polysilicon lattice size can be reduced, and a polysilicon layer with large and uniformly distributed grain sizes near the substrate layer and the insulating layer can be obtained, and the roughness of the interface between the polysilicon layer and the insulating layer (silicon dioxide layer) is lower, improving the service performance of the composite substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without creative efforts.

[0024] Figure 1 It is a schematic diagram of a preparation method of a composite substrate provided by the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] The embodiments will be described in detail below, and the examples are shown in the drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following examples do not represent all embodiments consistent with the present application. They are only examples of systems and methods consistent with some aspects of the present application described in detail in the claims.

[0026] The PSC effect will cause the effective resistivity of the substrate near the interface to be significantly reduced by more than one order of magnitude, which will have an adverse impact on the final performance of the components prepared from the thin film structural materials based on this insulator substrate, and limit the ability of the substrate to meet the performance requirements of the next generation. To solve this problem, in the current mature technology, a polysilicon layer is introduced into the insulating layer and the substrate layer to suppress PSC

[0027] The polycrystalline silicon layer prepared by the prior art has small grains that start to grow near the substrate interface due to the lattice mismatch with the substrate. The polycrystalline silicon grains prepared in a certain period of time are larger, and the uniformity of the polycrystalline silicon grains is poor. And in the subsequent high-temperature process, the above polycrystalline silicon layer will undergo a large degree of grain reconstruction, which further leads to poor grain uniformity and low surface flatness of the polycrystalline silicon layer, and cannot meet the application requirements. To solve the above technical problems, the present application proposes a method for preparing a composite substrate. The polycrystalline silicon layer prepared by the present application has small differences in grain size, high grain uniformity, and high surface flatness.

[0028] See Figure 1 , which is a schematic diagram of a method for preparing a composite substrate provided by the present application.

[0029] On the one hand, the present application provides a method for preparing a composite substrate, including the following steps:

[0030] Prepare a support substrate 110. The support substrate 110 can be made of materials such as lithium niobate, lithium tantalate, sapphire, silicon, quartz, or silicon carbide. The present application does not limit this.

[0031] At the first process temperature, prepare a first polycrystalline silicon thin film layer 121 on the support substrate 110;

[0032] Perform a first annealing treatment on the obtained first polycrystalline silicon thin film layer 121 to obtain a polycrystalline silicon seed layer 122;

[0033] At the first process temperature, prepare a second polycrystalline silicon thin film layer 123 on the polycrystalline silicon seed layer 122 to obtain a composite substrate; wherein, the temperature of the first annealing treatment is higher than the first process temperature.

[0034] In practical applications, the thickness of the first polycrystalline silicon thin film layer 121 is 1 - 30 nm, the thickness of the polycrystalline silicon seed layer 122 is 1 - 30 nm, and the polycrystalline silicon grains of the polycrystalline silicon seed layer are larger than those of the first polycrystalline silicon thin film layer.

[0035] From Figure 1 it can be seen that 110 is the support substrate. At the first process temperature, the first polycrystalline silicon thin film layer 121 is prepared, and then the first polycrystalline silicon thin film layer 121 is subjected to the first annealing treatment to obtain the polycrystalline silicon seed layer 122; at the first process temperature, the second polycrystalline silicon thin film layer 123 is prepared on the polycrystalline silicon seed layer 122. Among them, the thickness of the second polycrystalline silicon thin film layer can be 300 nm - 5000 nm, preferably 500 nm - 2000 nm, and for example, it can be 500 nm, 600 nm, 800 nm, 900 nm, 1000 nm, 1500 nm, etc.

[0036] Specifically, after preparing the second polysilicon thin film layer, a second annealing treatment is further included, and the temperature of the second annealing treatment is higher than the first process temperature.

[0037] In practical applications, the purpose of the second annealing treatment is to improve the grain quality of the polysilicon layer, release the stress of the polysilicon layer, reduce the influence of stress on the composite substrate, and make the polysilicon layer more uniform.

[0038] In practical applications, the purpose of the first annealing treatment is to further grow the grains of the first polysilicon thin film layer to obtain a polysilicon seed layer for preparing the second polysilicon thin film layer. After the first annealing treatment, the lattice matching degree can be improved, the difference in lattice size between the first polysilicon thin film layer and the second polysilicon thin film layer can be reduced, and the resistance uniformity of the polysilicon layer can be improved.

[0039] Specifically, the first process temperature is 600 - 700 °C, and the temperature ranges of the first annealing treatment and the second annealing treatment are 700 - 900 °C.

[0040] Specifically, before preparing the first polysilicon thin film layer, it further includes: performing a high-temperature pretreatment on the support substrate, where the temperature of the high-temperature pretreatment is 1100 - 1300 °C.

[0041] In practical applications, performing a high-temperature pretreatment on the support substrate is to reduce the influence of the substrate on the grain growth of the first polysilicon thin film layer and provide an environment conducive to polysilicon growth.

[0042] Specifically, the material of the support substrate can be silicon, sapphire, quartz, silicon carbide, etc., and the support substrate plays a supporting role.

[0043] Specifically, after preparing the second polysilicon thin film layer, it further includes:

[0044] Preparing an insulating layer on the second polysilicon thin film layer; the insulating layer is one of silicon dioxide, silicon oxynitride, and silicon nitride.

[0045] In practical applications, the insulating layer can be prepared by a deposition method or an oxidation method, and the material of the insulating layer can be one of silicon dioxide, silicon oxynitride, and silicon nitride.

[0046] Specifically, preparing the insulating layer on the second polysilicon thin film layer includes:

[0047] At the second process temperature, the second polysilicon thin film layer is oxidized to obtain an insulating layer, and the second process temperature is 900 - 1000 °C; wherein, the insulating layer is a silicon dioxide layer formed by partially oxidizing the second polysilicon thin film layer; the unoxidized second polysilicon thin film layer and the polysilicon seed layer form a polysilicon layer. Among them, the silicon dioxide layer has a low refractive index and a large acoustic impedance, which can effectively prevent the signal in the active layer from leaking to the support substrate; there are a certain density of lattice defects in the polysilicon layer, which can capture the carriers existing between the insulating layer and the support substrate 110, avoiding the carrier aggregation at the interface between the insulating layer and the support substrate, and reducing the loss of the composite substrate.

[0048] Based on the overall design of the composite substrate and the functions of the insulating layer and the polysilicon layer, the thickness of the insulating layer can be 100 nm to 3000 nm, for example, it can be 200 nm, 300 nm, 500 nm, 600 nm, 800 nm, 1000 nm, 1500 nm, 2000 nm, etc. The thickness of the polysilicon thin film layer can be 300 nm to 5000 nm, preferably 500 nm to 2000 nm, for example, it can be 500 nm, 600 nm, 800 nm, 1000 nm, 1500 nm, etc. In practical applications, the prepared second polysilicon thin film layer is oxidized at the second process temperature, see Figure 1 , a part of the second polysilicon thin film layer 123 is oxidized to form the silicon dioxide layer insulating layer 130, and the unoxidized second polysilicon thin film layer 123 and the polysilicon seed layer 122 form a polysilicon layer 140.

[0049] In practical applications, a deposition method can be used to prepare the insulating layer. The insulating layer can prevent the signal in the active layer from leaking to the support substrate. In order to better confine the signal in the active layer, the insulating layer can be made of a material with a low refractive index or a large acoustic impedance, such as silicon dioxide, silicon nitride, silicon oxynitride, tantalum pentoxide, etc. At this time, the polysilicon layer is composed of the polysilicon seed layer and the second polysilicon thin film layer, and the thickness of the polysilicon layer can be 300 nm to 5000 nm, preferably 500 nm to 2000 nm, for example, it can be 500 nm, 600 nm, 800 nm, 1000 nm, 1500 nm, etc.

[0050] The method of using the deposition method to prepare the insulating layer is not limited, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), magnetron sputtering, etc.

[0051] Specifically, after the insulating layer is prepared, it further includes: preparing an active layer on the insulating layer to obtain a composite substrate.

[0052] Specifically, the active layer includes one or more of lithium niobate, lithium tantalate, ceramics, lithium tetraborate, quartz, potassium titanyl phosphate, rubidium titanyl phosphate, silicon, and gallium arsenide.

[0053] In a second aspect, the present application provides a composite substrate, which is prepared by the method as described above. The composite substrate includes a substrate, a polysilicon layer, an insulating layer, and an active layer. Among them, the thickness of the active layer can be 50 nm to 3000 nm, for example, it can be 300 nm, 500 nm, 600 nm, 800 nm, 900 nm, 1000 nm, 1500 nm, 2000 nm, etc.

[0054] In practical applications, the preparation method of the active layer can be to prepare the active layer by using ion implantation and bonding separation methods, or to prepare the active layer by using direct bonding and grinding and polishing methods.

[0055] Preparing the active layer by using ion implantation and bonding methods:

[0056] Using the ion implantation method, an active layer, a separation layer, and a residual layer are formed in the active matrix.

[0057] The ion implantation surface of the following active matrix is the bonding surface, that is, the surface where the active layer is formed after ion implantation.

[0058] In this embodiment, the active matrix refers to a base material with a certain thickness for obtaining the active layer. The active matrix can be materials such as lithium niobate, lithium tantalate, ceramics, lithium tetraborate, quartz, potassium titanyl phosphate, rubidium titanyl phosphate, silicon, and gallium arsenide. The present application does not limit this. Ion implantation can be performed from one surface of the active matrix into the interior of the active matrix, so as to form an active layer, an ion implantation layer, and a residual layer on the active matrix. The present application embodiment does not particularly limit the ion implantation method, and any ion implantation method in the prior art can be used. The implanted ions can be ions that can generate gas through heat treatment, for example: hydrogen ions or helium ions. When injecting hydrogen ions, the injection dose can be 3×10 16 ions / cm 2 -8×10 16 ions / cm 2 , and the injection energy can be 120 KeV - 400 KeV; when injecting helium ions, the injection dose can be 1×10 16 ions / cm 2 -1×10 17 ions / cm 2, the injected energy can be 50 KeV - 1000 KeV. In the embodiments of the present application, the thickness of the active layer can be adjusted by adjusting the ion implantation depth. Specifically, the greater the ion implantation depth, the greater the thickness of the prepared active layer; on the contrary, the smaller the ion implantation depth, the smaller the thickness of the prepared active layer.

[0059] The present application does not particularly limit the bonding method between the active substrate and the processed composite substrate (SiO2 / polycrystalline silicon / Si). Any bonding method between the active substrate and the processed composite substrate (SiO2 / polycrystalline silicon / Si) in the prior art can be adopted. For example, the bonding surface of the active substrate is surface-activated, the surface of the SiO2 layer in the composite substrate (SiO2 / polycrystalline silicon / Si) is also surface-activated, and then the two activated surfaces are bonded to obtain a bonded body.

[0060] Specifically, the silicon dioxide surface of the composite substrate and the active layer surface of the active substrate are cleaned, and the active layer of the cleaned active substrate and the silicon dioxide layer of the composite substrate are bonded by plasma bonding to form a bonded body; then the bonded body is placed in a heating device and kept warm at a high temperature until the residue layer is separated from the bonded body to form a composite substrate with an active layer.

[0061] Specifically, the bonded body is heat-treated. The temperature of the heat treatment can be 100°C - 300°C, and the holding time is 3 h (1 minute - 48 hours). This step can increase the bonding force to be greater than 10 MPa, and can repair the damage to the active layer caused by ion implantation, making the obtained active layer close to the properties of the active substrate. During the heat treatment process, bubbles are formed in the separation layer. For example, H ions form hydrogen gas, He ions form helium gas, etc. As the heat treatment progresses, the bubbles in the separation layer are connected into a piece, and finally the separation layer cracks, separating the residue layer from the active layer, so that the residue layer is peeled off from the bonded body, and an active layer is formed on the top surface of the processed composite substrate (SiO2 / polycrystalline silicon / Si). Then the active layer is polished and thinned to 50 - 3000 nm to obtain a composite substrate with an active layer.

[0062] In the third aspect, the present application also provides an electronic component, and the electronic component includes the above-mentioned composite substrate.

[0063] The electronic component provided by the present application can be applied in the field of filters.

[0064] Next, the effects of the composite substrate prepared by the present application are evaluated in combination with specific implementation cases.

[0065] In the embodiments of the present application, the time ranges for the first annealing and the second annealing are 30 min - 10 h. Since the grain size is affected by the annealing temperature and annealing time, the time and temperature can be selected according to the required grain size. Generally, an inert gas, such as nitrogen, is selected as the annealing atmosphere.

[0066] Example 1

[0067] Step 1: Prepare a 6-inch silicon wafer with a thickness of 0.675 mm after cleaning. At 600 °C (the first process temperature), deposit a first polysilicon thin film layer with a thickness of 10 nm on the silicon wafer by low-pressure chemical vapor deposition (LPCVD).

[0068] Step 2: Perform the first annealing treatment on the prepared first polysilicon thin film layer at 850 °C for 3 h. The grains of the annealed first polysilicon thin film layer grow to form a polysilicon seed layer.

[0069] Step 3: Deposit an 800-nm second silicon thin film layer on the polysilicon seed layer at 600 °C by low-pressure chemical vapor deposition (LPCVD) to obtain a composite substrate.

[0070] Example 2

[0071] Step 1: Prepare a 6-inch silicon wafer with a thickness of 0.675 mm after cleaning. At a first process temperature of 600 °C, deposit a first polysilicon thin film layer with a thickness of 10 nm on the silicon wafer by low-pressure chemical vapor deposition (LPCVD).

[0072] Step 2: Perform the first annealing treatment on the prepared first polysilicon thin film layer at 850 °C for 3 h; the grains of the annealed first polysilicon thin film layer grow to form a polysilicon seed layer.

[0073] Step 3: At a second process temperature of 600 °C, deposit an 800-nm second silicon thin film layer on the polysilicon seed layer by low-pressure chemical vapor deposition (LPCVD).

[0074] Step 4: Perform the second annealing treatment on the prepared second silicon thin film layer at 800 °C to obtain a composite substrate.

[0075] Example 3

[0076] Step 1: Prepare a 6-inch silicon wafer with a thickness of 0.675 mm after cleaning, and perform high-temperature pretreatment on the silicon wafer at 1100 °C.

[0077] Step 2: At a first process temperature of 650 °C, deposit a first polysilicon thin film layer with a thickness of 20 nm on the silicon wafer after high-temperature annealing treatment by low-pressure chemical vapor deposition (LPCVD).

[0078] Step 3: Anneal the prepared first polysilicon thin film layer at 850 °C for 5 h. The first polysilicon grains after the first annealing grow, forming a polysilicon seed layer.

[0079] Step 4: Deposit an 800-nm second silicon thin film layer on the prepared polysilicon seed layer by low-pressure chemical vapor deposition (LPCVD) at a second process temperature of 600 °C to obtain a composite substrate.

[0080] Example 4

[0081] Step 1: Prepare a cleaned 6-inch silicon wafer with a thickness of 0.675 mm. Deposit a 10-nm first polysilicon thin film layer on the silicon wafer by low-pressure chemical vapor deposition (LPCVD) at a first process temperature of 600 °C.

[0082] Step 2: Anneal the prepared first polysilicon thin film layer at 850 °C for 3 h. The first polysilicon grains after the first annealing start to grow, forming a polysilicon seed layer.

[0083] Step 3: Deposit a 1000-nm second silicon thin film layer on the prepared seed layer by low-pressure chemical vapor deposition (LPCVD) at a second process temperature of 600 °C, and clean the surface of the second polysilicon thin film layer.

[0084] Step 4: Prepare a silicon dioxide layer on the prepared second polysilicon thin film layer by deposition; perform planarization treatment on the surface of the silicon dioxide layer, and clean the surface of the planarized silicon dioxide.

[0085] Step 5: Prepare a lithium niobate functional thin film layer on the obtained silicon dioxide layer to obtain the required composite substrate.

[0086] Example 5

[0087] Step 1: Prepare a cleaned 6-inch silicon wafer, and perform a high-temperature pre-annealing treatment on the silicon wafer at 1200 °C.

[0088] Step 2: Deposit a 5-nm first polysilicon thin film layer on the silicon wafer by low-pressure chemical vapor deposition (LPCVD) at a first process temperature of 650 °C.

[0089] Step 2: Anneal the prepared first polysilicon thin film layer at 750 °C for 5 h. The first polysilicon grains after the first annealing start to grow, forming a polysilicon seed layer.

[0090] Step 3: Deposit an 800-nm-thick second crystalline silicon thin film layer on the prepared seed layer by low-pressure chemical vapor deposition (LPCVD) at a second process temperature of 650 °C;

[0091] Step 4: Anneal the prepared second crystalline silicon thin film layer at 750 °C for the second time, and clean the surface of the second polycrystalline silicon thin film layer.

[0092] Step 5: Subject the prepared second polycrystalline silicon thin film layer to high-temperature oxidation treatment at 950 °C, where a part of the second polycrystalline silicon thin film layer is oxidized to form a silicon dioxide layer, and the unoxidized second polycrystalline silicon thin film layer and the first polycrystalline silicon thin film layer form a polycrystalline silicon layer; planarize the surface of the silicon dioxide layer, and clean the planarized silicon dioxide surface;

[0093] Step 6: Prepare a lithium niobate functional thin film layer on the obtained silicon dioxide layer to obtain the required composite substrate.

[0094] At high temperatures, smaller polycrystalline silicon grains are prone to significant grain reconstruction, which in turn affects the grain uniformity of the polycrystalline silicon layer and the flatness of the surface of the polycrystalline silicon layer. In this embodiment, by preparing a polycrystalline silicon seed layer, the problem of small grains in the polycrystalline silicon layer at the interface caused by lattice mismatch, and thus the large grain difference in the polycrystalline silicon layer, is improved. The roughness of the interface between the polycrystalline silicon layer and the insulating layer prepared in this embodiment is less than 10 nm, and the thickness deviation of the insulating layer is less than 60 nm. From the above data, it can be found that the insulating layer (silicon dioxide layer) has high uniformity. Since the grain uniformity of the polycrystalline silicon layer affects the uniformity of the oxidation rate of polycrystalline silicon to form silicon dioxide; and the uniformity of the oxidation rate of silicon dioxide affects the flatness of the interface between the polycrystalline silicon layer and the silicon dioxide layer and the thickness uniformity of the polycrystalline silicon layer and the silicon dioxide layer. Therefore, it can be reversely proved that the polycrystalline silicon layer prepared in this embodiment has high grain uniformity.

[0095] A method for preparing a composite substrate provided by the present application includes the following steps: at a first process temperature, prepare a first polycrystalline silicon thin film layer on a support substrate; perform a first annealing treatment on the obtained first polycrystalline silicon thin film layer to obtain a polycrystalline silicon seed layer; at the first process temperature, prepare a second polycrystalline silicon thin film layer on the polycrystalline silicon seed layer to obtain a composite substrate; wherein, the temperature of the first annealing treatment is higher than the first process temperature.

[0096] By first preparing a first polysilicon thin film layer on a substrate, and then obtaining a polysilicon seed layer by further growing the grains of the first polysilicon thin film layer through a first annealing, a second polysilicon thin film layer is continuously prepared on the polysilicon seed layer, which improves the influence of the substrate layer on the grains caused by low lattice matching degree, increases the lattice matching degree, reduces the difference in lattice size between the first polysilicon thin film layer and the second polysilicon thin film layer, and improves the resistance uniformity of the polysilicon layer. At the same time, by performing a second annealing treatment on the second polysilicon thin film layer, the degree of reconstruction of polysilicon grains in the subsequent high-temperature process stage can be suppressed, the difference in polysilicon lattice size can be reduced, a polysilicon layer with large and uniformly distributed grain sizes near the substrate layer and the insulating layer can be obtained, and the roughness of the interface between the polysilicon layer and the insulating layer (silicon dioxide layer) is lower, improving the performance of the composite substrate.

Claims

1. A method for preparing a composite substrate, characterized in that, Including the following steps: At a first process temperature, a first polysilicon thin film layer is prepared on a support substrate; The obtained first polysilicon thin film layer is subjected to a first annealing treatment to obtain a polysilicon seed layer; At the first process temperature, a second polysilicon thin film layer is prepared on the polysilicon seed layer; An insulating layer is prepared on the second polysilicon thin film layer, and an active layer is prepared on the insulating layer to obtain a composite substrate; Wherein, the temperature of the first annealing treatment is higher than the first process temperature; Wherein, the insulating layer is a silicon dioxide layer obtained by partially oxidizing the second polysilicon thin film layer; the unoxidized second polysilicon thin film layer and the seed layer form a polysilicon layer.

2. The method for preparing a composite substrate according to claim 1, wherein The thickness of the first polysilicon thin film layer is 1-30 nm, and the polysilicon grains of the polysilicon seed layer are larger than those of the first polysilicon thin film layer.

3. The preparation method of the composite substrate according to claim 1, wherein, After preparing the second polysilicon thin film layer, it further includes performing a second annealing treatment on the second polysilicon thin film layer, and the temperature of the second annealing treatment is higher than the first process temperature.

4. The method for preparing a composite substrate according to claim 3, wherein The first process temperature is 600-700 °C, and the temperature ranges of the first annealing treatment and the second annealing treatment are 700-900 °C.

5. The method for preparing a composite substrate according to claim 1, wherein Before preparing the first polysilicon thin film layer, it further includes: performing a high-temperature pretreatment on the support substrate, wherein the temperature of the high-temperature pretreatment is 1100-1300 °C.

6. The preparation method of the composite substrate according to claim 1, characterized in that, The preparing the insulating layer on the second polysilicon thin film layer includes: At a second process temperature, the second polysilicon thin film layer is oxidized to obtain an insulating layer, and the second process temperature is 900-1000 °C.

7. A composite substrate, characterized in that, The composite substrate is prepared by the method according to claim 1, and the composite substrate includes a substrate, a polysilicon layer, an insulating layer, and an active layer.

8. An electronic component, characterized in that, The electronic component includes the composite substrate according to claim 7.

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