A method for manufacturing a magnetic random access memory

Abstract

The application provides a preparation method of a magnetic random memory, comprising the following steps: forming a substrate layer; forming a buffer layer on the substrate layer; forming a magnetic free layer on the buffer layer, wherein the magnetic free layer comprises a first compound, the first compound comprises Cr elements and S elements, and the crystal structure of the first compound is a zinc blende structure; forming a tunneling insulation layer and a ferromagnetic layer on the magnetic free layer, so that the tunneling insulation layer is arranged between the magnetic free layer and the ferromagnetic layer to form a heterojunction structure; and forming a pinning layer on the ferromagnetic layer to fix the magnetization direction of the ferromagnetic layer. The application can be compatible with the existing process and does not need a magnetic random memory with a large current to flip the magnetic moment.

Description

Technical Field

[0001] This application relates to the field of memory chip technology, specifically to a method for fabricating magnetic random access memory, memory chips, and electronic devices. Background Technology

[0002] With the rapid development of the information society, people have increasingly higher requirements for information processing speed and storage. The existing static and dynamic random access memories (RAMs) are, foreseeably, unable to meet the demands of high-speed computing. Therefore, the development and application of new memory devices has become a research trend in both academia and industry. As a type of non-volatile memory device, magnetic random access memory (MRAM) is currently a highly promising technology to replace traditional RAMs and is compatible with Complementary Metal Oxide Semiconductor (CMOS) processes.

[0003] In related technologies, spin-orbit-moment (SMT) magnetic random access memory (RAM) generates spin current by flipping the magnetic moments of the free layer, leading to a change in magnetoresistance. Data is written and read by controlling this change in magnetoresistance. Since SMT utilizes the spin-orbit torque (STT) effect to change the direction of the free layer magnetization, a very high current density is required. Therefore, this technology requires a large current to flip the magnetic moments of the free layer, resulting in excessive power consumption and shortened memory lifespan. In other related technologies, ferromagnetic materials provide spin-polarized charge carriers. To reduce power consumption, ferromagnetic materials are used as the free layer. However, this typically requires thicker ferromagnetic materials, and these materials are difficult to integrate with existing processes. For example, directly growing ferromagnetic materials on semiconductors requires annealing at 360°C to allow the metal to epitaxially crystallize at the interface. However, the crystallization rate is difficult to control during annealing, often resulting in the destruction of the desired epitaxial crystals, which is detrimental to device integration.

[0004] Therefore, designing a magnetic random access memory that is compatible with existing processes and does not require a large current flipping magnetic moment is an urgent need for realizing non-volatile memory. Summary of the Invention

[0005] This application provides a magnetic random access memory (MRRAM) that is compatible with existing processes and does not require a large current flipping magnetic moment, as well as its fabrication method, memory chip, and electronic device.

[0006] In a first aspect, an embodiment of this application provides a magnetic random access memory (MRM), comprising a substrate layer and a buffer layer, a magnetic free layer, a tunneling insulating layer, a ferromagnetic layer, and a pinning layer disposed on the substrate layer. The buffer layer is disposed between the substrate layer and the magnetic free layer to improve the epitaxial crystal quality of the magnetic free layer. The magnetic free layer comprises a first compound, which includes Cr and S elements, and the crystal structure of the first compound is a zincblende type structure. The tunneling insulating layer is disposed between the magnetic free layer and the ferromagnetic layer to form a heterojunction structure. The pinning layer is disposed on the ferromagnetic layer to fix the magnetization direction of the ferromagnetic layer.

[0007] In one possible implementation, the buffer layer includes at least one of a zinc selenide layer and a zinc sulfide layer, wherein the thickness of the zinc selenide layer is less than or equal to 60 nm.

[0008] In one possible implementation, the first compound comprises Mn 1-x Cr x S, where x takes the value of 0 to 1, and the thickness of the magnetic free layer is less than or equal to 50 nm.

[0009] In one possible implementation, the ferromagnetic layer comprises a second compound containing Cr and S elements, and the crystal structure of the second compound is a zincblende type structure.

[0010] In one possible implementation, the second compound comprises Mn 1-x Cr x S, where x takes the value of 0 to 1, and the thickness of the ferromagnetic layer is less than or equal to 50 nm.

[0011] In one possible implementation, the tunneling insulation layer comprises a zinc selenide layer having a thickness of 1–5 nm.

[0012] In one possible implementation, the substrate layer comprises a gallium arsenide layer.

[0013] In one possible implementation, the pinning layer includes at least one of an antiferromagnetic material layer, a topological insulator layer, or a Weyl semiconductor layer.

[0014] Secondly, embodiments of this application provide a method for preparing a magnetic random access memory, comprising:

[0015] Molded substrate layer;

[0016] A buffer layer was formed on the substrate using chemical vapor deposition.

[0017] A magnetic free layer is formed on the buffer layer, the magnetic free layer comprising a first compound comprising Cr and S elements, the crystal structure of the first compound being a zincblende type structure;

[0018] A tunneling insulating layer and a ferromagnetic layer are formed on the magnetic free layer, with the tunneling insulating layer disposed between the magnetic free layer and the ferromagnetic layer to form a heterojunction structure;

[0019] A pinning layer is formed on the ferromagnetic layer to fix the magnetization direction of the ferromagnetic layer.

[0020] In one possible implementation, the substrate layer is a gallium arsenide layer; after the substrate layer is formed, the following steps are included:

[0021] A corrosive solution is prepared, comprising sulfuric acid, hydrogen peroxide, and water in a volume ratio of 1:1:1.

[0022] The substrate layer is placed in the etching solution and heated to a first temperature to remove surface oxides, and then cooled to a second temperature, wherein the first temperature is 600°C and the second temperature is 270°C.

[0023] The method of forming a buffer layer on the substrate using chemical vapor deposition includes:

[0024] A zinc selenide layer is grown on the substrate at the second temperature using chemical vapor deposition to form a buffer layer, wherein the thickness of the buffer layer is less than or equal to 60 nm.

[0025] The process of forming a magnetic free layer on the buffer layer includes:

[0026] Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the buffer layer. 1-x Cr x An S-layer is formed to create a magnetic free layer, wherein the value of x is 0 to 1, and the thickness of the magnetic free layer is less than or equal to 50 nm;

[0027] The process of forming a tunneling insulating layer and a ferromagnetic layer on the magnetic free layer includes:

[0028] A zinc selenide layer is grown on the magnetic free layer at the second temperature to form a tunneling insulating layer, wherein the thickness of the tunneling insulating layer is 1 to 5 nm.

[0029] Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer. 1-x Cr xAn S layer is formed to create a ferromagnetic layer, wherein the value of x is 0 to 1, and the thickness of the ferromagnetic layer is less than or equal to 50 nm.

[0030] The process of forming a pinning layer on the ferromagnetic layer includes:

[0031] A pinning layer is grown on the ferromagnetic layer using magnetron sputtering, wherein the pinning layer is made of at least one of an antiferromagnetic material, a topological insulator, or a Weyl semiconductor.

[0032] In one possible implementation, the step of using zinc sulfide and compounds containing chromium and manganese as raw materials, and controlling the temperature between 780°C and 840°C to form a Mn1-xCrxS layer on the tunneling insulation layer to form a ferromagnetic layer includes:

[0033] Chromium dioxide, manganese sulfide, and zinc sulfide are mixed in a mass ratio of 3:1:3 to form raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer. 1-x Cr x The S layer is used to form a ferromagnetic layer.

[0034] In one possible implementation, after forming the buffer layer on the substrate using chemical vapor deposition, the method further includes: performing a surface smoothing treatment on the buffer layer.

[0035] Thirdly, this application provides a memory chip, including the aforementioned magnetic random access memory.

[0036] Fourthly, this application provides an electronic device including the aforementioned memory chip.

[0037] This embodiment of the application forms a buffer layer on the substrate and a magnetic free layer on the buffer layer. Compared with directly generating the magnetic free layer on the substrate, the growth process of the magnetic free layer in this embodiment is compatible with existing processes, and the crystallization speed of the magnetic free layer is easier to control, which is conducive to growing the desired epitaxial crystals. This solves the problem of the difficulty in growing ferromagnetic materials. At the same time, the magnetic free layer includes CrS series compounds with a zincblende structure. The zincblende structure of the CrS series compounds can provide more spin-polarized charge carriers. Since the magnetic free layer can provide more spin-polarized charge carriers, it is not necessary to drive the magnetization direction of the magnetic free layer to reverse with a large current, thereby reducing energy consumption and increasing service life. Attached Figure Description

[0038] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a schematic diagram of the structure of a magnetic random access memory provided in an embodiment of this application;

[0040] Figure 2 yes Figure 1 A schematic diagram of the membrane structure of the provided magnetic tunnel junction unit;

[0041] Figure 3 yes Figure 2 A schematic diagram of the structure of the magnetic tunnel junction unit integrated array in the provided magnetic random access memory;

[0042] Figure 4 yes Figure 3 A partial structural diagram of the provided magnetic random access memory;

[0043] Figure 5 This is a flowchart of a method for preparing a magnetic random access memory provided in an embodiment of this application. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The embodiments listed in this application can be appropriately combined with each other.

[0045] In related technologies, spin-orbit-moment (SMT) magnetic random access memory (RAM) generates spin current by reversing the magnetic moments of the free layer, leading to a change in magnetoresistance. Since SMT utilizes the spin-orbit torque (STT) effect to change the direction of free layer magnetization, a very high current density is required. Therefore, this technology requires a large current to reverse the magnetic moments of the free layer, resulting in excessive power consumption and shortened memory lifespan. In other related technologies, ferromagnetic materials can provide spin-polarized charge carriers. To reduce memory power consumption, researchers use ferromagnetic materials as the free layer. However, this usually requires introducing relatively thick ferromagnetic materials, and ferromagnetic materials are difficult to integrate with existing processes. For example, directly growing ferromagnetic materials on semiconductors requires annealing at 360°C to allow the metal to epitaxially crystallize at the interface. However, the crystallization rate is difficult to control during annealing, often resulting in the destruction of the desired epitaxial crystals, which is detrimental to device integration.

[0046] Based on the above problems, this application provides a magnetic random access memory that is compatible with existing processes and does not require a large current flip magnetic moment, as well as its fabrication method, memory chip, and electronic device.

[0047] Please see Figure 1 This application provides a magnetic random access memory 100, which includes a plurality of magnetic tunnel junction units 200 arranged in an array. At least one magnetic tunnel junction unit 200 includes a substrate layer 1 and a buffer layer 2, a magnetic free layer 3, a tunneling insulating layer 4, a ferromagnetic layer 5, and a pinning layer 6 disposed on the substrate layer 1.

[0048] Please see Figure 2 The buffer layer 2 is disposed between the substrate layer 1 and the magnetic free layer 3 to improve the epitaxial crystallization quality of the magnetic free layer 3. Specifically, the substrate layer 1 is a semiconductor layer. Assuming that directly growing the magnetic free layer 3 on the semiconductor substrate layer 1 requires an annealing process at 360°C to allow the metal to epitaxially crystallize at the interface, the crystallization rate is difficult to control during annealing, often leading to the destruction of the desired epitaxial crystallization. This embodiment first grows a buffer layer 2 on the substrate layer 1, which can be grown on the semiconductor substrate layer 1 at a lower temperature (e.g., 270°C). For example, the substrate layer 1 is a semiconductor layer, such as a gallium arsenide layer. The buffer layer 2 is a ZnSe layer. The magnetic free layer 3 is Mn. 1-x Cr x S compound layer.

[0049] In principle, due to the significant difference in electronegativity between chromium atoms and sulfur and selenium atoms, the half-metal Mn... 1-x Cr x S can be easily grown on zinc-based nonmetallic compounds (e.g., ZnSe or ZnS) using molecular beam epitaxy to form defect-free heterojunction structures, and the growth rate is controllable throughout the process. However, the electronegativity difference between chromium atoms and Ga and As atoms is relatively small, which inherently determines that growing a magnetic free layer 3 directly on substrate 1 is less efficient than growing it on buffer layer 2. Therefore, this application avoids the need for an annealing process by first growing buffer layer 2 on substrate 1.

[0050] On the other hand, if the magnetic free layer 3 is grown directly on the substrate layer 1, the yield of the magnetic free layer 3 is too low due to the addition of the annealing process. Furthermore, the existing mature technology only limits the magnetic free layer materials such as Co / CoFe and the MgO / Al2O3 semiconductor layer, which greatly restricts the selectivity of the magnetic free layer 3.

[0051] The difference in electronegativity makes it easier for the magnetic free layer 3 to form a heterostructure with the buffer layer 2. At the same time, the buffer layer 2 is grown on the substrate layer 1 using chemical vapor deposition, which is less expensive. Furthermore, the buffer layer 2 and the semiconductor substrate 1 have a high degree of matching in terms of lattice constant and lattice type, which also improves the product yield.

[0052] The magnetization direction of the magnetic free layer 3 can vary with the direction of the external field. The magnetic free layer 3 comprises a first compound. The first compound comprises Cr and S elements, and its crystal structure is a zincblende type structure. The zincblende type structure is key to maintaining the half-metallic nature of the magnetic free layer 3, enabling the CrS series compounds to generate spin-polarized electrons and participate in electrical conduction. The magnetic free layer 3 is Mn with half-metallic properties. 1-x Cr x The S ternary compound layer, due to its band splitting, can generate fully spin-polarized electrons to participate in conduction, thereby improving the spin injection efficiency. The first compound can be a binary, ternary, quaternary, or pentagonal compound containing Cr and S elements.

[0053] Please see Figure 2 The tunneling insulating layer 4 is a non-magnetic insulating material and is disposed between the magnetic free layer 3 and the ferromagnetic layer 5 to form a heterojunction structure. The magnetic free layer 3, the tunneling insulating layer 4, and the ferromagnetic layer 5 form a magnetic tunnel junction. The pinning layer 6 is disposed on the ferromagnetic layer 5 to fix the magnetization direction of the ferromagnetic layer 5 so that the magnetization direction of the ferromagnetic layer 5 cannot be changed.

[0054] This embodiment of the application forms a buffer layer 2 on the substrate layer 1 and a magnetic free layer 3 on the buffer layer 2. Compared with directly generating the magnetic free layer 3 on the substrate layer 1, the growth process of the magnetic free layer 3 in this embodiment is compatible with existing processes, and the crystallization speed of the magnetic free layer 3 is easier to control, which is conducive to growing the desired epitaxial crystals and solves the problem of the difficulty in growing ferromagnetic materials. At the same time, the magnetic free layer 3 includes CrS series compounds with a zincblende structure. The zincblende structure of the CrS series compounds can provide more spin polarized charge carriers. Since the magnetic free layer 3 can provide more spin polarized charge carriers, it is not necessary to drive the magnetization direction of the magnetic free layer 3 to reverse with a large current, thereby reducing energy consumption and increasing service life.

[0055] In one possible implementation, the substrate layer 1 includes a semiconductor layer, such as a gallium arsenide layer.

[0056] In one possible implementation, the buffer layer 2 comprises a zinc selenide layer, a zinc sulfide layer, or a composite structure of ZnSe and ZnS. In other implementations, the buffer layer 2 may be selected from ZnFeO3, CoFePtO4, or Co.20 Fe 80 Etc. This application uses the buffer layer 2 as an example of a zinc selenide layer. Specifically, a solution of sulfuric acid, hydrogen peroxide, and water in a volume ratio of 1:1:1 can be used as an etching solution. The substrate layer 1 is placed in the etching solution and heated to 600°C to remove surface oxides, and then cooled to 270°C. A zinc selenide layer is then grown on the substrate layer 1 by chemical vapor deposition.

[0057] The reason for cooling to 270℃ to grow the zinc selenide layer is that, in the next step of molecular beam epitaxy, the temperature of buffer layer 2 is controlled at 270℃, so that the Mn at high temperature... 1-x Cr x The S-beam can grow on buffer layer 2 with a suitable temperature difference. Too high a temperature will affect the growth rate of the zinc selenide layer, while too low a temperature will damage the epitaxial quality of the zinc selenide layer.

[0058] The reason why zinc selenide layers are helpful for the growth of magnetic free layer 3 is that, in principle, due to the large difference in electronegativity between chromium atoms, sulfur atoms, and selenium atoms, the half-metal Mn1-xCrxS can be easily grown on zinc-containing non-metallic compounds (e.g., ZnSe or ZnS) by molecular beam epitaxy to form a defect-free heterojunction structure, and the growth rate is controllable throughout the process.

[0059] The thickness of the zinc selenide layer is less than or equal to 60 nm, and further, the thickness of the zinc selenide layer can be 40-60 nm. When the thickness of the zinc selenide layer is less than 40 nm, it is not possible to effectively guarantee that the outermost zinc selenide layer is a zincblende type structure. When the thickness of the zinc selenide layer is greater than 60 nm, it will increase the actual area of ​​the magnetic random access memory 100, which is not conducive to improving the integration density of the magnetic random access memory 100. After maintaining the outermost zinc selenide layer as a zincblende type structure, the molecular beam epitaxy process can make the magnetic free layer 3 also a zincblende type structure.

[0060] In one possible implementation, the first compound comprises Mn 1-x Cr x S, where x takes values ​​from 0 to 1. Mn in Mn 1-x Cr x S plays a role in stabilizing the crystal lattice structure. Cr alone cannot form a stable zincblende structure with S; instead, it will form a hexagonal close-packed structure without half-metallic properties. Therefore, Mn atoms are introduced to replace some Cr atoms, suppressing this transformation. Furthermore, because Mn atoms are similar in size to Cr atoms, they will not cause undesirable substitutional defects by replacing some Cr atoms. In actual production, the growth temperature and material ratio can be controlled as much as possible to ensure that Mn... 1-x Cr xThe manganese content in the S ternary compound layer is reduced to maintain the stability of the material. Experiments showed that only x = 0.9 is needed to maintain lattice structure stability; further increasing the Mn content led to various unknown defects. Therefore, using the parameters presented in this paper maximizes yield.

[0061] In this embodiment, Mn can be formed in the buffer layer 2 using molecular beam epitaxy. 1-x Cr x S layer. Specifically, ZnS and other compounds containing chromium and manganese can be used as raw materials. Molecular beam epitaxy is employed, with the growth temperature controlled between 780℃ and 840℃, to form Mn on buffer layer 2. 1-x Cr x S layer. Temperature above 780 degrees Celsius, Mn 1-x Cr x Only when S becomes controllable at the atomic level can it be manipulated for epitaxial growth. At temperatures above 840 degrees Celsius, the evaporation rate of Mn is too fast. 1-x Cr x S evaporated before it could settle onto buffer layer 2.

[0062] The thickness of the magnetic free layer 3 is 50 nm, ensuring that the magnetic free layer 3 has grown more than 40 layers according to the lattice structure and crystal orientation of the buffer layer 2, so as to maintain the stability of the lattice structure.

[0063] In other embodiments, the first compound may further include Mn 1-x Cr x TeO, Co 10 Mn 10 Pt 20 CoFeGaSi or Mn1-xCrxS with Mn 1-x Cr x A mixture of O to induce a highly polarized spin flow in the first compound.

[0064] In one possible implementation, the tunneling insulating layer 4 comprises a zinc selenide layer. The thickness of the zinc selenide layer is 1–5 nm. Specifically, the thickness of the zinc selenide layer in the tunneling insulating layer 4 can be controlled within 5 nm. If the thickness of the tunneling insulating layer 4 is less than 1 nm, it cannot effectively block electron tunneling between the magnetic free layer 3 and the ferromagnetic layer 5, resulting in the memory cell never exhibiting a high-resistivity state. If the thickness of the tunneling insulating layer 4 is greater than 5 nm, the blocking effect will be too strong, creating an insulating region between the free layer 3 and the ferromagnetic layer 5. This will cause the magnetic memory cell to still exhibit a high-resistivity state even when the magnetization directions of the magnetic free layer 3 and the ferromagnetic layer 5 are the same, preventing correct data access and even device failure. Since the resistance of the memory cell changes during the read and write processes, the function of the tunneling insulating layer is to block electron tunneling, preventing a large current from flowing through the memory cell when the resistance is low, thus preventing device failure.

[0065] The reasons for choosing zinc selenide as the tunneling insulating layer are as follows: First, zinc selenide can form a practical heterojunction with half-metal materials through molecular beam epitaxy, while common silicon and germanium cannot. Second, zinc selenide is a semiconductor with a band gap as high as 1.2 electron volts, requiring only a few atomic layers to block electron tunneling. Thinner layers mean smaller device area and greater device integration. If conventional semiconductors are used, the band gap is not large enough, and the layer thickness may far exceed 5 nm, resulting in additional costs and reduced memory performance.

[0066] The buffer layer 2 and the tunneling insulation layer 4 are made of the same material, which makes it easy to form a perfect heterogeneous structure with the magnetic free layer 3, reducing the types of raw materials and reducing material costs.

[0067] In one possible implementation, the ferromagnetic layer 5 comprises a second compound. The second compound comprises Cr and S elements. The crystal structure of the second compound is a zincblende type structure.

[0068] Optionally, the material of the ferromagnetic layer 5 may be the same as or different from the material of the magnetic free layer 3. In this embodiment, the material of the ferromagnetic layer 5 may be the same as that of the magnetic free layer 3. In this case, the growth process of the ferromagnetic layer 5 is the same as that of the magnetic free layer 3. The growth process of the magnetic free layer 3 can be repeated when preparing the ferromagnetic layer 5. This makes the epitaxial crystal structure of the ferromagnetic layer 5 and the magnetic free layer 3 more excellent, and the fabrication process of the entire magnetic random access memory 100 is simpler.

[0069] In one possible implementation, the second compound comprises Mn 1-x Cr xS, where x ranges from 0 to 1, and the thickness of the ferromagnetic layer 5 is less than or equal to 50 nm to maintain lattice structure stability. Specifically, ZnS and other compounds containing chromium and manganese can be used as raw materials, and molecular beam epitaxy can be employed, controlling the growth temperature between 780°C and 840°C to form Mn on the tunneling insulating layer 4. 1-x Cr x S layer.

[0070] Mn in Mn 1-x Cr x S plays a role in stabilizing the crystal lattice structure. Cr alone cannot form a stable zincblende structure with S; instead, it will form a hexagonal close-packed structure without half-metallic properties. Therefore, Mn atoms are introduced to replace some Cr atoms, suppressing this transformation. Furthermore, because Mn atoms are similar in size to Cr atoms, they will not cause undesirable substitutional defects by replacing some Cr atoms. In actual production, the growth temperature and material ratio can be controlled as much as possible to ensure that Mn... 1-x Cr x The manganese content in the S ternary compound layer is reduced to maintain the stability of the material. Experiments showed that only x = 0.9 is needed to maintain lattice structure stability; further increasing the Mn content led to various unknown defects. Therefore, using the parameters presented in this paper maximizes yield.

[0071] In this embodiment, Mn can be formed in the tunneling insulating layer 4 using molecular beam epitaxy. 1-x Cr x S layer. Specifically, ZnS and other compounds containing chromium and manganese can be used as raw materials. Molecular beam epitaxy is employed, with the growth temperature controlled between 780℃ and 840℃, to form Mn on the tunneling insulating layer 4. 1-x Cr x S layer. Temperature above 780 degrees Celsius, Mn 1-x Cr x Only when S becomes controllable at the atomic level can it be manipulated for epitaxial growth. At temperatures above 840 degrees Celsius, the evaporation rate of Mn is too fast. 1-x Cr x S evaporated before it could sink onto the tunnel insulation layer 4.

[0072] The thickness of the ferromagnetic layer 5 is equal to 50 nm, ensuring that the ferromagnetic layer 5 has been grown in more than 40 layers according to the lattice structure and crystal orientation of the tunneling insulating layer 4, so as to maintain the stability of the lattice structure.

[0073] In other embodiments, the second compound may further include Mn 1-x Cr x TeO, Co 10 Mn10 Pt 20 CoFeGaSi or Mn1-xCrxS with Mn 1-x Cr x A mixture of O to induce a highly polarized spin flow in the second compound.

[0074] In one possible implementation, the pinning layer 6 comprises at least one of an antiferromagnetic material layer, a topological insulator layer, or a Weyl semiconductor layer. The pinning layer 6 is used to pin the magnetization moment of the ferromagnetic layer 5, preventing the magnetization direction of the ferromagnetic layer 5 connected to it from changing. The topological insulator layer includes, but is not limited to, MnBi₂Te₄ single crystal. The Weyl semiconductor layer is made of, but is not limited to, Te. The thickness of the pinning layer 6 is 100 nm to 130 nm.

[0075] The magnetic tunnel junction unit 200 provided in this application embodiment generates a buffer layer 2 on the substrate layer 1 before preparing the magnetic free layer 3. This buffer layer 2 can prevent the magnetic free layer 3 from growing directly on the substrate layer 1. The growth of the magnetic free layer 3 on the buffer layer 2 can generate better epitaxial crystals. Moreover, by making both the magnetic free layer 3 and the ferromagnetic layer 5 Mn with half-metallic properties and a zincblende-type structure, 1-x Cr x The S compound layer is used to improve spin injection efficiency. Both the buffer layer 2 and the tunneling insulating layer 4 are zinc selenide layers, forming a GaAs / ZnSe / Mn compound layer. 1-x Cr x S / ZnSe / Mn 1-x Cr x The heterojunction structure of S is prepared by chemical vapor deposition, which is compatible with semiconductor manufacturing processes and is conducive to large-scale integration. The magnetic free layer 3 and the ferromagnetic layer 5 are made of the same material, as are the buffer layer 2 and the tunneling insulating layer 4. This allows for the repetition of some processes, simplifying the fabrication process of the magnetic tunnel junction unit 200 and improving its stability.

[0076] In other words, the zinc sphalerite Mn-based solution provided in this application 1-x Cr x S has a multilayer film structure, with the magnetic free layer 3 being a zincblende-based Mn. 1-x Cr x The S-layer and zinc selenide magnetic tunnel junction form a multilayer film structure that serves as the basic unit of the magnetic random access memory 100. This eliminates the need for a large current to drive the magnetization direction of the free layer to reverse, thereby reducing chip energy consumption. It solves the problem of the difficulty in growing ferromagnetic materials in existing technologies, is compatible with semiconductor manufacturing processes, enables mass production to save costs, facilitates large-scale integration, and reduces chip energy consumption.

[0077] Please see Figure 3The magnetic random access memory 100 also includes bit lines 10 and write word lines 11. The magnetic tunnel junction units 200 of the magnetic random access memory 100 are functionally divided into selected units 7, partially selected units 8, and unselected units 9. In the layered structure, the upper side of the selected units 7, partially selected units 8, and unselected units 9 (see reference) Figure 3 (From the perspective) are respectively electrically connected to bit line 10, and the lower side of selected unit 7, half-selected unit 8 and unselected unit 9 (refer to) Figure 3 From the perspective of the bit line 10, the bit line 10 is electrically connected to the write word line 11, and the bit line 10 is set perpendicular to the write word line 11. It should be noted that random access memory (RAM) requires address selection of the corresponding cell for read / write operations. First, the corresponding cell is located via the address lines, and then the read / write operation is performed. The number of cells integrated on this array is in the hundreds of millions. Selected cell 7 indicates the cell currently being read / written via addressing. Unselected cell 9 means it is not selected. Partially selected cell 8 indicates that the location has been locked via addressing, but a read / write operation has not yet been performed (it is about to be performed).

[0078] Please see Figure 3 and Figure 4 Since the magnetic tunnel junction unit 200 of the magnetic random access memory 100 is an externally applied magnetic tunnel junction, information is written by inducing the magnetic moment of the corresponding unit's magnetic free layer 3 to reverse through the write word line 11. During the data writing process, the transistor is turned off, and the electrical signal of the write word line 11 affects the magnetic field with the change of current. At the intersection of the two lines (the bit line 10 and the write word line 11 intersect each other perpendicularly, the magnetic tunnel junction unit 200 is located at the intersection point, and the upper side of the magnetic tunnel junction unit 200 is the bit line 10, and the lower side of the magnetic tunnel junction unit 200 is the write word line 11), a peak value of the magnetic field strength will be generated. If this value is greater than the threshold for the change of the magnetization direction of the magnetic tunnel junction free layer, it will cause the magnetization direction of the free layer to reverse, and the resistance of the magnetic random access memory 100 will change accordingly, and the information will be stored. During the read operation, the transistor is turned on, and the read current flows from bit line 10 through the magnetic tunnel junction and the external transistor. As long as the read current on bit line 10 remains consistent during data writing and reading operations, the output voltage depends on the device resistance. When the magnetization direction of the ferromagnetic layer 55 is parallel, the resistance is low, and the output voltage is low, i.e., the output signal is '0'. Conversely, when the magnetization direction of the corresponding unit's ferromagnetic layer 55 is antiparallel, the resistance is high, and the output voltage is high, i.e., the output signal is '1'. This eliminates the need for a large current to drive the free layer magnetization direction to reverse, thus reducing energy consumption.

[0079] This application provides a memory chip, including the magnetic random access memory 100.

[0080] This application provides an electronic device including the aforementioned memory chip. The electronic device can be a telephone, television, tablet computer, mobile phone, camera, personal computer, laptop computer, in-vehicle equipment, wearable device, base station, server, or other devices with memory chips. The memory chip addresses problems such as slow computer or mobile phone startup, data loss, slow data loading, and short battery life, significantly changing the way consumers use electronic devices.

[0081] Please see Figure 5 This application provides a method for fabricating a magnetic random access memory (MRM) 100, which is used to fabricate the MRM 100 described in any of the above-mentioned embodiments, and includes the following steps. The following steps are described in conjunction with reference to... Figures 1 to 4 .

[0082] Step 110: Form substrate layer 1.

[0083] Specifically, the substrate layer 1 is a gallium arsenide layer. In step 110, after forming the substrate layer 1, the method further includes: preparing an etching solution, the etching solution comprising sulfuric acid, hydrogen peroxide, and water, wherein the ratio of the sulfuric acid, hydrogen peroxide, and water is 1:1:1; placing the substrate layer 1 in the etching solution, heating it to a first temperature to remove surface oxides, and then cooling it to a second temperature, the first temperature being 600°C and the second temperature being 270°C.

[0084] Step 120: Form a buffer layer 2 on the substrate layer 1 using chemical vapor deposition.

[0085] A zinc selenide layer is grown on the substrate layer 1 using chemical vapor deposition at the second temperature to form the buffer layer 2. The growth time is controlled so that the thickness of the buffer layer 2 is less than or equal to 60 nm. Further, the thickness of the zinc selenide layer can be 40-60 nm.

[0086] In one possible implementation, after forming the buffer layer 2 on the substrate layer 1 using chemical vapor deposition, the method further includes: performing a surface smoothing treatment on the buffer layer 2 to allow the magnetic free layer 3 to grow layer by layer in a crystalline arrangement to form a thin film. Specifically, the buffer layer 2 is rinsed with deionized water for 10 minutes.

[0087] Step 130: Form a magnetic free layer 3 on the buffer layer 2. The magnetic free layer 3 includes a first compound, which includes Cr and S elements, and the crystal structure of the first compound is a zincblende type structure.

[0088] Mn can be formed in buffer layer 2 by molecular beam epitaxy. 1-x Cr xS layer. Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the buffer layer 2. 1-x Cr x An S-layer is formed to create a magnetic free layer 3, where x ranges from 0 to 1, and the thickness of the magnetic free layer 3 is less than or equal to 50 nm. The magnetic free layer 3 is composed of Mn with semi-metallic properties. 1-x Cr x The S compound layer is used to improve spin injection efficiency.

[0089] In actual production, the growth temperature and material ratio can be controlled as much as possible to ensure that Mn 1-x Cr x The manganese content in the S ternary compound layer is reduced to maintain the stability of the material.

[0090] Specifically, chromium dioxide, manganese sulfide, and zinc sulfide are mixed in a 3:1:3 ratio to form raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the buffer layer 2. 1-x Cr x S layer, to form magnetic free layer 3.

[0091] The thickness of the magnetic free layer 3 is less than or equal to 50 nm to maintain the stability of the crystal structure.

[0092] Step 140: Form a tunneling insulating layer 4 and a ferromagnetic layer 5 on the magnetic free layer 3, such that the tunneling insulating layer 4 is disposed between the magnetic free layer 3 and the ferromagnetic layer 5 to form a heterojunction structure.

[0093] Both the magnetic free layer 3 and the ferromagnetic layer 5 are Mn with semi-metallic properties. 1-x Cr x S compound layer, and Mn 1-x Cr x The S compound layers all have a zincblende-type structure, thereby improving the spin injection efficiency.

[0094] A zinc selenide layer is grown on the magnetic free layer 3 at the second temperature to form a tunneling insulating layer 4, such that the thickness of the tunneling insulating layer 4 is less than 5 nm to maintain the stability of the crystal structure.

[0095] Mn can be formed in the tunneling insulating layer 4 by molecular beam epitaxy. 1-x Cr x S layer. Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer 4. 1-x Cr xAn S layer is formed to create a ferromagnetic layer 5, wherein the value of x is 0 to 1, and the thickness of the ferromagnetic layer 5 is less than or equal to 50 nm.

[0096] Specifically, chromium dioxide, manganese sulfide, and zinc sulfide are mixed in a 3:1:3 ratio to form raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer 4. 1-x Cr x S layer, to form ferromagnetic layer 5.

[0097] Mn in magnetic free layer 3 and ferromagnetic layer 5 1-x Cr x All S compound layers can be prepared using chemical vapor deposition.

[0098] Optionally, the material of the ferromagnetic layer 5 may be the same as or different from the material of the magnetic free layer 3. In this embodiment, the material of the ferromagnetic layer 5 may be the same as that of the magnetic free layer 3. In this case, the growth process of the ferromagnetic layer 5 is the same as that of the magnetic free layer 3. The growth process of the magnetic free layer 3 can be repeated when preparing the ferromagnetic layer 5. This makes the epitaxial crystal structure of the ferromagnetic layer 5 and the magnetic free layer 3 more excellent, and the fabrication process of the entire magnetic random access memory 100 is simpler.

[0099] Step 150: Form a pinning layer 6 on the ferromagnetic layer 5 to fix the magnetization direction of the ferromagnetic layer 5.

[0100] A pinning layer 6 is grown on the ferromagnetic layer 5 using magnetron sputtering. The pinning layer 6 is made of at least one of an antiferromagnetic material, a topological insulator, or a Weyl semiconductor. The pinning layer 6 is used to pin the ferromagnetic layer 5, preventing the magnetization direction of the ferromagnetic layer 5 connected to it from changing. The topological insulator layer includes, but is not limited to, MnBi₂Te₄ single crystal. The Weyl semiconductor layer is made of, but is not limited to, Te. The thickness of the pinning layer 6 is 100 nm to 130 nm.

[0101] The method for fabricating the magnetic random access memory 100 provided in this application embodiment involves generating a buffer layer 2 on the substrate layer 1 before fabricating the magnetic free layer 3. This buffer layer 2 prevents the magnetic free layer 3 from growing directly on the substrate layer 1. The growth of the magnetic free layer 3 on the buffer layer 2 results in better epitaxial crystal formation. Furthermore, by ensuring that both the magnetic free layer 3 and the ferromagnetic layer 5 are Mn with half-metallic properties and a zincblende-type structure, [the method achieves better results]. 1-x Cr x The S compound layer is used to improve spin injection efficiency. Both the buffer layer 2 and the tunneling insulating layer 4 are zinc selenide layers, forming a GaAs / ZnSe / Mn compound layer. 1-x Cr x S / ZnSe / Mn 1-x Cr xThe heterojunction structure of S is jointly prepared by chemical vapor deposition, which is compatible with semiconductor manufacturing processes and is conducive to large-scale integration. The magnetic free layer 3 and the ferromagnetic layer 5 are made of the same material, as are the buffer layer 2 and the tunneling insulating layer 4. This allows for the repetition of some processes, simplifies the fabrication process of the magnetic tunnel junction unit 200, and also improves the stability of the magnetic tunnel junction unit 200.

[0102] The above description represents some embodiments of this application. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. A method for fabricating a magnetic random access memory, characterized in that, include: A substrate layer is formed, wherein the substrate layer is a gallium arsenide layer; A buffer layer is formed on the substrate layer; A magnetic free layer is formed on the buffer layer, the magnetic free layer comprising a first compound, the first compound comprising Mn 0.1 Cr 0.9 S, the crystal structure of the first compound is a zincblende type structure; the buffer layer includes at least one of a zinc selenide layer and a zinc sulfide layer; A tunneling insulating layer and a ferromagnetic layer are formed on the magnetic free layer, with the tunneling insulating layer disposed between the magnetic free layer and the ferromagnetic layer to form a heterojunction structure; A pinning layer is formed on the ferromagnetic layer to fix the magnetization direction of the ferromagnetic layer.

2. The preparation method according to claim 1, characterized in that; Following the formation of the substrate layer, the following is included: A corrosive solution is prepared, comprising sulfuric acid, hydrogen peroxide, and water in a volume ratio of 1:1:

1. The substrate is placed in the etching solution and heated to a first temperature to remove surface oxides, and then cooled to a second temperature, wherein the first temperature is 600°C and the second temperature is 270°C.

3. The preparation method according to claim 2, characterized in that, The step of forming a buffer layer on the substrate includes: A zinc selenide layer is grown on the substrate at the second temperature using chemical vapor deposition to form a buffer layer, wherein the thickness of the buffer layer is less than or equal to 60 nm.

4. The preparation method according to claim 3, characterized in that, The process of forming a magnetic free layer on the buffer layer includes: Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the buffer layer. 1-x Cr x An S-layer is formed to create a magnetic free layer, wherein the value of x is 0.9, and the thickness of the magnetic free layer is less than or equal to 50 nm.

5. The preparation method according to claim 4, characterized in that, The process of forming a tunneling insulating layer and a ferromagnetic layer on the magnetic free layer includes: A zinc selenide layer is grown on the magnetic free layer at the second temperature to form a tunneling insulating layer, wherein the thickness of the tunneling insulating layer is 1~5nm. Zinc sulfide and compounds containing chromium and manganese are used as raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer. 1-x Cr x An S layer is formed to create a ferromagnetic layer, wherein the value of x is 0 to 1, and the thickness of the ferromagnetic layer is less than or equal to 50 nm.

6. The preparation method according to claim 5, characterized in that, The process of forming a pinning layer on the ferromagnetic layer includes: A pinning layer is grown on the ferromagnetic layer using magnetron sputtering, wherein the pinning layer is made of at least one of an antiferromagnetic material, a topological insulator, or a Weyl semiconductor.

7. The preparation method according to claim 6, characterized in that, The process involves using zinc sulfide and compounds containing chromium and manganese as raw materials, and controlling the temperature between 780°C and 840°C to form Mn on the tunneling insulation layer. 1-x Cr x The S layer, to form a ferromagnetic layer, includes: Chromium dioxide, manganese sulfide, and zinc sulfide are mixed in a mass ratio of 3:1:3 to form raw materials, and the temperature is controlled between 780°C and 840°C to form Mn on the tunneling insulation layer. 1-x Cr x The S layer is used to form a ferromagnetic layer.

8. The preparation method according to claim 7, characterized in that, After forming the buffer layer on the substrate using chemical vapor deposition, the method further includes: performing a surface smoothing treatment on the buffer layer.

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