Method for manufacturing SiC substrate

Abstract

The technical problem to be solved by the present invention is to provide a novel method for manufacturing a SiC substrate. The method for manufacturing a SiC substrate according to the present invention is characterized in that it comprises: an etching step (S10) for etching a SiC original substrate (10); a crystal growth step (S20) for growing a SiC substrate layer (13) on the SiC original substrate (10) to obtain a SiC substrate body (20); and a stripping step (S30) for stripping a portion of the SiC substrate body (20) to obtain a SiC substrate (30). The etching step (S10) and the crystal growth step (S20) are steps of placing the SiC original substrate (10) and a SiC material (40) opposite to each other and heating them so as to form a temperature gradient between the SiC original substrate (10) and the SiC material (40).

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a SiC substrate. Background Art

[0002] SiC (silicon carbide) semiconductor devices have higher voltage resistance and higher efficiency than Si (silicon) or GaAs (gallium arsenide) semiconductor devices, and are capable of high-temperature operation. Therefore, they are being developed towards industrialization.

[0003] Generally, a SiC substrate (SiC wafer) is manufactured by forming a SiC ingot by growing single-crystalline SiC on a seed crystal substrate using a sublimation method or the like, and slicing the ingot.

[0004] Furthermore, a method for manufacturing SiC wafers having an epitaxial layer piece by piece has been proposed. Patent Document 1 describes a technique for manufacturing SiC wafers piece by piece by growing an epitaxial layer and a SiC substrate on a seed crystal substrate and removing them from the seed crystal substrate.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 2015-24932 Summary of the Invention

[0008] Technical problem to be solved by the invention

[0009] However, in Patent Document 1, the growth surface of the seed crystal substrate needs to be CMP-polished every time one SiC substrate is manufactured, which leads to a problem of increased CMP-polishing costs.

[0010] Furthermore, Patent Document 1 describes the SiC substrate as being grown using a solution method, high-temperature CVD, or sublimation method. Specifically, it states that "using a solution method to grow a SiC substrate allows for a relatively fast growth rate, and since crystal growth occurs in a state close to thermal equilibrium, a high-quality substrate with few defects can be obtained." However, the solution method has the problem of making it difficult to obtain large-diameter SiC substrates.

[0011] Furthermore, the high-temperature CVD method has problems such as difficulty in increasing the diameter and low productivity. Furthermore, the sublimation method has problems such as difficulty in increasing the diameter and high defect density.

[0012] The technical problem to be solved by the present invention is to provide a novel method for manufacturing a SiC substrate.

[0013] In addition, the technical problem to be solved by the present invention is to provide a method for manufacturing a SiC substrate capable of manufacturing a large-diameter SiC substrate.

[0014] Means used to solve problems

[0015] The present invention for solving the above-mentioned problem is a method for manufacturing a SiC substrate, comprising:

[0016] Etching step, etching the SiC original substrate;

[0017] a crystal growth step of growing a SiC substrate layer on the SiC original substrate to obtain a SiC substrate body; and

[0018] a peeling step of peeling off a portion of the SiC substrate body to obtain a SiC substrate,

[0019] The etching step and the crystal growth step are steps of arranging the SiC original substrate and the SiC material opposite to each other and heating them so as to form a temperature gradient between the SiC original substrate and the SiC material.

[0020] In this way, by including the etching step and the crystal growth step, a SiC substrate can be manufactured without performing CMP polishing.

[0021] Furthermore, the etching and crystal growth steps can be performed in the same environment (device system) while heat treating the SiC substrate. Therefore, both the removal of the altered layer and the crystal growth of the SiC substrate layer can be performed using a single device system, eliminating the need for multiple devices and significantly reducing costs.

[0022] In addition, by including the etching step and the crystal growth step, the life of the SiC material of the present invention can be extended.

[0023] In a preferred embodiment of the present invention, the etching step and the crystal growth step are steps of heating the SiC original substrate and the SiC material in an atmosphere containing Si element and C element.

[0024] In this manner, since the etching step and the crystal growth step are steps of performing heating in an atmosphere containing Si element and C element, a higher quality SiC substrate can be manufactured.

[0025] In a preferred embodiment of the present invention, the etching step and the crystal growth step are steps of heating the SiC original substrate and the SiC material in a quasi-closed space.

[0026] In this way, the etching step and the crystal growth step are steps in which heating is performed in a quasi-enclosed space, whereby a higher-quality SiC substrate can be manufactured.

[0027] In a preferred embodiment of the present invention, the etching step and the crystal growth step are steps of placing the SiC original substrate in a main body container containing the SiC material and heating the SiC original substrate.

[0028] In this way, by using the main body container containing the SiC material in the etching step and the crystal growth step, a quasi-closed space of the atmosphere containing the Si element and the C element can be easily formed.

[0029] In a preferred embodiment of the present invention, the etching step is a step of arranging the SiC original substrate and the SiC material relative to each other and heating them with the SiC original substrate at a high temperature side and the SiC material at a low temperature side.

[0030] In addition, in a preferred embodiment of the present invention, the etching step includes the step of arranging the SiC original substrate and the SiC material relative to each other in a quasi-closed space in which the Si / C atomic ratio exceeds 1 and heating them with the SiC original substrate as the high-temperature side and the SiC material as the low-temperature side.

[0031] In this way, by etching the SiC substrate using the temperature gradient as a driving force, the processing-degraded layer or macro-step bunching can be removed or reduced, and a higher quality SiC substrate can be manufactured.

[0032] Furthermore, by etching the surface of the SiC substrate by creating a temperature gradient between the SiC substrate and the SiC material, it is possible to suppress significant variations in the temperature distribution within the SiC substrate plane depending on the position. This enables the production of high-quality, large-diameter substrates (6 inches (approximately 15.24 cm) or larger, and even larger than 8 inches (approximately 20.32 cm)).

[0033] In a preferred embodiment of the present invention, the crystal growth step is a step of arranging the SiC original substrate and the SiC material relative to each other and heating them with the SiC original substrate at the low temperature side and the SiC material at the high temperature side.

[0034] In addition, in a preferred embodiment of the present invention, the crystal growth step includes the step of arranging the SiC original substrate and the SiC material relative to each other in a quasi-closed space in which the Si / C atomic ratio exceeds 1 and heating them with the SiC original substrate as the low-temperature side and the SiC material as the high-temperature side.

[0035] In addition, in a preferred embodiment of the present invention, the crystal growth step includes the step of arranging the SiC original substrate and the SiC material relative to each other in a quasi-closed space with a Si / C atomic ratio of less than 1 and heating them with the SiC original substrate as the low-temperature side and the SiC material as the high-temperature side.

[0036] In this way, by growing the SiC substrate layer using the temperature gradient as a driving force, basal plane dislocations or macro-step bunching can be removed or reduced, and a higher quality SiC substrate can be manufactured.

[0037] Furthermore, since the SiC substrate layer is grown by creating a temperature gradient between the SiC substrate and the SiC material, it is possible to suppress significant variations in the temperature distribution within the SiC substrate plane depending on the position. This enables the manufacture of high-quality, large-diameter substrates (6 inches or larger, and even 8 inches or larger).

[0038] In a preferred embodiment of the present invention, the peeling step includes: a laser irradiation step of introducing a damaged layer into the SiC substrate; and a separation step of performing separation starting from the damaged layer.

[0039] Thus, by including the laser irradiation step and the separation step, material loss can be reduced.Therefore, there is no limitation on the thickness of the SiC substrate body, and the SiC substrate body does not need to be formed thickly.

[0040] In a preferred embodiment of the present invention, the method further includes: an etching step of etching the peeled SiC original substrate; a crystal growth step of growing a SiC substrate layer on the SiC original substrate to obtain a SiC substrate body; and a peeling step of peeling off a portion of the SiC substrate body.

[0041] In a preferred embodiment of the present invention, the method further includes: an etching step of etching the peeled SiC substrate layer; a crystal growth step of growing another SiC substrate layer on the SiC substrate layer to obtain a SiC substrate body; and a peeling step of peeling off a portion of the SiC substrate body.

[0042] Effects of the Invention

[0043] According to the present invention, a novel method for manufacturing a SiC substrate can be provided.

[0044] Furthermore, according to the present invention, a method for manufacturing a SiC substrate capable of manufacturing a large-diameter SiC substrate can be provided.

[0045] Other technical problems to be solved, features and advantages will become apparent by reading the detailed description below in conjunction with the drawings and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 Schematic diagram of a manufacturing process of a SiC substrate according to one embodiment.

[0047] Figure 2 These are diagrams illustrating steps for manufacturing a SiC substrate according to one embodiment.

[0048] Figure 3 It is an explanatory diagram showing the outline of the etching step of the present invention.

[0049] Figure 4 It is an explanatory diagram showing the outline of the crystal growth step of the present invention.

[0050] Figure 5 It is an explanatory diagram of a SiC substrate manufacturing apparatus according to one embodiment.

[0051] Figure 6 is a schematic diagram of a main body container and a high melting point container according to one embodiment.

[0052] Figure 7 is a schematic diagram of a main body container and a high melting point container according to one embodiment.

[0053] Figure 8 It is an explanatory diagram of a SiC original substrate obtained in the etching step of the present invention.

[0054] Figure 9 It is an explanatory diagram of the surface of the SiC original substrate obtained in the etching step of the present invention.

[0055] Figure 10 It is an explanatory diagram of the surface of the SiC substrate layer obtained in the crystal growth step of the present invention.

[0056] Figure 11 It is an explanatory diagram of a method for determining the BPD conversion rate in the crystal growth step of the present invention.

[0057] Figure 12 It is an explanatory diagram of a SiC substrate layer formed in the crystal growth step of the present invention.

[0058] Figure 13 It is an explanatory diagram of a SiC substrate layer formed in the crystal growth step of the present invention.

[0059] Figure 14 It is an Arrhenius diagram of the etching step and the crystal growth step of the present invention. DETAILED DESCRIPTION

[0060] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The technical scope of the present invention is not limited to the embodiments shown in the accompanying drawings, and can be appropriately modified within the scope of the claims.

[0061] Manufacturing Method of SiC Substrate

[0062] like Figure 1 and Figure 2 As shown, the present invention is a method for manufacturing a new SiC substrate 30 from a SiC original substrate 10, which includes: an etching step S10, removing the processed metamorphic layer 12 of the SiC original substrate 10 by etching; a crystal growth step S20, growing a SiC substrate layer 13 on the SiC original substrate 10 to obtain a SiC substrate body 20; and a stripping step S30, stripping a portion of the SiC substrate body 20 to obtain the SiC substrate 30.

[0063] Furthermore, the etching step S10 and the crystal growth step S20 according to the present invention are steps in which the SiC original substrate 10 and the SiC material 40 are arranged relative to each other and heated so as to form a temperature gradient between the SiC original substrate 10 and the SiC material 40. By heating in this manner, the process-deteriorated layer 12 can be removed in the etching step S10, and the SiC base layer 13 can be grown in the crystal growth step S20.

[0064] Hereinafter, each step of the present invention will be described in detail.

[0065] <Etching Step>

[0066] like Figure 3 As shown, the etching step S10 is a step of transporting raw materials (Si element, C element and dopant) from the SiC original substrate 10 to the SiC material 40 and etching the surface of the SiC original substrate 10 by placing the SiC original substrate 10 and the SiC material 40 relative to each other and heating them.

[0067] In the etching step S10 , it is preferable to place the SiC original substrate 10 and the SiC material 40 in a semi-enclosed space and heat them. The semi-enclosed space can be formed by, for example, being housed in a main body container 50 described later.

[0068] In addition, the "quasi-enclosed space" in this specification refers to a space that can be evacuated inside the container but can enclose at least a portion of the vapor generated in the container.

[0069] (SiC original substrate)

[0070] As the SiC original substrate 10, a substrate obtained by processing single crystal SiC into a plate shape can be exemplified. Specifically, a SiC wafer or the like cut into a disk shape from a SiC ingot manufactured using a sublimation method or the like can be exemplified. In addition, any polymorphic form can be adopted as the crystal polymorph of the single crystal SiC.

[0071] Furthermore, SiC substrate 30 manufactured by the method for manufacturing a SiC substrate according to the present invention can also be used as a SiC original substrate.

[0072] Typically, a SiC substrate 10 that has been machined (e.g., sliced, ground / polished) or laser-processed comprises a deteriorated layer 12 into which processing damage such as scratches, potential scratches, and strain has been introduced, and a bulk layer 11 into which such processing damage has not been introduced (see Figure 2 ).

[0073] The presence or depth of the processed deteriorated layer 12 can be confirmed by SEM-EBSD, TEM, μXRD, Raman spectroscopy, etc. In addition, in order to manufacture a high-quality SiC original substrate 10, it is preferred to remove the processed deteriorated layer 12 and reveal the bulk layer 11 without any processing damage.

[0074] Furthermore, a step-terrace structure was confirmed on the atomically flattened surface of the SiC original substrate 10 or SiC substrate 30. This step-terrace structure is a staircase structure in which steps, which are stepped portions of a molecular layer or more, and terraces, which are flat portions where the {0001} crystal plane is exposed, are arranged alternately.

[0075] The minimum height (smallest unit) of a step is a single molecular layer (0.25 nm). Multiple layers of this molecular layer are stacked to form various step heights. In this specification, steps that become larger by bundling (or bunching) and exceed the height of a unit cell of each polymorph are referred to as macro-step bunching (MSB).

[0076] That is, in the case of 4H-SiC, MSB refers to a step formed by the clustering of more than 4 molecular layers (5 molecular layers or more), and in the case of 6H-SiC, it refers to a step formed by the clustering of more than 6 molecular layers (7 molecular layers or more).

[0077] Since there are cases where defects caused by the MSB occur when crystal growth is performed, it is desirable that the MSB not be formed at the surface of SiC original substrate 10 .

[0078] The dopant may generally be any element that is doped into the SiC substrate, and specifically, nitrogen (N), phosphorus (P), aluminum (Al), boron (B), and the like are preferred.

[0079] The doping concentration of the SiC substrate 10 is preferably higher than 1×10 17 cm -3 The concentration is more preferably 1×10 18 cm -3 More than 1×10 19 cm -3 above.

[0080] The dopant and doping concentration can be confirmed by Raman spectroscopy or secondary ion mass spectrometry (SIMS).

[0081] (SiC material)

[0082] The SiC material 40 is composed of SiC, which is placed opposite to the SiC original substrate 10 and heated to supply Si elements, C elements, and dopants to the SiC original substrate 10. For example, it includes a SiC container (main container 50) and a SiC substrate. Specifically, it can be illustrated that at least a portion of the container for storing the SiC original substrate 10 (especially the portion facing the SiC original substrate 10) is formed of the SiC material 40, or the SiC substrate that will become the SiC material 40 is arranged so as to face the SiC original substrate 10 within the container.

[0083] That is, the SiC material 40 is preferably single crystal SiC or polycrystalline SiC. In addition, as the crystal polymorphism of the SiC material 40, any polymorphism can be adopted.

[0084] The dopant may be the same element as that of the SiC original substrate 10. Specifically, nitrogen (N), phosphorus (P), aluminum (Al), boron (B), and the like are preferable.

[0085] The doping concentration of the SiC material 40 may be set to the doping concentration of the SiC substrate 30 to be manufactured. For example, when a SiC substrate 30 with a high doping concentration is to be manufactured, the doping concentration of the SiC material 40 is preferably set to be higher than 1×10 17 cm -3 The concentration is more preferably 1×10 18 cm -3 More preferably, 1×10 19 cm -3 above.

[0086] On the other hand, when it is desired to manufacture a SiC substrate 30 with a high doping concentration, it is preferable to use 1×10 17 cm -3 Hereinafter, it is more preferable to use 1×10 16 cm -3 Hereinafter, it is further preferred to use 1×10 15 cm -3the following.

[0087] The dopant and doping concentration can be confirmed by Raman spectroscopy or secondary ion mass spectrometry (SIMS).

[0088] (quasi-enclosed space)

[0089] The quasi-enclosed space may also be constructed so that the Si / C atomic ratio is less than 1. For example, when a SiC substrate 10 satisfying a stoichiometric ratio of 1:1 is placed in a main body container 50 made of SiC satisfying a stoichiometric ratio of 1:1, the Si / C atomic ratio in the main body container 50 is 1 (see Figure 7 ). In addition, a C vapor supply source (C particles, etc.) may be configured so that the Si / C atomic ratio is 1 or less.

[0090] Furthermore, the quasi-enclosed space may be configured so that the Si / C atomic ratio exceeds 1. For example, when a SiC substrate 10 and a Si vapor supply source 55 (such as Si particles) having a stoichiometric ratio of 1:1 are placed in a main body container 50 made of SiC having a stoichiometric ratio of 1:1, the Si / C atomic ratio in the main body container 50 exceeds 1 (see Figure 6 ).

[0091] (Overview of Etching Step)

[0092] Figure 3 This is an explanatory diagram showing an overview of etching step S10. In this etching step S10, it is considered that the SiC original substrate 10 is arranged in a quasi-enclosed space where the SiC material 40 is exposed and heated within a temperature range of 1400°C to 2300°C, thereby continuously performing the following reactions 1) to 5), resulting in etching.

[0093] 1)SiC(s)→Si(v)+C(s)

[0094] 2)2C(s)+Si(v)→SiC2(v)

[0095] 3) C(s)+2Si(v)→Si2C(v)

[0096] 4)Si(v)+SiC2(v)→2SiC(s)

[0097] 5)Si2C(v)→Si(v)+SiC(s)

[0098] Explanation of 1): Since SiC original substrate 10 (SiC(s)) is heated, Si atoms (Si(v)) are released from the surface of SiC original substrate 10 by thermal decomposition (Si atom sublimation step).

[0099] Explanation of 2) and 3): The carbon (C(s)) remaining on the surface of the SiC substrate 10 due to the detachment of Si atoms (Si(v)) reacts with the Si vapor (Si(v)) in the quasi-enclosed space. As a result, the carbon (C(s)) becomes Si2C or SiC2, etc., and sublimates from the surface of the SiC substrate 10 (carbon atom sublimation step).

[0100] Explanation of 4) and 5): The sublimated Si2C or SiC2 etc. reaches the SiC material 40 in the quasi-enclosed space due to the temperature gradient and undergoes crystal growth.

[0101] In this way, the etching step S10 includes: a Si atom sublimation step, in which Si atoms are thermally sublimated from the surface of the SiC original substrate 10; and a C atom sublimation step, in which C atoms remaining at the surface of the SiC original substrate 10 are sublimated from the surface of the SiC original substrate 10 by reacting with Si vapor in the quasi-closed space.

[0102] The etching step S10 is a step in which the SiC original substrate 10 and the SiC material 40 are arranged relative to each other and heated in such a manner that the SiC original substrate 10 is on the high temperature side and the SiC material 40 is on the low temperature side. As a result, an etching space X is formed between the SiC original substrate 10 and the SiC material 40, and the surface of the SiC original substrate 10 can be etched using the temperature gradient as a driving force.

[0103] Furthermore, the etching step S10 includes the step of arranging the SiC original substrate 10 and the SiC material 40 opposite to each other in a quasi-enclosed space where the Si / C atomic ratio exceeds 1 and heating them with the SiC original substrate 10 at the high temperature side and the SiC material 40 at the low temperature side.

[0104] In this way, by etching the surface of the SiC original substrate 10 in a quasi-closed space where the Si / C atomic ratio exceeds 1, the process-degraded layer 12 can be removed, and the MSB can be removed.

[0105] <Crystal Growth Step>

[0106] like Figure 4 As shown, the crystal growth step S20 is a step of transferring raw materials (Si element, C element, and dopant) from the SiC material 40 to the SiC original substrate 10 by placing the SiC original substrate 10 and the SiC material 40 relative to each other and heating them, thereby growing the SiC substrate layer 13. Through this crystal growth step S20, the SiC substrate body 20 obtained by growing the SiC substrate layer 13 on the SiC original substrate 10 is obtained.

[0107] Preferably, in the crystal growth step S20 , similar to the etching step S10 , the SiC original substrate 10 and the SiC material 40 are placed in a quasi-enclosed space and heated. The quasi-enclosed space is formed by being housed in a main body container 50 , for example.

[0108] (Overview of Crystal Growth Steps)

[0109] Figure 4 This is an explanatory diagram showing an overview of the crystal growth step S20. In this crystal growth step S20, it is considered that the SiC original substrate 10 is arranged in a quasi-enclosed space where the SiC material 40 is exposed and heated within a temperature range of 1400°C to 2300°C, thereby continuously performing the following reactions 1) to 5), resulting in crystal growth.

[0110] 1) Poly-SiC(s)→Si(v)+C(s)

[0111] 2)2C(s)+Si(v)→SiC2(v)

[0112] 3) C(s)+2Si(v)→Si2C(v)

[0113] 4)Si(v)+SiC2(v)→2SiC(s)

[0114] 5)Si2C(v)→Si(v)+SiC(s)

[0115] Explanation of 1): When the SiC material (Poly-SiC(s)) is heated, Si atoms (Si(v)) are released from the SiC by thermal decomposition.

[0116] Explanation for 2) and 3): The carbon (C(s)) remaining after the Si atoms (Si(v)) are removed reacts with the Si vapor (Si(v)) within the quasi-enclosed space. As a result, the carbon (C(s)) becomes Si2C or SiC2, etc., and sublimates within the quasi-enclosed space.

[0117] Explanation of 4) and 5): The sublimated Si2C or SiC2 etc. reaches / diffuses to the platform of the SiC original substrate 10 due to the temperature gradient (or chemical potential difference), and reaches the step, thereby continuing the polycrystalline form of the SiC original substrate 10 of the base and growing (step flow growth).

[0118] In this way, the crystal growth step S20 includes: a Si atom sublimation step, in which Si atoms are thermally sublimated from the surface of the SiC material 40; a C atom sublimation step, in which the C atoms remaining on the surface of the SiC material 40 are sublimated by reacting with the Si vapor in the quasi-closed space; a raw material transport step, in which the temperature gradient or chemical potential difference is used as a driving force to transport the raw material to the surface of the SiC original substrate 10; and a step flow growth step, in which the raw material reaches the step of the SiC original substrate 10 and grows.

[0119] The raw materials mentioned here include Si, C, and a dopant. Therefore, the dopant of the SiC material 40 is delivered together with Si and C. As a result, the SiC substrate layer 13 grows in accordance with the doping concentration of the SiC material 40 .

[0120] Therefore, when it is desired to obtain a SiC substrate 30 having a specific doping concentration, by using the SiC material 40 having a desired doping concentration, it is possible to manufacture the SiC substrate 30 having the desired doping concentration.

[0121] The crystal growth step S20 is a step of placing the SiC original substrate 10 and the SiC material 40 relative to each other and heating them with the SiC original substrate 10 at the low temperature side and the SiC material 40 at the high temperature side. As a result, a crystal growth space Y is formed between the SiC original substrate 10 and the SiC material 40, and the temperature gradient can be used as a driving force to cause crystal growth of the SiC original substrate 10.

[0122] Furthermore, the crystal growth step S20 includes arranging the SiC original substrate 10 and the SiC material 40 opposite to each other in a quasi-enclosed space where the Si / C atomic ratio exceeds 1 and heating them with the SiC original substrate 10 at the low temperature side and the SiC material 40 at the high temperature side.

[0123] In this way, by performing crystal growth in a quasi-closed space where the Si / C atomic ratio exceeds 1, the formation of MSB on the surface of SiC substrate layer 13 can be suppressed.

[0124] Furthermore, the crystal growth step S20 includes the step of arranging the SiC original substrate 10 and the SiC material 40 opposite to each other in a quasi-enclosed space with a Si / C atomic ratio of 1 or less and heating them with the SiC original substrate 10 at the low temperature side and the SiC material 40 at the high temperature side.

[0125] In this way, by performing crystal growth in a quasi-closed space with a Si / C atomic ratio of 1 or less, basal plane dislocations (BPDs) in the SiC substrate layer 13 can be removed or reduced.

[0126] In addition, when the SiC original substrate 10 is single crystal SiC and the SiC material 40 is polycrystalline SiC, the partial pressure difference (chemical potential difference) generated at the surfaces of polycrystalline SiC and single crystal SiC can be used as the driving force for raw material transportation to perform crystal growth.

[0127] <Peeling Step>

[0128] The peeling step S30 is a step of peeling off a portion of the SiC substrate body 20 obtained in the crystal growth step S20 to obtain the SiC substrate 30. Examples of methods for peeling off the SiC substrate 30 include multi-wire sawing, which cuts by reciprocating multiple wires; electrical discharge machining, which cuts by intermittently generating plasma discharge; and laser cutting, which forms a layer serving as a base point for cutting by irradiating and converging a crystal with laser light.

[0129] Among them, the method using laser is preferably used because it causes less material loss. The method of performing lift-off using laser is described in detail below.

[0130] The peeling step S30 according to the present embodiment includes a laser irradiation step S31 of introducing the damaged layer 14 into the SiC substrate body 20 and a separation step S32 of performing separation starting from the damaged layer 14 .

[0131] The laser irradiation step S31 is a step of positioning the convergence point of a laser beam having a wavelength that is transmissive to single crystal SiC inside the SiC substrate body 20 and irradiating the SiC substrate body 20 with the laser beam to form the damaged layer 14 (see Figure 2 ).

[0132] The laser irradiation means L used in the laser irradiation step S31 includes, for example, a laser light source L1 for pulsing laser light and a focusing lens L2 for focusing the laser light. By scanning the laser light, the damaged layer 14 is introduced into the SiC substrate 20 .

[0133] The separation step S32 is a step of peeling the SiC substrate 30 from the SiC substrate body 20 along the damaged layer 14 by using a wafer peeling means P. As the wafer peeling means P, Figure 2 As shown, a method of separating the SiC substrate 20 by adsorbing the front and back surfaces to a susceptor can be exemplified. Alternatively, peeling can be performed by reciprocating a thin metal wire along the damaged layer 14 or by applying ultrasonic vibration to peel starting from the damaged layer 14.

[0134] In addition, the laser irradiation step S31 and the separation step S32 can adopt well-known technologies, for example, the technologies described in Japanese Patent Publication No. 2013-49161, Japanese Patent Publication No. 2018-207034, Japanese Patent Publication No. 2017-500725, Japanese Patent Publication No. 2017-526161, etc.

[0135] By going through the above-described etching step S10, crystal growth step S20, and peeling step S30, SiC substrate 30 can be manufactured from SiC original substrate 10. Figure 2 In the embodiment, one SiC substrate 30 is peeled off from one SiC original substrate 10 . However, the SiC substrate layer 13 may be formed thicker to peel off a plurality of SiC substrates 30 .

[0136] Furthermore, by performing the etching step S10 or the peeling step S30 on SiC original substrate 10 obtained by peeling SiC substrate 30 , SiC substrate 30 can be repeatedly manufactured.

[0137] Furthermore, it is also possible to manufacture a new SiC substrate 30 using SiC substrate 30 (SiC substrate layer 13 ) peeled from SiC substrate body 20 .

[0138] That is, the method for manufacturing a SiC substrate according to another embodiment further includes: an etching step S10 for removing the processed deteriorated layer of the peeled SiC substrate layer 13; a crystal growth step S20 for growing another SiC substrate layer 13 on the SiC substrate layer 13 to obtain a SiC substrate body 20; and a peeling step S30 for peeling off a portion of the SiC substrate body 20.

[0139] In this way, by using manufactured SiC substrate 30 as SiC original substrate 10 , further SiC substrate 30 can be manufactured.

[0140] In addition, the damaged layer 14 remains in the SiC original substrate 10 and the SiC substrate 30 after peeling. Figure 2 As shown, an etching step S10 may also be performed on the SiC original substrate 10 and the SiC substrate 30 after peeling to remove the damaged layer 14 (process-deteriorated layer).

[0141] Furthermore, in the case where ripples are formed at the surfaces of SiC original substrate 10 and SiC substrate 30 after separation, a mechanical polishing step such as a grinding step may be performed to remove the ripples.

[0142] According to the SiC substrate manufacturing method of the present invention, the SiC substrate 10 is heat-treated in the same environment (equipment system) during the etching step S10 and the crystal growth step S20. Conventionally, the CMP polishing equipment for removing the process-degraded layer 12 and the crystal growth equipment have to be separately purchased or outsourced. According to the present invention, since multiple steps can be performed using a single equipment system, costs can be significantly reduced.

[0143] Furthermore, when the etching step S10 and the crystal growth step S20 are performed using the same SiC material 40 , the raw material consumed in the crystal growth step S20 is replenished in the etching step S10 . Therefore, the life of the SiC material 40 can be extended.

[0144] Furthermore, according to the crystal growth step S20 of the present invention, SiC substrates 30 of desired specifications can be manufactured piece by piece (or in small quantities at a time). Therefore, SiC substrates 30 having a desired doping concentration can be manufactured in small quantities at a time. Furthermore, by selecting the SiC material 40, it is also possible to control the doping concentration on a piece-by-piece basis.

[0145] Furthermore, according to the crystal growth step S20 of the present invention, since only the thickness of the SiC substrate layer 13 needs to be grown, it is easy to maintain an environment for forming a high-quality SiC substrate 30. That is, compared to the case of forming an ingot whose growth point changes each time growth is performed (sublimation method), material loss can be reduced, and a high-quality SiC substrate 30 can be manufactured.

[0146] Furthermore, since a temperature gradient is provided along the direction in which the SiC original substrate 10 and the SiC material 40 oppose each other, the temperature distribution within the plane of the SiC original substrate 10 can be easily controlled to be substantially uniform. Therefore, large-diameter SiC substrates of 6 inches or more or 8 inches or more can be manufactured.

[0147] SiC substrate manufacturing equipment

[0148] Hereinafter, a manufacturing apparatus for realizing the manufacturing method of the SiC substrate according to the present invention will be described in detail. In this embodiment, the same reference numerals are given to the components that are substantially the same as those in the aforementioned manufacturing method, and their descriptions are simplified.

[0149] like Figure 5 As shown, the SiC substrate manufacturing apparatus according to this embodiment includes: a main body container 50 capable of accommodating a SiC original substrate 10 and containing a SiC material; and a heating furnace 60 capable of heating to form a temperature gradient between the SiC original substrate 10 and the SiC material 40.

[0150] (Main container)

[0151] The main body container 50 is a fitting container comprising an upper container 51 and a lower container 52 that can fit together. A small gap 53 is formed at the fitting portion between the upper container 51 and the lower container 52, and the main body container 50 is configured to be evacuated (vacuumed) through the gap 53.

[0152] The main container 50 also includes a SiC material 40 disposed opposite the SiC original substrate 10 and a raw material transfer space S1 for transferring the raw material between the SiC material 40 and the SiC original substrate 10. Furthermore, the doping concentration of the SiC material 40 is preferably set to a doping concentration corresponding to the desired SiC substrate 30.

[0153] According to this embodiment, the upper container 51 and the lower container 52 are made of polycrystalline SiC. Therefore, the main container 50 itself is made of SiC material 40. Alternatively, only the portion of the main container 50 facing the SiC original substrate 10 may be made of SiC material 40. In this case, the portion other than the SiC material 40 may be made of a high-melting-point material (the same material as the high-melting-point container 70 described later).

[0154] Although not shown, a structure may be employed in which the main body container 50 is entirely made of a high-melting-point material and separately accommodates the substrate-shaped SiC material 40. In this case, a spacer (such as the substrate holder 54 described later) may be disposed between the substrate-shaped SiC material 40 and the SiC original substrate 10 to form an etching space X or a crystal growth space Y.

[0155] That is, the main body container 50 is configured to generate an atmosphere containing Si and C elements in the internal space when heat treatment is performed while the SiC original substrate 10 is housed. In this embodiment, the main body container 50 composed of polycrystalline SiC is heated to form an atmosphere containing Si and C elements in the internal space.

[0156] Furthermore, it is desirable that the space within the main body container 50 subjected to the heat treatment be in a vapor pressure environment of a mixed system of a gaseous species containing the Si element and a gaseous species containing the C element. Examples of the gaseous species containing the Si element include Si, Si2, Si3, Si2C, SiC2, and SiC. Examples of the gaseous species containing the C element include Si2C, SiC2, SiC, and C. Specifically, it is preferable that the SiC-based gas be present in a quasi-enclosed space.

[0157] Raw material conveying space S1 is a space for conveying raw material from SiC raw substrate 10 to SiC material 40 using the temperature gradient provided between SiC raw substrate 10 and SiC material 40 as a driving force, and is a space for conveying raw material from SiC material 40 to SiC raw substrate 10 .

[0158] For example, the following case is considered: the SiC original substrate 10 is arranged so that when the temperature of the surface of the SiC original substrate 10 is compared with the temperature of the SiC material 40 opposite to the surface, the temperature of the SiC original substrate 10 side is high and the temperature of the upper container 51 is low (see Figure 6 In this manner, when the SiC original substrate 10 and the SiC material 40 are positioned relative to each other and heated with the SiC original substrate 10 at the high temperature side and the SiC material 40 at the low temperature side, the raw material is transferred from the SiC original substrate 10 to the SiC material 40, and the SiC original substrate 10 is etched. Specifically, by setting such a temperature gradient and performing heating, an etching space X is formed within the raw material transfer space S1.

[0159] In addition, if Figure 6 As shown, the main container 50 may also include a substrate holder 54 for positioning the SiC original substrate 10 on the high temperature side of the temperature gradient. Thus, by providing the substrate holder 54, the SiC original substrate 10 can be positioned on the high temperature side of the temperature gradient formed by the heating furnace 60, thereby forming an etching space X for the SiC original substrate 10. Furthermore, it is desirable that the substrate holder 54 be made of the same high melting point material as the high melting point container 70.

[0160] On the other hand, the following case is considered: the SiC original substrate 10 is arranged so that when the temperature of the surface of the SiC original substrate 10 is compared with the temperature of the SiC material 40 opposite to the surface, the temperature of the SiC original substrate 10 side is low and the temperature of the upper container 51 is high (refer to Figure 7 ). In this way, when the SiC original substrate 10 and the SiC material 40 are arranged relative to each other and heated in a manner such that the SiC original substrate 10 is on the low-temperature side and the SiC material 40 is on the high-temperature side, the raw material is transported from the SiC material 40 to the SiC original substrate 10, and the SiC substrate layer 13 grows on the SiC original substrate 10. That is, by setting such a temperature gradient and heating, a crystal growth space Y is formed in the raw material transport space S1.

[0161] Right now, Figure 6 The structure shown is the etching step S10 of the method for manufacturing a SiC substrate of the present invention. Figure 7The structure shown is the crystal growth step S20. At this time, in the etching step S10, SiC material 40 undergoes crystal growth, and in the crystal growth step S20, SiC material 40 is etched. Therefore, it is preferable that, in the etching step S10 and the crystal growth step S20, the SiC material 40 facing the SiC original substrate 10 is a portion.

[0162] Specifically, in Figure 6 In the etching step S10, the lower container 52 is subjected to crystal growth, and thus Figure 7 In the crystal growth step S20, it is preferable to arrange the lower container 52 on the high temperature side of the temperature gradient and supply the material to the SiC original substrate 10. In this way, by etching the portion of the SiC material 40 grown in the etching step S10 in the crystal growth step S20, the life of the SiC material 40 can be extended.

[0163] exist Figure 6 and Figure 7 , an example in which the main body container 50 is inverted is shown. However, by reversing the temperature gradient of the heating furnace 60 , the same portion of the SiC material 40 can also be used.

[0164] In addition, if Figure 6 As shown, the main vessel 50 may also be provided with a Si vapor supply source 55 capable of supplying Si vapor into the vessel. Examples of the Si vapor supply source 25 include solid Si (Si single crystal Si wafers, Si particles such as Si powder) and Si compounds.

[0165] For example, when the entire main body container 50 is made of polycrystalline SiC as in the present embodiment, the Si vapor supply source 55 is provided so that the Si / C atomic ratio in the main body container 50 exceeds 1.

[0166] Specifically, when a SiC original substrate 10 and a Si vapor supply source 55 (Si particles, etc.) meeting a stoichiometric ratio of 1:1 are arranged in a main body container 50 of polycrystalline SiC meeting a stoichiometric ratio of 1:1, the Si / C atomic ratio in the main body container 50 exceeds 1.

[0167] In this way, by heating the space where the Si / C atomic ratio exceeds 1, it is possible to approach the vapor pressure environment (SiC-Si equilibrium vapor pressure environment) when SiC (solid) and Si (liquid phase) are in phase equilibrium through the gas phase.

[0168] On the other hand, when no Si vapor supply source is provided in the main body container 50 , the Si / C atomic ratio in the main body container 50 is 1 or less.

[0169] Specifically, when the SiC original substrate 10 satisfying the stoichiometric ratio of 1:1 is arranged in the main body container 50 of polycrystalline SiC satisfying the stoichiometric ratio of 1:1, the Si / C atomic ratio in the main body container 50 is 1.

[0170] In this way, by heating the space where the Si / C atomic ratio is 1 or less, it is possible to approach the vapor pressure environment (SiC-C equilibrium vapor pressure environment) when SiC (solid phase) and C (solid phase) are in phase equilibrium through the gas phase.

[0171] In addition, the SiC—Si equilibrium vapor pressure environment and the SiC—C equilibrium vapor pressure environment in this specification include a near-thermal equilibrium vapor pressure environment that satisfies the relationship between the growth rate and the growth temperature derived from a theoretical thermal equilibrium environment.

[0172] (Heating furnace)

[0173] like Figure 5 As shown, the heating furnace 60 includes: a main heating chamber 61, which can heat the workpiece (SiC original substrate 10, etc.) to a temperature above 1000°C and below 2300°C; a preheating chamber 62, which can preheat the workpiece to a temperature above 500°C; a high melting point container 70, which can accommodate the main container 50; and a moving device 63 (moving platform), which can move the high melting point container 70 from the preheating chamber 62 to the main heating chamber 61.

[0174] The main heating chamber 61 is formed in a regular hexagonal shape in a planar cross-sectional view, and a high melting point container 70 is arranged inside the main heating chamber 61 .

[0175] A heater 64 (mesh heater) is installed inside the main heating chamber 61. Furthermore, a multi-layer heat-reflecting metal plate (not shown) is fixed to the sidewalls or ceiling of the main heating chamber 61. The multi-layer heat-reflecting metal plate is configured to reflect heat from the heater 64 toward the approximate center of the main heating chamber 61.

[0176] Thus, in the main heating chamber 61, the heater 64 is arranged so as to surround the high melting point container 70 storing the workpiece, and multiple layers of heat reflecting metal plates are arranged outside the heater 64, so that the temperature can be raised to 1000°C or higher and 2300°C or lower.

[0177] In addition, as the heater 64 , for example, a resistance heating type heater or a high-frequency induction heating type heater can be used.

[0178] Furthermore, the heater 64 may be configured to create a temperature gradient within the high-melting-point container 70. For example, the heater 64 may be configured to include multiple heaters arranged on the upper side. Furthermore, the heater 64 may be configured to have a width that increases as it moves upward. Alternatively, the heater 64 may be configured to increase the power supplied as it moves upward.

[0179] Furthermore, connected to the main heating chamber 61 are a vacuum forming valve 65 for exhausting the main heating chamber 61 , an inert gas injection valve 66 for introducing inert gas into the main heating chamber 61 , and a vacuum gauge 67 for measuring the vacuum degree in the main heating chamber 61 .

[0180] The vacuum forming valve 65 is connected to a vacuum pump (not shown) for exhausting the main heating chamber 61 to create a vacuum. By means of the vacuum forming valve 65 and the vacuum pump, the vacuum degree in the main heating chamber 61 can be adjusted to, for example, 10 Pa or less, more preferably 1 Pa or less, and even more preferably 10 Pa or less. -3 Pa or less. As the vacuum pump, a turbomolecular pump can be exemplified.

[0181] The inert gas injection valve 66 is connected to an inert gas supply source (not shown). Through the inert gas injection valve 66 and the inert gas supply source, the inert gas can be injected into the inert gas chamber at 10 -5 The inert gas is introduced into the main heating chamber 61 within a range of 10000 Pa. As the inert gas, Ar, He, N2, etc. can be selected.

[0182] The inert gas injection valve 66 is a doping gas supply device capable of supplying doping gas into the main body container 50. That is, by selecting a doping gas (eg, N2) as the inert gas, the doping concentration of the SiC substrate layer 13 can be adjusted.

[0183] The preheating chamber 62 is connected to the main heating chamber 61 and is configured to be able to move the high-melting-point container 70 via a moving device 63. Furthermore, the preheating chamber 62 of this embodiment is configured to be able to increase its temperature using the residual heat of the heater 64 of the main heating chamber 61. For example, when the main heating chamber 61 is heated to 2000°C, the preheating chamber 62 is heated to approximately 1000°C, enabling degassing of the workpiece (such as the SiC substrate 10, the main container 50, and the high-melting-point container 70).

[0184] The moving device 63 is configured to carry the high-melting-point container 70 and to be movable between the main heating chamber 61 and the preheating chamber 62. Since the moving device 63 completes the transfer between the main heating chamber 61 and the preheating chamber 62 in a minimum of approximately one minute, a heating and cooling rate of 1 to 1000°C / min can be achieved.

[0185] Since rapid heating and cooling are possible in this manner, it is possible to observe the surface shape having no low-temperature growth history during heating and cooling, which is difficult to achieve with conventional apparatuses.

[0186] In addition, Figure 3In the embodiment, the preheating chamber 62 is arranged below the main heating chamber 61, but the present invention is not limited thereto and the preheating chamber 62 may be arranged in any direction.

[0187] The moving device 63 according to this embodiment is a moving stage that carries the high-melting-point container 70. A small amount of heat is released from the contact portion between the moving stage and the high-melting-point container 70. This creates a temperature gradient within the high-melting-point container 70 (and within the main container 50).

[0188] That is, in the heating furnace 60 of the present embodiment, since the bottom of the high-melting-point container 70 is in contact with the moving stage, a temperature gradient is provided so that the temperature decreases from the upper container 71 toward the lower container 72 of the high-melting-point container 70. It is desirable that this temperature gradient be formed along the front-to-back direction of the SiC original substrate 10.

[0189] Furthermore, as described above, a temperature gradient may be formed by the structure of the heater 64. Furthermore, the heater 64 may be configured so that the temperature gradient can be reversed.

[0190] (High melting point container)

[0191] The heating furnace 60 preferably forms an atmosphere containing Si and can heat the main body container 50 in this atmosphere. The atmosphere containing Si in the heating furnace 60 according to this embodiment is formed using the high melting point container 70 and the Si vapor supply source 74 .

[0192] In addition, any method can be adopted as long as it can form an atmosphere containing the Si element around the main body container 50.

[0193] The high-melting-point container 70 is configured to contain a high-melting-point material. Examples include C as a general-purpose heat-resistant component, W, Re, Os, Ta, and Mo as high-melting-point metals, carbides such as Ta9C8, HfC, TaC, NbC, ZrC, Ta2C, TiC, WC, and MoC, nitrides such as HfN, TaN, BN, Ta2N, ZrN, and TiN, borides such as HfB2, TaB2, ZrB2, NB2, and TiB2, and polycrystalline SiC.

[0194] Like the main body container 50, the high melting point container 70 is a fitting container comprising an upper container 71 and a lower container 72 that fit together, and is configured to accommodate the main body container 50. A small gap 73 is formed at the fitting portion between the upper container 71 and the lower container 72, and the interior of the high melting point container 70 is configured to be evacuated (evacuated) through this gap 73.

[0195] Preferably, the high melting point container 70 includes a Si vapor supply source 55 capable of supplying a vapor of a gaseous species containing the Si element into the high melting point container 70 at a high pressure. The Si vapor supply source 55 may be any structure that generates Si vapor in the high melting point container 70 during the heat treatment, and examples thereof include solid Si (Si particles such as a single crystal Si wafer or Si powder) and Si compounds.

[0196] In the SiC substrate manufacturing apparatus according to the present embodiment, TaC is used as the material of the high melting point container 70, and tantalum silicide is used as the Si vapor supply source 55. That is, Figure 4 As shown, a tantalum silicide layer is formed inside the high melting point container 70 , and Si vapor is supplied from the tantalum silicide layer into the container during the heat treatment, thereby forming a Si vapor pressure atmosphere.

[0197] In addition, any structure may be adopted as long as it forms a vapor pressure of a gaseous species containing Si element in the high melting point container 70 during the heat treatment.

[0198] Example

[0199] Hereinafter, the present invention will be described in more detail with reference to Example 1, Example 2, Example 3, Example 4, Example 5, and Example 6.

[0200] Example 1 specifically illustrates the removal or reduction of the process-degraded layer 12 in the etching step S10. Example 2 specifically illustrates the removal or reduction of MSB in the etching step S10. Example 3 specifically illustrates the removal or reduction of MSB in the crystal growth step S20. Example 4 specifically illustrates the removal or reduction of BPD in the crystal growth step S20. Examples 5 and 6 illustrate the control of the doping concentration in the crystal growth step S20.

[0201] <Example 1: Removal or Reduction of Process-Degraded Layer in Etching Step>

[0202] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 and heat-treated under the following heat treatment conditions.

[0203] [SiC original substrate 10]

[0204] Polymorph: 4H-SiC

[0205] Substrate size: 10mm wide x 10mm long x 0.45mm thick

[0206] Deviation direction and angle: <11-20> direction 4° deviation

[0207] Etched surface: (0001) crystal plane

[0208] Depth of processed altered layer 12: 5μm

[0209] The depth of the process-degraded layer 12 was confirmed by the SEM-EBSD method. The process-degraded layer 12 can also be confirmed by TEM, μXRD, or Raman spectroscopy.

[0210] [Main body container 50]

[0211] Material: Polycrystalline SiC

[0212] Container size: diameter 60mm × height 4mm

[0213] Material of substrate holder 54: Single crystal SiC

[0214] Distance between SiC original substrate 10 and the bottom surface of main body container 50: 2 mm

[0215] Si / C atomic ratio in the container: less than 1

[0216] [High melting point container 70]

[0217] Material: TaC

[0218] Container size: diameter 160mm × height 60mm

[0219] Si vapor supply source 74 (Si compound): TaSi2

[0220] [Heat treatment conditions]

[0221] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0222] Heating temperature: 1800℃

[0223] Heating time: 20 minutes

[0224] Etching amount: 5μm

[0225] Temperature gradient: 1°C / mm

[0226] Etching speed: 0.25μm / min

[0227] Vacuum degree of main heating chamber: 10 -5 Pa

[0228] [Measurement of the machining-deteriorated layer using the SEM-EBSD method]

[0229] The lattice strain of the SiC original substrate 10 can be obtained by comparing it with a reference lattice as a reference. As a means of measuring the lattice strain, for example, the SEM-EBSD method can be used. The SEM-EBSD method is a method (Electron Back Scattering Diffraction: EBSD) that can measure the strain of a small area based on the Kikuchi line diffraction pattern obtained by electron backscattering in a scanning electron microscope (SEM). In this method, the lattice strain amount can be obtained by comparing the diffraction pattern of the reference lattice as a reference with the diffraction pattern of the measured lattice.

[0230] As a reference lattice, for example, a reference point is set in a region where lattice strain is not expected to occur. In other words, it is desirable to place the reference point in a region of the bulk layer 11. Generally, the depth of the process-degraded layer 12 is approximately 10 μm. Therefore, it is sufficient to set the reference point at a depth of approximately 20 to 35 μm, which is considered to be sufficiently deeper than the process-degraded layer 12.

[0231] The diffraction pattern of the lattice at the reference point is then compared with the diffraction pattern of the lattice at each measurement area measured at nanometer-level pitches. The lattice strain of each measurement area relative to the reference point can thereby be calculated.

[0232] In addition, the case where a reference point where lattice strain is considered not to occur is set as the reference lattice is shown, but of course it is also possible to use the ideal lattice of single crystal SiC as the reference, or to use the lattice occupying the majority (for example, more than half) of the surface of the measurement area as the reference.

[0233] By measuring the presence of lattice strain using the SEM-EBSD method, the presence of the process-degraded layer 12 can be determined. Specifically, when processing damage such as scratches, latent scratches, or strain is introduced, lattice strain is generated in the SiC original substrate 10, and thus the stress is observed using the SEM-EBSD method.

[0234] The SEM-EBSD method was used to observe the process-degraded layer 12 existing on the SiC original substrate 10 of Example 1 before and after the etching step S10. Figure 8 (a) and Figure 8 It is shown in (b) in FIG.

[0235] In this measurement, the cross section of the SiC original substrate 10 before and after the etching step S10 of Example 1 was measured using a scanning electron microscope under the following conditions.

[0236] SEM device: Merline manufactured by Zeiss

[0237] EBSD analysis: OIM crystal orientation analysis device manufactured by TSL Solutions

[0238] Accelerating voltage: 15 kV

[0239] Probe current: 15nA

[0240] Step size: 200nm

[0241] Reference point R depth: 20μm

[0242] Figure 8 (a) is a cross-sectional SEM-EBSD imaging image of the SiC original substrate 10 before the etching step S10 of Example 1.

[0243] If the Figure 8 As shown in (a) in FIG, before the etching step S10, a lattice strain with a depth of 5 μm is observed in the SiC original substrate 10. This is the lattice strain introduced during machining, and it is known that there is a machine-degraded layer 12. Figure 8 Compressive stress is observed in (a).

[0244] Figure 8 (b) is a cross-sectional SEM-EBSD imaging image of the SiC original substrate 10 after the etching step S10 of Example 1.

[0245] If the Figure 8 As shown in (b) in FIG. 1 , after the etching step S10, no lattice strain is observed in the SiC original substrate 10. That is, it is understood that the process-affected layer 12 is removed by the etching step S10.

[0246] In addition, MSB is formed on the surface of the SiC original substrate 10 after etching.

[0247] Thus, according to etching step S10, by arranging SiC original substrate 10 and SiC material 40 relative to each other and heating and etching with SiC original substrate 10 at the high temperature side and SiC material 40 at the low temperature side, it is possible to remove or reduce the process-degraded layer 12. Thus, since SiC base layer 13 can be formed on bulk layer 11 from which process-degraded layer 12 has been reduced or removed, a high-quality SiC substrate 30 can be manufactured.

[0248] <Example 2: Removal or Reduction of MSB in Etching Step>

[0249] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 and heat-treated under the following heat treatment conditions.

[0250] [SiC original substrate 10]

[0251] Polymorph: 4H-SiC

[0252] Substrate size: 10mm wide x 10mm long x 0.3mm thick

[0253] Deviation direction and angle: <11-20> direction 4° deviation

[0254] Etched surface: (0001) crystal plane

[0255] Presence of MSB: Yes

[0256] The step height, terrace width, and presence of MSB can be confirmed by an atomic force microscope (AFM) or a scanning electron microscope (SEM) image contrast evaluation method described in Japanese Patent Application Laid-Open No. 2015-179082.

[0257] [Main body container 50]

[0258] Material: Polycrystalline SiC

[0259] Container size: diameter 60mm × height 4mm

[0260] Material of substrate holder 54: Single crystal SiC

[0261] Distance between SiC original substrate 10 and the bottom surface of main body container 50: 2 mm

[0262] Si vapor supply source 55: single crystal Si wafer

[0263] Si / C atomic ratio in the container: more than 1

[0264] In this manner, by housing the Si wafer together with the SiC original substrate 10 in the main body container 50 , the Si / C atomic ratio in the container exceeds 1.

[0265] [High melting point container 70]

[0266] Material: TaC

[0267] Container size: diameter 160mm × height 60mm

[0268] Si vapor supply source 74 (Si compound): TaSi2

[0269] [Heat treatment conditions]

[0270] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0271] Heating temperature: 1900℃

[0272] Heating time: 60min

[0273] Temperature gradient: 1°C / mm

[0274] Etching speed: 300nm / min

[0275] Vacuum degree of main heating chamber: 10 -5 Pa

[0276] The steps on the surface of the SiC original substrate 10 of Example 2 before and after the etching step S10 were observed by SEM. Figure 9 (a) and Figure 9 The step height was measured by atomic force microscopy (AFM). The terrace width was measured by SEM.

[0277] The terrace width was calculated by drawing a vertical line through the steps in the captured SEM image and counting the number of steps on the line to calculate the average terrace width (terrace width = line length / number of steps on the line).

[0278] Figure 9 (a) is a SEM image of the surface of the SiC original substrate 10 before etching step S10 in Example 2. An MSB with a height of 3 nm or more is formed on the surface of the SiC original substrate 10 before etching step S10. The step height was measured using AFM.

[0279] Figure 9 (b) is an SEM image of the surface of the SiC original substrate 10 after the etching step S10 of Example 2. It can be seen that no MSB is formed on the surface of the SiC original substrate 10 after the etching step S10 of Example 2, and steps of 1.0 nm (full unit cell) are regularly arranged.

[0280] Thus, according to etching step S10, the MSB can be reduced or removed by etching SiC original substrate 10 in a quasi-enclosed space where the Si / C atomic ratio exceeds 1. Thus, SiC base layer 13 can be formed on bulk layer 11 in which the MSB has been reduced or removed, and high-quality SiC substrate 30 can be manufactured.

[0281] Furthermore, when observed by the SEM-EBSD method, the process-deteriorated layer 12 was also removed in the SiC original substrate 10 after the etching step S10 in Example 2.

[0282] <Example 3: Removal or Reduction of MSB in Crystal Growth Step>

[0283] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 and heat-treated under the following heat treatment conditions.

[0284] [SiC original substrate 10]

[0285] Polymorph: 4H-SiC

[0286] Substrate size: 10mm wide x 10mm long x 0.3mm thick

[0287] Deviation direction and angle: <11-20> direction 4° deviation

[0288] Etched surface: (0001) crystal plane

[0289] Presence of MSB: Yes

[0290] [Main body container 50]

[0291] Material: Polycrystalline SiC

[0292] Container size: diameter 60mm × height 4mm

[0293] Distance between SiC original substrate 10 and the bottom surface of main body container 50: 2 mm

[0294] Si vapor supply source 55: single crystal Si wafer

[0295] Si / C atomic ratio in the container: more than 1

[0296] In this manner, by housing the Si wafer together with the SiC original substrate 10 in the main body container 50 , the Si / C atomic ratio in the container exceeds 1.

[0297] [High melting point container 70]

[0298] Material: TaC

[0299] Container size: diameter 160mm × height 60mm

[0300] Si vapor supply source 74 (Si compound): TaSi2

[0301] [Heat treatment conditions]

[0302] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0303] Heating temperature: 1800℃

[0304] Heating time: 60min

[0305] Temperature gradient: 1°C / mm

[0306] Growth rate: 68nm / min

[0307] Main heating chamber 61 vacuum degree: 10 -5 Pa

[0308] The steps on the surface of the SiC original substrate 10 of Example 3 after the crystal growth step S20 were observed by SEM. Figure 10 In addition, the step height was measured by atomic force microscopy (AFM), and the terrace width was measured by SEM.

[0309] Figure 10 : is a SEM image of the surface of the SiC original substrate 10 after the crystal growth step S20 of Example 3. Figure 9 As in (a) above, an MSB having a height of 3 nm or more is formed on the surface of the SiC original substrate 10 before the crystal growth step S20. Figure 10 As shown, it can be seen that no MSB is formed on the surface of the SiC original substrate 10 after the crystal growth step S20 in Example 3, and steps of 1.0 nm (full unit cell) are regularly arranged.

[0310] Thus, according to the crystal growth step S20 , SiC substrate layer 13 without MSB formation can be formed by growing SiC original substrate 10 in a quasi-enclosed space with a Si / C atomic ratio exceeding 1. Thus, SiC substrate 30 with reduced or eliminated MSB can be manufactured.

[0311] <Example 4: Removal or Reduction of BPD in Crystal Growth Step>

[0312] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 and heat-treated under the following heat treatment conditions.

[0313] [SiC original substrate 10]

[0314] Polymorph: 4H-SiC

[0315] Substrate size: 10mm wide x 10mm long x 0.3mm thick

[0316] Deviation direction and angle: <11-20> direction 4° deviation

[0317] Growth surface: (0001) crystal plane

[0318] Presence of MSB: No

[0319] Presence of processing altered layer 12: None

[0320] [Main body container 50]

[0321] Material: Polycrystalline SiC

[0322] Container size: diameter 60mm × height 4mm

[0323] Distance between SiC original substrate 10 and SiC material 40: 2 mm

[0324] Si / C atomic ratio in the container: less than 1

[0325] [High melting point container 70]

[0326] Material: TaC

[0327] Container size: diameter 160mm × height 60mm

[0328] Si vapor supply source 74 (Si compound): TaSi2

[0329] [Heat treatment conditions]

[0330] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0331] Heating temperature: 1700℃

[0332] Heating time: 300min

[0333] Temperature gradient: 1°C / mm

[0334] Growth rate: 5nm / min

[0335] Main heating chamber 61 vacuum degree: 10 -5 Pa

[0336] (BPD conversion rate in SiC substrate layer)

[0337] Figure 11 This is an explanatory diagram of a method for determining the conversion rate of BPDs to other defects and dislocations (TEDs, etc.) in the SiC substrate layer 13 .

[0338] Figure 11 (a) in FIG. 2 shows the state where SiC substrate layer 13 is grown through crystal growth step S20. During this heating step, BPD present in SiC raw substrate 10 is converted to TED with a certain probability. Therefore, unless 100% conversion occurs, a mixture of TED and BPD exists on the surface of SiC substrate layer 13.

[0339] Figure 11(b) shows the state of defects in SiC substrate layer 13 confirmed using the KOH dissolution etching method. This KOH dissolution etching method involves immersing the SiC substrate in a molten salt (such as KOH) heated to approximately 500°C, forming etch pits at dislocations or defects, and identifying the type of dislocation based on the size and shape of the etch pits. This method determines the number of BPDs present on the surface of SiC substrate layer 13.

[0340] Figure 11 (c) shows the state after the KOH melting etching, after which the SiC base layer 13 is removed. In this method, after being flattened to the depth of the etching pit by mechanical polishing, CMP, etc., the SiC base layer 13 is removed by thermal etching to expose the surface of the SiC original substrate 10.

[0341] Figure 11 (d) shows the state of defects in the SiC original substrate 10 confirmed by the KOH melting etching method for the SiC original substrate 10 from which the SiC base layer 13 has been removed. This method obtains the number of BPDs present on the surface of the SiC original substrate 10.

[0342] according to Figure 11 The series of sequences shown in FIG. 1 are used to determine the number of BPDs present at the surface of the SiC substrate layer 13 (refer to FIG. Figure 11 (b)) and the number of BPDs present at the surface of the SiC original substrate 10 ( Figure 11 By comparing with (d) in the figure, the BPD conversion rate from BPD to other defects / dislocations in the crystal growth step S20 can be obtained.

[0343] The number of BPDs present on the surface of the SiC substrate layer 13 of Example 4 is 0 cm -2 The number of BPDs in the bulk layer 11 is about 1000 cm -2 .

[0344] That is, it can be understood that BPD is reduced or eliminated by placing the SiC original substrate 10 having no MSB on the surface in a quasi-closed space with a Si / C atomic ratio of 1 or less and performing crystal growth.

[0345] Thus, according to the crystal growth step S20, by growing the SiC original substrate 10 in a quasi-enclosed space with a Si / C atomic ratio of 1 or less, a SiC substrate layer 13 with a surface having reduced or removed BPD can be formed. Thus, a SiC substrate 30 having a SiC substrate layer 13 with reduced or removed BPD can be manufactured.

[0346] <Example 5: Control of Doping Concentration in Crystal Growth Step>

[0347] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 and heat-treated under the following heat treatment conditions.

[0348] [SiC original substrate 10]

[0349] Polymorph: 4H-SiC

[0350] Substrate size: 10mm wide x 10mm long x 0.3mm thick

[0351] Deviation direction and angle: <11-20> direction 4° deviation

[0352] Growth surface: (0001) crystal plane

[0353] Dopant: N

[0354] Doping concentration: 3×10 18 cm -3

[0355] Presence of MSB: No

[0356] Presence of processing altered layer 12: None

[0357] Furthermore, the dopant and doping concentration of the SiC original substrate 10 were confirmed by Raman spectroscopy.

[0358] [Main body container 50]

[0359] Material: Polycrystalline SiC

[0360] Container size: diameter 60mm × height 4mm

[0361] Distance between SiC original substrate 10 and SiC material 40: 2 mm

[0362] Dopant: N

[0363] Doping concentration: 1×10 17 cm -3 Below (Below the detection limit of Raman spectroscopy)

[0364] Si / C atomic ratio in the container: less than 1

[0365] [High melting point container 70]

[0366] Material: TaC

[0367] Container size: diameter 160mm × height 60mm

[0368] Si vapor supply source 74 (Si compound): TaSi2

[0369] [Heat treatment conditions]

[0370] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0371] Heating temperature: 1700℃

[0372] Heating time: 300min

[0373] Temperature gradient: 1°C / mm

[0374] Growth rate: 5nm / min

[0375] Main heating chamber 61 vacuum degree: 10 -5 Pa

[0376] Figure 12 This is an SEM image of the SiC substrate of Example 5 grown under the above-mentioned conditions, observed from a cross section at a magnification of ×10000. The thickness of the SiC substrate layer 13 of Example 5 was 1.5 μm.

[0377] The doping concentration of the SiC substrate layer 13 in Example 5 is 1×10 17 cm -3 Hereinafter, the doping concentration of the SiC original substrate 10 is 3×10 18 cm -3 It can be seen that the doping concentration of the SiC material 40 is continued in the SiC substrate layer 13. In addition, as Figure 12 As shown, since the SEM image contrast of the SiC substrate layer 13 is brighter than that of the SiC original substrate 10 , it can be understood that the doping concentration of the SiC substrate layer 13 is lower than that of the SiC original substrate 10 .

[0378] <Example 6: Control of Doping Concentration in Crystal Growth Step>

[0379] The SiC original substrate 10 was housed in the main body container 50 and the high melting point container 70 under the following conditions.

[0380] [SiC original substrate 10]

[0381] The same SiC original substrate 10 as in Example 5 was used.

[0382] [Main body container 50]

[0383] The same main body container 50 as in Example 5 was used.

[0384] [High melting point container 70]

[0385] The same high melting point container 70 as in Example 5 was used.

[0386] [Heat treatment conditions]

[0387] SiC original substrate 10 arranged under the above-described conditions was heat-treated under the following conditions.

[0388] Heating temperature: 1800℃

[0389] Heating time: 60min

[0390] Temperature gradient: 1°C / mm

[0391] Growth rate: 50nm / min

[0392] Etching speed: 50nm / min

[0393] Main heating chamber 61 vacuum degree: 13Pa (introducing N2 gas)

[0394] Figure 13 This is a SEM image obtained by observing the cross section of the SiC substrate 30 of Example 6 grown under the above-mentioned conditions at a magnification of ×10,000.

[0395] The thickness of the SiC substrate layer 13 of Example 6 is 3 μm.

[0396] In addition, the doping concentration of the SiC substrate layer 13 of Example 6 is 2×10 19 cm -3 , the doping concentration of the bulk layer 11 is 3×10 18 cm -3 That is, the doping concentration of the SiC substrate layer 13 is higher than the doping concentration of the SiC original substrate 10. This can also be confirmed from the following facts: Figure 13 As shown, the SEM image contrast of the SiC substrate layer 13 is darker than that of the bulk layer 11 .

[0397] According to the method for manufacturing a SiC substrate of the present invention, the doping concentration of the SiC substrate layer 13 can be controlled by selecting the doping concentration of the SiC material 40 or by introducing N2 gas during the crystal growth step S20. Thus, a SiC substrate 30 with a desired doping concentration can be manufactured.

[0398] <Thermodynamic calculations>

[0399] Figure 14 (a) is a graph showing the relationship between the heating temperature and the etching rate in the etching step of the present invention. The horizontal axis of the graph is the inverse of the temperature, and the vertical axis of the graph represents the etching rate in logarithmic terms.

[0400] Figure 14 (b) is a graph showing the relationship between the heating temperature and the growth rate in the crystal growth step of the present invention. The horizontal axis of the graph is the inverse of the temperature, and the vertical axis of the graph represents the growth rate in logarithmic terms.

[0401] exist Figure 14 In these graphs, the results of heat treatment of the SiC original substrate 10 when the SiC original substrate 10 is arranged in a space (inside the main container 50) where the Si / C atomic ratio exceeds 1 are indicated by a circle. In addition, the results of heat treatment of the SiC original substrate 10 when the SiC original substrate 10 is arranged in a space (inside the main container 50) where the Si / C atomic ratio is less than 1 are indicated by an x.

[0402] In the portions marked with o, no MSBs were formed on the surface of the SiC original substrate 10, and the step height was one unit cell. On the other hand, in the portions marked with x, MSBs were formed on the surface of the SiC original substrate 10.

[0403] In addition, Figure 14 In the graph, the thermodynamic calculation results in the SiC-Si equilibrium vapor pressure environment are represented by a dotted line (Arrhenius diagram), and the thermodynamic calculation results in the SiC-C equilibrium vapor pressure environment are represented by a double-dashed line (Arrhenius diagram).

[0404] The following describes in detail the thermodynamic calculations for the etching step and the crystal growth step.

[0405] (Thermodynamic calculation of etching step)

[0406] In the thermodynamic calculation of the etching step, when the main container 50 is heated, the amount of vapor (gas-phase species containing Si element and gas-phase species containing C element) generated from the SiC original substrate 10 can be converted into the etching amount. In this case, the etching rate of the SiC original substrate 10 is calculated using the following formula 1.

[0407] [Formula 1]

[0408]

[0409] Here, T is the temperature of the SiC substrate 10, m i Is a gas phase species (Si x C y ) is the mass of one molecule, and k is the Boltzmann constant.

[0410] In addition, P i is a value obtained by adding the vapor pressure generated in the main container 50 by heating the SiC original substrate 10. i As gas phase species, SiC, Si2C, SiC2, etc. can be imagined.

[0411] Figure 14The dashed line in (a) represents the thermodynamic calculation result when etching single crystal SiC in a vapor pressure environment where SiC (solid) and Si (liquid) are in phase equilibrium through the gas phase. Specifically, the thermodynamic calculation was performed using Equation 1 under the following conditions (i) to (iv). (i) The volume is constant, and the SiC-Si equilibrium vapor pressure environment; (ii) The etching driving force is the temperature gradient within the main container 50; (iii) The raw material gases are SiC, Si2C, and SiC2; and (iv) The desorption coefficient of the raw material sublimation from the step is 0.001.

[0412] Figure 14 The double-dotted dashed line in (a) represents the thermodynamic calculation result when single crystal SiC is etched in a vapor pressure environment where SiC (solid phase) and C (solid phase) are in phase equilibrium through the gas phase. Specifically, the thermodynamic calculation was performed using Equation 1 under the following conditions (i) to (iv). (i) The volume is constant, and the SiC-C equilibrium vapor pressure environment; (ii) The etching driving force is the temperature gradient within the main container 50; (iii) The raw material gases are SiC, Si2C, and SiC2; and (iv) The desorption coefficient of the raw material sublimation from the step is 0.001.

[0413] In addition, the data of each chemical species used in the thermodynamic calculations adopted the values ​​of the JANAF thermochemical table.

[0414] According to the Figure 14 As can be seen from the graph (a), the result (marked with ○) obtained by etching the SiC original substrate 10 by placing the SiC original substrate 10 in a space (inside the main container 50) where the Si / C atomic ratio exceeds 1 is consistent with the thermodynamic calculation result of single crystal SiC etching in a SiC-Si equilibrium vapor pressure environment.

[0415] In addition, it can be seen that the results (× marks) obtained by etching the SiC original substrate 10 by placing the SiC original substrate 10 in a space (inside the main container 50) with a Si / C atomic ratio of less than 1 are consistent with the thermodynamic calculation results of single crystal SiC etching in a SiC-C equilibrium vapor pressure environment.

[0416] Furthermore, it can be seen that under the conditions of the ○-marked portion etched in the SiC-Si equilibrium vapor pressure environment, the formation of MSB is decomposed and suppressed, and steps with a height of 1 nm (1 unit cell) are arranged on the surface of the SiC original substrate 10 .

[0417] On the other hand, it is found that MSB is formed under the conditions of the portion marked with × etched in the SiC—C equilibrium vapor pressure environment.

[0418] (Thermodynamic calculation of crystal growth steps)

[0419] Next, in the thermodynamic calculation of the crystal growth step, when the main container 50 is heated, the partial pressure difference of the vapor generated from the SiC raw material and the SiC substrate can be converted into the growth amount. As the driving force for growth at this time, a chemical potential difference or a temperature gradient can be assumed. Alternatively, this chemical potential difference can be assumed to be the partial pressure difference of the gaseous species generated at the surface of the polycrystalline SiC (SiC material 40) and the single crystal SiC (SiC original substrate 10). In this case, the growth rate of SiC is calculated by the following formula 2.

[0420] [Formula 2]

[0421]

[0422] Here, T is the temperature of the SiC raw material side, m i Is a gas phase species (Si x C y ) is the mass of one molecule, and k is the Boltzmann constant.

[0423] In addition, P 原料 -P 衬底 This is the amount of growth that occurs when the raw material gas becomes supersaturated and precipitates as SiC. As the raw material gas, SiC, Si2C, and SiC2 can be considered.

[0424] Right now, Figure 14 The dotted line in (b) is the result of thermodynamic calculation when single crystal SiC is grown using polycrystalline SiC as a raw material in a vapor pressure environment when SiC (solid) and Si (liquid phase) are in phase equilibrium through the gas phase.

[0425] Specifically, thermodynamic calculations were performed using Equation 2 under the following conditions (i) to (iv): (i) a SiC-Si equilibrium vapor pressure environment with a constant volume; (ii) the growth driving forces were the temperature gradient within the main container 50 and the vapor pressure difference (chemical potential difference) between polycrystalline SiC and single crystal SiC; (iii) the raw material gases were SiC, Si2C, and SiC2; and (iv) the adsorption coefficient of the raw material on the step of the SiC original substrate 10 was 0.001.

[0426] also, Figure 14 The double-dashed line in (b) is the result of thermodynamic calculation when single crystal SiC is grown using polycrystalline SiC as a raw material in a vapor pressure environment when SiC (solid phase) and C (solid phase) are in phase equilibrium through the gas phase.

[0427] Specifically, thermodynamic calculations were performed using Equation 2 under the following conditions (i) to (iv): (i) a SiC-C equilibrium vapor pressure environment with a constant volume; (ii) the growth driving forces were the temperature gradient within the main container 50 and the vapor pressure difference (chemical potential difference) between polycrystalline SiC and single crystal SiC; (iii) the raw material gases were SiC, Si2C, and SiC2; and (iv) the adsorption coefficient of the raw material on the step of the SiC original substrate 10 was 0.001.

[0428] In addition, the data of each chemical species used in the thermodynamic calculations adopted the values ​​of the JANAF thermochemical table.

[0429] According to the Figure 14 As can be seen from the curve graph (b), the result (marked with ○) of growing the SiC substrate layer 13 on the SiC original substrate 10 by placing the SiC original substrate 10 in a space (inside the main container 50) where the Si / C atomic ratio exceeds 1 is consistent with the thermodynamic calculation results of SiC growth in a SiC-Si equilibrium vapor pressure environment.

[0430] In addition, it can be seen that the result (× mark) of growing the SiC substrate layer 13 on the SiC original substrate 10 by placing the SiC original substrate 10 in a space (inside the main container 50) where the Si / C atomic ratio is less than 1 is consistent with the thermodynamic calculation results of SiC growth in a SiC-C equilibrium vapor pressure environment.

[0431] In a SiC—Si equilibrium vapor pressure environment, a growth rate of 1.0 μm / min or higher is estimated to be achieved at a heating temperature of 1960° C. Furthermore, a growth rate of 2.0 μm / min or higher is estimated to be achieved at a heating temperature of 2000° C. or higher.

[0432] On the other hand, under a SiC—C equilibrium vapor pressure environment, a growth rate of 1.0 μm / min or higher is estimated to be achieved at a heating temperature of 2000° C. Furthermore, a growth rate of 2.0 μm / min or higher is estimated to be achieved at a heating temperature of 2030° C. or higher.

[0433] Description of Reference Numerals

[0434] 10 SiC original substrate

[0435] 11 Block layer

[0436] 12 Processing metamorphic layer

[0437] 13 SiC substrate layer

[0438] 20 SiC substrate

[0439] 30 SiC substrate

[0440] 40 SiC material

[0441] 50 Main container

[0442] 51 Upper container

[0443] 52 lower container

[0444] 53 Gap

[0445] 54. Substrate holding tool

[0446] 55 Si vapor supply source

[0447] 60 Heating Furnace

[0448] 61 Main heating chamber

[0449] 62 Preheating Chamber

[0450] 63 mobile devices

[0451] 64 Heater

[0452] 65 Vacuum forming valve

[0453] 66 Inert gas injection valve

[0454] 67 Vacuum Gauge

[0455] 70 High Melting Point Container

[0456] 71 Upper container

[0457] 72 lower container

[0458] 73 Gap

[0459] 74 Si vapor supply source

[0460] S1 Raw material conveying space

[0461] X Etching Space

[0462] Y Crystal growth space

[0463] S10 etching step

[0464] S20 crystal growth step

[0465] S30 peeling step

[0466] S31 Laser irradiation steps

[0467] S32 separation step

Claims

1. A method for manufacturing a SiC substrate, comprising: Etching step, etching the SiC original substrate; a crystal growth step of growing a SiC substrate layer on the SiC original substrate to obtain a SiC substrate body; as well as a peeling step of peeling off a portion of the SiC substrate body to obtain a SiC substrate, The etching step and the crystal growth step are steps of placing the SiC original substrate in a main body container made of SiC, arranging the SiC original substrate and the SiC material relative to each other and heating them within a temperature range of 1400°C to 2300°C to form a temperature gradient between the SiC original substrate and the SiC material; Wherein, the etching step is heated in such a manner that the SiC original substrate is the high temperature side and the SiC material is the low temperature side; In the crystal growth step, heating is performed in a manner such that the SiC original substrate is at a low temperature side and the SiC material is at a high temperature side.

2. The method for manufacturing a SiC substrate according to claim 1, wherein: The etching step and the crystal growth step are steps of heating the SiC original substrate and the SiC material in an atmosphere containing Si element and C element.

3. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The etching step and the crystal growth step are steps of heating the SiC original substrate and the SiC material in a quasi-closed space.

4. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The etching step and the crystal growth step are steps of placing the SiC original substrate in the main body container containing the SiC material and heating it.

5. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The etching step includes placing the SiC original substrate and the SiC material opposite to each other in a quasi-enclosed space with a Si / C atomic ratio exceeding 1 and heating them with the SiC original substrate at a high temperature side and the SiC material at a low temperature side.

6. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The crystal growth step includes placing the SiC original substrate and the SiC material opposite to each other in a quasi-enclosed space with a Si / C atomic ratio exceeding 1 and heating them with the SiC original substrate at the low temperature side and the SiC material at the high temperature side.

7. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The crystal growth step includes arranging the SiC original substrate and the SiC material relative to each other in a quasi-enclosed space with a Si / C atomic ratio of 1 or less and heating them with the SiC original substrate at the low temperature side and the SiC material at the high temperature side.

8. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: The peeling step includes: a laser irradiation step of introducing a damaged layer into the SiC substrate body; and a separation step of performing separation starting from the damaged layer.

9. The method for manufacturing a SiC substrate according to claim 1 or 2, further comprising: an etching step of etching the peeled-off SiC original substrate; a crystal growth step of growing a SiC substrate layer on the SiC original substrate to obtain a SiC substrate body; as well as The peeling step peels off a portion of the SiC substrate body.

10. The method for manufacturing a SiC substrate according to claim 1 or 2, wherein: Also includes: an etching step of etching the peeled SiC substrate layer; a crystal growth step of growing another SiC substrate layer on the SiC substrate layer to obtain a SiC substrate body; and The peeling step peels off a portion of the SiC substrate body.

Images