Detection method and device of rectifier inverter circuit and uninterruptible power supply

Abstract

The present invention provides a detection method, device and uninterruptible power supply for a rectifier inverter circuit, the method comprising: obtaining voltage phase values ​​at the input and output ends of the rectifier inverter circuit; performing attenuation processing on the voltage phase value at the output end to obtain a reference value; comparing the voltage phase value at the input end with the reference value, if the voltage phase value at the input end is less than the reference value, then starting timing and recording the duration of the voltage phase value at the input end being less than the reference value; if the duration is greater than a preset duration, then determining that an abnormality occurs in the rectifier inverter circuit, wherein the abnormality includes power failure at the input end, or the voltage phase at the input end is not synchronized with the voltage phase at the output end. The present invention can realize abnormal detection of power failure and phase loss of synchronization in a rectifier inverter circuit.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a detection method and device for a rectifier inverter circuit and an uninterruptible power supply. Background Art

[0002] With the development of circuit technology, rectifier inverter technology has been widely used. However, in the actual application of rectifier inverter circuits, there may be a phenomenon that the input power supply of the rectifier inverter circuit is powered off, and the input voltage and output voltage are not synchronized, resulting in a short circuit inside the rectifier inverter circuit. The components inside the rectifier inverter circuit need to withstand a large short-circuit voltage or short-circuit circuit. In severe cases, the components inside the rectifier inverter circuit may be damaged, affecting the safety and reliability of the rectifier inverter circuit. Summary of the invention

[0003] The present invention provides a detection method and device for a rectifier inverter circuit and an uninterruptible power supply, which can realize abnormal detection of power failure and phase loss of synchronization in the rectifier inverter circuit.

[0004] In a first aspect, the present invention provides a detection method for a rectifier inverter circuit, comprising: obtaining voltage phase values ​​at the input and output ends of the rectifier inverter circuit; performing attenuation processing on the voltage phase value at the output end to obtain a reference value; comparing the voltage phase value at the input end with the reference value, and if the voltage phase value at the input end is less than the reference value, starting timing and recording the duration for which the voltage phase value at the input end is less than the reference value; if the duration is greater than a preset duration, determining that an abnormality has occurred in the rectifier inverter circuit, wherein the abnormality includes power failure at the input end, or the voltage phase at the input end and the voltage phase at the output end are not synchronized.

[0005] The present invention provides a detection method for a rectifier inverter circuit, which obtains a reference value by performing attenuation processing on the phase value of the output end, and compares the voltage phase value of the input end with the reference value. When the voltage phase value of the input end is less than the reference value for a period greater than a preset time, it is determined that the input end of the rectifier inverter circuit is powered off or the phase is out of sync, thereby realizing abnormal detection of power failure or phase loss of sync at the input end of the rectifier inverter circuit.

[0006] In one possible implementation, obtaining a voltage phase value at an input terminal of a rectifier inverter circuit includes: obtaining an instantaneous voltage value at the input terminal and an effective voltage value at the input terminal; and determining a ratio of the instantaneous voltage value at the input terminal to the effective voltage value at the input terminal as the voltage phase value at the input terminal.

[0007] In a possible implementation, obtaining a voltage phase value at an output end of a rectifier inverter circuit includes: obtaining a voltage phase value at the output end through a phase-locked loop.

[0008] In a possible implementation, the voltage phase value at the output end is attenuated to obtain a reference value, including: multiplying the voltage phase value at the output end by a preset coefficient to determine the reference value, wherein the preset coefficient is negatively correlated with the harmonic content at the input end of the rectifier inverter circuit.

[0009] In a possible implementation, the voltage phase value of the input terminal is compared with a reference value, and if the voltage phase value of the input terminal is less than the reference value, timing is started, including: judging whether the voltage phase value of the output terminal is in a non-detection interval; if the voltage phase value of the output terminal belongs to the non-detection interval, the voltage phase value of the input terminal and the reference value are not compared; if the voltage phase value of the output terminal belongs to the detection interval, the voltage phase value of the input terminal and the reference value are compared, and timing is started when the voltage phase value of the input terminal is less than the reference value; the non-detection interval is an interval in which the absolute value of the difference between the voltage phase value of the output terminal and the first phase value is less than a preset threshold value, the first phase value is the phase value when the instantaneous value of the voltage at the output terminal is zero, and the detection interval is an interval other than the non-detection interval.

[0010] In a possible implementation manner, the preset duration is greater than 1 / 20 of the period of the input end and less than 1 / 4 of the period of the input end.

[0011] In one possible implementation, the rectifier inverter circuit is a three-bridge arm topology circuit, which includes a first bridge arm, a first capacitor, a second bridge arm and a third bridge arm connected in parallel in sequence, the first bridge arm includes a first switch and a second switch tube, the second bridge arm includes a third switch and a fourth switch tube, the third bridge arm includes a fifth switch and a sixth switch tube, the midpoint of the first bridge arm and the midpoint of the second bridge arm are connected to the input end, and the midpoint of the third bridge arm and the midpoint of the second bridge arm are connected to the output end.

[0012] In a second aspect, an embodiment of the present invention provides a detection device for a rectifier inverter circuit, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in the first aspect or any possible implementation method when executing the computer program.

[0013] In a third aspect, an embodiment of the present invention provides an uninterruptible power supply, characterized in that it comprises a detection device for a rectifier-inverter circuit as described in the second aspect, and a rectifier-inverter circuit; wherein the rectifier-inverter circuit comprises a rectifier module and an inverter module; a first end of the rectifier module is connected to the input end, and a second end is connected to the first end of the inverter module, for converting a first AC signal input from the input end into a DC signal; a second end of the inverter module is connected to the output end, for converting the DC signal into a second AC signal to power a load.

[0014] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method described in the first aspect and any possible implementation method of the first aspect are implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0016] Figure 1 It is a structural schematic diagram of a rectifier inverter circuit provided by an embodiment of the present invention;

[0017] Figure 2 It is a schematic structural diagram of a three-bridge arm topology circuit provided by an embodiment of the present invention;

[0018] Figure 3 is a structural schematic diagram of a control device provided by an embodiment of the present invention;

[0019] Figure 4 It is a flow chart of a detection method of a rectifier inverter circuit provided by an embodiment of the present invention;

[0020] Figure 5 It is a flow chart of another detection method of a rectifier inverter circuit provided by an embodiment of the present invention;

[0021] Figure 6 It is a flow chart of another detection method of a rectifier inverter circuit provided by an embodiment of the present invention;

[0022] Figure 7 is a waveform diagram of the voltage phase synchronization between the input terminal and the output terminal provided by the embodiment of the present invention;

[0023] Figure 8 is a waveform diagram when the voltage phases of the input end and the output end provided by the embodiment of the present invention are not synchronized;

[0024] Fig. 9 It is a structural schematic diagram of another control device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0025] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0026] In the description of the present invention, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, "at least one" and "plurality" refer to two or more. The words "first", "second", etc. do not limit the quantity and execution order, and the words "first", "second", etc. do not limit them to be different.

[0027] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way for easy understanding.

[0028] In addition, the terms "including" and "having" and any variations thereof mentioned in the description of this application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or modules is not limited to the listed steps or modules, but may optionally include other steps or modules that are not listed, or may optionally include other steps or modules that are inherent to these processes, methods, products or devices.

[0029] In order to make the purpose, technical solutions and advantages of the present invention more clear, the following will be described through specific embodiments in conjunction with the accompanying drawings of the present invention.

[0030] Figure 1 The topology diagram of a rectifier-inverter circuit is shown in FIG. The rectifier-inverter circuit includes a rectifier module 101 and an inverter module 102; the first end of the rectifier module 101 is connected to the input end, and the second end is connected to the first end of the inverter module 102, for converting a first AC signal input from the input end into a DC signal; the second end of the inverter module 102 is connected to the output end, for converting the DC signal into a second AC signal to supply power to the load.

[0031] Figure 1The rectifier-inverter circuit shown may have a power failure at the input end or a phase asynchronism between the input voltage and the output voltage, causing the components inside the rectifier module 101 and the inverter module 102 to withstand a large reverse voltage, or an internal short circuit in the rectifier module 101 and the inverter module 102, generating a large short-circuit current, which may easily cause device damage.

[0032] For example, Figure 2 As shown, the rectifier inverter circuit can be a three-bridge arm topology circuit, which includes a first bridge arm, a first capacitor C1, a second bridge arm and a third bridge arm connected in parallel in sequence, the first bridge arm includes a first switch tube T1 and a second switch tube T2, the second bridge arm includes a third switch T3 and a fourth switch tube T4, the third bridge arm includes a fifth switch T5 and a sixth switch tube T6, the midpoint of the first bridge arm and the midpoint of the second bridge arm are connected to the input end, and the midpoint of the third bridge arm and the midpoint of the second bridge arm are connected to the output end. Among them, the input end is connected to an AC power supply. For example, the input end can be connected to a mains power supply, and the output end is connected to a load.

[0033] In some embodiments, the three-arm topology circuit further includes: a first diode D1 connected in reverse parallel to the first switch tube T1, a second diode D2 connected in reverse parallel to the second switch tube T2, a third diode D3 connected in reverse parallel to the third switch tube T3, a fourth diode D4 connected in reverse parallel to the fourth switch tube T4, a fifth diode D5 connected in reverse parallel to the fifth switch tube T5, and a sixth diode D6 connected in reverse parallel to the sixth switch tube T6. The six diodes can play the role of freewheeling and voltage stabilization.

[0034] In some embodiments, the three-arm bridge topology circuit further includes a first inductor L1 connected in series in the input circuit and a second inductor L2 connected in series in the output circuit.

[0035] Exemplarily, the load at the output end may be a second inductor C2 and a first resistor R1 .

[0036] against Figure 2 In the three-arm bridge topology circuit shown, if the input end is powered off or the input voltage and the output voltage are not synchronized, a large reverse voltage and short-circuit current may be generated inside the three-arm bridge topology circuit, causing damage to the switch tube and diode inside the three-arm bridge topology circuit.

[0037] To solve the above technical problems, an embodiment of the present invention provides a detection method for a rectifier inverter circuit. To implement the method, an embodiment of the present application provides a control device for executing the detection method for a rectifier inverter circuit. Figure 3A schematic diagram of the structure of a control device provided in an embodiment of the present application. The control device 300 includes a communication module 301 and a processing module 302. The control device 300 is connected to the input end and the output end of the rectifier inverter circuit respectively, and obtains electrical parameters of the input end and the output end respectively, such as electrical parameters such as voltage and current. The control device is also connected to the switch tube to realize the control of the switch tube.

[0038] Figure 4 A detection method for a rectifier inverter circuit provided in an embodiment of the present application is applied to Figure 3 In the control device 300 shown, the method includes steps S401-S403.

[0039] S401. A control device obtains voltage phase values ​​at an input end and an output end of a rectifier inverter circuit.

[0040] As a possible implementation manner, the control device may obtain an instantaneous value of the voltage at the input terminal and an effective value of the voltage at the input terminal, and determine a ratio of the instantaneous value of the voltage at the input terminal to the effective value of the voltage at the input terminal as a voltage phase value at the input terminal.

[0041] Exemplarily, assuming that the control device obtains an instantaneous value of the voltage at the input terminal of 110 V, and the effective value of the voltage at the input terminal is 220 V, then the voltage phase value at the input terminal is 0.5.

[0042] In some embodiments, the control device may obtain a voltage peak value at the input terminal, and determine an effective value of the voltage at the input terminal according to the voltage maximum value.

[0043] As a possible implementation manner, the control device may obtain the voltage phase value of the output terminal according to a phase-locked loop.

[0044] It should be noted that the voltage phase value of the output terminal is related to the load condition of the output terminal. For example, when the output terminal is connected to a capacitive load or an inductive load, the waveform of the voltage may be distorted, causing the voltage phase value of the output terminal to change. Therefore, the voltage phase value of the output terminal can be obtained according to the phase-locked loop, avoiding the problem of large voltage phase value error caused by actual load measurement.

[0045] As a possible implementation, the control device may periodically detect the instantaneous voltage values ​​at the input and output ends of the rectifier inverter circuit. For example, assuming that the working cycle of the rectifier inverter circuit is 20 ms, the detection cycle of the control device may be 0.5 ms or 0.2 ms.

[0046] As a possible implementation, the control device may detect the instantaneous voltage value at the input and output ends of the rectifier inverter circuit when receiving instruction information for instructing the control device to detect the instantaneous voltage value. Exemplarily, the control device may detect the instantaneous voltage value when receiving the instruction information sent by the rectifier inverter circuit.

[0047] As a possible implementation, the control device may normalize the voltage phase values ​​at the input and output ends of the rectifier inverter circuit. Exemplarily, the control device may normalize the voltage phase values ​​at the input and output ends to the interval of (-1, 1). In this way, it is convenient for the control device to compare, judge and analyze the voltage phase values ​​at the input and output ends.

[0048] S402: The control device performs attenuation processing on the voltage phase value of the output end to obtain a reference value.

[0049] As a possible implementation, the control device may determine the product of the voltage phase value at the output end and a preset coefficient as the reference value, wherein the preset coefficient is negatively correlated with the harmonic content at the input end of the rectifier inverter circuit.

[0050] Exemplarily, the higher the harmonic content at the input end of the rectifier-inverter circuit, the smaller the preset coefficient, and accordingly, the smaller the reference value. The lower the harmonic content at the input end of the rectifier-inverter circuit, the larger the preset coefficient, and accordingly, the larger the reference value.

[0051] For example, the control device can attenuate the voltage phase value of the output terminal to 0.7 times, and accordingly, the preset coefficient is 0.7. Assume that the change interval of the voltage phase value of the output terminal is (-1, 1), and the change interval of the reference value is (-0.7, 0.7).

[0052] In some embodiments, the value of the preset coefficient can be pre-set, or the preset coefficient can also be modified by the control device according to the actual operating conditions. It should be noted that when the reference value is small, the detection method of the rectifier inverter circuit is too sensitive and easily causes malfunction. When the reference value is large, the detection method of the rectifier inverter circuit is too slow, resulting in failure to successfully detect. Therefore, the value of the second preset coefficient should be within a reasonable range.

[0053] Exemplarily, the reference value may be greater than or equal to 0.5 and less than or equal to 0.9. For example, the preset coefficient may be 0.7. The present invention is not limited to this.

[0054] S403: The control device compares the voltage phase value at the input end with a reference value.

[0055] As a possible implementation manner, the control device may directly compare the magnitude relationship between the voltage phase value at the input end and the reference value.

[0056] As another possible implementation manner, the control device may determine the magnitude relationship between the voltage phase value of the input terminal and the reference value by judging whether the difference between the voltage phase value of the input terminal and the reference value is less than zero.

[0057] S404: If the voltage phase value of the input terminal is smaller than the reference value, start timing and record the duration for which the voltage phase value of the input terminal is smaller than the reference value.

[0058] In the embodiment of the present application, the voltage phase value of the input terminal is less than the reference value, which is used to indicate that the voltage phase value of the input terminal may be abnormal, that is, the voltage of the input terminal may be powered off or out of synchronization, resulting in the voltage phase value of the input terminal being less than the reference value.

[0059] It is understandable that, when it is determined that the voltage phase value at the input terminal may be abnormal, the control device needs to determine the duration of the abnormal situation. Therefore, the control device can control the timer to start timing when the voltage phase value at the input terminal is less than the reference value to record the duration of the voltage phase value at the input terminal being less than the reference value.

[0060] S405: If the duration is longer than the preset duration, it is determined that an abnormality occurs in the rectifier inverter circuit.

[0061] The abnormality includes power failure at the input end, or a voltage phase at the input end and a voltage phase at the output end being out of sync.

[0062] It should be noted that in order to improve the accuracy of the detection method provided by the present invention, the preset time length should be set within a reasonable range. If the preset time length is set too long, it is easy to cause damage to the components in the rectifier inverter circuit; if the preset time length is set too short, it is easy to cause the detection method to be too sensitive, and there may be detection errors, resulting in reduced accuracy.

[0063] Exemplarily, the preset duration is greater than 1 / 20 of the period of the input terminal and less than 1 / 4 of the period of the input terminal. For example, when the frequency of the input terminal is 50 Hz and the period is 20 ms, the preset duration should be greater than 1 ms and less than 5 ms.

[0064] In another exemplary embodiment, the preset duration may also be determined according to the frequency of the input terminal. For example, assuming that the fluctuation range of the frequency of the input terminal is 39 Hz to 55 Hz, the value range of the preset duration may be greater than 0.9 mA and less than 1.25 ms.

[0065] The present invention provides a detection method for a rectifier inverter circuit, which obtains a reference value by performing attenuation processing on the phase value of the output end, and compares the voltage phase value of the input end with the reference value. When the voltage phase value of the input end is less than the reference value for a period greater than a preset time, it is determined that the input end of the rectifier inverter circuit is powered off or the phase is out of sync, thereby realizing abnormal detection of power failure or phase loss of sync at the input end of the rectifier inverter circuit.

[0066] Optional, such as Figure 5 As shown, step S403 can be specifically implemented as steps S501-S503.

[0067] S501. The control device determines whether the voltage phase value at the output end is in an undetectable interval.

[0068] S502: If the voltage phase value at the output end belongs to the non-detection interval, the control device does not compare the voltage phase value at the input end with the reference value.

[0069] S503: If the voltage phase value at the output end belongs to the detection interval, the control device compares the voltage phase value at the input end with the reference value, and starts timing when the voltage phase value at the input end is less than the reference value.

[0070] Among them, the non-detection interval is an interval in which the absolute value of the difference between the voltage phase value of the output end and the first phase value is less than a preset threshold, the first phase value is the phase value when the instantaneous value of the voltage at the output end is zero, and the detection interval is an interval other than the non-detection interval.

[0071] For example, assuming that the instantaneous value of the voltage at the output terminal at phase points such as phase 0, π, 2π, ... is zero, the first phase value may be phase points such as phase 0, π, 2π, ... The non-detection interval may be an interval near the first phase value, that is, an interval in which the absolute value of the difference between the voltage phase value at the output terminal and the first phase value is less than a preset threshold. For example, the non-detection interval may be (-0.1π, 0.1π), (0.9π, 1.1π), etc.

[0072] It should be noted that in order to improve the accuracy of the detection method of the present invention, a non-detection interval is set for the zero-crossing region of the voltage phase value at the output end, that is, the voltage phase value at the input end is not compared with the reference value in this interval. In the interval with a larger absolute value of the voltage phase value, that is, the detection interval, the voltage phase value at the input end is compared with the reference value to achieve accurate detection of abnormalities in the rectifier inverter circuit.

[0073] like Figure 6 As shown, the present invention provides a detection method for a rectifier inverter circuit, which is applied to a control device and includes steps S601-S609.

[0074] S601. Start.

[0075] S602: The control device obtains the voltage phase value U at the input end. 入 And the voltage phase value U at the output 出 .

[0076] S603: The control device performs attenuation processing on the voltage phase value of the output end to obtain a reference value U R1 .

[0077] The reference value is the product of the voltage phase value at the output end and a preset coefficient.

[0078] S604: The control device determines whether it is in the detection range. If yes, execute S605; if no, execute S602.

[0079] As a possible implementation manner, the control device may determine whether it is in the detection interval according to the voltage phase value of the output terminal.

[0080] As another possible implementation manner, the control device may determine whether it is in the detection interval based on a reference value.

[0081] S605, the control device determines the voltage phase value U at the input end 入 Is it less than the reference value U R1 If yes, then execute S606, if no, then execute S602.

[0082] S606: The control device controls the timer to count.

[0083] S607: The control device determines whether the duration is greater than a preset duration. If yes, execute S608; if no, execute S606.

[0084] The duration is the duration during which the voltage phase value at the input end is less than the reference value.

[0085] S608: The control device determines that an abnormality occurs in the rectifier inverter circuit.

[0086] S609, end.

[0087] based on Figure 6 In the illustrated embodiment, the present invention can detect power failure and phase asynchronism abnormality problems at the input end of the rectifier inverter circuit, thereby improving the safety and reliability of the rectifier inverter circuit.

[0088] For example, Figure 7 This is a waveform diagram when the voltage phases of the input and output terminals are synchronized. Figure 7 The voltage phase value U at the input 入 and reference value U R1 Phase synchronization, that is, the voltage at the input and the voltage at the output run synchronously.

[0089] Figure 8 This is a waveform diagram when the voltage phases at the input and output ends are not synchronized. Figure 8 The voltage phase value U at the input 入 and reference value U R1 The phase of the control device is not synchronized. 入 and reference value U R1 Compare and record the voltage phase value U at the input 入 Less than the reference value U R1 When the duration is longer than the preset duration, the control device determines that an abnormality occurs in the rectifier inverter circuit. For example, when the duration is longer than T, the control device determines that an abnormality occurs in the rectifier inverter circuit.

[0090] It should be understood that the order of execution of the steps in the above embodiment does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present invention.

[0091] The following is an embodiment of the device of the present invention. For details not described in detail therein, reference may be made to the corresponding method embodiment described above.

[0092] based on Figure 3 The control device 300 shown in the figure is used to implement the detection method of the rectifier inverter circuit described in the above embodiment. The control device 300 includes: a communication module 301 and a processing module 302.

[0093] The communication module 301 is used to obtain the voltage phase value of the input end and the output end of the rectifier inverter circuit;

[0094] The processing module 302 is used to attenuate the voltage phase value of the output end to obtain a reference value; compare the voltage phase value of the input end with the reference value, and if the voltage phase value of the input end is less than the reference value, start timing and record the duration of the voltage phase value of the input end being less than the reference value; if the duration is greater than a preset duration, determine that an abnormality has occurred in the rectifier inverter circuit, wherein the abnormality includes power failure at the input end, or the voltage phase of the input end is not synchronized with the voltage phase of the output end.

[0095] In a possible implementation, the communication module 301 is specifically used to obtain the instantaneous value of the voltage at the input end and the effective value of the voltage at the input end; the processing module 302 is specifically used to determine the ratio of the instantaneous value of the voltage at the input end to the effective value of the voltage at the input end as the voltage phase value of the input end.

[0096] In a possible implementation, the acquisition module 301 is specifically configured to acquire a voltage phase value of an output terminal through a phase-locked loop.

[0097] In a possible implementation, the processing module 302 is specifically configured to determine the product of the voltage phase value at the output end and a preset coefficient as a reference value, and the preset coefficient is negatively correlated with the harmonic content at the input end of the rectifier inverter circuit.

[0098] In one possible implementation, the processing module 302 is specifically used to determine whether the voltage phase value of the output end is in a non-detection interval; if the voltage phase value of the output end belongs to the non-detection interval, the voltage phase value of the input end and the reference value are not compared; if the voltage phase value of the output end belongs to the detection interval, the voltage phase value of the input end and the reference value are compared, and when the voltage phase value of the input end is less than the reference value, the timing is started; the non-detection interval is an interval in which the absolute value of the difference between the voltage phase value of the output end and the first phase value is less than a preset threshold, the first phase value is the phase value when the instantaneous value of the voltage at the output end is zero, and the detection interval is an interval other than the non-detection interval.

[0099] In a possible implementation, the processing module 302 is specifically configured to determine a preset duration according to the frequency and period of the output end.

[0100] In one possible implementation, the rectifier inverter circuit is a three-bridge arm topology circuit, which includes a first bridge arm, a first capacitor, a second bridge arm and a third bridge arm connected in parallel in sequence, the first bridge arm includes a first switch and a second switch tube, the second bridge arm includes a third switch and a fourth switch tube, the third bridge arm includes a fifth switch and a sixth switch tube, the midpoint of the first bridge arm and the midpoint of the second bridge arm are connected to the input end, and the midpoint of the third bridge arm and the midpoint of the second bridge arm are connected to the output end.

[0101] Fig. 9 Schematic diagram of another control device provided by an embodiment of the present invention. Fig. 9 As shown, the control device 300 of this embodiment includes: a processor 901, a memory 902, and a computer program 903 stored in the memory 902 and executable on the processor 901. When the processor 901 executes the computer program 903, the steps in the above-mentioned method embodiments of the power supply control system are implemented, for example Figure 4 , Figure 5 and Figure 6 Alternatively, when the processor 901 executes the computer program 903, the functions of each module / unit in the above-mentioned device embodiments are implemented, for example Figure 3 The functions of the communication module 301 and the processing module 302 are shown.

[0102] Exemplarily, the computer program 903 may be divided into one or more modules / units, which are stored in the memory 902 and executed by the processor 901 to implement the present invention. The one or more modules / units may be a series of computer program instruction segments capable of implementing specific functions, which are used to describe the execution process of the computer program 903 in the control device 300. For example, the computer program 903 may be divided into Figure 3 The communication module 301 and the processing module 302 are shown.

[0103] The processor 901 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0104] The memory 902 may be an internal storage unit of the control device 300, such as a hard disk or memory of the control device 300. The memory 902 may also be an external storage device of the control device 300, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the control device 300. Further, the memory 902 may also include both an internal storage unit of the control device 300 and an external storage device. The memory 902 is used to store the computer program and other programs and data required by the control device. The memory 902 may also be used to temporarily store data that has been output or is to be output.

[0105] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0106] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0107] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0108] In the embodiments provided by the present invention, it should be understood that the disclosed devices / terminals and methods can be implemented in other ways. For example, the device / terminal embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0109] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0110] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0111] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the method embodiments of the above-mentioned power control system can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0112] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A detection method for a rectifier inverter circuit, It is characterized in that include: Obtaining voltage phase values ​​at the input and output ends of the rectifier inverter circuit; wherein, obtaining the instantaneous voltage value of the input end and the effective voltage value of the input end; determining the ratio of the instantaneous voltage value of the input end to the effective voltage value of the input end as the voltage phase value of the input end; obtaining the voltage phase value of the output end through a phase-locked loop; Performing attenuation processing on the voltage phase value of the output end to obtain a reference value; Comparing the voltage phase value of the input terminal with the reference value, if the voltage phase value of the input terminal is less than the reference value, starting timing, and recording the duration of the voltage phase value of the input terminal being less than the reference value; If the duration is longer than a preset duration, it is determined that an abnormality occurs in the rectifier inverter circuit, wherein the abnormality includes power failure at the input end, or a voltage phase at the input end is out of sync with a voltage phase at the output end; The attenuation processing of the voltage phase value of the output end to obtain the reference value includes: determining the product of the voltage phase value of the output end and a preset coefficient as the reference value, and the preset coefficient is negatively correlated with the harmonic content of the input end of the rectifier inverter circuit.

2. The method according to claim 1, It is characterized in that The comparing the voltage phase value of the input terminal with the reference value, and starting timing if the voltage phase value of the input terminal is less than the reference value, comprises: Determining whether the voltage phase value of the output terminal is in an undetectable interval; If the voltage phase value of the output terminal belongs to the non-detection interval, the voltage phase value of the input terminal is not compared with the reference value; If the voltage phase value of the output terminal belongs to the detection interval, the voltage phase value of the input terminal is compared with the reference value, and when the voltage phase value of the input terminal is less than the reference value, timing is started; Among them, the non-detection interval is an interval in which the absolute value of the difference between the voltage phase value of the output end and the first phase value is less than a preset threshold, the first phase value is the phase value when the instantaneous value of the voltage at the output end is zero, and the detection interval is an interval other than the non-detection interval.

3. The method according to claim 1, It is characterized in that The preset duration is greater than 1 / 20 of the period of the input end and less than 1 / 4 of the period of the input end.

4. The method according to claim 1, It is characterized in that The rectifier inverter circuit is a three-bridge arm topology circuit, which includes a first bridge arm, a first capacitor, a second bridge arm and a third bridge arm connected in parallel in sequence, the first bridge arm includes a first switch and a second switch tube, the second bridge arm includes a third switch and a fourth switch tube, the third bridge arm includes a fifth switch and a sixth switch tube, the midpoint of the first bridge arm and the midpoint of the second bridge arm are connected to the input end, and the midpoint of the third bridge arm and the midpoint of the second bridge arm are connected to the output end.

5. A detection device for a rectifier inverter circuit, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, It is characterized in that When the processor executes the computer program, the steps of the method according to any one of claims 1 to 4 are implemented.

6. A computer-readable storage medium storing a computer program, It is characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.

7. An uninterruptible power supply, It is characterized in that include The detection device for the rectifier inverter circuit as claimed in claim 5; and A rectifier-inverter circuit, the rectifier-inverter circuit comprising a rectifier module and an inverter module; in, The first end of the rectifier module is connected to the input end, and the second end is connected to the first end of the inverter module, and is used to convert the first AC signal input from the input end into a DC signal; The second end of the inverter module is connected to the output end, and is used to convert the DC signal into a second AC signal to supply power to the load.

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