A novel multi-faceted heat dissipation power semiconductor module

Abstract

The present invention relates to the technical field of power modules, and more specifically to a novel multi-sided heat dissipation power semiconductor module, comprising an intermediate transition layer and a first copper-clad insulating substrate and a second copper-clad insulating substrate, respectively disposed on either side of the intermediate transition layer. The first end surface of the intermediate transition layer is provided with a first surface circuit, the second end surface of the intermediate transition layer is provided with a second surface circuit, the interior of the intermediate transition layer is provided with an intermediate transition circuit, the first copper-clad insulating substrate is provided with a first substrate circuit electrically connected to the first surface circuit, the second copper-clad insulating substrate is provided with a second substrate circuit electrically connected to the second surface circuit, and the intermediate transition layer is further provided with a refrigerant inlet and a refrigerant outlet. The novel multi-sided heat dissipation power semiconductor module provided by the present invention utilizes a multi-sided and refrigerant-embedded approach for heat dissipation, greatly improving heat dissipation performance and eliminating wire bonding, thereby improving the reliability of the power semiconductor module and reducing parasitic inductance and switching losses.

Description

Technical Field

[0001] The present invention relates to the technical field of power modules, and in particular to a novel multi-faceted heat dissipation power semiconductor module. Background Art

[0002] With the development of technology, the power density and heat dissipation performance requirements of power modules are increasing year by year. The higher the power of the power device, the greater the heat generated by the semiconductor chip. If the heat generated by the chip is not dissipated in time, it will seriously affect the performance and reliability of the power module.

[0003] To meet the demands of high power, current power modules face the following challenges: 1. Existing power modules use a single-sided design, with the semiconductor chip mounted on one side of a copper-clad insulating substrate and heat dissipated on the other. However, this single-sided design is no longer able to achieve rapid heat dissipation in response to high power demands. 2. Existing power semiconductors are bonded together using metal wires, resulting in unstable connections that affect the long-term reliability of the power module. Furthermore, the inability to reduce parasitic inductance affects switching losses and limits the increase in switching frequency. Summary of the Invention

[0004] In order to solve the technical problem that the single-sided design of the power module in the existing technology can no longer meet the heat dissipation requirements under high power, the present invention proposes a new multi-sided heat dissipation power semiconductor module, which adopts double-sided and internal refrigerant heat dissipation methods to greatly improve the heat dissipation effect and meet high power requirements.

[0005] The technical solution of the present invention:

[0006] A novel multi-sided heat dissipation power semiconductor module, comprising:

[0007] an intermediate transition layer, wherein a first surface circuit is provided on a first end surface of the intermediate transition layer, a second surface circuit is provided on a second end surface of the intermediate transition layer, and an intermediate transition circuit is provided inside the intermediate transition layer that is electrically connected to the first surface circuit and the second surface circuit;

[0008] a first copper-clad insulating substrate, the first copper-clad insulating substrate being arranged on one side of the intermediate transition layer, the first copper-clad insulating substrate being provided with a first substrate circuit electrically connected to the first surface circuit;

[0009] A second copper-clad insulating substrate is disposed on the other side of the intermediate transition layer. A second substrate circuit is provided on the second copper-clad insulating substrate and is electrically connected to the second surface circuit. A refrigerant input port and a refrigerant output port are also provided on the intermediate transition layer for cooling by refrigerant.

[0010] Furthermore, the first substrate circuit is arranged on a side of the first copper-clad insulating substrate facing the first surface circuit, and the first substrate circuit and the first surface circuit are electrically connected by welding; the second substrate circuit is arranged on a side of the second copper-clad insulating substrate facing the second surface circuit, and the second substrate circuit and the second surface circuit are electrically connected by welding.

[0011] Furthermore, the first surface circuit includes a plurality of first electrical connection bumps, the first substrate circuit includes a first chip and a second chip, and the first surface circuit is directly welded to the first chip and the second chip via the plurality of first electrical connection bumps.

[0012] Furthermore, the second surface circuit includes a plurality of second electrical connection bumps, the second substrate circuit includes a third chip and a fourth chip, and the second surface circuit is directly welded to the third chip and the fourth chip via the plurality of second electrical connection bumps.

[0013] Furthermore, the first chip and the third chip are diodes, and the second chip and the fourth chip are IGBTs.

[0014] Furthermore, the first surface circuit includes a first electrical connection bump a, a first electrical connection bump b, a first electrical connection bump c, a first electrical connection bump d, a first electrical connection bump e, and a first electrical connection bump f. The anode of the first chip is welded to the first electrical connection bump a, the cathode of the first chip is electrically connected to the collector of the second chip, the emitter of the second chip is welded to the first electrical connection bump b and the first electrical connection bump c, respectively, and the gate of the second chip is welded to the first electrical connection bump d. The intermediate transition layer is also provided with a first power terminal, a second power terminal, a first emitter signal terminal, and a second power terminal. The first electrical connection bump a and the first electrical connection bump b are electrically connected to the second power terminal through the intermediate transition circuit, the first electrical connection bump c is electrically connected to the first emitter signal terminal through the intermediate transition circuit, the first electrical connection bump d is electrically connected to the first gate signal terminal through the intermediate transition circuit, the first electrical connection bump e and the first electrical connection bump f are electrically connected to the first power terminal through the intermediate transition circuit, and the first electrical connection bump e and the first electrical connection bump f are electrically connected to the cathode of the first chip and the collector of the second chip.

[0015] Furthermore, the second surface circuit includes a second electrical connection bump a, a second electrical connection bump b, a second electrical connection bump c, a second electrical connection bump d, a second electrical connection bump e, and a second electrical connection bump f. The anode of the third chip is welded to the second electrical connection bump a, the cathode of the third chip is electrically connected to the collector of the fourth chip, the emitter of the fourth chip is welded to the second electrical connection bump b and the second electrical connection bump c, respectively, and the gate of the fourth chip is welded to the second electrical connection bump d. The intermediate transition layer is also provided with a third power terminal, a second emitter signal terminal, and a second The second electrical connection bump a and the second electrical connection bump b are electrically connected to the third power terminal through the intermediate transition circuit, the second electrical connection bump c is electrically connected to the second emitter signal terminal through the intermediate transition circuit, the second electrical connection bump d is electrically connected to the second gate signal terminal through the intermediate transition circuit, the second electrical connection bump e and the second electrical connection bump f are electrically connected to the second power terminal through the intermediate transition circuit, and the second electrical connection bump e and the second electrical connection bump f are electrically connected to the cathode of the third chip and the collector of the fourth chip.

[0016] Furthermore, the intermediate transition layer is square in shape as a whole, and the refrigerant inlet and the refrigerant outlet are respectively arranged at two diagonal corners of the intermediate transition layer.

[0017] Furthermore, a serpentine refrigerant channel is provided in the intermediate transition layer, and two ends of the refrigerant channel are respectively connected to the refrigerant input port and the refrigerant output port.

[0018] Furthermore, the multi-sided heat dissipation power semiconductor module further includes a plastic package shell, which wraps and protects the intermediate transition layer, the first copper-clad insulating substrate and the second copper-clad insulating substrate.

[0019] After adopting the above technical solution, the novel multi-faceted heat dissipation power semiconductor module provided by the present invention has the following beneficial effects compared with the prior art:

[0020] 1. The present invention sets an intermediate transition layer, sets a first copper-clad insulating substrate and a second copper-clad insulating substrate on both sides of the intermediate transition layer respectively, and sets a refrigerant channel in the intermediate transition layer to dissipate heat through the refrigerant. In this way, compared with the prior art, both sides of the intermediate transition layer are used to dissipate heat, which greatly increases the heat dissipation area, and cooling is performed by the refrigerant, further improving the overall heat dissipation effect, so that the power semiconductor module can dissipate heat quickly, can meet high power requirements, and at the same time improve the reliability of the power semiconductor module.

[0021] 2. The present invention directly welds each chip to the electrical connection bumps on the intermediate transition layer. Compared with the existing technology, the metal bonding wire is eliminated and the chip surface is directly welded to the electrical connection bumps, which makes the connection more stable and improves the long-term reliability of the power semiconductor module. In addition, the welding method can reduce parasitic inductance and switching loss, which is conducive to increasing the switching frequency.

[0022] 3. The present invention directly welds each chip to each electrical connection bump on the intermediate transition layer, so that each chip surface is in direct contact with the electrical connection bump, increasing the heat dissipation contact area, and the heat dissipation is contact conduction type, further improving the overall heat dissipation effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 4 is a side view of the power semiconductor module (excluding the plastic package housing) of this embodiment;

[0024] Figure 2 for Figure 1 An enlarged partial schematic diagram of

[0025] Figure 3 Schematic diagram of the structure of the intermediate transition layer of this embodiment;

[0026] Figure 4 Schematic diagram of the connection between the intermediate transition layer and the first copper-clad insulating substrate of this embodiment;

[0027] Figure 5 Schematic diagram of the structure of the first surface circuit and the first substrate circuit of this embodiment;

[0028] Figure 6 This is a schematic diagram of the connection between the intermediate transition layer and the second copper-clad insulating substrate of this embodiment;

[0029] Figure 7 Schematic diagram of the structure of the second substrate circuit and the second surface circuit of this embodiment;

[0030] Figure 8 is a circuit schematic diagram of the power semiconductor module of this embodiment;

[0031] Figure 9 This is a front view of the power semiconductor module (including the plastic package housing) of this embodiment;

[0032] Figure 10 FIG. 1 is a schematic diagram of the overall structure of the power semiconductor module (including the plastic package housing) of this embodiment.

[0033] in,

[0034] Intermediate transition layer 1, first surface circuit 11, first electrical connection bump a111, first electrical connection bump b112, first electrical connection bump c113, first electrical connection bump d114, first electrical connection bump e115, first electrical connection bump f116; second surface circuit 12, second electrical connection bump a121, second electrical connection bump b122, second electrical connection bump c123, second electrical connection bump d124, second electrical connection bump e125, second electrical connection bump f126; refrigerant input port 131, refrigerant output port 132; first power terminal 141, second power terminal 142, third power terminal 143; first emitter signal terminal 151, first gate signal terminal 152, second emitter signal terminal 153, second gate signal terminal 154;

[0035] First copper-clad insulating substrate 2, first substrate circuit 21, first chip 211, second chip 212, emitter a2121, gate a2122;

[0036] Second copper-clad insulating substrate 3, second substrate circuit 31, third chip 311, fourth chip 312, emitter b3121, gate b3122;

[0037] Plastic shell 4. DETAILED DESCRIPTION

[0038] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is in no way intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0039] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0040] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0041] like Figure 1-3 As shown, this embodiment provides a novel multi-faceted heat dissipation power semiconductor module, which includes an intermediate transition layer 1, a first copper-clad insulating substrate 2, and a second copper-clad insulating substrate 3. The first end surface of the intermediate transition layer 1 is provided with a first surface circuit 11, the second end surface of the intermediate transition layer 1 is provided with a second surface circuit 12, and the interior of the intermediate transition layer 1 is provided with an intermediate transition circuit electrically connected to the first surface circuit 11 and the second surface circuit 12; further, the first copper-clad insulating substrate 2 is arranged on a side close to the first surface circuit 11 of the intermediate transition layer 1, and the first copper-clad insulating substrate 2 is provided with a A first substrate circuit 21 is electrically connected to the first surface circuit 11, and a second copper-clad insulating substrate 3 is arranged on the other side of the intermediate transition layer 1. A second substrate circuit 31 is provided on the second copper-clad insulating substrate 3 and is electrically connected to the second surface circuit 12; further, a refrigerant inlet 131 and a refrigerant outlet 132 are also provided on the intermediate transition layer 1, and a refrigerant channel is provided in the intermediate transition layer 1, and the two ends of the refrigerant channel are respectively connected to the refrigerant inlet 131 and the refrigerant outlet 132, so that cooling is carried out by refrigerants such as water, and heat is taken away in time. Preferably, the refrigerant channel is set to be winding to improve the heat dissipation effect.

[0042] Thus, this embodiment provides an intermediate transition layer 1, and provides a first copper-clad insulating substrate 2 and a second copper-clad insulating substrate 3 on both sides of the intermediate transition layer 1, respectively. Furthermore, a refrigerant channel is provided within the intermediate transition layer 1, and heat is dissipated through the refrigerant. Thus, compared with the prior art, both sides of the intermediate transition layer 1 are utilized for heat dissipation, greatly increasing the heat dissipation area. Furthermore, cooling through the refrigerant further improves the overall heat dissipation area and heat dissipation effect, allowing the power semiconductor module to dissipate heat quickly, meeting high power requirements, and improving the reliability of the power semiconductor module. Furthermore, this embodiment provides an intermediate transition circuit within the intermediate transition layer 1, which is electrically connected to the first surface circuit 11 and the second surface circuit 12. The first surface circuit 11 and the second surface circuit 12 are then electrically connected to the respective substrate circuits, thereby completing the circuit connection of the entire power semiconductor module. This fully utilizes the space of the intermediate transition layer 1, making the overall structure more compact and the overall appearance more simple and beautiful.

[0043] In order to further improve the heat dissipation performance of the power semiconductor module, in this embodiment, the first surface circuit 11 and the first substrate circuit 21 as well as the second surface circuit 12 and the second substrate circuit 31 are electrically connected by welding. Figure 4-7As shown, the first substrate circuit 21 is arranged on the side of the first copper-clad insulating substrate 2 facing the first surface circuit 11, and the first substrate circuit 21 is electrically connected to the first surface circuit 11 by welding; the second substrate circuit 31 is arranged on the side of the second copper-clad insulating substrate 3 facing the second surface circuit 12, and the second substrate circuit 31 is electrically connected to the second surface circuit 12 by welding.

[0044] More specifically, the first surface circuit 11 includes a plurality of first electrical connection bumps, the first substrate circuit 21 is welded with a first chip 211 and a second chip 212, and the first surface circuit 11 is directly welded to the first chip 211 and the second chip 212 through a plurality of first electrical connection bumps; the second surface circuit 12 includes a plurality of second electrical connection bumps, the second substrate circuit 31 is welded with a third chip 311 and a fourth chip 312, and the second surface circuit 12 is directly welded to the third chip 311 and the fourth chip 312 through a plurality of second electrical connection bumps; wherein, the welding method may be selected from but not limited to friction welding, ultrasonic welding, etc., the first chip and the third chip may be selected from but not limited to FRED diodes, and the second chip and the fourth chip may be selected from but not limited to IGBTs.

[0045] In this way, this embodiment directly welds the first chip 211, the second chip 212, the third chip 311 and the fourth chip 312 to the electrical connection bumps on the intermediate transition layer 1. Compared with the existing technology, on the one hand, the metal bonding wire is removed, and the chip surface is directly welded to the electrical connection bumps, which makes the connection more stable and improves the long-term reliability of the power semiconductor module. In addition, the welding method can reduce parasitic inductance and switching loss, which is conducive to increasing the switching frequency. On the other hand, since the chip surface is in direct contact with the electrical connection bumps, the heat dissipation contact area is increased, and each chip is directly in contact with the intermediate transition layer 1 for conductive heat dissipation, which can further improve the overall heat dissipation effect.

[0046] The following is combined with Figure 4-8 The electrical connection between each electrical connection bump and each chip is described in detail, wherein the attached Figure 5 in Figure 5 a is a schematic diagram showing the first electrical connection bumps on the first surface circuit 11, Figure 5 b is a schematic diagram of each chip on the first substrate circuit 21; Figure 7 in Figure 7 a is a schematic diagram showing the chips on the second substrate circuit 31, Figure 7 b is a schematic diagram showing the second electrical connection bumps on the second surface circuit 12 .

[0047] First, if Figure 4-5As shown, the first surface circuit 11 includes a first electrical connection bump a111, a first electrical connection bump b112, a first electrical connection bump c113, a first electrical connection bump d114, a first electrical connection bump e115 and a first electrical connection bump f116. The first electrical connection bump a111 is correspondingly arranged at a position that can be welded to the first chip 211, and the first electrical connection bump b112, the first electrical connection bump c113 and the first electrical connection bump d114 are correspondingly arranged at positions that can be welded to the second chip 212. Furthermore, the anode of the first chip 211 is welded to the first electrical connection bump a111, the cathode of the first chip 211 is electrically connected to the collector of the second chip 212 through the first substrate circuit, the two surfaces of the emitter a2121 of the second chip 212 are welded to the first electrical connection bump b112, and one of the surfaces is also welded to the first electrical connection bump c113. The first electrical connection bump c113 is smaller and is used for lead-out. The gate a2122 of the second chip 212 is welded to the first electrical connection bump d114. Furthermore, the intermediate transition layer 1 is also provided with a first power terminal 141, a second power terminal 142, a first emitter signal terminal 151, and a first gate signal terminal 152. The first electrical connection bump a111 and the first electrical connection bump b112 are electrically connected to the second power terminal 142 through the intermediate transition circuit, the first electrical connection bump c113 is electrically connected to the first emitter signal terminal 151 through the intermediate transition circuit, and the first electrical connection bump d114 is electrically connected to the first gate signal terminal 152 through the intermediate transition circuit. Furthermore, the first electrical connection bump e115 and the first electrical connection bump f116 are electrically connected to the first power terminal 141 through the intermediate transition circuit, and the first electrical connection bump e115 and the first electrical connection bump f116 are welded to the welding portion extending from the cathode of the first chip 211 and the collector of the second chip 212. This is achieved Figure 8 The circuit connection of the upper half-bridge in a power semiconductor module is shown.

[0048] Similarly, if Figure 6-7As shown, the second surface circuit 12 includes a second electrical connection bump a121, a second electrical connection bump b122, a second electrical connection bump c123, a second electrical connection bump d124, a second electrical connection bump e125 and a second electrical connection bump f126. The second electrical connection bump a121 is correspondingly arranged at a position that can be welded to the third chip 311, and the second electrical connection bump b122, the second electrical connection bump c123 and the second electrical connection bump d124 are correspondingly arranged at a position that can be welded to the fourth chip 312. Furthermore, the anode of the third chip 311 is welded to the second electrical connection bump a121, the cathode of the third chip 311 is electrically connected to the collector of the fourth chip 312 through the second substrate circuit, the two surfaces of the emitter b3121 of the fourth chip 312 are welded to the second electrical connection bump b122, and one of the surfaces is also welded to the second electrical connection bump c123, and the gate b3122 of the fourth chip 312 is welded to the second electrical connection bump d124; the intermediate transition layer 1 is also provided with a third power terminal 143, a second emitter signal terminal 153 and a second gate signal terminal 154, the second electrical connection bump a1 21 and the second electrical connection bump b122 are electrically connected to the third power terminal 143 through the intermediate transition circuit, the second electrical connection bump c123 is electrically connected to the second emitter signal terminal 153 through the intermediate transition circuit, the second electrical connection bump d124 is electrically connected to the second gate signal terminal 154 through the intermediate transition circuit, the second electrical connection bump e125 and the second electrical connection bump f126 are electrically connected to the second power terminal 142 through the intermediate transition circuit, and the second electrical connection bump e125 and the second electrical connection bump f126 are welded to the welding portion where the cathode of the third chip 311 and the collector of the fourth chip are led out. Figure 8 The circuit connections of the lower half-bridge in the power semiconductor module are shown.

[0049] Preferably, if Figure 3 As shown, the intermediate transition layer 1 of this embodiment is square as a whole, and the refrigerant input port 131 and the refrigerant output port 132 are respectively arranged at the two diagonals of the intermediate transition layer 1, that is, the refrigerant input port 131 and the refrigerant output port 132 are respectively arranged at the upper right and lower left of the intermediate transition layer 1, which facilitates the arrangement of the refrigerant channel and increases the cooling area of the refrigerant.

[0050] Further, if Figure 9-10 As shown, the power semiconductor module of this embodiment further includes a plastic package shell 4, which wraps the intermediate transition layer 1, the first copper-clad insulating substrate 2, the second copper-clad insulating substrate 3 and various circuits to provide various protections such as dust and corrosion protection and enhance stability.

[0051] From the above content, it can be seen that the new multi-sided heat dissipation power semiconductor module provided in this embodiment adopts multi-sided heat dissipation and buried refrigerant to dissipate heat, which greatly improves the heat dissipation performance and eliminates metal wire bonding, thereby improving the reliability of the power semiconductor module, reducing parasitic inductance and switching losses, and facilitating the increase of switching frequency.

[0052] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. A new type of multi-sided heat dissipation power semiconductor module, characterized in that: include: An intermediate transition layer (1), wherein a first end surface of the intermediate transition layer (1) is provided with a first surface circuit (11), a second end surface of the intermediate transition layer (1) is provided with a second surface circuit (12), and an intermediate transition circuit electrically connected to the first surface circuit (11) and the second surface circuit (12) is provided inside the intermediate transition layer (1); a first copper-clad insulating substrate (2), the first copper-clad insulating substrate (2) being arranged on one side of the intermediate transition layer (1), and the first copper-clad insulating substrate (2) being provided with a first substrate circuit (21) electrically connected to the first surface circuit (11); A second copper-clad insulating substrate (3), the second copper-clad insulating substrate (3) being arranged on the other side of the intermediate transition layer (1), the second copper-clad insulating substrate (3) being provided with a second substrate circuit (31) electrically connected to the second surface circuit (12), and the intermediate transition layer (1) being further provided with a refrigerant input port (131) and a refrigerant output port (132) for cooling by means of a refrigerant; The first substrate circuit (21) is arranged on a side of the first copper-clad insulating substrate (2) facing the first surface circuit (11), and the first substrate circuit (21) and the first surface circuit (11) are electrically connected by welding; the second substrate circuit (31) is arranged on a side of the second copper-clad insulating substrate (3) facing the second surface circuit (12), and the second substrate circuit (31) and the second surface circuit (12) are electrically connected by welding; The first surface circuit (11) includes a plurality of first electrical connection bumps, the first substrate circuit (21) includes a first chip (211) and a second chip (212), and the first surface circuit (11) is directly welded to the first chip (211) and the second chip (212) via the plurality of first electrical connection bumps; The second surface circuit (12) includes a plurality of second electrical connection bumps, the second substrate circuit (31) includes a third chip (311) and a fourth chip (312), and the second surface circuit (12) is directly welded to the third chip (311) and the fourth chip (312) via the plurality of second electrical connection bumps.

2. The multi-surface heat dissipation power semiconductor module according to claim 1, characterized in that: The first chip (211) and the third chip (311) are diodes, and the second chip (212) and the fourth chip (312) are IGBTs.

3. The multi-surface heat dissipation power semiconductor module according to claim 2, characterized in that: The first surface circuit (11) includes a first electrical connection bump a (111), a first electrical connection bump b (112), a first electrical connection bump c (113), a first electrical connection bump d (114), a first electrical connection bump e (115), and a first electrical connection bump f (116); the anode of the first chip (211) is welded to the first electrical connection bump a (111); the cathode of the first chip (211) is electrically connected to the collector of the second chip (212); the emitter of the second chip (212) is welded to the first electrical connection bump b (112) and the first electrical connection bump c (113), respectively; and the gate of the second chip (212) is welded to the first electrical connection bump d (114); the intermediate transition layer (1) is also provided with a first power terminal (141), a second power terminal (142), a first emitter, and a second gate. The present invention relates to a first gate signal terminal (151) and a first gate signal terminal (152), wherein the first electrical connection bump a (111) and the first electrical connection bump b (112) are electrically connected to the second power terminal (142) through the intermediate transition circuit, the first electrical connection bump c (113) is electrically connected to the first emitter signal terminal (151) through the intermediate transition circuit, the first electrical connection bump d (114) is electrically connected to the first gate signal terminal (152) through the intermediate transition circuit, the first electrical connection bump e (115) and the first electrical connection bump f (116) are electrically connected to the first power terminal (141) through the intermediate transition circuit, and the first electrical connection bump e (115) and the first electrical connection bump f (116) are electrically connected to the cathode of the first chip (211) and the collector of the second chip (212).

4. The multi-surface heat dissipation power semiconductor module according to claim 3, characterized in that: The second surface circuit (12) includes a second electrical connection bump a (121), a second electrical connection bump b (122), a second electrical connection bump c (123), a second electrical connection bump d (124), a second electrical connection bump e (125) and a second electrical connection bump f (126); the anode of the third chip (311) is welded to the second electrical connection bump a (121); the cathode of the third chip (311) is electrically connected to the collector of the fourth chip (312); the emitter of the fourth chip (312) is welded to the second electrical connection bump b (122) and the second electrical connection bump c (123) respectively; and the gate of the fourth chip (312) is welded to the second electrical connection bump d (124); the intermediate transition layer (1) is also provided with a third power terminal (143), a second emitter signal terminal (144); 53) and a second gate signal terminal (154), the second electrical connection bump a (121) and the second electrical connection bump b (122) are electrically connected to the third power terminal (143) through the intermediate transition circuit, the second electrical connection bump c (123) is electrically connected to the second emitter signal terminal (153) through the intermediate transition circuit, the second electrical connection bump d (124) is electrically connected to the second gate signal terminal (154) through the intermediate transition circuit, the second electrical connection bump e (125) and the second electrical connection bump f (126) are electrically connected to the second power terminal (142) through the intermediate transition circuit, and the second electrical connection bump e (125) and the second electrical connection bump f (126) are electrically connected to the cathode of the third chip (311) and the collector of the fourth chip (312).

5. The multi-surface heat dissipation power semiconductor module according to claim 1, characterized in that: The intermediate transition layer (1) is square in shape as a whole, and the refrigerant input port (131) and the refrigerant output port (132) are respectively arranged at two diagonal corners of the intermediate transition layer (1).

6. The multi-surface heat dissipation power semiconductor module according to claim 1, characterized in that: A serpentine refrigerant channel is provided in the intermediate transition layer (1), and both ends of the refrigerant channel are respectively connected to the refrigerant input port (131) and the refrigerant output port (132).

7. The multi-surface heat dissipation power semiconductor module according to claim 1, characterized in that: The multi-faceted heat dissipation power semiconductor module further comprises a plastic-encapsulated shell (4), which wraps and protects the intermediate transition layer (1), the first copper-clad insulating substrate (2), and the second copper-clad insulating substrate (3).

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