Capacitance-array based sensing and computing system and its control method

Abstract

The present invention discloses a sensing and computing system based on a capacitor array and its control method. The sensing and computing system includes: a capacitor array including a plurality of capacitor units, each of the capacitor units including a basic capacitor and an induction capacitor; a capacitor unit control module including a first switch, a second switch, and a third switch; a control module for controlling the capacitor unit control module; and a data acquisition module connected to a plurality of the output ends for obtaining the output result of the capacitor array. Through the cooperation of the capacitor unit control module, the control module, and the data acquisition module, the present invention controls the working process of the capacitor array, thereby completing the acquisition and calculation of non-electric quantity information, integrating sensing and computing, reducing the computing complexity, and reducing the hardware resources and power consumption. The present invention can be widely applied to the field of integrated circuit design technology.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit design, and particularly to a sensing and computing system based on a capacitor array and a control method thereof. Background Art

[0002] Sensor devices have a wide range of applications in fields such as Internet of Things terminals and embedded scenarios. Generally, a sensor device generates a response output to a physical quantity to be measured. After the response output is processed to a certain extent, it is converted into a digital electrical signal and transmitted to a processor as the data sensed by the sensor.

[0003] With the development of artificial intelligence, neural network algorithms are increasingly applied in the field of Internet of Things terminals. When paired with sensors, they can achieve intelligent detection of images, touch, etc. at the terminal. A general processing method is to convert the output of the sensor into digital electrical signal data as the input data for neural network calculation, complete the neural network algorithm calculation in the processor, and obtain the recognition result. This process involves the processing and transmission of a large amount of sensor output data. Summary of the Invention

[0004] In order to solve the above technical problems, an object of the present invention is to provide a sensing and computing system based on a capacitor array and a control method thereof.

[0005] On the one hand, an embodiment of the present invention provides a sensing and computing system based on a capacitor array, including:

[0006] A capacitor array, including a plurality of capacitor units, and each of the capacitor units includes a basic capacitor and a sensing capacitor;

[0007] A capacitor unit control module, including a first switch, a second switch, and a third switch;

[0008] The upper plate of the basic capacitor is connected to a first voltage through the first switch, the upper plate of the basic capacitor is connected to the ground through the second switch, the upper plate of the basic capacitor is also selectively connected to a plurality of output terminals, the lower plate of the basic capacitor is connected to the upper plate of the sensing capacitor, and the upper plate of the sensing capacitor is also connected to the ground through the third switch;

[0009] The lower plate of the sensing capacitor is connected to the ground;

[0010] Wherein, the output terminals include a first type of output terminals and a second type of output terminals. Among them, the first type of output terminals is used to parallel the output terminals of a plurality of capacitor units in the capacitor array, and the second type of output terminals is used to parallel the output terminals of all the capacitor units;

[0011] A control module, configured to control the capacitor unit control module;

[0012] A data acquisition module, which is connected to a plurality of the output terminals and is used to obtain the output result of the capacitor array.

[0013] Furthermore, the capacitor unit control module further includes a fourth switch and a fifth switch;

[0014] The upper plate of the basic capacitor is connected to the first type of output terminal through the fourth switch, and the upper plate of the basic capacitor is connected to the second type of output terminal through the fourth switch and the fifth switch.

[0015] Furthermore, the upper plate of the basic capacitor is connected to the second type of output terminal through the fifth switch.

[0016] Furthermore, the capacitance array-based sensing system includes a voltage generation module;

[0017] The voltage generation module is used to generate the first voltage.

[0018] On the other hand, the present application also provides a control method, which is applied to the capacitance array-based sensing system as described above. The control method includes the following steps:

[0019] Control the first switch to be turned off, the second switch to be turned on, and the third switch to be turned on, so that the capacitor unit is charge-cleared;

[0020] Control the first switch to be turned on, the second switch to be turned off, and the third switch to be turned off, so that the first voltage charges the capacitor unit;

[0021] Control the first switch to be turned off, the second switch to be turned off, and the third switch to be turned off, so that the capacitor unit stops charging;

[0022] Control the first switch to be turned off, the second switch to be turned off, and the third switch to be turned on, so that the induction capacitor discharges;

[0023] Control the first switch to be turned off, the second switch to be turned off, and the third switch to be turned on, and control the fourth switch to be turned on, so that the upper plate of the basic capacitor is connected to the first type of output terminal.

[0024] Furthermore, the control method further includes the following steps:

[0025] Control the first switch to be turned off, the second switch to be turned off, and the third switch to be turned on, and control the fifth switch to be turned on, so that the upper plate of the basic capacitor is connected to the second type of output terminal.

[0026] On the other hand, the present application also provides another control method, which is applied to the capacitance array-based sensing system as described above. The control method includes the following steps:

[0027] Determine the first convolution window;

[0028] Divide the capacitor array according to the convolution window to obtain a plurality of first capacitor array regions;

[0029] Obtain the output results of the first capacitor array regions in sequence.

[0030] On the other hand, the present application also provides another control method, which is applied to the sensing system based on a capacitor array as described above. The control method includes the following steps:

[0031] Determine a convolution unit, which includes a plurality of capacitor units; use the convolution unit to divide the sensing system based on the capacitor array to obtain a first capacitor array;

[0032] Determine a second convolution window;

[0033] Divide the first capacitor array according to the second convolution window to obtain a plurality of second capacitor array regions;

[0034] Obtain the output results of the plurality of second capacitor array regions simultaneously.

[0035] Further, the step of determining the convolution unit includes the following steps:

[0036] Determine the side length of the convolution kernel and the moving step of the convolution kernel;

[0037] Determine the number of capacitor units in the convolution unit according to the side length of the convolution kernel and the moving step of the convolution kernel.

[0038] The beneficial effects of the present invention are as follows: Through the cooperation of the capacitor unit control module, the control module and the data acquisition module, the working process of the capacitor array is controlled, so as to complete the acquisition and calculation of non-electric quantity information, realizing sensing and calculation integration, reducing the calculation complexity, reducing the hardware resources and power consumption. Description of the Drawings

[0039] Figure 1 is the module block diagram of the sensing system based on a capacitor array according to an embodiment of the present invention;

[0040] Figure 2 is the structural schematic diagram of the capacitor array of the present invention;

[0041] Figure 3 is the structural schematic diagram of another capacitor array of the present invention;

[0042] Figure 4 is the structural schematic diagram of another capacitor array of the present invention;

[0043] Figure 5 is the schematic diagram of the serial convolution principle of the present invention;

[0044] Figure 6 is the distribution diagram of the second capacitor array region of the present invention;

[0045] Figure 7 is the flowchart of the steps of a control method of the present invention;

[0046] Figure 8 is the flowchart of the steps of another control method of the present invention;

[0047] Figure 9 is the flowchart of the steps of another control method of the present invention. Detailed implementation manners

[0048] This part will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The function of the accompanying drawings is to supplement the description of the text part of the specification, enabling people to intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it should not be construed as a limitation on the protection scope of the present invention.

[0049] In the present invention, when directions (up, down, left, right, front, and back) are described, it is only for the convenience of describing the technical solution of the present invention, rather than indicating or implying that the technical features referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present invention.

[0050] In the present invention, the meaning of "several" is one or more, the meaning of "multiple" is two or more, and "greater than", "less than", "exceeding", etc. are understood as not including the present number; "above", "below", "within", etc. are understood as including the present number. In the description of the present invention, if "first" and "second" are described, it is only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the technical features indicated or the sequence relationship of the technical features indicated.

[0051] In the present invention, unless otherwise clearly defined, words such as "set", "installed", "connected", etc. should be understood in a broad sense. For example, they can be directly connected, or indirectly connected through an intermediate medium; they can be fixedly connected, or detachably connected, or integrally formed; they can be mechanically connected, or electrically connected or capable of communicating with each other; they can be the communication inside two elements or the interaction relationship between two elements. Those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0052] The present invention will be further explained and illustrated below in conjunction with the accompanying drawings of the specification and specific embodiments.

[0053] Refer to Figure 1 andFigure 2 , an embodiment of the present invention provides a sensing and computing system based on a capacitor array, including:

[0054] A capacitor array, including a plurality of capacitor units, and each capacitor unit includes a basic capacitor and an induced capacitor;

[0055] A capacitor unit control module, including a first switch S1, a second switch S2, and a third switch S3;

[0056] The upper plate of the basic capacitor is connected to a first voltage through the first switch, the upper plate of the basic capacitor is connected to the ground through the second switch S2, the upper plate of the basic capacitor is also selectively connected to a plurality of output terminals, the lower plate of the basic capacitor is connected to the upper plate of the induced capacitor, and the upper plate of the induced capacitor is also connected to the ground through the third switch S3;

[0057] The lower plate of the induced capacitor is connected to the ground;

[0058] Among them, the output terminals include a first type of output terminal D1 and a second type of output terminal D2. Among them, the first type of output terminal D1 is used to parallel the output terminals of several capacitor units in the capacitor array, and the second type of output terminal D2 is used to parallel the output terminals of all capacitor units;

[0059] A control module, used to control the capacitor unit control module;

[0060] A data acquisition module, which is connected to several output terminals and is used to obtain the output result of the capacitor array.

[0061] Specifically, the sensing and computing system of the present application has both sensing and computing functions.

[0062] Among them, the capacitor array is used to sense non-electric quantity information. The capacitor array includes a plurality of capacitor units, and these capacitor units are used to sense or capture non-electric quantity information. The basic capacitor in the capacitor unit has a fixed capacitance value, and the induced capacitor is a virtual capacitor generated when a carrier carrying non-electric quantity information contacts the capacitor unit of the present application. For example, when it is necessary to collect human fingerprint information, when a person's finger approaches the capacitor array, the skin of the finger will contact the capacitor units in the capacitor array. When the human body contacts the capacitor unit, this virtual capacitor can be generated. Due to the presence of ridges and grooves in fingerprints, the contact conditions between the skin of the finger and each capacitor unit in the capacitor array are different. Some capacitor units contact the ridges of the fingerprint, and some capacitor units contact the grooves of the fingerprint. Therefore, the capacitance values of the induced capacitors generated due to contact are different.

[0063] The capacitor array control unit is used to control the charge clearing, charging, and charge redistribution of the capacitor unit through each switch (mainly the first switch S1, the second switch S2, and the third switch S3).

[0064] In addition, a control module is used to trigger a control signal to control the on / off states of the switching elements in the capacitance unit control module. The control module includes, but is not limited to, a processor, a single-chip microcomputer, and a series of circuit structures and devices that can generate controllable time sequences and a series of digital levels, etc.

[0065] In one embodiment, referring to Figure 2 , taking the capacitance array including 3*3 capacitance units as an example, the control process of using the sensing system based on the capacitance array to obtain non-electric quantity information is as follows:

[0066] Reset state: Control the first switch S1 of each capacitance unit to be disconnected, the second switch S2 to be closed, and the third switch S3 to be closed, so that the basic capacitance and the sensing capacitance in the capacitance unit are cleared of charge;

[0067] Charging state: Control the first switch S1 to be closed, the second switch S2 to be disconnected, and the third switch S3 to be disconnected, so as to introduce a first voltage and use the first voltage to charge the capacitance unit (the basic capacitance and the sensing capacitance in the capacitance unit);

[0068] Among them, the capacitance value of the capacitance unit is:

[0069]

[0070] Among them, C i ’ is the capacitance value of the capacitance unit, C0 is the capacitance value of the basic capacitance, Ci is the capacitance value of the sensing capacitance. In addition, the subscript i represents the position of the current capacitance unit in the capacitance array. In this embodiment, the value of i ranges from 1 to 9.

[0071] It can be seen that Ci’ is a monotonic function of Ci. At this time, the electric charge Qi carried by the upper plate of the basic capacitance C0 is:

[0072] Q i =C i ’·VA i

[0073] Charge retention state: Control the first switch S1 to be disconnected, the second switch S2 to be disconnected, and the third switch S3 to be disconnected, so that the capacitance unit stops charging and obtain the electric charge Qi on the upper plate of the basic capacitance;

[0074] Conversion state: Control the first switch S1 to be disconnected, the second switch S2 to be disconnected, and the third switch S3 to be closed, so that the sensing capacitance discharges and obtain the output voltage of the upper plate of the basic capacitance;

[0075] Among them, when the third switch S3 is closed, both the upper and lower plates of the sensing capacitor are grounded. At this time, the capacitance value of the capacitor unit is the capacitance value of the basic capacitor, and the charge carried by the upper plate of the basic capacitor remains unchanged. At this time, the voltage of the upper plate of the basic capacitor is:

[0076]

[0077] Among them, VO i is the output voltage of the upper plate of the basic capacitor in the capacitor unit at the i-th position.

[0078] Through the above steps, the output result (the output voltage of the upper plate of the basic capacitor) of each capacitor unit can be obtained.

[0079] The first charge redistribution state: control the first switch S1 to be disconnected, the second switch S2 to be disconnected, the third switch S3 to be closed, and control the upper plates of several of the above-mentioned basic capacitors to be connected to the first type of output terminal D1. The first type of output terminal D1 is used to parallel the output terminals of several capacitor units in the capacitor array;

[0080] Refer to Figure 3 , each capacitor unit corresponds to an output result (that is, the output voltage of the upper plate of the basic capacitor), and this output result is used to characterize the situation of the detected non-electrical quantity information (the output voltage result is related to the capacitance value of the sensing capacitor). If the output results of each capacitor unit are collected, then the data acquisition module will collect a large amount of data information. For this reason, in this application, the upper plates of the basic capacitors of several adjacent capacitor units are connected together for charge redistribution. Since the upper plates of the basic capacitors of several adjacent capacitor units are connected together, the voltage values of the upper plates of these basic capacitors are equal. The voltage value of the upper plate of the basic capacitor after parallel connection can be used as the output result. For example, in this application, the upper plates of the basic capacitors of three capacitor units in the first row are paralleled, and D11 is a first type of output terminal. For the basic capacitors in the first row, the total capacitance value is 3*C0, and the total charge quantity is:

[0081]

[0082] Therefore, the output voltage of the upper plate of each basic capacitor is:

[0083]

[0084] Of course, for the above output result Vout1’, multiplying it by a scaling factor 3C0 can obtain the total charge quantity of the basic capacitors in the first row.

[0085] Similarly, the output result Vout2’ of the capacitor units in the second row (where D12 is a first-type output terminal) and the output result Vout3’ of the capacitor units in the third row (where D13 is a first-type output terminal) can be obtained.

[0086] The second charge redistribution state: control the first switch S1 to be turned off, the second switch S2 to be turned off, the third switch S3 to be turned on, and control the upper plate of the basic capacitor to be connected to the second-type output terminal D2. The second-type output terminal D2 is used to parallel the output terminals of all capacitor units;

[0087] The data acquisition module is connected to both the first-type output terminal D1 and the second-type output terminal D2, so as to calculate the output result of the capacitor array and convert the non-electric quantity data into electric quantity data. In one embodiment, the data acquisition module includes a plurality of ADC circuits. The ADC circuit is equipped with an input buffer, which has the characteristics of bipolar input and output, can buffer positive voltage or negative voltage; and has the characteristics of extremely small bias current and small drift current, which can ensure that the charge leakage on the capacitor can be ignored when measuring voltage; it also has the characteristics of high input impedance and high frequency response bandwidth to ensure that the voltage value of the capacitor can be accurately transmitted to the ADC circuit for conversion in time.

[0088] In the above embodiment, the upper plates of several basic capacitors are shorted together, so that several basic capacitors share one output result. In this embodiment, referring to Figure 4 , the upper plates of the basic capacitors of all capacitor units are shorted together, so that all the basic capacitors in the capacitor array perform charge redistribution, and the finally obtained output voltage after charge redistribution is used as the output result.

[0089] As Figure 4 shown, after the upper plates of all basic capacitors are connected in parallel, the total capacitance value is 9*C0, and the total charge quantity is:

[0090]

[0091] Therefore, the output voltage of the upper plate of the basic capacitor is:

[0092]

[0093] For the above output result Vout, multiplying it by a scaling factor 9C0 can obtain the total charge quantity of the capacitor array.

[0094] In summary, through the cooperation of the capacitor unit control module, the control module, and the data acquisition module, the present application controls the working process of the capacitor array, thereby completing the acquisition and calculation of non-electric quantity information, integrating sensing and calculation. Compared with the sensors in the prior art, there is no need to convert the sensor output into a digital signal for identification and calculation, reducing the calculation complexity, hardware resources, and power consumption.

[0095] Further as an optional implementation manner, referring to Figure 2 , the capacitor unit control module further includes a fourth switch S4 and a fifth switch S5;

[0096] The upper plate of the basic capacitor is connected to the first type of output terminal D1 through the fourth switch S4, and the upper plate of the basic capacitor is connected to the second type of output terminal D2 through the fourth switch S4 and the fifth switch S5.

[0097] Specifically, referring to Figure 2 , each capacitor unit includes a fourth switch S4 and a fifth switch S5. If the fourth switch S4 of the upper plate of the basic capacitor is closed, then the upper plates of several basic capacitors can be connected in parallel, and the parallel node can be used as the first type of output terminal D1. The upper plates of the basic capacitors after parallel connection perform charge redistribution. According to the charge redistribution principle of parallel capacitors, the voltages of the upper plates of the parallel basic capacitors are the same, and this voltage can be used as the output result of the parallel capacitor units. Similarly, the output results of other adjacent several units can also be obtained.

[0098] In the case where the fourth switch S4 is closed, the fifth switch S5 is closed, and the fifth switch S5 is used to connect several first type of output terminals D1 in parallel, and the parallel node can be used as the second type of output terminal D2. In this way, the purpose of connecting the upper plates of all the basic capacitors in the capacitor array in parallel can be achieved. According to the charge redistribution principle of parallel capacitors, the voltages of the upper plates of the parallel basic capacitors are the same, and this voltage can be used as the output result of the parallel capacitor units.

[0099] Further as an optional implementation manner, the upper plate of the basic capacitor is connected to the second type of output terminal D2 through the fifth switch S5.

[0100] Of course, referring to Figure 2 , it is also possible to directly set the fifth switch S5 on the upper plate of the basic capacitor. By closing the fifth switch S5, the upper plates of all the basic capacitors in the capacitor array can be connected in parallel.

[0101] Further as an optional implementation manner, referring to Figure 1 , the sensing and calculation system based on the capacitor array includes a voltage generation module;

[0102] The voltage generation module is used to generate a first voltage.

[0103] Specifically, the voltage generation module is used to generate the first voltage of the capacitor unit. The DAC circuit adopted by the voltage generation module has the characteristics of bipolar output and single-ended output, can generate positive and negative voltages, and has high conversion accuracy (greater than or equal to 16 bits) and high frequency response bandwidth.

[0104] In a second aspect, for a capacitance-based sensing system introduced in the first aspect, the present application also provides an application to the capacitance-based sensing system mentioned in the first aspect. The present application will take a 3*3 capacitance array as an example to illustrate in detail the implementation process of the above control method. Refer to Figure 7 , the control method includes the following steps S101-S105:

[0105] S101. Control the first switch S1 to be disconnected, the second switch S2 to be closed, and the third switch S3 to be closed, so that the capacitor unit is charge-cleared.

[0106] Specifically, refer to Figure 2 , close the second switch S2 and the third switch S3, so that the upper and lower plates of the basic capacitor and the sensing capacitor are both grounded, thereby clearing the residual charge of the capacitor unit.

[0107] S102. Control the first switch S1 to be closed, the second switch S2 to be disconnected, and the third switch S3 to be disconnected, so that the first voltage charges the capacitor unit.

[0108] Specifically, control the first switch S1 to be closed, introduce the first voltage into the capacitor unit, and thus charge the capacitor in the capacitor unit.

[0109] S103. Control the first switch S1 to be disconnected, the second switch S2 to be disconnected, and the third switch S3 to be disconnected, so that the capacitor unit stops charging and obtain the electric quantity of the upper plate of the basic capacitor.

[0110] Among them, the capacitance value of the capacitor unit is:

[0111]

[0112] Among them, C i ’ is the capacitance value of the capacitor unit, C0 is the capacitance value of the basic capacitor, Ci is the capacitance value of the sensing capacitor. In addition, the subscript i represents the position of the current capacitor unit in the capacitance array. In this embodiment, the value of i ranges from 1 to 9.

[0113] It can be seen that C i ’ is a monotonic function of Ci. At this time, the electric quantity Qi carried by the upper plate of the basic capacitor is:

[0114] Q i = C i ’·VAi

[0115] S104. Control the first switch S1 to open, the second switch S2 to open, and the third switch S3 to close, so that the induction capacitor discharges, and obtain the output voltage of the upper plate of the basic capacitor;

[0116] Among them, when the third switch S3 is closed, both the upper plate and the lower plate of the induction capacitor are grounded. At this time, the capacitance value of the capacitor unit is the capacitance value of the basic capacitor, and the charge carried by the upper plate of the basic capacitor remains unchanged. At this time, the voltage of the upper plate of the basic capacitor is:

[0117]

[0118] where VO i is the output voltage of the upper plate of the basic capacitor in the capacitor unit at the i-th position.

[0119] Through the above steps, the output result (the output voltage of the upper plate of the basic capacitor) of each capacitor unit can be obtained.

[0120] Refer to Figure 3 , S105. Control the first switch S1 to open, the second switch S2 to open, the third switch S3 to close, and control the fourth switch S4 to close, so that the upper plate of the basic capacitor is connected to the first type of output terminal D1.

[0121] Among them, each capacitor unit corresponds to an output result (that is, the output voltage of the upper plate of the basic capacitor), and this output result is used to characterize the situation of the detected non-electric quantity information (the output voltage result is related to the capacitance value of the induction capacitor). If the output results of each capacitor unit are collected, then the data acquisition module will collect a large amount of data information. For this reason, in this application, the upper plates of the basic capacitors of several adjacent capacitor units are connected together for charge redistribution. Since the upper plates of the basic capacitors of several adjacent capacitor units are connected together, the voltage values of the upper plates of these basic capacitors are equal, and the voltage value of the upper plate of the basic capacitor after parallel connection can be used as the output result. For example, in this application, the upper plates of the basic capacitors of three capacitor units in the first row are connected in parallel, and D11 is a first type of output terminal. For the basic capacitors in the first row, the total capacitance value is 3*C0, and the total charge is:

[0122]

[0123] Therefore, the output voltage of the upper plate of each basic capacitor is:

[0124]

[0125] Of course, for the above output result Vout1’, multiplying it by a scaling factor 3C0 can obtain the total charge amount of the basic capacitors in the first row.

[0126] Similarly, the output result Vout2’ of the capacitor units in the second row (D12 is a first type of output terminal) and the output result Vout3’ of the capacitor units in the third row (D13 is a first type of output terminal) can be obtained.

[0127] In summary, the present application completes the acquisition and calculation of non-electric quantity information by controlling the working process of the capacitor array, realizing sensing and calculation in one body. Compared with the sensors in the prior art, it is not necessary to convert the sensor output into a digital signal for recognition and calculation, reducing the calculation complexity, hardware resources, and power consumption.

[0128] Further as an optional implementation manner, the control method further includes the following steps:

[0129] Refer to Figure 2 , control the first switch S1 to be disconnected, the second switch S2 to be disconnected, the third switch S3 to be closed, and control the fifth switch S5 to be closed, so that the upper plate of the basic capacitor is connected to the second type of output terminal D2.

[0130] Specifically, refer to Figure 4 , use the fifth switch S5 to short-circuit the upper plates of the basic capacitors of all capacitor units together, so that all the basic capacitors in the capacitor array perform charge redistribution, and finally the output voltage obtained after charge redistribution is used as the output result.

[0131] As Figure 4 shown, after connecting the upper plates of all basic capacitors in parallel, the total capacitance value is 9*C0, and the total charge amount is:

[0132]

[0133] Therefore, the output voltage of the upper plate of the basic capacitor is:

[0134]

[0135] For the above output result Vout, multiplying it by a scaling factor 9C0 can obtain the total charge amount of the capacitor array.

[0136] In a third aspect, the present application further provides another control method applied to the capacitor array-based sensing and calculation system in the first aspect. Using this control method, non-electric quantity information is sensed and calculated for a single convolutional layer in a neural network. Refer to Figure 8 , this control method includes the following steps S201 - S103:

[0137] S201. Determine the first convolution window;

[0138] S202. Divide the capacitor array according to the convolution window to obtain a number of first capacitor array regions;

[0139] S203. Obtain the output results of the first capacitor array regions in sequence.

[0140] Specifically, the control method of this solution can be applied to a single convolutional layer of a neural network. Taking the input feature map size of the single convolutional layer as 5×5×1 (i.e., the specification size of the capacitor array is 5*5), no padding of 0 on the periphery, the convolutional kernel size as 3×3×1 (the convolutional kernel determines the size of the first convolution window as 3*3), and the convolution window moving step size as 2 as an example for illustration.

[0141] The first convolution window is used to divide the capacitor array, and the capacitor units in the capacitor array are divided into multiple first capacitor array regions. In one embodiment, referring to Figure 5 , it includes four first capacitor array regions (dashed rounded rectangles), namely Window1, window2, window3, and window4. According to the first convolution window to divide the capacitor array, each of the obtained first capacitor array regions includes 9 capacitor units. That is, D11, D12, D13, D21, D22, D23, D31, D32, and D33 are included in window1, D13, D14, D15, D23, D24, D25, D33, D34, and D35 are included in window2, D31, D32, D33, D41, D42, D43, D51, D52, and D53 are included in window3, and D33, D34, D35, D43, D33, D45, D53, D54, and D55 are included in window4.

[0142] Referring to Figure 5 , after dividing the first capacitor array regions, apply the first voltage (i.e., the weight voltage) V11, V12, V13, V21, V22, V23, V31, V32, and V33 to each capacitor unit in window1, and obtain the convolution result Vout1 of the first capacitor array region of window1. In the same way, the convolution result Vout2 of the first capacitor array region of window2, the convolution result Vout3 of the first capacitor array of window3, and the convolution result Vout4 of the first capacitor array of window4 can be obtained in sequence.

[0143] The control method of the third aspect is essentially a serial convolution scheme. In the first period when convolution starts, convolution is performed on the first capacitor array region determined by a determined convolution window to obtain an output result. In the second period, the convolution window is moved, and then convolution is performed on the new first capacitor array region within the convolution window to obtain the next output result. In this way, by moving the convolution window in each period, finally an output result of a first capacitor array region is obtained in each period until the convolution stops.

[0144] In the fourth aspect, the present application also provides another control method applied to the capacitive array-based sensing system of the first aspect. Using this control method, non-electric quantity information is sensed and calculated for a single convolutional layer in a neural network. Referring to Figure 9 , the control method includes the following steps S301 - S304:

[0145] S301. Determine a convolutional unit, where the convolutional unit includes several capacitor units; use the convolutional unit to divide the capacitive array-based sensing system to obtain a first capacitor array;

[0146] S302. Determine a second convolution window;

[0147] S303. Divide the first capacitor array according to the second convolution window to obtain several second capacitor array regions;

[0148] S304. Simultaneously obtain the output results of several second capacitor array regions.

[0149] Specifically, the control method of this solution can also be applied to a single convolutional layer of a neural network. Taking the input feature map size of the single convolutional layer as 5×5×1, no padding of 0 on the periphery, and the convolutional kernel size as 3×3×1 (the convolutional kernel determines the size of the second convolution window as 3*3), and the convolution window moving step size as 2 as an example for illustration.

[0150] In the above embodiment of serial convolution, the units in the first capacitor array are capacitor units. Referring to Figure 6 , while in the parallel convolution scheme, the units in the second capacitor array region are convolutional units, and the convolutional unit includes several capacitor units. For example, several adjacent capacitor units can be divided into one convolutional unit, so as to obtain a first capacitor array, and the units in the first capacitor array are convolutional units.

[0151] The second convolution window is used to divide the first capacitor array, divide the capacitor units in the capacitor array into multiple convolutional regions, and obtain multiple second capacitor array regions. In one embodiment, referring to Figure 6, including four second capacitor array areas (dashed rounded boxes), namely Window5, window6, window7 and window8. The first capacitor array is divided into areas according to the second convolution window. Each first capacitor array area includes 9 capacitor units, namely window5 includes V11, V12, V13, V21, V22, V23, V31, V32 and V33, window6 includes V13, V14, V15, V23, V24, V25, V33, V34 and V35, window7 includes V31, V32, V33, V41, V42, V43, V51, V52 and V53, and window8 includes V33, V34, V35, V43, V33, V45, V53, V54 and V55.

[0152] After the second capacitor array area is divided, a first voltage (i.e., weight voltage) is added to each capacitor unit of the first convolution unit in window5, a first voltage (i.e., weight voltage) is added to each capacitor unit of the second convolution unit in window6, a first voltage (i.e., weight voltage) is added to each capacitor unit of the third convolution unit in window7, and a first voltage (i.e., weight voltage) is added to each capacitor unit of the fourth convolution unit in window8. At the same time, the convolution result Vout5 of the second capacitor array area of window5, the convolution result Vout6 of the second capacitor array area of window6, the convolution result Vout7 of the second capacitor array area of window7, and the convolution result Vout8 of the second capacitor array area of window8 are obtained to complete the calculation of the entire convolution layer.

[0153] As an optional implementation, step S301 includes the following steps S3011-S3012:

[0154] S3011, determining the side length of the convolution kernel and the moving step length of the convolution kernel;

[0155] S3012. Determine the number of capacitor units in the convolution unit content according to the side length of the convolution kernel and the moving step length of the convolution kernel.

[0156] Specifically, the present application also provides an embodiment for determining a convolution unit.

[0157] Similarly, take the input feature map size of a single convolution layer as 5×5×1 (that is, the size of the capacitor array is 5*5), there is no padding 0 on the periphery, the convolution kernel size is 3×3×1, and the convolution window moving step is 2 as an example. The side length C of the convolution kernel is determined to be 3, and the moving step S of the convolution kernel is determined to be 2. According to the formula (C-S+1) 2It can be calculated that there are at least 4 capacitor units in the convolution unit.

[0158] The control method provided in the fourth aspect is essentially a parallel convolution scheme. At the beginning of convolution, convolution is performed on the convolution units in each second capacitor array region simultaneously, so as to obtain the same number of output results as the number of second convolution windows.

[0159] This application applies the above serial convolution scheme and parallel convolution scheme to the above-mentioned capacitance array-based sensing and computing system. When performing non-electric quantity sensing and computing, for example, collecting fingerprint information, it can convert the groove and ridge pattern information of the fingerprint into parasitic capacitances at different pixel capacitor positions, without losing the fingerprint information, and can also perform multiplication and addition calculations of the charge-based neural network, realizing the integration of sensor sensing and computing. It is not necessary to first convert the sensor output into a digital signal and then perform recognition and calculation, reducing the computational complexity, hardware resources, and power consumption.

[0160] The above is a specific description of the preferred embodiment of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent deformations or substitutions without departing from the spirit of the present invention, and these equivalent deformations or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A sensing and computing system based on a capacitor array, characterized in that Comprising: A capacitor array including a plurality of capacitor units, each of the capacitor units including a basic capacitor and an induced capacitor; A capacitor unit control module including a first switch, a second switch, and a third switch; The upper plate of the basic capacitor is connected to a first voltage through the first switch, the upper plate of the basic capacitor is connected to ground through the second switch, the upper plate of the basic capacitor is also selectively connected to a plurality of output terminals, the lower plate of the basic capacitor is connected to the upper plate of the induced capacitor, and the upper plate of the induced capacitor is also connected to ground through the third switch; The lower plate of the induced capacitor is connected to ground; Wherein, the output terminals include a first type of output terminal and a second type of output terminal. Among them, the first type of output terminal is used to parallel the output terminals of several capacitor units in the capacitor array, and the second type of output terminal is used to parallel the output terminals of all the capacitor units; A control module for controlling the capacitor unit control module; A data acquisition module connected to a plurality of the output terminals for obtaining the output result of the capacitor array.

2. The capacitance-array-based sensing and computing system according to claim 1, wherein The capacitor unit control module further includes a fourth switch and a fifth switch; The upper plate of the basic capacitor is connected to the first type of output terminal through the fourth switch, and the upper plate of the basic capacitor is connected to the second type of output terminal through the fourth switch and the fifth switch.

3. The capacitive array-based sensing system according to claim 2, wherein The upper plate of the basic capacitor is connected to the second type of output terminal through the fifth switch.

4. The capacitive array-based sensing system according to claim 1, wherein The sensing system based on the capacitor array includes a voltage generation module; The voltage generation module is used to generate the first voltage.

5. A control method, characterized in that, Applied to the sensing system based on the capacitor array as described in claim 3, the control method includes the following steps: Control the first switch to be off, the second switch to be on, and the third switch to be on, so that the capacitor unit is charge-cleared; Control the first switch to be on, the second switch to be off, and the third switch to be off, so that the first voltage charges the capacitor unit; Control the first switch to be off, the second switch to be off, and the third switch to be off, so that the capacitor unit stops charging; Control the first switch to be off, the second switch to be off, and the third switch to be on, so that the induced capacitor discharges; Control the first switch to be off, the second switch to be off, the third switch to be on, and control the fourth switch to be on, so that the upper plate of the basic capacitor is connected to the first type of output terminal.

6. A control method according to claim 5, characterized in that The control method further includes the following steps: Control the first switch to be off, the second switch to be off, the third switch to be on, and control the fifth switch to be on, so that the upper plate of the basic capacitor is connected to the second type of output terminal.

7. A control method, characterized in that, Applied to the sensing system based on the capacitor array as described in any one of claims 1-4, including the following steps: Determine a first convolution window; According to the convolution window, divide the capacitor array into regions to obtain a plurality of first capacitor array regions; Successively obtain the output results of the first capacitor array regions.

8. A control method, characterized in that, Applied to the sensing system based on the capacitor array as described in any one of claims 1-4, including the following steps: Determine a convolutional unit, which includes a number of capacitor units; use the convolutional unit to divide the capacitive sensing system based on the capacitor array to obtain a first capacitor array; Determine a second convolutional window; According to the second convolutional window, divide the first capacitor array to obtain a number of second capacitor array regions; Simultaneously obtain the output results of a number of second capacitor array regions.

9. The control method according to claim 8, wherein The step of determining the convolutional unit includes the following steps: Determine the side length of the convolutional kernel and the moving step of the convolutional kernel; According to the side length of the convolutional kernel and the moving step of the convolutional kernel, determine the number of capacitor units in the convolutional unit.

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