Light-receiving element, ranging module, and electronic device

Abstract

The present technology relates to a light-receiving element, a distance measurement module, and an electronic device that can reduce leakage of incident light into adjacent pixels. The light-receiving element includes: a semiconductor layer in which a photodiode for photoelectrically converting infrared light is formed in pixel units; and a wiring layer in which a transfer transistor for reading out charges generated by the photodiode is formed, and an inter-pixel light-shielding unit for shielding infrared light is formed at a pixel boundary portion of the wiring layer. The present technology can be applied to, for example, a distance measurement module for measuring the distance to a subject, etc.

Description

Technical Field

[0001] The present technology relates to a light-receiving element, a distance measurement module, and an electronic device, and more particularly, to a light-receiving element, a distance measurement module, and an electronic device capable of reducing leakage of incident light into adjacent pixels. Background Art

[0002] In related art, a distance measurement system using an indirect time-of-flight (ToF) method is known. In such a distance measurement system, a sensor that can quickly distribute signal charges obtained by receiving reflected light reflected by an object through active light, which is emitted using a light-emitting diode (LED) or a laser having a specific phase, must be included.

[0003] Therefore, for example, a technique has been proposed that can quickly modulate a wide range of regions in a substrate by directly applying a voltage to the substrate of the sensor to generate a current therein (for example, see Patent Document 1).

[0004] [Cited Document List]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open JP 2011-86904 A Summary of the Invention

[0006] [Technical Problem]

[0007] In many cases, near-infrared light having a wavelength of about 940 nm is used as a light source for a light-receiving element used in the indirect ToF method. Since silicon as a semiconductor layer has a low absorption coefficient and a low quantum efficiency for near-infrared light, a structure that can improve the quantum efficiency by extending the optical path length can be considered, but there is a concern that incident light leaks into adjacent pixels.

[0008] The present technology has been designed in view of this situation and can reduce leakage of incident light into adjacent pixels.

[0009] [Solution to the Problem]

[0010] The light-receiving element according to the first aspect of the present technology includes a semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and a wiring layer in which a transfer transistor that reads out charges generated by the photodiode is formed, and an inter-pixel light-shielding unit that shields infrared light is formed at a pixel boundary portion of the wiring layer.

[0011] The distance measurement module according to the second aspect of the present technology includes a predetermined light source; and a light receiving element, where the light receiving element includes a semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and a wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed, and an inter-pixel light shielding unit that blocks infrared light is formed at the pixel boundary portion of the wiring layer.

[0012] The electronic device according to the third aspect of the present technology includes a distance measurement module, the distance measurement module includes a predetermined light source; and a light receiving element, where the light receiving element includes a semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and a wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed, and an inter-pixel light shielding unit that blocks infrared light is formed at the pixel boundary portion of the wiring layer.

[0013] In the first to third aspects of the present technology, the light receiving element is provided with a semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and a wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed, and an inter-pixel light shielding unit that blocks infrared light is formed at the pixel boundary portion of the wiring layer.

[0014] The light receiving element, the distance measurement module, and the electronic device can be independent devices or modules incorporated into other devices. Description of the Drawings

[0015] Figure 1 is a block diagram showing a schematic configuration example of a light receiving element to which the present technology is applicable.

[0016] Figure 2 is a cross-sectional view showing a first configuration example of a pixel.

[0017] Figure 3 is a diagram for explaining the effect of the inter-pixel light shielding unit.

[0018] Figure 4 is a cross-sectional view showing a modified example of the first configuration example of a pixel.

[0019] Figure 5 is showing Figure 2 the circuit configuration example of the pixel in

[0020] Figure 6 is showing Figure 4 the layout example of the pixel circuit in

[0021] Figure 7 is a plan view showing another formation example of the inter-pixel light shielding unit.

[0022] Figure 8 It is a plan view showing another formation example of the light-shielding unit between pixels.

[0023] Figure 9 It is showing Figure 2 Another circuit configuration example of the pixel in

[0024] Figure 10 It is showing Figure 9 A plan view of an arrangement example of the pixel circuit in

[0025] Figure 11 It is a cross-sectional view showing a second configuration example of the pixel.

[0026] Figure 12 It is a cross-sectional view showing another shape example of the moth-eye structure portion.

[0027] Figure 13 It is a cross-sectional view showing a third configuration example of the pixel.

[0028] Figure 14 It is explaining Figure 13 The effect of the reflective film in

[0029] Figure 15 It is a cross-sectional view showing a first modification example of the third configuration example of the pixel.

[0030] Figure 16 It is explaining Figure 15 The effect of the reflective film in

[0031] Figure 17 It is a cross-sectional view showing a second modification example of the third configuration example of the pixel.

[0032] Figure 18 It is a cross-sectional view showing a fourth configuration example of the pixel.

[0033] Figure 19 It is a cross-sectional view showing a fifth configuration example of the pixel.

[0034] Figure 20 It is a cross-sectional view showing a sixth configuration example of the pixel.

[0035] Figure 21 It is a cross-sectional view showing a seventh configuration example of the pixel.

[0036] Figure 22 It is a cross-sectional view showing a modification example of the seventh configuration example of the pixel.

[0037] Figure 23 It is a cross-sectional view showing an eighth configuration example of the pixel.

[0038] Figure 24 It is a cross-sectional view showing a modification example of the eighth configuration example of the pixel.

[0039] Figure 25 It is a cross-sectional view showing a ninth configuration example of a pixel.

[0040] Figure 26 It is a diagram showing a circuit configuration example of a pixel in the case where the light-receiving element is configured as an IR imaging sensor.

[0041] Figure 27 It is a cross-sectional view of a pixel in the case where the light-receiving element is configured as an IR imaging sensor.

[0042] Figure 28 It is a diagram showing an example of pixel arrangement in the case where the light-receiving element is configured as an RGBIR imaging sensor.

[0043] Figure 29 It is a block diagram showing a configuration example of a distance measurement module to which the present technology is applied.

[0044] Figure 30 It is a block diagram showing a configuration example of a smartphone as an electronic device to which the present technology is applied.

[0045] Figure 31 It is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0046] Figure 32 It is an explanatory diagram showing an example of the installation positions of an outside vehicle information detection unit and an imaging unit. Detailed implementation manners

[0047] Hereinafter, the modes for embodying the present technology (hereinafter referred to as implementation modes) will be described. Note that the description will be made in the following order.

[0048] 1. Configuration example of light-receiving element

[0049] 2. Cross-sectional view according to the first configuration example of a pixel

[0050] 3. Modification example of the first configuration example

[0051] 4. Circuit configuration example of a pixel

[0052] 5. Planar view of a pixel

[0053] 6. Other circuit configuration examples of a pixel

[0054] 7. Planar view of a pixel

[0055] 8. Cross-sectional view according to the second configuration example of a pixel

[0056] 9. Cross-sectional view according to the third configuration example of a pixel

[0057] 10. Modification example of the third configuration example

[0058] 11. Cross-sectional view according to the fourth configuration example of a pixel

[0059] 12. Cross-sectional view according to the fifth configuration example of a pixel

[0060] 13. Cross-sectional view according to the sixth configuration example of a pixel

[0061] 14. Cross-sectional view according to the seventh configuration example of a pixel

[0062] 15. Cross-sectional view according to the eighth configuration example of a pixel

[0063] 16. Cross-sectional view according to the ninth configuration example of a pixel

[0064] 17. Configuration example of an IR imaging sensor

[0065] 18. Configuration example of an RGBIR imaging sensor

[0066] 19. Configuration example of a distance measurement module

[0067] 20. Configuration example of an electronic device

[0068] 21. Application example of a moving body

[0069] Note that in the following drawings to be referred to, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic and the relationship between the thickness and the planar dimensions, the thickness ratio of each layer, etc. are different from the actual ones. In addition, in some cases, the drawings include parts with different dimensional relationships and ratios between the drawings.

[0070] In addition, the definitions of directions such as up and down in the following description are provided only for the sake of simplicity and are not intended to limit the technical idea of the present disclosure. For example, when the object is observed after being rotated by 90 degrees, up and down are changed and interpreted as left and right, and when the object is observed after being rotated by 180 degrees, up and down are interpreted as inverted.

[0071] <1. Configuration example of a light-receiving element>

[0072] Figure 1 It is a block diagram showing a schematic configuration example of a light-receiving element to which the present technology is applicable.

[0073] Figure 1 The light-receiving element 1 shown outputs distance measurement information by an indirect ToF method and is a ToF sensor.

[0074] The light-receiving element 1 receives the light (reflected light) obtained by the reflection of the light (irradiation light) emitted from a predetermined light source and hitting an object, and outputs a depth image in which distance information to the object is stored as a depth value. In addition, the irradiation light emitted from the light source is, for example, infrared light having a wavelength in the range of 780 nm to 1000 nm, and is pulsed light that is repeatedly turned on and off at a predetermined period.

[0075] The light-receiving element 1 includes a pixel array unit 21 formed on a semiconductor substrate (not shown in the figure) and a peripheral circuit unit integrated on the same semiconductor substrate as the pixel array unit 21. The peripheral circuit unit includes, for example, a vertical drive unit 22, a column processing unit 23, a horizontal drive unit 24, a system control unit 25, etc.

[0076] The light-receiving element 1 is also provided with a signal processing unit 26 and a data storage unit 27. Note that the signal processing unit 26 and the data storage unit 27 can be mounted on the same substrate as the light-receiving element 1, and can be provided on a substrate within a module different from the light-receiving element 1.

[0077] The pixel array unit 21 generates charges corresponding to the received light amount, and is configured such that pixels 10 that output signals corresponding to the charges are arranged in a two-dimensional matrix in the row direction and the column direction. That is, the pixel array unit 21 performs photoelectric conversion on the incident light and includes a plurality of pixels 10 that output signals corresponding to the charges obtained as a result of the photoelectric conversion. Here, the row direction is the direction in which the pixels 10 are arranged horizontally, and the column direction is the direction in which the pixels 10 are arranged vertically. The row direction is the horizontal direction in the figure, and the column direction is the vertical direction in the figure. Details of the pixel 10 will be described in Figure 2 and the subsequent drawings.

[0078] In the pixel array unit 21, in the matrix-shaped pixel array, pixel drive lines 28 are wired in the row direction for each pixel row, and two vertical signal lines 29 are wired in the column direction for each pixel column. The pixel drive lines 28 transmit drive signals for performing driving when reading out signals from the pixels 10. Note that in Figure 1 the figure, one wiring is shown for the pixel drive lines 28, but the number of wirings is not limited to one. One end of the pixel drive lines 28 is connected to the output ends corresponding to the respective rows of the vertical drive unit 22.

[0079] The vertical drive unit 22 composed of a shift register, an address decoder, etc. drives all the pixels 10 of the pixel array unit 21 simultaneously in units of rows. That is, the vertical drive unit 22 and the system control unit 25 that controls the vertical drive unit 22 together constitute a drive unit that controls the operation of each unit pixel 10 of the pixel array unit 21.

[0080] The detection signals output from the respective pixels 10 of the pixel row according to the drive control of the vertical drive unit 22 are input to the column processing unit 23 through the vertical signal lines 29. The column processing unit 23 performs predetermined signal processing on the detection signals output from the respective pixels 10 through the vertical signal lines 29, and temporarily holds the detection signals that have undergone the signal processing. Specifically, the column processing unit 23 performs noise removal processing, analog-to-digital (AD) conversion processing, etc. as the signal processing.

[0081] The horizontal drive unit 24 is composed of a shift register, an address decoder, etc., and sequentially selects unit circuits corresponding to the pixel columns of the column processing unit 23. Through the selective scanning of the horizontal drive unit 24, the detection signals that have undergone signal processing for each unit circuit in the column processing unit 23 are sequentially output to the signal processing unit 26.

[0082] The system control unit 25 is composed of a timing generator that generates various timing signals, etc., and performs drive control on the vertical drive unit 22, the column processing unit 23, the horizontal drive unit 24, etc. based on the various timing signals generated by the timing generator.

[0083] The signal processing unit 26 has at least an arithmetic processing function, and performs various signal processing such as arithmetic processing based on the detection signals output from the column processing unit 23. The data storage unit 27 temporarily stores the data required for the signal processing executed by the signal processing unit 26 during the execution of the signal processing.

[0084] The light receiving element 1 configured as described above outputs a depth image in which distance information to an object is stored as a depth value in pixel values.

[0085] <2. Cross-sectional view of the first configuration example of the pixel>

[0086] Figure 2 It is a cross-sectional view showing a first configuration example of the pixel 10 arranged in the pixel array unit 21.

[0087] The light receiving element 1 includes a semiconductor substrate 41 and a multilayer wiring layer 42 formed on the surface side (lower side in the figure) thereof.

[0088] The semiconductor substrate 41 is formed of, for example, silicon (Si), and is formed to have a thickness of about several μm. In the semiconductor substrate 41, for example, N-type (second conductivity type) semiconductor regions 52 are formed in pixel units in a P-type (first conductivity type) semiconductor region 51, and thus photodiodes PD are formed in pixel units. The P-type semiconductor region 51 provided on both the front and back surfaces of the semiconductor substrate 41 also serves as a hole charge accumulation region for suppressing dark current.

[0089] Figure 2The upper surface of the semiconductor substrate 41 therein is the back surface of the semiconductor substrate 41 and is the light incident surface where light enters. An antireflection film 43 is formed on the upper surface on the back side of the semiconductor substrate 41.

[0090] The antireflection film 43 has a stacked structure in which, for example, a fixed charge film and an oxide film are stacked, and an insulating thin film with a high dielectric constant (High-k) according to the atomic layer deposition (ALD) method can be used, for example. Specifically, hafnium oxide (HfO 2 ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), strontium titanate (STO), etc. can be used. In Figure 2 example, the antireflection film 43 is configured such that a hafnium oxide film 53, an aluminum oxide film 54, and a silicon oxide film 55 are stacked.

[0091] An inter-pixel light-shielding film 45 that prevents incident light from entering adjacent pixels is formed on the upper surface of the antireflection film 43 and at the boundary portion 44 (hereinafter also referred to as the pixel boundary portion 44) of the pixel 10 adjacent to the semiconductor substrate 41. The material of the inter-pixel light-shielding film 45 only needs to be a light-shielding material, and examples of such materials can include metal materials such as tungsten (W), aluminum (Al), and copper (Cu).

[0092] The planarization film 46 is formed of an insulating film such as silicon oxide (SiO 2 ), silicon nitride (SiN), silicon oxynitride (SiON), etc. or an organic material such as resin on the upper surfaces of the antireflection film 43 and the inter-pixel light-shielding film 45.

[0093] Then, an on-chip lens 47 is formed on the upper surface of the planarization film 46 in units of pixels. The on-chip lens 47 is formed of a resin material such as styrene-based resin, acrylic-based resin, styrene-acrylic copolymer-based resin, or silicone-based resin. The light collected by the on-chip lens 47 effectively enters the photodiode PD.

[0094] In addition, at the pixel boundary portion 44 on the back side of the semiconductor substrate 41, an inter-pixel separation portion 61 that separates adjacent pixels is formed to a predetermined depth in the substrate depth direction from the back side (on-chip lens 47 side) of the semiconductor substrate 41. The outer peripheral portion including the bottom surface and side walls of the inter-pixel separation portion 61 is covered with a hafnium oxide film 53 that is part of the antireflection film 43. The inter-pixel separation portion 61 prevents incident light from penetrating into adjacent pixels 10 and confines it within its own pixel, and prevents incident light from leaking from adjacent pixels 10.

[0095] In Figure 2In the example, by embedding a silicon oxide film 55, which is the material of the uppermost layer of the antireflection film 43, in a groove (recess) dug from the back side, the silicon oxide film 55 and the inter-pixel separation portion 61 are formed simultaneously. Therefore, the silicon oxide film 55, which is part of the stacked film of the antireflection film 43, and the inter-pixel separation portion 61 are formed of the same material, but their materials do not necessarily have to be the same. The material buried in the groove (recess) dug from the back side as the inter-pixel separation portion 61 can be a metal material such as tungsten (W), aluminum (Al), titanium (Ti), titanium nitride (TiN), etc.

[0096] On the other hand, on the surface side of the semiconductor substrate 41 on which the multilayer wiring layer 42 is formed, two transfer transistors TRG1 and TRG2 are formed for one photodiode PD formed in each pixel 10. In addition, floating diffusion regions FD1 and FD2, which are charge accumulation portions for temporarily holding the charge transferred from the photodiode PD, are formed on the surface side of the semiconductor substrate 41 by high-concentration N-type semiconductor regions (N-type diffusion regions).

[0097] The multilayer wiring layer 42 is composed of a plurality of metal films M and the interlayer insulating films 62 therebetween. In Figure 2 it, an example is shown in which the multilayer wiring layer 42 is composed of three layers of the first metal film M1 to the third metal film M3.

[0098] A reflective film (reflective member) 63 is formed in a region below the formation region of the photodiode PD in the first metal film M1, which is the closest to the semiconductor substrate 41 among the plurality of metal films M of the multilayer wiring layer 42 (that is, a region that at least partially overlaps the formation region of the photodiode PD when viewed in a plan view). The reflective film 63 is formed of the same material as the other metal wirings 67 of the first metal film M1, for example, a metal film such as copper (Cu), aluminum (Al), tungsten (W), titanium (Ti), or titanium nitride (TiN).

[0099] The reflective film 63 has a function of reflecting the infrared light that enters the semiconductor substrate 41 from the light incident surface via the on-chip lens 47, passes through the semiconductor substrate 41, and is not photoelectrically converted in the semiconductor substrate 41 at the reflective film 63 and then re-entering the semiconductor substrate 41. Through this reflection function, the amount of infrared light that is photoelectrically converted in the semiconductor substrate 41 can be increased and the quantum efficiency (QE) (that is, the sensitivity of the pixel 10 to infrared light) can be improved.

[0100] In addition, the reflective film 63 blocks infrared light that enters the semiconductor substrate 41 through the on-chip lens 47 from the light incident surface at the first metal film M1 closest to the semiconductor substrate 41 and passes through the semiconductor substrate 41 without performing photoelectric conversion within the semiconductor substrate 41, and prevents the infrared rays from passing through the second metal film M2 and the third metal film M3 located below the first metal film M1. Therefore, the reflective film 63 can also be referred to as a light-shielding film. Through such a light-shielding function, it is possible to prevent the infrared light that passes through the semiconductor substrate 41 without performing photoelectric conversion within the semiconductor substrate 41 from being scattered by the metal film M below the first metal film M1 and incident on the surrounding pixels. Thereby, it is possible to prevent light from being erroneously detected in the surrounding pixels.

[0101] Furthermore, an inter-pixel light-shielding unit 65 that prevents the incident light reflected by the reflective film 63 from being incident on the photodiode PD of the adjacent pixel 10 is formed at the pixel boundary portion 44 of the multilayer wiring layer 42. As the material of the inter-pixel light-shielding unit 65, for example, the same material as that of the metal wiring 67 of the first metal film M1 including the reflective film 63 can be used. Additionally, for example, when the metal wiring 67 is copper, a material different from the metal wiring 67 of the first metal film M1 can be used as the material of the inter-pixel light-shielding unit 65 by using tungsten as the material of the inter-pixel light-shielding unit 65 or by forming the inter-pixel light-shielding unit 65 with an infrared light absorption film of an organic material.

[0102] The position of the inter-pixel light-shielding unit 65 in the substrate depth direction is above the reflective film 63 of the first metal film M1 (on the semiconductor substrate 41 side) to achieve the purpose of the inter-pixel light-shielding unit 65. For example, the inter-pixel light-shielding unit 65 is formed at the same layer position (depth direction position) as the gate contact portion 66 that connects the gate of the transfer transistor TRG1 or TRG2 formed of polysilicon or the like and the metal wiring 67 of the first metal film M1, or is formed on the side closer to the semiconductor substrate 41. When the inter-pixel light-shielding unit 65 is formed at the same layer position as the gate contact portion 66, the inter-pixel light-shielding unit 65 and the gate contact portion 66 can be formed simultaneously, thereby sharing steps and reducing the number of steps.

[0103] Note that among the metal wirings 67 of the first metal film M1, the metal wiring electrically connected to the gate of the transfer transistor TRG1 or TRG2 via the gate contact portion 66 is referred to as the contact wiring 67.

[0104] In a predetermined metal film M, for example, the second metal film M2 among the plurality of metal films M serving as the multilayer wiring layer 42, a wiring capacitor 64 is formed by forming a pattern having, for example, a comb shape. The reflection film 63 and the wiring capacitor 64 may be formed in the same layer (metal film M), but in the case where they are formed in different layers, the wiring capacitor 64 is formed in a layer farther from the semiconductor substrate 41 than the reflection film 63. In other words, the reflection film 63 is formed closer to the semiconductor substrate 41 than the wiring capacitor 64.

[0105] As described above, the light receiving element 1 has a back-illuminated structure in which the semiconductor substrate 41 serving as a semiconductor layer is disposed between the on-chip lens 47 and the multilayer wiring layer 42, and incident light is incident on the photodiode PD from the back side where the on-chip lens 47 is formed.

[0106] In addition, the pixel 10 includes two transfer transistors TRG1 and TRG2 for the photodiode PD provided in each pixel, and is configured to be able to distribute charges (electrons) generated by photoelectric conversion in the photodiode PD to the floating diffusion regions FD1 or FD2.

[0107] The reflected light received by the light receiving element 1 (which is infrared light having a wavelength of about 780 nm to 1000 nm) is less absorbed by the silicon of the semiconductor substrate 41 and has a low quantum efficiency. For this reason, in the pixel 10 according to the first configuration example, the inter-pixel separation portion 61 is formed in the pixel boundary portion 44 to prevent incident light from penetrating into adjacent pixels 10 and being confined in its own pixel, and to prevent incident light from leaking into adjacent pixels 10. In addition, by providing the reflection film 63 in the metal film M below the formation region of the photodiode PD, infrared light that has passed through the semiconductor substrate 41 without undergoing photoelectric conversion in the semiconductor substrate 41 is reflected by the reflection film 63, and the infrared light is made to be incident again into the semiconductor substrate 41.

[0108] On the other hand, since the reflection film 63 is provided in the first metal film M1 below the formation region of the photodiode PD, there is a concern that the incident light reflected by the reflection film 63 may penetrate into adjacent pixels, as shown by the arrow in, for example, Figure 3 Therefore, the inter-pixel light shielding unit 65 is formed at the pixel boundary portion 44 of the multilayer wiring layer 42 to prevent incident light from leaking into adjacent pixels due to the wrap-around from the multilayer wiring layer 42.

[0109] With the above configuration, the amount of infrared light that undergoes photoelectric conversion in the semiconductor substrate 41 can be increased and the quantum efficiency (QE) (i.e., the sensitivity of the pixel 10 to infrared light) can be improved.

[0110] <3. Modification Example of the First Configuration Example>

[0111] Figure 4is a cross-sectional view showing a modified example of the pixel 10 according to Figure 2 the first configuration example shown.

[0112] In Figure 4 , the parts corresponding to those in Figure 2 the first configuration example shown are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0113] Figure 4 The modified example of Figure 2 differs from the first configuration example of

[0114] in that the inter-pixel separation portion 61 (which is a deep trench isolation (DTI) formed by digging from the back side (on-chip lens 47 side) of the semiconductor substrate 41) is replaced by an inter-pixel separation portion 71 that penetrates the semiconductor substrate 41, and other aspects are common to the modified example and the first configuration example.

[0115] The inter-pixel separation portion 71 is formed by forming a trench that penetrates from a part of the back side (on-chip lens 47 side) or the front side of the semiconductor substrate 41 to the opposite substrate surface and burying a silicon oxide film 55, which is the uppermost layer material of the antireflection film 43, in the trench. In addition to insulating films such as the silicon oxide film 55, examples of the material buried in the trench as the inter-pixel separation portion 71 also include metal materials such as tungsten (W), aluminum (Al), titanium (Ti), and titanium nitride (TiN).

[0115] By forming such an inter-pixel separation portion 71, adjacent pixels can be completely electrically separated. As a result, incident light is prevented from penetrating into adjacent pixels 10 and is confined within its own pixel, and leakage of incident light from adjacent pixels 10 is prevented. In addition, an inter-pixel light-shielding unit 65 is formed at the pixel boundary portion 44 of the multilayer wiring layer 42 to prevent incident light from leaking into adjacent pixels due to the winding around of the multilayer wiring layer 42.

[0116] Therefore, also in the modified example of the first configuration example, the amount of infrared light that performs photoelectric conversion within the semiconductor substrate 41 can be increased to improve the quantum efficiency (i.e., the sensitivity of the pixel 10 to infrared light).

[0117] <4. Circuit configuration example of pixel>

[0118] Figure 5 Shows the circuit configuration of the pixels 10 two-dimensionally arranged in the pixel array portion 21.

[0119] Pixel 10 includes a photodiode PD as a photoelectric conversion element. In addition, pixel 10 includes two transfer transistors TRG, two floating diffusion regions FD, two additional capacitors FDL, two switching transistors FDG, two amplifying transistors AMP, two reset transistors RST, and two selection transistors SEL. In addition, pixel 10 includes a charge discharge transistor OFG.

[0120] Here, when the two transfer transistors TRG, two floating diffusion regions FD, two additional capacitors FDL, two switching transistors FDG, two amplifying transistors AMP, two reset transistors RST, and two selection transistors SEL provided in pixel 10 are distinguished from each other, they are respectively referred to as transfer transistors TRG1 and TRG2, floating diffusion regions FD1 and FD2, additional capacitors FDL1 and FDL2, switching transistors FDG1 and FDG2, amplifying transistors AMP1 and AMP2, reset transistors RST1 and RST2, and selection transistors SEL1 and SEL2, as Figure 5 shown.

[0121] The transfer transistor TRG, switching transistor FDG, amplifying transistor AMP, selection transistor SEL, reset transistor RST, and charge discharge transistor OFG are formed of N-type MOS transistors, for example.

[0122] When the transfer drive signal TRG1g supplied to the gate electrode is set to the active state, transfer transistor TRG1 is set to the conductive state in response to the transfer drive signal TRG1g. Therefore, transfer transistor TRG1 transfers the charge accumulated in photodiode PD to floating diffusion region FD1. When the transfer drive signal TRG2g supplied to the gate electrode is set to the active state, transfer transistor TRG2 is set to the conductive state in response to the transfer drive signal TRG2g. Therefore, transfer transistor TRG2 transfers the charge accumulated in photodiode PD to floating diffusion region FD2.

[0123] Floating diffusion regions FD1 and FD2 are charge accumulation parts that temporarily hold the charge transferred from photodiode PD.

[0124] When the FD drive signal FDG1g supplied to the gate electrode is set to the active state, the switching transistor FDG1 is set to the conductive state in response to the FD drive signal FDG1g. Thus, the switching transistor FDG1 connects the additional capacitor FDL1 to the floating diffusion region FD1. When the FD drive signal FDG2g supplied to the gate electrode is set to the active state, the switching transistor FDG2 is set to the conductive state in response to the FD drive signal FDG2g. Thus, the switching transistor FDG2 connects the additional capacitor FDL2 to the floating diffusion region FD2. The additional capacitors FDL1 and FDL2 are formed by Figure 2 the wiring capacitance 64 in

[0125] When the reset drive signal RSTg supplied to the gate electrode is set to the active state, the reset transistor RST1 resets the potential of the floating diffusion region FD1 by being set to the conductive state in response to the reset drive signal RSTg. When the reset drive signal RSTg supplied to the gate electrode is set to the active state, the reset transistor RST2 resets the potential of the floating diffusion region FD2 by being set to the conductive state in response to the reset drive signal RSTg. Note that when the reset transistors RST1 and RST2 are set to the active state, the switching transistors FDG1 and FDG2 are also simultaneously set to the active state, and the additional capacitors FDL1 and FDL2 are also reset.

[0126] For example, in the case of high illuminance with a large amount of incident light, the vertical drive unit 22 sets the switching transistors FDG1 and FDG2 to the active state to connect the floating diffusion region FD1 and the additional capacitor FDL1 and to connect the floating diffusion region FD2 and the additional capacitor FDL2. Thus, more charges can be accumulated when the illuminance is high.

[0127] On the other hand, in the case of low illuminance with a small amount of incident light, the vertical drive unit 22 sets the switching transistors FDG1 and FDG2 to the non-active state to separate the additional capacitors FDL1 and FDL2 from the floating diffusion regions FD1 and FD2. Thus, the conversion efficiency can be improved.

[0128] When the discharge drive signal OFG1g supplied to the gate electrode is set to the active state, the charge discharge transistor OFG discharges the charges accumulated in the photodiode PD by being set to the conductive state in response to the discharge drive signal OFG1g.

[0129] The amplifying transistor AMP1 is connected to a constant current source (not shown in the figure) via the source electrode through the selection transistor SEL1 to the vertical signal line 29A, thereby forming a source follower circuit. The amplifying transistor AMP2 is connected to a constant current source (not shown in the figure) via the source electrode through the selection transistor SEL2 to the vertical signal line 29B, thereby forming a source follower circuit.

[0130] The selection transistor SEL1 is connected between the source electrode of the amplifying transistor AMP1 and the vertical signal line 29A. When the selection signal SEL1g supplied to the gate electrode is set to the active state, the selection transistor SEL1 is set to the conductive state in response to the selection signal SEL1g, and outputs the detection signal VSL1 output from the amplifying transistor AMP1 to the vertical signal line 29A.

[0131] The selection transistor SEL2 is connected between the source electrode of the amplifying transistor AMP2 and the vertical signal line 29B. When the selection signal SEL2g supplied to the gate electrode is set to the active state, the selection transistor SEL2 is set to the conductive state in response to the selection signal SEL2g, and outputs the detection signal VSL2 output from the amplifying transistor AMP2 to the vertical signal line 29B.

[0132] The transfer transistors TRG1 and TRG2, the switching transistors FDG1 and FDG2, the amplifying transistors AMP1 and AMP2, the selection transistors SEL1 and SEL2, and the charge discharging transistor OFG of the pixel 10 are controlled by the vertical driving unit 22.

[0133] In Figure 5 the pixel circuit, the additional capacitors FDL1 and FDL2 and the switching transistors FDG1 and FDG2 for controlling their connection can be omitted, but a high dynamic range can be ensured by providing the additional capacitor FDL and appropriately using it according to the incident light amount.

[0134] The operation of the pixel 10 will be briefly described.

[0135] First, before starting light reception, a reset operation for resetting the charge in the pixel 10 is performed in all pixels. That is, the charge discharging transistor OFG, the reset transistors RST1 and RST2, and the switching transistors FDG1 and FDG2 are turned on, and the charge accumulated in the photodiode PD, the floating diffusion regions FD1 and FD2, and the additional capacitors FDL1 and FDL2 is discharged.

[0136] After the accumulated charge is discharged, light reception starts in all pixels.

[0137] During the light reception period, transfer transistors TRG1 and TRG2 are alternately driven. That is, in the first period, control is performed to turn on transfer transistor TRG1 and turn off transfer transistor TRG2. In the first period, the charge generated in the photodiode PD is transferred to the floating diffusion region FD1. In the second period after the first period, control is performed to turn off transfer transistor TRG1 and turn on transfer transistor TRG2. In the second period, the charge generated in the photodiode PD is transferred to the floating diffusion region FD2. Thus, the charge generated in the photodiode PD is distributed to and accumulated in the floating diffusion regions FD1 and FD2.

[0138] Here, the transfer transistor TRG and the floating diffusion region FD that read out the charge (electrons) obtained by photoelectric conversion are also referred to as an active tap. In contrast, the transfer transistor TRG and the floating diffusion region FD that do not read out the charge obtained by photoelectric conversion are also referred to as an inactive tap.

[0139] In addition, when the light reception period ends, the pixels 10 in the pixel array unit 21 are sequentially selected. In the selected pixel 10, the selection transistors SEL1 and SEL2 are turned on. Thus, the charge accumulated in the floating diffusion region FD1 is output as a detection signal VSL1 to the column processing unit 23 via the vertical signal line 29A. The charge accumulated in the floating diffusion region FD2 is output as a detection signal VSL2 to the column processing unit 23 via the vertical signal line 29B.

[0140] As described above, one light reception operation is terminated, and the next light reception operation starting from the reset operation is performed.

[0141] The reflected light received by the pixel 10 is delayed according to the distance to the object starting from the timing when the light source emits light. The charge distribution ratio accumulated in the two floating diffusion regions FD1 and FD2 changes with the delay time according to the distance to the object. Therefore, the distance to the object can be obtained from the charge distribution ratio accumulated in the two floating diffusion regions FD1 and FD2.

[0142] <5. Planar view of the pixel>

[0143] Figure 6 is a plan view showing Figure 5 an arrangement example of the pixel circuit shown.

[0144] Figure 6 The horizontal direction in Figure 1 corresponds to the row direction (horizontal direction) in Figure 1 and the vertical direction corresponds to the column direction (vertical direction) in

[0145] As Figure 6As shown, in the central region of the rectangular pixel 10, the photodiode PD is formed of an N-type semiconductor region 52.

[0146] The transfer transistor TRG1, switching transistor FDG1, reset transistor RST1, amplifying transistor AMP1, and selection transistor SEL1 are linearly arranged outside the photodiode PD and juxtaposed along a predetermined one of the four sides of the rectangular pixel 10, and the transfer transistor TRG2, switching transistor FDG2, reset transistor RST2, amplifying transistor AMP2, and selection transistor SEL2 are linearly arranged and juxtaposed along the other side of the four sides of the rectangular pixel 10.

[0147] In addition, the charge discharge transistor OFG is arranged on a side different from the two sides where the transfer transistor TRG, switching transistor FDG, reset transistor RST, amplifying transistor AMP, and selection transistor SEL are formed in the pixel 10.

[0148] For example, the inter-pixel light shielding unit 65 is formed by arranging light shielding members having the same size and planar shape as the gate contact portion 66 at predetermined intervals on the boundary line of the pixel 10. In Figure 6 this example, the planar shape of one light shielding member constituting the inter-pixel light shielding unit 65 is rectangular, but it may also be a rectangle with rounded corners, an ellipse, or a circle.

[0149] Figure 7 And Figure 8 are diagrams showing other formation examples of the inter-pixel light shielding unit 65.

[0150] As Figure 7 shown, the inter-pixel light shielding unit 65 can be configured such that linear light shielding members having a planar shape that is long in the boundary line direction of the pixel 10 and short in the direction adjacent to other pixels 10 are arranged at predetermined intervals on the boundary line of the pixel 10.

[0151] Alternatively, as Figure 8 shown, the inter-pixel light shielding unit 65 can be configured such that light shielding members are arranged on the boundary line of the pixel 10 in a form surrounding the entire periphery of the pixel 10.

[0152] <6. Other Circuit Configuration Examples of Pixels>

[0153] Figure 9 Show other circuit configuration examples of the pixel 10.

[0154] In Figure 9 this, the parts corresponding to those in Figure 5 are denoted by the same reference numerals, and the description of these parts will be appropriately omitted.

[0155] Pixel 10 includes a photodiode PD as a photoelectric conversion element. In addition, pixel 10 includes two first transfer transistors TRGa, two second transfer transistors TRGb, two memories MEM, two floating diffusion regions FD, two reset transistors RST, two amplification transistors AMP, and two selection transistors SEL.

[0156] Here, when the two first transfer transistors TRGa, two second transfer transistors TRGb, two memories MEM, two floating diffusion regions FD, two reset transistors RST, two amplification transistors AMP, and two selection transistors SEL provided in pixel 10 are distinguished from each other, they are respectively referred to as first transfer transistors TRGa1 and TRGa2, second transfer transistors TRGb1 and TRGb2, transfer transistors TRG1 and TRG2, memories MEM1 and MEM2, floating diffusion regions FD1 and FD2, amplification transistors AMP1 and AMP2, and selection transistors SEL1 and SEL2, as Figure 9 shown.

[0157] Therefore, Figure 5 the pixel circuit in Figure 9 compared with the pixel circuit in

[0158] has the transfer transistor TRG changed to two types, namely, the first transfer transistor TRGa and the second transfer transistor TRGb, and a memory MEM is added. In addition, the additional capacitor FDL and the switching transistor FDG are omitted.

[0159] In Figure 5 the pixel circuit shown, the charges generated by the photodiode PD are transferred to the floating diffusion regions FD1 and FD2 and held therein. However, in Figure 9 the pixel circuit shown, the charges are transferred to the memories MEM1 and MEM2 provided as charge accumulation parts and held therein.

[0160] That is, when the first transfer driving signal TRGa1g supplied to the gate electrode is set to the active state, the first transfer transistor TRGa1 responds to the first transfer driving signal TRGa1g being set to the conductive state. Thus, the first transfer transistor TRGa1 transfers the charge accumulated in the photodiode PD to the memory MEM1. When the first transfer driving signal TRGa2g supplied to the gate electrode is set to the active state, the first transfer transistor TRGa2 responds to the first transfer driving signal TRGa2g being set to the conductive state. Thus, the first transfer transistor TRGa2 transfers the charge accumulated in the photodiode PD to the memory MEM2.

[0161] In addition, when the second transfer driving signal TRGb1g supplied to the gate electrode is set to the active state, the second transfer transistor TRGb1 responds to the second transfer driving signal TRGb1g being set to the conductive state. Thus, the second transfer transistor TRGb1 transfers the charge accumulated in the memory MEM1 to the floating diffusion region FD1. When the second transfer driving signal TRGb2g supplied to the gate electrode is set to the active state, the second transfer transistor TRGb2 responds to the second transfer driving signal TRGb2g being set to the conductive state. Thus, the second transfer transistor TRGb2 transfers the charge accumulated in the memory MEM2 to the floating diffusion region FD2.

[0162] When the reset driving signal RST1g supplied to the gate electrode is set to the active state, the reset transistor RST1 responds to the reset driving signal RST1g being set to the conductive state. Thus, the reset transistor RST1 resets the potential of the floating diffusion region FD1. When the reset driving signal RST2g supplied to the gate electrode is set to the active state, the reset transistor RST2 responds to the reset driving signal RST2g being set to the conductive state. Thus, the reset transistor RST2 resets the potential of the floating diffusion region FD2. Note that when the reset transistors RST1 and RST2 are set to the active state, the second transfer transistors TRGb1 and TRGb2 are also simultaneously set to the active state, and the memories MEM1 and MEM2 are also reset.

[0163] In Figure 9 In the pixel circuit shown, the charge generated by the photodiode PD is distributed to and accumulated in the memories MEM1 and MEM2. In addition, the charge held in the memories MEM1 and MEM2 is transferred to the floating diffusion regions FD1 and FD2 at the timing of reading out the charge and output from the pixel 10.

[0164] <7. Planar view of the pixel>

[0165] Figure 10is a plan view showing Figure 9 an example of the layout of the pixel circuit shown

[0166] Figure 10 The horizontal direction in Figure 1 corresponds to the row direction (horizontal direction) in Figure 1 and the vertical direction corresponds to the column direction (vertical direction) in

[0167] As shown Figure 10 in, the photodiode PD is formed of an N-type semiconductor region 52 in the central region of the rectangular pixel 10

[0168] The first transfer transistor TRGa1, the second transfer transistor TRGb1, the reset transistor RST1, the amplification transistor AMP1, and the selection transistor SEL1 are linearly arranged outside the photodiode PD and juxtaposed along a predetermined one of the four sides of the rectangular pixel 10. The first transfer transistor TRGa2, the second transfer transistor TRGb2, the reset transistor RST2, the reset transistor RST2, the amplification transistor AMP2, and the selection transistor SEL2 are linearly arranged and juxtaposed along the other side of the four sides of the rectangular pixel 10. The memories MEM1 and MEM2 are formed of, for example, buried N-type diffusion regions

[0169] As the inter-pixel light-shielding unit 65, a configuration in which light-shielding members having the same planar shape as the gate contact portion 66 are arranged at equal intervals is adopted. As shown Figure 6 in, but a configuration shown in Figure 7 and Figure 8 in or other configurations may be adopted

[0170] Note that the layout of the pixel circuit is not limited to the examples shown in Figure 6 or Figure 10 and other layouts may also be adopted

[0171] <8. Cross-sectional view of the second configuration example of the pixel>

[0172] Figure 11 is a cross-sectional view showing a second configuration example of the pixel 10

[0173] In Figure 11 the parts corresponding to those in the first configuration example shown in Figure 2 are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted

[0174] In Figure 11In the second configuration example, a moth-eye structure portion 111 in which minute unevenness is periodically formed is formed on the back surface of the semiconductor substrate 41 and above the formation region of the photodiode PD. Further, an antireflection film 43 formed on the upper surface of the moth-eye structure portion 111 of the semiconductor substrate 41 is also formed to have a moth-eye structure corresponding to the moth-eye structure portion 111.

[0175] The moth-eye structure portion 111 of the semiconductor substrate 41 is configured such that, for example, a region in which a plurality of quadrangular pyramids having substantially the same shape and substantially the same size are regularly (in a lattice pattern) arranged.

[0176] The moth-eye structure portion 111 is formed to have an inverted pyramid structure in which a plurality of regions having a quadrangular pyramid shape with a vertex on the photodiode PD side are regularly juxtaposed.

[0177] Alternatively, the moth-eye structure portion 111 may have a regular pyramid structure in which a plurality of regions having a quadrangular pyramid with a vertex on the on-chip lens 47 side are regularly juxtaposed. The sizes and arrangements of the plurality of quadrangular pyramids may be formed randomly instead of regularly arranged. Further, each concave portion or each convex portion of each quadrangular pyramid of the moth-eye structure portion 111 has a certain degree of curvature and may be circular. The moth-eye structure portion 111 is only required to have a structure in which the uneven structure is periodically or randomly repeated, and the shape of the concave portion or the convex portion is arbitrary.

[0178] Figure 12 FIG. is a cross-sectional view showing another shape example of the moth-eye structure portion 111.

[0179] In Figure 12 's example, the shape of the moth-eye structure portion 111 has a surface parallel to the semiconductor substrate 41, and has an uneven structure in which concave portions dug out by a fixed amount in the substrate depth direction are juxtaposed at regular intervals. Note that, in Figure 12 , the antireflection film 43 is composed of two layers, that is, a hafnium oxide film 53 and a silicon oxide film 55, but may be composed of three layers similar to other configuration examples, or may be composed of a single layer.

[0180] As Figure 11 and Figure 12 shown, the moth-eye structure portion 111 is formed as a diffraction structure for diffracting incident light on the light incident surface of the semiconductor substrate 41, and thus, a sudden change in the refractive index at the substrate interface can be reduced, and the influence of reflected light can be reduced.

[0181] The other configurations of the second configuration example are the same as those of the first configuration example.

[0182] In addition, in Figure 11 and Figure 12In this case, an inter-pixel light-shielding unit 65 is formed at a pixel boundary portion 44 of the multilayer wiring layer 42 to prevent incident light from leaking into adjacent pixels due to the winding around of the multilayer wiring layer 42.

[0183] Therefore, also in the second configuration example, the amount of infrared light that undergoes photoelectric conversion within the semiconductor substrate 41 can be further increased to improve the quantum efficiency (i.e., the sensitivity of the pixel 10 to infrared light).

[0184] <9. Cross-sectional view of a third configuration example of a pixel>

[0185] Figure 13 It is a cross-sectional view showing a third configuration example of the pixel 10.

[0186] In the above-described first and second configuration examples, a configuration for preventing incident light from leaking into adjacent pixels due to the winding around of the multilayer wiring layer 42 has been described. However, in the third configuration example, a configuration for preventing incident light from leaking into adjacent pixels due to the winding around from the side of the on-chip lens 47 will be described.

[0187] In Figure 13 the parts corresponding to those in the Figure 2 shown first configuration example are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0188] In Figure 13 the third configuration example shown, a reflection film 63 formed at the same layer as the first metal film M1 below the formation region of the photodiode PD in Figure 2 is changed to a reflection film 141. In addition, the inter-pixel light-shielding unit 65 formed at the pixel boundary portion 44 of the multilayer wiring layer 42 in Figure 2 is omitted.

[0189] The material for forming the reflection film 141 in the third configuration example is different from the material for forming the reflection film 63 in the first configuration example. Specifically, in the first configuration example, the reflection film 141 is formed of the same material (e.g., copper, aluminum, etc.) as the metal wiring 67 electrically connected to the gates of the transfer transistors TRG1 or TRG2. However, in the third configuration example, the reflection film 141 can be formed of a material different from that of the metal wiring 67. For example, when the metal wiring 67 is formed of copper, the reflection film 141 is formed of aluminum, tungsten (W), platinum (Pt), nickel (Ni), etc.

[0190] The material for forming the reflective film 141 can be determined according to, for example, the thickness of the semiconductor substrate 41. For example, when the semiconductor substrate 41 has a large thickness (for example, when the thickness is 6 μm or more), aluminum can be used as the material for the reflective film 141. Additionally, for example, when the semiconductor substrate 41 has a small thickness (for example, when the thickness is less than 6 μm), tungsten, platinum, nickel, etc. can be used as the material for the reflective film 141.

[0191] In other words, for example, when the semiconductor substrate 41 has a large thickness (for example, when the thickness is 6 μm or more), a material having a relatively high reflectivity (for example, a material having a reflectivity higher than 70%) can be used as the material for the reflective film 141. Additionally, for example, when the semiconductor substrate 41 has a small thickness (for example, when the thickness is less than 6 μm), a material having a relatively low reflectivity (for example, a material having a reflectivity of 30% to less than 70%) can be used as the material for the reflective film 141.

[0192] As the material for forming the reflective film 141, a material having a lower reflectivity (refractive index) than that of the other metal wirings 67 of the first metal film M1 at least in the wavelength range of infrared light is used. Examples of such materials include metals such as Al, Ni, Cr, Fe, Pt, Rh, and Sn, their alloys, and metal compounds such as Ta 2 O 5 、Al 2 O 3 and Si 3 N 4 etc.

[0193] The other configurations of the third configuration example are the same as those of the first configuration example.

[0194] The reflected light received by the light-receiving element 1 is infrared light with a wavelength of approximately 780 nm to 1000 nm, which is less absorbed by the silicon of the semiconductor substrate 41 and has a low quantum efficiency. For this reason, the light incident on the semiconductor substrate 41 passes through the semiconductor substrate 41 and is reflected again by the reflective film 141 back to the semiconductor substrate 41. In this case, when the reflectivity of the reflective film 141 is as high as close to 100%, as Figure 14 shown by the solid arrow in, the light reflected by the reflective film 141 further passes through the light incident surface of the semiconductor substrate 41, is reflected by the on-chip lens 47, and leaks into the adjacent pixel 10, which may cause flare.

[0195] According to the third configuration example, the reflective film 141 is formed of a material having a lower reflectivity than that of the other metal wirings 67 of the first metal film M1 and is formed to have a lower reflectivity than that of the other metal wiring 67 material according to the thickness of the semiconductor substrate 41. Therefore, as Figure 14As shown by the dashed arrow in [the figure], it can be adjusted so that all the light beams reflected by the reflective film 141 are absorbed within the semiconductor substrate 41. Thus, it is possible to prevent the light reflected by the reflective film 141 from further passing through the light incident surface of the semiconductor substrate 41, and thereby prevent the incident light from leaking into adjacent pixels due to the wrap-around from the side of the on-chip lens 47.

[0196] With the above configuration, it is possible to further increase the amount of infrared light that performs photoelectric conversion within the semiconductor substrate 41 to improve the quantum efficiency (i.e., the sensitivity of the pixel 10 to infrared light), and suppress the cause of flare due to the reflected light passing through the semiconductor substrate 41.

[0197] <10. Modified Example of the Third Configuration Example>

[0198] <First Modified Example>

[0199] Figure 15 is a cross-sectional view showing a first modified example of the pixel 10 according to the third configuration example shown in Figure 13 shown.

[0200] In Figure 15 the parts corresponding to those in the third configuration example shown in Figure 13 are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0201] In Figure 15 the first modified example, the position of the reflective film 141 in the substrate depth direction is different from that in the third configuration example shown in Figure 13 and otherwise is the same for the first modified example shown in Figure 15 and the third configuration example shown in Figure 13 shown.

[0202] Specifically, in the third configuration example shown in Figure 13 the reflective film 141 is formed at the same position (same layer) as the first metal film M1 in the substrate depth direction, but in Figure 15 the first modified example, the reflective film 141 is formed at a different position (different layer) from the first metal film M1. Specifically, the reflective film 141 is formed on the side closer to the photodiode PD (semiconductor substrate 41 side) than the first metal film M1 in the substrate depth direction.

[0203] When the reflective film 141 is formed in the same layer as the first metal film M1, as shown in A of Figure 16 the reflective film 141 must be arranged to avoid the metal wiring 67 of the first metal film M1, so the area of the reflective film 141 decreases when observed in the plan view.

[0204] On the other hand, in the case where the reflective film 141 is formed on a layer different from the first metal film M1, as Figure 16 shown in B of Figure 16 , when observed in a plan view, the metal wiring 67 of the first metal film M1 and the reflective film 141 do not interfere with each other. Therefore, the reflective film 141 can be arranged in a large size in the region overlapping with the photodiode PD. Thus, the purpose of the reflective film 63 can be achieved to a greater extent. That is, a larger amount of infrared light that passes through the semiconductor substrate 41 and does not perform photoelectric conversion within the semiconductor substrate 41 can be reflected by the reflective film 63 and thus incident into the semiconductor substrate 41.

[0205] With the above configuration, the amount of infrared light that performs photoelectric conversion within the semiconductor substrate 41 can be further increased to improve the quantum efficiency (i.e., the sensitivity of the pixel 10 to infrared light), and the cause of flare due to the reflected light passing through the semiconductor substrate 41 can be suppressed.

[0206] <Second Modified Example>

[0207] Figure 17 is a cross-sectional view showing a second modified example of the pixel 10 according to the Figure 13 third configuration example shown in Figure 13 .

[0208] In Figure 17 , the parts corresponding to those in the Figure 13 third configuration example shown in Figure 13 are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0209] In Figure 17 the second modified example shown in Figure 17 , the reflective film 141 in the Figure 13 third configuration example shown in Figure 13 is replaced with a reflective film 141P, and the other configurations are the same for the Figure 17 second modified example shown in Figure 17 and the Figure 13 third configuration example shown in Figure 13 .

[0210] The position of the reflective film 141P in the substrate depth direction is different from the position of the Figure 13 reflective film 141 shown in Figure 13 , and the formation material of the reflective film 141P is also different from the formation material of the reflective film 141.

[0211] Specifically, the reflective film 141P is formed of the same material (e.g., polysilicon) as the gates of the transfer transistors TRG1 and TRG2 at the same substrate depth position as the gates of the transfer transistors TRG1 and TRG2. By forming the reflective film 141P of the same material at the same substrate depth position as the gates of the transfer transistors TRG1 and TRG2, the reflective film 141P can be formed while forming the gates of the transfer transistors TRG1 and TRG2, so that steps can be shared and the number of steps can be reduced. Note that the reflective film 141P can be formed of polysilicon and a self-aligned silicide film.

[0212] As in Figure 15 the first modification example of Figure 17 and the second modification example of

[0213] <Cross-sectional view of the fourth configuration example of the pixel>

[0214] Figure 18 is a cross-sectional view showing the fourth configuration example of the pixel 10.

[0215] In Figure 18 the parts corresponding to those in Figure 13 the third configuration example shown are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0216] In Figure 18 the fourth configuration example, a moth-eye structure portion 161 in which fine irregularities are periodically formed is further formed on the connection surface between the semiconductor substrate 41 and the multilayer wiring layer 42 below the formation region of the photodiode PD. The moth-eye structure portion 161 can be formed to have an inverted pyramid structure or a regular pyramid structure, similar to Figure 11 the moth-eye structure portion 111 described in Figure 12 . Alternatively, the moth-eye structure portion 161 can have an irregularity structure in which recesses parallel to the semiconductor substrate 41 are arranged side by side at regular intervals, as shown in

[0217] The other configurations of the fourth configuration example are the same as those of Figure 13 the third configuration example shown.

[0218] The moth-eye structure portion 161 is formed at the interface between the semiconductor substrate 41 and the multilayer wiring layer 42 below the formation region of the photodiode PD. Therefore, the light transmitted through the photodiode PD is diffused by the moth-eye structure portion 161 and reaches the reflection film 141. Since the reflection of infrared light by the reflection film 141 is suppressed, the light reflected by the reflection film 141 can be prevented from further transmitting through the light incident surface of the semiconductor substrate 41. As a result, the incident light can be prevented from leaking into adjacent pixels due to the wrap-around from the on-chip lens 47 side.

[0219] <12. Cross-sectional view of the fifth configuration example of the pixel>

[0220] Figure 19 It is a cross-sectional view showing the fifth configuration example of the pixel 10.

[0221] In Figure 19 , the parts corresponding to those in the Figure 13 shown third configuration example are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0222] In Figure 19 's fifth configuration example, Figure 13 the reflection film 141 in the Figure 19 shown third configuration example is replaced with a reflection film 141M. Figure 13 The other configurations in

[0223] are the same as those of the Figure 18 shown third configuration example. The difference between the reflection film 141M and the reflection film 141 is that the surface shape on the semiconductor substrate 41 side has a moth-eye structure in which fine irregularities are periodically formed. Since the surface shape on the semiconductor substrate 41 side of the reflection film 141M is formed as a moth-eye structure, the light transmitted through the photodiode PD is diffused by the reflection film 141M and reflected toward the semiconductor substrate 41, similar to

[0224] <13. Cross-sectional view of the sixth configuration example of the pixel>

[0225] Figure 20 It is a cross-sectional view showing the sixth configuration example of the pixel 10.

[0226] In Figure 20 , the parts corresponding to those in the above first to fifth configuration examples are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0227] According to Figure 20The pixel 10 of the fifth configuration example includes an anti-reflection structure portion 111 on the back surface of the semiconductor substrate 41 and above the formation region of the photodiode PD, and an anti-reflection structure portion 161 on the front surface of the semiconductor substrate 41 and below the formation region of the photodiode PD.

[0228] In addition, according to Figure 20 the pixel 10 of the sixth configuration example includes a reflective film 141 formed of a material having a lower reflectivity than that of the other metal wirings 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0229] In other words, the pixel 10 of the sixth configuration example according to Figure 20 has a structure in which the anti-reflection structure portion 111 is added to the back surface side of the semiconductor substrate 41 according to Figure 18 shown in the fourth configuration example.

[0230] In Figure 20 the sixth configuration example, the shape of the fine concavo-convex structure of the anti-reflection structure portion 111 on the back surface side (the upper side in the figure) of the semiconductor substrate 41 and the shape of the fine concavo-convex structure of the anti-reflection structure portion 161 on the front surface side (the lower side in the figure) of the semiconductor substrate 41 may be the same or different. In addition, the period of the concavo-convex structure of the anti-reflection structure portion 111 and the period of the concavo-convex structure of the anti-reflection structure portion 161 may be the same or different.

[0231] For example, when the period of the concavo-convex structure of the anti-reflection structure portion 111 is set to be longer than the period of the concavo-convex structure of the anti-reflection structure portion 161, light with a wavelength close to infrared light is diffused by the anti-reflection structure portion 111, light with a wavelength close to ultraviolet light is diffused by the anti-reflection structure portion 161, and light with a wavelength close to infrared light is not diffused by the anti-reflection structure portion 161. When the semiconductor substrate 41 has a large thickness and relatively little suppression of infrared light reflection is required, the period of the concavo-convex structure of the anti-reflection structure portion 111 is set to be longer than the period of the concavo-convex structure of the anti-reflection structure portion 161. In contrast, when the semiconductor substrate 41 has a small thickness and the reflection of infrared light in the reflective film 141 needs to be suppressed, the period of the concavo-convex structure of the anti-reflection structure portion 161 is set to be longer than the period of the concavo-convex structure of the anti-reflection structure portion 111.

[0232] Similarly, in Figure 20 the sixth configuration example, the reflective film 141 having a lower reflectivity than the other metal wirings 67 can prevent incident light from leaking into adjacent pixels due to wrap-around from the side of the on-chip lens 47. In addition, by the anti-reflection structure portions 111 and 161, light reflected by the reflective film 141 can be prevented from further passing through the light incident surface of the semiconductor substrate 41.

[0233] <Cross-sectional view according to the seventh configuration example of a pixel>

[0234] Figure 21 This is a cross-sectional view showing the seventh configuration example of pixel 10.

[0235] In Figure 21 parts corresponding to the above first to sixth configuration examples are denoted by the same reference numerals, and descriptions of these parts will be appropriately omitted.

[0236] According to Figure 21 the sixth configuration example, pixel 10 includes a moth-eye structure portion 111 on the back surface of semiconductor substrate 41.

[0237] In addition, according to Figure 20 the sixth configuration example, pixel 10 includes a reflective film 141 formed of a material having a lower reflectivity than that of other metal wirings 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0238] Further, a plurality of dummy contact portions 181 are formed on the surface of the reflective film 141 on the semiconductor substrate 41 side. The dummy contact portions 181 are formed of the same material as the gate contact portion 66 connected to the gate of the transfer transistor TRG1 or TRG2 in the same step, but are contact wirings not connected to the gate of the pixel transistor. By forming a plurality of dummy contact portions 181 on the surface of the reflective film 141 on the semiconductor substrate 41 side, a fine uneven structure is formed, and thus an effect similar to that of Figure 19 the reflective film 141M in the fifth configuration example shown can be obtained.

[0239] That is, the light transmitted through the photodiode PD is diffused by the plurality of dummy contact portions 181 formed on the surface of the reflective film 141M on the semiconductor substrate 41 side, and is reflected by the plurality of dummy contact portions 181 toward the semiconductor substrate 41. Thereby, the light reflected by the reflective film 141 can be prevented from further passing through the light incident surface of the semiconductor substrate 41. As a result, the incident light can be prevented from leaking into adjacent pixels due to the wrap-around from the on-chip lens 47 side.

[0240] Similarly, in Figure 21 the seventh configuration example, the incident light can be prevented from leaking into adjacent pixels due to the wrap-around from the on-chip lens 47 side by the reflective film 141 having a lower reflectivity than that of other metal wirings 67. In addition, by the moth-eye structure portion 111, the light reflected by the reflective film 141 can be prevented from further passing through the light incident surface of the semiconductor substrate 41.

[0241] <Modification example of the seventh configuration example>

[0242] Note that the planar shape, size, number of dummy contact portions 181 disposed on the plane of the reflective film 141, etc. are not particularly limited and can be arbitrarily determined. The size and shape of the dummy contact member 181 may be the same as or different from the size and shape of the gate contact portion 66 connected to the gate of the transfer transistor TRG1 or TRG2.

[0243] For example, as Figure 22 shown, the dummy contact portion 181 is formed to have a planar size larger than that of the gate contact portion 66, and can be formed slightly above the reflective film 141 (on the side of the photodiode PD) with an interlayer insulating film 62 therebetween and not connected to the reflective film 141.

[0244] <Cross-sectional view of the eighth configuration example of the pixel>

[0245] Figure 23 is a cross-sectional view showing the eighth configuration example of the pixel 10.

[0246] In Figure 23 this, parts corresponding to those in the above first to seventh configuration examples are denoted by the same reference numerals and symbols, and the description of these parts will be appropriately omitted.

[0247] In the above first to seventh configuration examples and their modified examples, various configurations for preventing incident light from leaking into adjacent pixels due to the winding from the multilayer wiring layer 42 and various configurations for preventing incident light from leaking into adjacent pixels due to the winding from the side of the on-chip lens 47 have been described. By appropriately combining such various configurations, a configuration can be adopted in which incident light is prevented from leaking into adjacent pixels due to the winding from the multilayer wiring layer 42 and due to the winding from the side of the on-chip lens 47.

[0248] For example, according to Figure 23 the pixel 10 of the eighth configuration example shown has Figure 2 the characteristic configurations of both the first configuration example shown in Figure 13 and the third configuration example shown in

[0249] That is, Figure 23 the pixel 10 shown includes a reflective film 141 formed of a material having a lower reflectivity than that of the other metal wirings 67 of the first metal film M1 in the layer of the first metal film M1 below the formation region of the photodiode PD.

[0250] In addition, Figure 23 the pixel 10 shown includes an inter-pixel light-shielding unit 65 at the pixel boundary portion 44 of the multilayer wiring layer 42 to prevent the incident light reflected by the reflective film 141 from being incident on the photodiode PD of the adjacent pixel 10.

[0251] For example,Figure 23 The other components of the eighth configuration example are the same as those of Figure 2 the first configuration example shown.

[0252] According to the pixel 10 having the above configuration, Figure 23 as shown, by the inter-pixel light-shielding unit 65 disposed at the pixel boundary portion 44 of the multilayer wiring layer 42, leakage of incident light into adjacent pixels due to the winding around of the multilayer wiring layer 42 is prevented.

[0253] In addition, by disposing a reflective film 141 below the formation region of the photodiode PD in the multilayer wiring layer 42, leakage of incident light into adjacent pixels due to the winding around from the side of the on-chip lens 47 can be prevented.

[0254] In addition, for example, in addition to Figure 23 the inter-pixel light-shielding unit 65 and the reflective film 141 shown, Figure 24 the pixel 10 shown also has a structure in which an anti-reflection structure portion 111 is added to the back surface of the semiconductor substrate 41. By the anti-reflection structure portion 111, reflection at the substrate interface can be further suppressed.

[0255] Although not shown in the figure, by appropriately combining various configurations (the above first and second configuration examples) for preventing leakage of incident light into adjacent pixels due to the winding around of the multilayer wiring layer 42 and various configurations (the above third to seventh configuration examples) for preventing leakage of incident light into adjacent pixels due to the winding around from the side of the on-chip lens 47, it is possible to simultaneously achieve prevention of leakage of incident light into adjacent pixels due to the winding around of the multilayer wiring layer 42 and prevention of leakage of incident light into adjacent pixels due to the winding around from the side of the on-chip lens 47.

[0256] <16. Cross-sectional view of the ninth configuration example of the pixel>

[0257] Figure 25 is a cross-sectional view showing the ninth configuration example of the pixel 10.

[0258] In Figure 25 it, the parts corresponding to those in the above first to eighth configuration examples are denoted by the same reference numerals, and the description of these parts will be appropriately omitted.

[0259] In the above first to eighth configuration examples, the light-receiving element 1 is constituted by using one semiconductor substrate (that is, only the semiconductor substrate 41), but in Figure 25 the ninth configuration example of

[0260] According to Figure 25The pixel 10 of the ninth configuration example is configured such that using one semiconductor substrate 41 Figure 23 The eighth configuration example is changed to a configuration using two semiconductor substrates (i.e., semiconductor substrate 41 and semiconductor substrate 301). Hereinafter, for ease of understanding, the semiconductor substrate 41 and the semiconductor substrate 301 will be referred to as the first substrate 41 and the second substrate 301, respectively, for description.

[0261] Figure 25 The ninth configuration example and Figure 2 The first configuration example have in common that an inter-pixel light-shielding film 45, a planarization film 46, and an on-chip lens 47 are formed on the light-incident surface side of the first substrate 41. The ninth configuration example and Figure 2 The first configuration example also have in common that an inter-pixel separation portion 61 is formed at a pixel boundary portion 44 on the back side of the first substrate 41.

[0262] In addition, the ninth configuration example and Figure 2 The first configuration example also have in common that a photodiode PD as a photoelectric conversion unit is formed on the first substrate 41 in units of pixels, and two transfer transistors TRG1 and TRG2 and floating diffusion regions FD1 and FD2 as charge accumulation portions are formed on the front side of the first substrate 41.

[0263] On the other hand, as a difference from Figure 2 The first configuration example, an insulating layer 313 of a wiring layer 311 on the surface side of the first substrate 41 is bonded to an insulating layer 312 of the second substrate 301.

[0264] The wiring layer 311 of the first substrate 41 includes at least a single-layer metal film M, and a reflective film 141 is formed using this metal film M in a region located below the formation region of the photodiode PD. In addition, an inter-pixel light-shielding unit 65 is formed at the pixel boundary portion 44 of the wiring layer 311.

[0265] Pixel transistors Tr1 and Tr2 are formed at an interface on the opposite side of the insulating layer 312 side on the bonding surface side of the second substrate 301. The pixel transistors Tr1 and Tr2 are, for example, an amplification transistor AMP and a selection transistor SEL.

[0266] That is, in the first to eighth configuration examples constituted by using only one semiconductor substrate 41 (first substrate 41), all pixel transistors of the transfer transistor TRG, the switching transistor FDG, the amplification transistor AMP, and the selection transistor SEL are formed on the semiconductor substrate 41. However, in the light-receiving element 1 according to the ninth configuration example having a stacked structure of two semiconductor substrates, pixel transistors other than the transfer transistor TRG (i.e., the switching transistor FDG, the amplification transistor AMP, and the selection transistor SEL) are formed on the second substrate 301.

[0267] A multilayer wiring layer 321 including at least two metal films M is formed on a side of the second substrate 301 opposite to the first substrate 41 side. The multilayer wiring layer 321 includes a first metal film M11, a second metal film M12, and an interlayer insulating film 333.

[0268] A transfer drive signal TRG1g for controlling the transfer transistor TRG1 is supplied from the first metal film M11 of the second substrate 301 to a gate electrode of the transfer transistor TRG1 on the first substrate 41 through a through-silicon via (TSV) 331-1 penetrating the second substrate 301. A transfer drive signal TRG2g for controlling the transfer transistor TRG2 is supplied from the first metal film M11 of the second substrate 301 to a gate electrode of the transfer transistor TRG2 on the first substrate 41 through the TSV 331-2 penetrating the second substrate 301.

[0269] Similarly, charges accumulated in the floating diffusion region FD1 are transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 through the TSV 332-1 penetrating the second substrate 301. Charges accumulated in the floating diffusion region FD2 are transferred from the first substrate 41 side to the first metal film M11 of the second substrate 301 through the TSV 332-2 penetrating the second substrate 301.

[0270] A wiring capacitor 64 is formed in a region (not shown in the figure) of the first metal film M11 or the second metal film M12. The metal film M on which the wiring capacitor 64 is formed is formed to have a high wiring density to form a capacitor, and the metal film M connected to gate electrodes of the transfer transistor TRG, the switching transistor FDG, etc. is formed to have a low wiring density to reduce induced current. A configuration in which the wiring layer (metal film M) connected to the gate electrode is different for each pixel transistor can be adopted.

[0271] As described above, the pixel 10 according to the ninth configuration example can be configured such that two semiconductor substrates (i.e., the first substrate 41 and the second substrate 301) are stacked, and pixel transistors other than the transfer transistor TRG are formed on a second substrate 301 different from the first substrate 41 including the photoelectric conversion unit. In addition, a vertical drive unit 22 and pixel drive lines 28 for controlling the driving of the pixel 10, a vertical signal line 29 for transmitting a detection signal, etc. are also formed on the second substrate 301. Thereby, the pixel can be miniaturized, and the degree of freedom in the design of the back-end-of-line process (BEOL) is also increased.

[0272] Also in the ninth configuration example, the reflective film 141 is formed in the region of the wiring layer 311 below the formation region of the photodiode PD, and the inter-pixel light-shielding unit 65 is formed at the pixel boundary portion 44 of the wiring layer 311. Thus, it is possible to simultaneously prevent incident light from leaking into adjacent pixels due to the winding around the multi-layer wiring layer 42 and prevent incident light from leaking into adjacent pixels due to the winding around the on-chip lens 47 side.

[0273] Figure 25 The ninth configuration example of is configured such that Figure 23 The eighth configuration example of

[0273] is changed to a stacked structure in which two semiconductor substrates are stacked. However, similarly, the above first to seventh configuration examples can be changed to a stacked structure in which two semiconductor substrates are stacked.

[0274] <17. Configuration Examples of IR Imaging Sensors>

[0275] The above pixel structure including at least one of the inter-pixel light-shielding unit 65 and the reflective film 141 is not limited to the light-receiving element that outputs ranging information according to the indirect ToF method, and can also be applied to an IR imaging sensor that receives infrared light and generates an IR image.

[0276] Figure 26 Shows the circuit configuration of the pixel 10 in the case of an IR imaging sensor in which the light-receiving element 1 is configured to generate and output an IR image.

[0277] In the case where the light-receiving element 1 is a ToF sensor, the light-receiving element 1 distributes the charge generated by the photodiode PD to the two floating diffusion regions FD1 and FD2 and accumulates the charge. Therefore, the pixel 10 includes two transfer transistors TRG, two floating diffusion regions FD, two additional capacitors FDL, two switching transistors FDG, two amplifying transistors AMP, two reset transistors RST, and two selection transistors SEL.

[0278] In the case where the light-receiving element 1 is an IR imaging sensor, the number of charge accumulation portions that temporarily hold the charge generated by the photodiode PD can be one. Therefore, the number of transfer transistors TRG, the number of floating diffusion regions FD, the number of additional capacitors FDL, the number of switching transistors FDG, the number of amplifying transistors AMP, the number of reset transistors RST, and the number of selection transistors SEL are also set to one.

[0279] In other words, in the case where the light-receiving element 1 is an IR imaging sensor, as Figure 26 shown, the pixel 10 is equivalent to where from Figure 4In the circuit configuration shown, the configurations of transfer transistor TRG2, switching transistor FDG2, reset transistor RST2, amplification transistor AMP2, and selection transistor SEL2 are omitted. The floating diffusion region FD2 and vertical signal line 29B are also omitted.

[0280] Figure 27 It is a cross-sectional view of pixel 10 when light-receiving element 1 is configured as an IR imaging sensor.

[0281] Figure 27 Shows in Figure 23 The cross-sectional configuration in the case where the eighth configuration example shown is applied to an IR imaging sensor.

[0282] The difference between the case where light-receiving element 1 is configured as an IR imaging sensor and the case where light-receiving element 1 is configured as a ToF sensor is that, as Figure 26 explained, whether there is a floating diffusion region FD2 formed on the front side of semiconductor substrate 41 and pixel transistors. For this reason, the configuration of the multilayer wiring layer 42 on the front side of semiconductor substrate 41 is different from Figure 23 the configuration in Figure 23 Specifically, compared with Figure 27 the floating diffusion region FD2 and transfer transistor TRG2 are omitted in pixel 10 shown in

[0283] On the other hand, as a common configuration with Figure 23 in pixel 10 shown in Figure 27 a reflective film 141 is formed in the layer of the first metal film M1 of the multilayer wiring layer 42 below the formation region of the photodiode PD using a material having a lower reflectivity than that of other metal wirings 67 of the first metal film M1. In addition, an inter-pixel light-shielding unit 65 is formed at the pixel boundary portion 44 of the multilayer wiring layer 42.

[0284] Figure 27 Shows in Figure 23 The cross-sectional configuration in the case where the eighth configuration example shown is applied to an IR imaging sensor. However, similarly, by omitting the floating diffusion region FD2 formed on the front side of semiconductor substrate 41 and the corresponding pixel transistors, the above first to seventh configuration examples can be applied to an IR imaging sensor.

[0285] Also when light-receiving element 1 is configured as an IR imaging sensor, by providing an inter-pixel light-shielding unit 65 at the pixel boundary portion 44 of the multilayer wiring layer 42, it is possible to prevent incident light from leaking into adjacent pixels due to the wrap-around of the multilayer wiring layer 42. In addition, by providing the reflective film 141, it is possible to prevent incident light from leaking into adjacent pixels due to the wrap-around from the on-chip lens 47 side.

[0286] Therefore, even when the light-receiving element 1 is configured as an IR imaging sensor, the amount of infrared light that undergoes photoelectric conversion within the semiconductor substrate 41 can be further increased to improve the quantum efficiency (i.e., sensitivity to infrared light).

[0287] <18.RGBIR imaging sensor configuration example>

[0288] The above pixel structure including at least one of the inter-pixel light-shielding unit 65 and the reflective film 141 is not limited to the light-receiving element that only receives infrared light, and can also be applied to an RGBIR imaging sensor that receives infrared light and RGB light.

[0289] Figure 28 An example of pixel arrangement is shown in the case where the light-receiving element 1 is configured as an RGBIR imaging sensor that receives infrared light and RGB light.

[0290] When the light-receiving element 1 is configured as an RGBIR imaging sensor, an R pixel that receives R (red) light, a B pixel that receives B (blue) light, a G pixel that receives G (green) light, and an IR pixel that receives IR (infrared) light are assigned to 4 pixels in a 2×2 arrangement, as Figure 28 shown in A of.

[0291] The reflective film 63 or 141 that reflects the infrared light that has passed through the semiconductor substrate 41 without undergoing photoelectric conversion within the semiconductor substrate 41 and causes the infrared light to enter the semiconductor substrate 41 again can be provided in all of the R pixels, B pixels, G pixels, and IR pixels, or can be provided only in some pixels for the purpose of adjusting the amount of received light (light-receiving sensitivity), etc.

[0292] For example, as Figure 28 shown in B of, among the R pixels, B pixels, G pixels, and IR pixels, a configuration can be adopted in which the reflective film 63 or 141 is provided in the IR pixels and R pixels and not provided in the B pixels and G pixels.

[0293] <19.Rangefinder module configuration example>

[0294] Figure 29 It is a block diagram showing a configuration example of a rangefinder module that uses the above light-receiving element 1 to output rangefinding information.

[0295] The rangefinder module 500 includes a light-emitting unit 511, a light-emitting control unit 512, and a light-receiving unit 513.

[0296] The light emitting unit 511 includes a light source that emits light having a predetermined wavelength, and irradiates an object with irradiation light whose luminance changes periodically. For example, the light emitting unit 511 includes a light emitting diode that emits infrared light having a wavelength in the range of 780 nm to 1000 nm as the light source, and generates irradiation light synchronously with the light emission control signal CLKp of a rectangular wave supplied from the light emission control unit 512.

[0297] Note that the light emission control signal CLKp is not limited to a rectangular wave, as long as it is a periodic signal. For example, the light emission control signal CLKp may be a sine wave.

[0298] The light emission control unit 512 supplies the light emission control signal CLKp to the light emitting unit 511 and the light receiving unit 513, and controls the irradiation timing of the irradiation light. The frequency of the light emission control signal CLKp is, for example, 20 megahertz (MHz). Note that the frequency of the light emission control signal CLKp is not limited to 20 megahertz, and may be 5 megahertz, 100 megahertz, etc.

[0299] The light receiving unit 513 receives the reflected light reflected from the object, calculates the distance information for each pixel based on the light reception result, and generates and outputs a depth image in which the depth value corresponding to the distance to the object (subject) is stored as a pixel value.

[0300] In the light receiving unit 513, the light receiving element 1 having the pixel structure of any one of the above first to eighth configuration examples is used. For example, as the light receiving element 1 of the light receiving unit 513, the distance information for each pixel is calculated based on the detection signal corresponding to the charge in the floating diffusion region FD1 or FD2 of each pixel 10 assigned to the pixel array unit 21 from the light emission control signal CLKp.

[0301] As described above, as the light receiving unit 513 of the distance measuring module 500 that obtains and outputs the distance information to the subject by the indirect ToF method, the light receiving element 1 having the pixel structure of any one of the above first to eighth configuration examples can be incorporated. Thereby, the distance measuring characteristics of the distance measuring module 500 can be improved.

[0302] <20. Configuration example of electronic device>

[0303] Note that, as described above, the light receiving element 1 can be applied to the distance measuring module, and can also be applied to various electronic devices, for example, imaging devices such as digital cameras and digital video cameras equipped with a distance measuring function, and smart phones equipped with a distance measuring function.

[0304] Figure 30 It is a block diagram showing a configuration example of a smart phone as an electronic device to which the present technology is applied.

[0305] As Figure 30As shown, the smart phone 601 is configured such that a ranging module 602, an imaging device 603, a display 604, a speaker 605, a microphone 606, a communication module 607, a sensor unit 608, a touch panel 609, and a control unit 610 are interconnected via a bus 611. In addition, the control unit 610 has functions as an application processing unit 621 and an operating system processing unit 622 by causing a CPU to execute a program.

[0306] Figure 29 The ranging module 500 shown is applicable to the ranging module 602. For example, the ranging module 602 is provided in the front of the smart phone 601, and by ranging the user of the smart phone 601, it can output depth values of the surface shapes of the user's face, hand, finger, etc. as ranging results.

[0307] The imaging device 603 is arranged on the front of the smart phone 601 and acquires an image taken by the user by imaging the user of the smart phone 601 as a subject. Note that although not shown in the figure, a configuration in which the imaging device 603 is also arranged on the back of the smart phone 601 can be adopted.

[0308] The display 604 displays an operation screen for performing processing by the application processing unit 621 and the operating system processing unit 622, an image taken by the imaging device 603, etc. When making a call using the smart phone 601, the speaker 605 and the microphone 606 perform, for example, output of the voice of the other party and collection of the voice of the user.

[0309] The communication module 607 performs network communication via communication networks such as a wide - area communication network for wireless mobile bodies such as the Internet, a public telephone network, so - called 4G lines and 5G lines, a wide - area network (WAN), and a local - area network (LAN), and performs short - range wireless communication such as Bluetooth (registered trademark) and near - field communication (NFC). The sensor unit 608 senses speed, acceleration, proximity, etc., and the touch panel 609 acquires a touch operation of the user for the operation screen displayed on the display 604.

[0310] The application processing unit 621 performs processing for providing various services through the smart phone 601. For example, the application processing unit 621 can create a face by computer graphics by virtual - reproducing the user's facial expression based on the depth value supplied from the ranging module 602, and can perform processing for displaying the face on the display 604. In addition, the application processing unit 621 can perform processing for creating three - dimensional shape data of an arbitrary three - dimensional object based on the depth value supplied from the ranging module 602.

[0311] The operating system processing unit 622 performs processing for implementing the basic functions and operations of the smart phone 601. For example, the operating system processing unit 622 may perform processing for authenticating the user's face based on the depth value supplied from the distance measurement module 602. In addition, the operating system processing unit 622 may perform processing for recognizing the user's gesture based on the depth value supplied from the distance measurement module 602, and may perform processing for inputting various operations according to the gesture.

[0312] In the smart phone 601 configured in this way, the above-described distance measurement module 500 is applied as the distance measurement module 602, and thus can perform processing such as measuring and displaying the distance to a predetermined object or creating and displaying three-dimensional shape data of a predetermined object.

[0313] <21. Application Examples of Mobile Bodies>

[0314] The technology according to the present disclosure (this technology) can be applied to various products. For example, the technology according to the present disclosure is implemented as a device installed on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, an unmanned aerial vehicle, a ship, and a robot.

[0315] Figure 31 It is a block diagram showing a schematic configuration example of a vehicle control system which is an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0316] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In Figure 31 the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an out-vehicle information detection unit 12030, an in-vehicle information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and a vehicle-mounted network interface (I / F) 12053 are shown.

[0317] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 is a control device for a driving force generation device that generates a driving force of the vehicle such as an internal combustion engine or a drive motor, a driving force transmission mechanism that transmits the driving force to the wheels, a steering mechanism that adjusts the steering angle of the vehicle, and a braking device that generates a braking force of the vehicle.

[0318] The main body system control unit 12020 controls the operations of various devices installed in the vehicle body according to various programs. For example, the main body system control unit 12020 serves as a control device for a keyless entry system, a smart key system, an electric window device, or various lights such as headlights, taillights, brake lights, automotive flashers, or fog lights. In this case, radio waves transmitted from a portable device or signals from various switches instead of buttons can be input to the main body system control unit 12020. The main body system control unit 12020 receives the input of radio waves or signals and controls the vehicle door lock device, electric window device, lights, etc.

[0319] The vehicle exterior information detection unit 12030 detects information on the exterior of the vehicle equipped with the vehicle control system 12000. For example, the imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the vehicle exterior and receives the captured image. The vehicle exterior information detection unit 12030 can perform object detection processing such as detecting people, cars, obstacles, signs, words on the road, etc. or distance detection processing based on the received image.

[0320] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of received light. The imaging unit 12031 can output the electrical signal as an image or as ranging information. In addition, the light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0321] The vehicle interior information detection unit 12040 detects information inside the vehicle. For example, the vehicle interior information detection unit 12040 is connected to the driver state detection unit 12041 that detects the state of the driver. For example, the driver state detection unit 12041 includes a camera that captures the driver, and based on the detection information input from the driver state detection unit 12041, the vehicle interior information detection unit 12040 can calculate the driver's fatigue level or concentration, or can determine whether the driver has fallen asleep.

[0322] The microcomputer 12051 can calculate control target values for the driving force generation device, steering mechanism, or braking device based on the information inside and outside the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and can output a control instruction to the drive system control unit 12010. For example, the microcomputer 12051 can perform coordinated control to implement the functions of an advanced driver assistance system (ADAS) including vehicle collision avoidance or mitigation, following driving based on the distance between vehicles, vehicle speed holding driving, vehicle collision warning, lane departure warning of the vehicle, etc.

[0323] In addition, the microcomputer 12051 can perform coordinated control by controlling the driving force generating device, the steering mechanism, the braking device, etc. based on the information about the surroundings of the vehicle obtained by the out-vehicle information detection unit 12030 or the in-vehicle information detection unit 12040, so as to achieve autonomous driving without relying on the driver's operation, such as autonomous driving.

[0324] In addition, the microcomputer 12051 can output a control command to the main system control unit 12020 based on the information outside the vehicle obtained by the out-vehicle information detection unit 12030. For example, the microcomputer 12051 controls the headlights according to the positions of the vehicle ahead or the oncoming vehicle detected by the out-vehicle information detection unit 12030, and performs coordinated control to prevent glare, such as switching the high beam to the low beam.

[0325] The sound and image output unit 12052 transmits an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying information to vehicle occupants or outside the vehicle. In Figure 31 the example, as the output device, an audio speaker 12061, a display unit 12062, and a dashboard 12063 are exemplified. For example, the display unit 12062 may include at least one of an in-vehicle display and a head-up display.

[0326] Figure 32 is a diagram showing an example of the installation position of the imaging unit 12031.

[0327] In Figure 32 the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0328] For example, the imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front of the vehicle 12100, the side mirrors, the rear bumper and the rear door, and the upper side of the windshield inside the vehicle. The imaging unit 12101 provided at the front of the vehicle and the imaging unit 12105 provided on the upper side of the windshield inside the vehicle mainly obtain images in front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly obtain images on the side of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or the rear door mainly obtains images behind the vehicle 12100. The front images acquired by the imaging units 12101 and 12105 are mainly used to detect the vehicle ahead, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0329] In addition, Figure 32An example of the imaging ranges of the imaging units 12101 to 12104 is shown. The imaging range 12111 represents the imaging range of the imaging unit 12101 provided on the vehicle head, the imaging ranges 12112 and 12113 represent the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and the imaging range 12114 represents the imaging range of the imaging unit 12104 provided on the rear bumper or the rear door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, an aerial view image of the vehicle 12100 as seen from above can be obtained.

[0330] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera including a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0331] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can extract the three-dimensional objects located on the driving route of the vehicle 12100, especially the closest three-dimensional object, that is, the three-dimensional object traveling at a predetermined speed (e.g., 0 km / h or more) in substantially the same direction as the vehicle 12100, as the preceding vehicle by obtaining the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the temporal change of the distance (relative speed with respect to the vehicle 12100). In addition, the microcomputer 12051 can set the distance between vehicles that is ensured in advance in front of the preceding vehicle, and can perform automatic braking control (including following driving stop control), automatic acceleration control (including following driving start control), etc. In this way, coordinated control such as autonomous driving that does not depend on the driver's operation can be performed.

[0332] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data about the three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, and other three-dimensional objects such as utility poles and extract them, which can be used for automatically avoiding obstacles. For example, the microcomputer 12051 identifies the obstacles around the vehicle 12100 as obstacles that can be seen by the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines the collision risk indicating the degree of danger of collision with each obstacle, and when there is a possibility of a collision where the collision risk exceeds a set value, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062 or performs forced deceleration or avoidance steering through the drive system control unit 12010, thereby performing driving assistance for collision avoidance.

[0333] At least one of the imaging units 12101 to 12104 may be an infrared camera for detecting infrared light. For example, the microcomputer 12051 can identify a pedestrian by determining whether a pedestrian exists in the captured images of the imaging units 12101 to 12104. For example, pedestrian identification is performed by a process of extracting feature points in the captured images of the imaging units 12101 to 12104 that are infrared cameras and a process of performing pattern matching processing on a series of feature points indicating the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian exists in the captured images of the imaging units 12101 to 12104 and identifies the pedestrian, the audio-video output unit 12052 controls the display unit 12062 so that the identified pedestrian is covered with a rectangular outline for emphasis. In addition, the audio-video output unit 12052 may cause the display unit 12062 to display an icon indicating the pedestrian at a desired position.

[0334] Examples of vehicle control systems to which the technology according to the present disclosure is applicable have been described above. The technology according to the present disclosure can be applied to the out-of-vehicle information detection unit 12030 and the imaging unit 12031 among the above configurations. Specifically, the light receiving element 1 or the distance measurement module 500 can be applied to the distance detection processing block of the out-of-vehicle information detection unit 12030 and the imaging unit 12031. By applying the technology according to the present disclosure to the out-of-vehicle information detection unit 12030 and the imaging unit 12031, the distance to an object such as a person, a vehicle, an obstacle, a sign, or text on the road surface can be measured with high accuracy, and by using the acquired distance information, driver fatigue can be reduced, and the safety level of the driver and the vehicle can be improved.

[0335] The embodiments of the present technology are not limited to the above embodiments, and various changes can be made without departing from the gist of the present technology.

[0336] In addition, in the above light receiving element 1, an example of using electrons as signal carriers has been described, but holes generated by photoelectric conversion can be used as signal carriers.

[0337] For example, in the pixel 10 of the above light receiving element 1, a configuration in which all or some of the constituent examples are arbitrarily combined can be adopted.

[0338] The effects described in this specification are merely examples and not limitations, and effects other than those described in this specification may be provided.

[0339] The present technology can adopt the following configuration.

[0340] (1) A light receiving element, comprising:

[0341] A semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and

[0342] A wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed,

[0343] wherein an inter-pixel light-shielding unit that shields infrared light is formed at a pixel boundary portion of the wiring layer.

[0344] (2) The light-receiving element according to (1),

[0345] wherein the wiring layer includes one or more metal films, and

[0346] the inter-pixel light-shielding unit is formed on a side closer to the semiconductor layer than the metal film closest to the semiconductor layer.

[0347] (3) The light-receiving element according to (2),

[0348] wherein the inter-pixel light-shielding unit is formed at a position on the same layer as a gate contact portion that connects the gate of the transfer transistor and the metal film closest to the semiconductor layer.

[0349] (4) The light-receiving element according to (3),

[0350] wherein the inter-pixel light-shielding unit is formed simultaneously with the formation of the gate contact portion.

[0351] (5) The light-receiving element according to any one of (1) to (4),

[0352] wherein the wiring layer includes a reflective film configured to overlap at least a part of the photodiode when viewed in a plan view, and

[0353] the inter-pixel light-shielding unit is formed of the same material as the reflective film.

[0354] (6) The light-receiving element according to any one of (1) to (4),

[0355] wherein the wiring layer includes a reflective film configured to overlap at least a part of the photodiode when viewed in a plan view, and

[0356] the inter-pixel light-shielding unit is formed of a material different from the reflective film.

[0357] (7) The light-receiving element according to any one of (1) to (6),

[0358] wherein the inter-pixel light-shielding unit is configured by arranging light-shielding members at predetermined intervals on the boundary line of the pixel when viewed in a plan view.

[0359] (8) The light-receiving element according to any one of (1) to (6),

[0360] wherein the inter-pixel light-shielding unit is constituted by linear light-shielding members that are arranged at a predetermined interval on the boundary line of the pixel and are long in the direction of the boundary line when viewed in a plan view.

[0361] (9) The light-receiving element according to any one of (1) to (6),

[0362] wherein the inter-pixel light-shielding unit is constituted by light-shielding members that are arranged on the boundary line of the pixel in a form surrounding the entire periphery of the pixel when viewed in a plan view.

[0363] (10) The light-receiving element according to any one of (1) to (9),

[0364] wherein on-chip lenses are formed in units of pixels on the back side opposite to the surface of the wiring layer forming the semiconductor layer.

[0365] (11) The light-receiving element according to (10),

[0366] wherein a moth-eye structure is formed on the back side of the semiconductor layer.

[0367] (12) The light-receiving element according to any one of (1) to (11),

[0368] wherein two transfer transistors including a first transfer transistor and a second transfer transistor are formed in the semiconductor layer,

[0369] the first transfer transistor transfers the charge generated by the photodiode to the first charge accumulation portion, and

[0370] the second transfer transistor transfers the charge generated by the photodiode to the second charge accumulation portion.

[0371] (13) The light-receiving element according to any one of (1) to (12),

[0372] wherein the semiconductor layer further includes an inter-pixel separation portion that digs into at least a part of the depth direction of the semiconductor layer at the pixel boundary portion.

[0373] (14) A ranging module, comprising:

[0374] a predetermined light source; and

[0375] a light-receiving element,

[0376] wherein the light-receiving element includes

[0377] A semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and

[0378] A wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed,

[0379] wherein an inter-pixel light-shielding unit that blocks infrared light is formed at the pixel boundary portion of the wiring layer.

[0380] (15) An electronic device, comprising:

[0381] A ranging module, the ranging module comprising:

[0382] A predetermined light source; and

[0383] A light-receiving element,

[0384] wherein the light-receiving element includes

[0385] A semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and

[0386] A wiring layer in which a transfer transistor that reads out the charge generated by the photodiode is formed,

[0387] wherein an inter-pixel light-shielding unit that blocks infrared light is formed at the pixel boundary portion of the wiring layer.

[0388] [List of Reference Numerals]

[0389] 1 Light-receiving element

[0390] 10 Pixel

[0391] 21 Pixel array portion

[0392] M1 First metal film

[0393] M2 Second metal film

[0394] M3 Third metal film

[0395] PD Photodiode

[0396] 41 Semiconductor substrate

[0397] 42 Multilayer wiring layer

[0398] 44 Boundary portion (pixel boundary portion)

[0399] 45 Inter-pixel light-shielding film

[0400] 47 On-chip lens

[0401] 61 Inter-pixel separation portion

[0402] 62nd interlayer insulating film

[0403] 63rd reflective film

[0404] 65th light-shielding unit between pixels

[0405] 66th gate contact portion

[0406] 67th metal wiring

[0407] 71st separation portion between pixels

[0408] 111st moth-eye structure portion

[0409] 141 (141P, 141M) reflective film

[0410] 161st moth-eye structure portion

[0411] 181st dummy contact portion

[0412] 500th distance measurement module

[0413] 511st light-emitting unit

[0414] 513th light-receiving unit

[0415] 601st smart phone

Claims

1. A light-receiving element, comprising: a semiconductor layer in which a photodiode that performs photoelectric conversion on infrared light is formed in units of pixels; and a wiring layer in which a transfer transistor that reads out charges generated by the photodiode is formed, wherein an inter-pixel light-shielding unit that shields infrared light is formed at a pixel boundary portion of the wiring layer, wherein the wiring layer includes a reflective film that is configured to overlap at least a part of the photodiode when viewed in a plan view, and wherein the inter-pixel light-shielding unit is positioned above the reflective film in a substrate depth direction.

2. The light-receiving element according to claim 1, wherein the wiring layer includes one or more metal films, and the inter-pixel light-shielding unit is formed on a side closer to the semiconductor layer than the metal film closest to the semiconductor layer.

3. The light-receiving element according to claim 2, wherein the inter-pixel light-shielding unit is formed at a position on the same layer as a gate contact portion that connects the gate of the transfer transistor and the metal film closest to the semiconductor layer.

4. The light-receiving element according to claim 3, wherein the inter-pixel light-shielding unit is formed simultaneously with the formation of the gate contact portion.

5. The light-receiving element according to any one of claims 1 to 4, wherein the inter-pixel light-shielding unit is formed of the same material as the reflective film.

6. The light-receiving element according to any one of claims 1 to 4, wherein the inter-pixel light-shielding unit is formed of a material different from the reflective film.

7. The light-receiving element according to any one of claims 1 to 4, wherein the inter-pixel light-shielding unit is configured by arranging light-shielding members at a predetermined interval on a boundary line of the pixel when viewed in a plan view.

8. The light-receiving element according to any one of claims 1 to 4, wherein the inter-pixel light-shielding unit is configured by arranging linear light-shielding members that are long in a direction of the boundary line at a predetermined interval on the boundary line of the pixel when viewed in a plan view.

9. The light-receiving element according to any one of claims 1 to 4, wherein the inter-pixel light-shielding unit is configured by arranging light-shielding members on the boundary line of the pixel in a form surrounding an entire periphery of the pixel when viewed in a plan view.

10. The light-receiving element according to any one of claims 1 to 4, wherein an on-chip lens is formed in units of pixels on a back side opposite to a surface of the wiring layer on which the semiconductor layer is formed.

11. The light-receiving element according to claim 10, wherein a moth-eye structure is formed on a back side of the semiconductor layer.

12. The light-receiving element according to any one of claims 1 to 4, wherein two transfer transistors including a first transfer transistor and a second transfer transistor are formed in the semiconductor layer, the first transfer transistor transfers charges generated by the photodiode to a first charge accumulation portion, and the second transfer transistor transfers charges generated by the photodiode to a second charge accumulation portion.

13. The light-receiving element according to any one of claims 1 to 4, The semiconductor layer further includes an inter-pixel separation portion that digs into at least a part of the depth direction of the semiconductor layer at the pixel boundary portion.

14. A ranging module, comprising: a predetermined light source; and a light receiving element according to any one of claims 1 to 13.

15. An electronic device, comprising: a ranging module, the ranging module comprising: a predetermined light source; and a light receiving element according to any one of claims 1 to 13.

Images