A power converter, its control circuit and control method

Abstract

The present invention discloses a power converter, its control circuit and control method. The control circuit includes an error amplifier, a turn-on control circuit, a conduction time control circuit and an RS flip-flop. The conduction time control circuit is adapted to set a first conduction time according to a compensation signal, set a second conduction time according to a current sampling signal, and trigger the turn-off of the power switch when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time. Compared with the existing power converter, it solves the problem of input current distortion caused by the turn-on delay of the input capacitor and the power switch, and optimizes the power factor correction effect.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and more particularly to a power converter and its control circuit and control method. Background Art

[0002] Converting from a 220V alternating current (AC) power grid to direct current (DC) is a basic conversion device widely used in power electronics technology and electronic instruments. For example, modern common electrical devices such as computers, televisions, monitors, and fluorescent lamps all use AC-DC power supplies for power.

[0003] Currently, the commonly used AC-DC power supply is generally composed of a power factor correction (PFC) device and a DC-DC converter. Among them, the power factor corrector is used as a pre-regulator to control the AC input current and force the AC input current waveform to track the AC input sine voltage waveform, which can make the AC input current waveform close to a sine wave.

[0004] On the one hand, the power factor corrector reduces the harmonic components of the AC input current. The harmonic components in the AC input current will flow back into the AC power grid, thereby causing harmonic pollution to the AC power grid. On the other hand, it can reduce the total harmonic distortion (THD) of the AC input current and improve the power factor of the power supply, enabling the power factor PF value to approach 1.

[0005] The power factor correction circuit based on the Boost topology is the most commonly used topology structure, which can work in a power mode according to needs. For example, it can work in a continuous conduction mode (CCM), a discontinuous conduction mode (DCM), and a critical conduction mode (TM). When the Boost operates in the critical continuous mode of the inductor current and is under fixed conduction time control, theoretically, a better power factor correction effect can be achieved.

[0006] Figure 1 Shows a schematic circuit diagram of a power converter in the prior art. As Figure 1As shown in the figure, the AC source Vac is rectified by the rectifier bridge BD1 and then input, and the bus voltage Vbus is formed on the input capacitor Cin. The control circuit 100 obtains the output voltage sampling signal Vo_s through the voltage division network composed of the resistors R1 and R2. The error amplifier 101 compares the output voltage sampling signal Vo_s with the reference signal Vo_ref to generate the compensation signal Vcomp. The boost inductor Lm includes an auxiliary winding. The turn-on control circuit 103 generates the set signal SET according to the signal VNt of the same name end of the auxiliary winding of the boost inductor Lm, so that the flip-flop 106 is set. The output Vgs of the flip-flop 106 is high, controlling the power switch Q1 to conduct, and realizing the critical continuous mode operation of the inductor current. During the period when the output signal Vgs of the flip-flop 106 is high, that is, when the power switch Q1 is conducting, the fixed on-time control circuit 102 generates the reset signal RSET according to the compensation signal Vcomp, so that the flip-flop 106 is reset, and then the power switch Q1 is turned off. Since the amplitude of the compensation signal Vcomp is basically unchanged during stable operation, the on-time of the power switch Q1 is basically fixed, thereby realizing the fixed on-time control.

[0007] In addition, Figure 1 The power converter shown also includes a current sampling resistor Rcs. The current sampling resistor Rcs is connected in series with the power switch Q1 to sample the current flowing through the power switch Q1 to obtain the current sampling signal Vcs. The control circuit 100 receives the current sampling signal Vcs and inputs it to the peak protection circuit 104. When the current sampling signal Vcs is too high, the peak protection circuit 104 outputs a high-level signal to trigger the reset of the flip-flop 106, realizing the peak protection function.

[0008] However, in practical applications, the power switch Q1 cannot operate in the ideal inductor current continuous mode. There is a certain delay from the inductor current passing through zero to the full turn-on of the power switch Q1. At the same time, the input capacitor Cin will also cause distortion of the input current, as Figure 2 shown is the key waveform of the power converter under the control of the prior art. From Figure 2 the figure, due to the existence of the input capacitor Cin, near the zero crossing of the AC voltage Vac, the bus voltage Vbus cannot reach zero, resulting in the input current Iac being equal to zero, and the THD (total harmonic distortion) of the input current Iac increases, and the PF decreases. Thus, Figure 1 the power factor correction effect of the power converter of the prior art shown needs to be further optimized. Summary of the Invention

[0009] In view of this, the object of the present invention is to provide a power converter, its control circuit and control method to further optimize the power factor correction effect of the existing power converter.

[0010] According to the first aspect of the embodiments of the present invention, a control circuit of a power converter is provided. The control circuit includes: an error amplifier adapted to compare an output voltage sampling signal with a first reference signal to generate a compensation signal; a turn-on control circuit adapted to generate a set signal when the inductor current is zero, and the set signal is used to control the turn-on moment of the power switch; a conduction time control circuit adapted to set a first conduction time according to the compensation signal, set a second conduction time according to a current sampling signal, and generate a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time, and the first control signal is used to control the turn-off moment of the power switch; and a logic circuit adapted to generate a switch control signal according to the set signal and a reset signal related to the first control signal.

[0011] Optionally, the second conduction time is the time required for the change amount of the current sampling signal to reach a second reference signal.

[0012] Optionally, the first conduction time is obtained by timing.

[0013] Optionally, the conduction time control circuit includes: a first comparator adapted to compare the current sampling signal with a second reference signal to obtain a first trigger signal; a first timing unit that performs timing according to the first trigger signal to generate a first timing signal; and a second comparator adapted to compare the first timing signal with the compensation signal to obtain the first control signal.

[0014] Optionally, the first timing unit includes: a first switch, a first capacitor, and a first current source connected in parallel between one input terminal of the second comparator and the ground, wherein the control terminal of the first switch is controlled by the first trigger signal. When the first trigger signal flips to a low level, the first switch is in an off state, and the first current source charges the first capacitor.

[0015] Optionally, the first conduction time is the time from the start of the charging action to the first timing signal rising to the compensation signal, and the second conduction time is the time required for the current sampling signal to increase to the second reference signal.

[0016] Optionally, the conduction time control circuit includes: a second timing unit that times according to the switch control signal to generate a second timing signal; a third comparator adapted to compare the second timing signal with the compensation signal to obtain a second trigger signal; an adder adapted to superimpose a second reference signal and the current sampling signal to obtain a superimposed signal thereof; a second switch and a second capacitor, one end of the second switch receives the superimposed signal of the second reference signal and the current sampling signal, the other end is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded; and a fourth comparator adapted to compare the current sampling signal with the voltage at the first end of the second capacitor to obtain the first control signal.

[0017] Optionally, the second timing unit includes: a third switch, a third capacitor, and a second current source connected in parallel between one input terminal of the third comparator and the ground, wherein the control terminal of the third switch is controlled by the inverted signal of the switch control signal. When the inverted signal of the switch control signal flips to a low level, the third switch is in an off state, and the second current source charges the third capacitor.

[0018] Optionally, when the second timing signal is lower than the compensation signal, the second switch conducts to store the superimposed signal of the current sampling signal and the second reference signal at the first end of the second capacitor, and when the second timing signal is higher than the compensation signal, the second switch turns off, and the voltage at the first end of the second capacitor is held.

[0019] Optionally, the first conduction time is the time from the start of the charging operation to when the second timing signal rises to the compensation signal, and the second conduction time is the time from when the second switch turns off to when the current sampling signal increases to the voltage at the first end of the second capacitor.

[0020] Optionally, the second reference signal is a DC voltage.

[0021] Optionally, the second reference signal is a voltage related to time.

[0022] Optionally, when the bus voltage obtained by converting the AC input voltage through the rectifier bridge is:

[0023] Vbus = Vbus_pkx|sin(2π×f×t)|

[0024] wherein, Vbus_pkx is the peak value of the bus voltage, f is the frequency of the AC input voltage, and t is time, then the second reference signal is obtained through the following formula:

[0025] Vref2 = a - |b × sin(2π × f × t)|

[0026] Wherein, a > 0, and a ≥ b ≥ 0, f is the frequency of the AC input voltage, t is time, and a and b are constants.

[0027] Optionally, the second conduction time is obtained by the following formula:

[0028] time2 = [a - |b × sin(2π × f × t)|] × L m / (R CS × V bus )

[0029] Wherein, Lm is the inductance of the inductor, Rcs is the resistance value of the current sampling resistor, and Vbus is the bus voltage obtained by converting the AC input voltage through the rectifier bridge.

[0030] Optionally, the control circuit further includes: a maximum conduction time control circuit adapted to set the maximum conduction time of the power switch.

[0031] Optionally, the control circuit further includes: a peak protection circuit adapted to generate a second control signal according to the current sampling signal to turn off the power switch when the current sampling signal is too large.

[0032] Optionally, the control circuit further includes: an OR gate, whose first input terminal is used to receive the first control signal, the second input terminal is used to receive the maximum conduction time, the third input terminal is used to receive the second control signal, and the output terminal is used to provide the reset signal.

[0033] Optionally, the logic circuit is an RS flip-flop.

[0034] Optionally, the power converter is a boost topology structure.

[0035] According to a second aspect of an embodiment of the present invention, there is provided a control method for a power converter, where the power converter is used to convert an AC input voltage into a DC output voltage, and includes a rectifier bridge, an input capacitor, a freewheeling diode, a voltage dividing resistor, a current sampling resistor, an inductor, and a power switch. Among them, the control method includes: generating a set signal when the inductor current is zero, and the set signal is used to control the turn-on moment of the power switch; comparing an output voltage sampling signal with a first reference signal to generate a compensation signal; setting a first conduction time according to the compensation signal, setting a second conduction time according to a current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time, and the first control signal is used to control the turn-off moment of the power switch; and generating a switch control signal according to the set signal and a reset signal related to the first control signal.

[0036] Optionally, the second conduction time is the time required for the change amount of the current sampling signal to reach a second reference signal.

[0037] Optionally, the first conduction time is obtained by timing.

[0038] Optionally, the step of setting a first conduction time according to the compensation signal, setting a second conduction time according to a current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time includes: comparing the current sampling signal with a second reference signal to obtain a first trigger signal; timing according to the first trigger signal to generate a first timing signal; and comparing the first timing signal with the compensation signal to obtain the first control signal.

[0039] Optionally, the step of timing according to the first trigger signal to generate a first timing signal includes: when the first trigger signal flips to a low level, turning off a first switch, and charging a first capacitor with a first current source to provide the first timing signal at a first end of the first capacitor.

[0040] Optionally, the first conduction time is the time from the start of the charging operation to when the first timing signal rises to the compensation signal, and the second conduction time is the time required for the current sampling signal to increase to the second reference signal.

[0041] Optionally, setting the first conduction time according to the compensation signal, setting the second conduction time according to the current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time includes: timing according to the switch control signal to generate a second timing signal; comparing the second timing signal with the compensation signal to obtain a second trigger signal; superimposing the second reference signal and the current sampling signal to obtain a superimposed signal thereof; when the second timing signal is lower than the compensation signal, turning on a second switch, storing the superimposed signal of the current sampling signal and the second reference signal at a first end of a second capacitor, and when the second timing signal is higher than the compensation signal, turning off the second switch so that the voltage at the first end of the second capacitor is maintained; and comparing the current sampling signal with the voltage at the first end of the second capacitor, and generating the first control signal when the current sampling signal rises to the voltage at the first end of the second capacitor.

[0042] Optionally, timing according to the switch control signal to generate a second timing signal includes: when an inverted signal of the switch control signal flips to a low level, turning off a third switch, and charging a third capacitor using a second current source to provide the second timing signal at a first end of the third capacitor.

[0043] Optionally, the first conduction time is the time from the start of the charging operation to the second timing signal rising to the compensation signal, and the second conduction time is the time from the start of turning off the second switch to the current sampling signal increasing to the voltage at the first end of the second capacitor.

[0044] Optionally, the second reference signal is a DC voltage.

[0045] Optionally, the second reference signal is a voltage related to time.

[0046] Optionally, when the bus voltage obtained by converting the AC input voltage through the rectifier bridge is:

[0047] Vbus = Vbus_pkx|sin(2π×f×t)|

[0048] where Vbus_pkx is the peak value of the bus voltage, f is the frequency of the AC input voltage, and t is time, then the second reference signal is obtained through the following formula:

[0049] Vref2 = a - |b×sin(2π×f×t)|

[0050] where a > 0, and a ≥ b ≥ 0, f is the frequency of the AC input voltage, t is time, and a and b are constants.

[0051] Optionally, the second conduction time is obtained by the following formula:

[0052] time2 = [a - |b×sin(2π×f×t)|]×L m / (R CS ×V bus )

[0053] wherein, Lm is the inductance of the inductor, Rcs is the resistance value of the current sampling resistor, and Vbus is the bus voltage obtained by converting the AC input voltage through the rectifier bridge.

[0054] Optionally, the control method further includes: setting a maximum conduction time of the power switch, and turning off the power switch when the conduction time of the power switch reaches the maximum conduction time.

[0055] Optionally, the control method further includes: generating a second control signal when the current sampling signal is too large to turn off the power switch.

[0056] According to a third aspect of the embodiments of the present invention, a power converter is provided for converting an AC input voltage into a DC output voltage, including: a rectifier bridge, an input capacitor, a freewheeling diode, a current sampling resistor, an inductor, a power switch, and the above control circuit.

[0057] In the power converter, its control circuit and control method according to the embodiments of the present invention, the conduction time control circuit sets a fixed first conduction time according to the compensation signal, and at the same time sets a variable second conduction time according to the current sampling signal. The power switch is triggered to turn off only when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time. Compared with the existing power converter, the time envelope of the power switch is larger when approaching the zero crossing point of the AC voltage, and smaller when approaching the peak or valley value of the AC voltage, thereby further optimizing the input current distortion problem caused by the turn-on delay of the input capacitor and the power switch in the existing power converter, and optimizing the power factor correction effect. In addition, the circuit structure of the power converter of the present invention is simple, without great changes to the circuit structure, and can be applied to various existing topologies, which is beneficial to reducing the circuit cost. Description of the Drawings

[0058] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features and advantages of the present invention will become clearer.

[0059] Figure 1 Fig. shows a schematic circuit diagram of a power converter in the prior art;

[0060] Figure 2Shows a schematic diagram of the key waveforms of a prior art power converter;

[0061] Figure 3 Shows a schematic circuit diagram of a power converter according to an embodiment of the present invention;

[0062] Figure 4 Shows a circuit diagram of an embodiment of the conduction time control circuit according to an embodiment of the present invention;

[0063] Figure 5 Shows the working waveforms of an embodiment of the control circuit according to an embodiment of the present invention;

[0064] Figure 6 Shows a circuit diagram of another embodiment of the conduction time control circuit according to an embodiment of the present invention;

[0065] Figure 7 Shows the working waveforms of another embodiment of the control circuit according to an embodiment of the present invention;

[0066] Figure 8 Shows a schematic diagram of the key waveforms of the power converter according to an embodiment of the present invention;

[0067] Figure 9 Shows a flowchart of a control method for a power converter according to an embodiment of the present invention. Detailed Embodiments

[0068] The present invention will be described in more detail below with reference to the accompanying drawings. In the various drawings, like elements are denoted by like reference numerals. For clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown in the figures.

[0069] Many specific details of the present invention are described hereinafter, such as the structure, materials, dimensions, processing techniques and technologies of components, in order to understand the present invention more clearly. However, as those skilled in the art can understand, the present invention may be implemented without these specific details.

[0070] It should be understood that in the following description, a "circuit" refers to a conductive loop formed by at least one element or sub-circuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or when an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there may be intermediate elements, and the connection between elements can be physical, logical, or a combination thereof. In contrast, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0071] Figure 3 Shows a schematic circuit diagram of a power converter according to an embodiment of the present invention. AsFigure 3 As shown in Figure 3 , the power converter of this embodiment includes a rectifier bridge BD1, an input capacitor Cin, an inductor Lm, a rectifier diode DF, a power switch Q1, an output capacitor Cout, a current sampling resistor Rcs, a resistor R1, a resistor R2, and a control circuit 200.

[0072] Among them, the input capacitor Cin is connected in parallel between the output terminals of the rectifier bridge BD1. After the rectifier bridge BD1 converts the AC power supply Vac into DC, it outputs to the input capacitor Cin, and the negative output terminal of the rectifier bridge BD1 is grounded. The first power terminal of the inductor Lm is connected to the positive output terminal of the rectifier bridge BD1, and the second power terminal of the inductor Lm is connected to the first terminal of the power switch Q1 and the positive terminal of the rectifier diode DF. The inductor Lm also includes an auxiliary winding, the same-name terminal of the auxiliary winding is connected to the control circuit 200, and the different-name terminal of the auxiliary winding is grounded. The second terminal of the power switch Q1 is connected to the first terminal of the current sampling resistor Rcs, the second terminal of the current sampling resistor Rcs is grounded, and the current sampling resistor Rcs samples the current flowing through the power switch Q1 and outputs a current sampling signal Vcs at the first terminal of the current sampling resistor Rcs. The negative terminal of the rectifier diode DF is connected to the first terminal of the output capacitor Cout, and the second terminal of the output capacitor Cout is grounded. After the resistor R1 and the resistor R2 are connected in series, they are connected between the first terminal of the output capacitor Cout and the ground, and an output voltage sampling signal Vo_s is provided at the connection terminal of the resistor R1 and the resistor R2.

[0073] The control circuit 200 includes an error amplifier 201, a conduction time control circuit 202, a turn-on control circuit 203, and a logic circuit 204. Among them, the inverting input terminal of the error amplifier 201 receives the output voltage sampling signal Vo_s, the non-inverting input terminal receives the first reference signal Vref1, and the error amplifier 201 compares the output voltage sampling signal Vo_s with the first reference signal Vref1 and outputs a compensation signal Vcomp. The conduction time control circuit 202 receives the compensation signal Vcomp and the current sampling signal Vcs and outputs a first control signal Vctrl1, and the first control signal Vctrl1 is used to control the turn-off moment of the power switch Q1. The input terminal of the turn-on control circuit 203 is connected to the same-name terminal of the auxiliary winding of the inductor Lm, receives the same-name terminal signal VNt of the auxiliary winding, and generates a set signal SET according to the same-name terminal signal VNt of the auxiliary winding to control the power switch Q1 to turn on when the current flowing through the inductor Lm is zero. The logic circuit 204 is, for example, an RS flip-flop, and under the control of a reset signal REST and a set signal SET related to the first control signal Vctrl1, it generates a switching control signal Vgs for the power switch Q1. When the switching control signal Vgs is high, it controls the power switch Q1 to conduct, and vice versa to turn off.

[0074] Further, the power switch Q1 in this embodiment is implemented, for example, by an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). An IGBT is a composite voltage-driven power semiconductor device composed of a BJT (Bipolar Junction Transistor) and a MOSFET, and has the advantages of both the high input impedance of the MOSFET and the low conduction voltage drop of the GTR (Giant Transistor). It has a small drive power and a low saturation voltage drop.

[0075] Those skilled in the art should understand that the realization of zero-crossing turn-on of the inductor current includes, in addition to detecting the auxiliary winding signal of the inductor Lm in the above embodiment, directly detecting the signal at the first end of the power switch Q1, detecting the control signal of the power switch Q1, etc. The implementation manner of the turn-on control circuit in this embodiment is only for better explaining the present invention and should not limit the protection scope of the present invention. The protection scope of the present invention shall be subject to the claims.

[0076] As Figure 3 shown, specifically, the conduction time control circuit 202 includes a first conduction time control unit 202a and a second conduction time control unit 202b. The first conduction time control unit 202a receives the compensation signal Vcomp and sets a fixed first conduction time time1 according to the compensation signal Vcomp. The second conduction time control unit 202b receives the current sampling signal Vcs and sets a second conduction time time2 according to the current sampling signal Vcs. Further, the conduction time control circuit 202 also receives the switching control signal Vgs of the power switch Q1 to judge the switching state of the power switch Q1, and generates the first control signal Vctrl1 when the conduction time of the power switch Q1 reaches the sum of the first conduction time time1 and the second conduction time time2, triggering the power switch Q1 to turn off.

[0077] In some embodiments, the control circuit 200 of the present invention further includes a peak protection circuit 205 and a maximum conduction time control circuit 206. The peak protection circuit 205 receives the current sampling signal Vcs. When the current sampling signal Vcs is too high, the peak protection circuit 205 outputs a high-level second control signal Vctrl2 to trigger the reset of the flip-flop 106, so as to turn off the power switch Q1 to implement the peak protection function. The maximum conduction time control circuit 206 is used to set the maximum conduction time Tmax of the power switch Q1. When the conduction time of the power switch Q1 reaches the maximum conduction time Tmax, the maximum conduction time control circuit 206 triggers the power switch Q1 to turn off.

[0078] In some other embodiments, the control circuit 200 of the present invention further includes an OR gate 207. The first input terminal of the OR gate 207 is used to receive the first control signal Vctrl1, the second input terminal is used to receive the maximum conduction time Tmax, the third input terminal is used to receive the second control signal Vctrl2, and the output terminal is used to output the reset signal RSET.

[0079] Figure 4 Shows a circuit diagram of an implementation manner of the conduction time control circuit according to an embodiment of the present invention. As Figure 4 shown, the conduction time control circuit 202 includes a comparator COM1, a comparator COM2, and a timing unit 2021.

[0080] Specifically, the non-inverting input terminal of the comparator COM1 receives the current sampling signal Vcs, the inverting input terminal of the comparator COM1 receives the second reference signal Vref2, and the comparator COM1 compares the current sampling signal Vcs with the second reference signal Vref2 to obtain a first trigger signal Vbj1. The timing unit 2021 is adapted to start timing at the falling edge of the first trigger signal Vbj1 to generate a first timing signal Vsw1. Optionally, the timing unit 2021 includes a switch S1, a capacitor C1, and a current source Idc1. The switch S1, the capacitor C1, and the current source Idc1 are connected in parallel between the non-inverting input terminal of the comparator COM2 and the ground, and the control terminal of the switch S1 receives the first trigger signal Vbj1. The inverting input terminal of the comparator COM2 receives the compensation signal Vcomp, and the comparator COM2 is adapted to compare the first timing signal Vsw1 with the compensation signal Vcomp to obtain the first control signal Vctrl1.

[0081] Figure 5 Shows the working waveforms of an implementation manner of the control circuit according to an embodiment of the present invention. Next, in combination with Figure 4 and Figure 5The working mode of the control circuit of this embodiment will be further described. When the signal VNt of the same name terminal of the auxiliary winding crosses zero, the switch control signal Vgs flips to a high level, the power switch Q1 conducts, the inductor Lm is magnetized, and the current flowing through the power switch Q1 linearly rises, and the current sampling signal Vcs linearly rises. Among them, the time when the current sampling signal Vcs reaches the second reference signal Vref2 from the lowest point is the second conduction time time2. When the current sampling signal Vcs rises to the second reference signal Vref2, the first trigger signal Vbj1 flips to a low level, the switch S1 disconnects, the current source Idc1 charges the capacitor C1, and the first timing signal Vsw1 starts to rise from zero. When the first timing signal Vsw1 rises to the compensation signal Vcomp, the comparator COM2 outputs the first control signal Vctrl1 to trigger the turn-off of the power switch Q1. Among them, the time from the start of the charging operation to the first timing signal Vsw1 rising from zero to the compensation signal Vcomp is the first conduction time time1.

[0082] Figure 6 Shows another implementation circuit diagram of the conduction time control circuit of the embodiment of the present invention. As Figure 6 shown, the conduction time control circuit 302 includes a comparator COM3, a comparator COM4, a timing unit 3021, a switch S2, a capacitor C2, and an adder add1.

[0083] Specifically, the timing unit 3021 is adapted to start timing at the falling edge of the inverted signal of the switch control signal Vgs to generate a second timing signal Vsw2. Optionally, the timing unit 3021 includes a switch S3, a capacitor C3, and a current source Idc2. After the switch S3, the capacitor C3, and the current source Idc2 are connected in parallel, they are connected between the inverting input terminal of the comparator COM3 and the ground. The control terminal of the switch S3 receives the inverted signal of the switch control signal Vgs. When the switch control signal Vgs is at a high level, its inverted signal is at a low level, and the switch S3 is turned off. The current source Idc2 charges the capacitor C3, and the second timing signal Vsw2 rises. The non-inverting input terminal of the comparator COM3 receives the compensation signal Vcomp. The comparator COM3 is adapted to compare the second timing signal Vsw2 with the compensation signal Vcomp to obtain a second trigger signal Vbj2. The adder add1 is adapted to superimpose the current sampling signal Vcs and the second reference signal Vref2 to obtain a superimposed signal of the two. The first terminal of the switch S2 receives the superimposed signal of the two. The second terminal of the switch S2 is connected to the first terminal of the capacitor C2 and to the inverting input terminal of the comparator COM4. The second terminal of the capacitor C2 is grounded. The non-inverting input terminal of the comparator COM4 receives the current sampling signal Vcs. The control terminal of the switch S2 receives the second trigger signal Vbj2 output by the comparator COM3. Under the control of the second trigger signal Vbj2, the superimposed signal of the current sampling signal Vcs and the second reference signal Vref2 is held on the capacitor C2. The comparator COM4 is adapted to compare the current sampling signal Vcs with the signal held on the capacitor C2 to obtain the first control signal Vctrl1.

[0084] Figure 7 FIG. shows the working waveform of another implementation of the control circuit according to an embodiment of the present invention. The following combines Figure 6 and Figure 7The operation mode of the control circuit of this embodiment will be further described. When the signal VNt of the same name terminal of the auxiliary winding crosses zero, the switching control signal Vgs flips to a high level, the power switch Q1 conducts, the inductor Lm is magnetized, the current flowing through the power switch Q1 rises linearly, and the current sampling signal Vcs rises linearly. At the same time, during the period when the switching control signal Vgs is at a high level, the switch S3 is turned off, the current source Idc2 charges the capacitor C3, the second timing signal Vsw2 starts to rise from zero, and when the second timing signal Vsw2 is lower than the compensation signal Vcomp, the second trigger signal Vbj2 output by the comparator COM3 is at a high level, controlling the switch S2 to conduct, then the voltage Vcs_s at the first end of the capacitor C2 rises linearly following the current sampling signal Vcs with a second reference signal Vref2 higher than the current sampling signal Vcs. When the second timing signal Vsw2 reaches and is higher than the compensation signal Vcomp, the comparator COM3 outputs a low level, the switch S2 is turned off, and the voltage Vcs_s at the first end of the capacitor C2 is maintained at the voltage value at the moment when the second timing signal Vsw2 is equal to the compensation signal Vcomp. Then the current sampling signal Vcs continues to rise until when the current sampling signal Vcs is higher than the voltage Vcs_s at the first end of the capacitor C2, the comparator COM4 flips and outputs the first control signal Vctrl1. Among them, the time from the start of the charging operation to the second timing signal Vsw2 starting to rise from zero to the compensation signal Vcomp is the first conduction time time1, and the time from the switch S2 being turned off to the current sampling signal Vcs rising to the voltage Vcs_s at the first end of the capacitor C2 is the second conduction time time2.

[0085] Figure 8 Schematically shows key waveforms of a power converter according to an embodiment of the present invention. In Figure 8 it, the second reference signal Vref2 is a voltage signal related to time, and its phase is the same as the phase of the AC-side input voltage. For example, the second reference signal Vref2 can be obtained through the following formula:

[0086] Vref2 = a - |b × sin(2π × f × t)|

[0087] where a > 0, and a ≥ b ≥ 0, f is the frequency of the AC input voltage, and t is time.

[0088] Of course, in other embodiments, the second reference signal Vref2 can also be set as a DC voltage, and the present invention is not limited thereto.

[0089] As Figure 8 shown, after the system operates stably, the time1 envelope, that is, the first conduction time envelope, is a fixed time, and the time2 envelope, that is, the second conduction time envelope, is:

[0090] time2 = [a - |b×sin(2π×f×t)|]×L m / (R CS ×V bus )

[0091] Wherein, a is a positive integer, b is an integer, and a ≥ b, f is the frequency of the AC input voltage, t is the time, Lm is the inductance of the inductor, Rcs is the resistance value of the current sampling resistor, and Vbus is the bus voltage obtained by converting the AC input voltage through the rectifier bridge.

[0092] From Figure 8 it can be seen that compared with the power converter of the prior art, the time envelope of the power switch Q1 in the power converter of the present invention is larger when it is closer to the zero crossing point of the AC voltage Vac, and smaller when it is closer to the peak or valley value of the AC voltage Vac, thereby further optimizing the input current distortion problem caused by the input capacitance and the turn-on delay of the power switch in the existing power converter and optimizing the power factor correction effect.

[0093] Figure 9 The flowchart of a control method of a power converter according to an embodiment of the present invention is shown. The power converter can be implemented, for example, by the power converter in the above embodiment. Wherein, the control method includes:

[0094] In step S110, when the inductor current is zero, control the power switch to conduct. Specifically, the voltage information at both ends of the auxiliary winding coupled to the inductor can be used to determine whether the current of the inductor is zero.

[0095] In step S120, compare the output voltage sampling signal with the first reference signal to generate a compensation signal. Specifically, the output voltage sampling signal represents the output voltage or output current of the power converter.

[0096] In step S130, set the first conduction time according to the compensation signal.

[0097] In step S140, set the second conduction time according to the current sampling signal and the second reference signal. Specifically, the current sampling signal is the output of the current sampling resistor connected in series with the power switch, representing the current flowing through the power switch, and the second conduction time is the time when the change amount of the current sampling signal reaches the second reference signal.

[0098] In step S150, when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time, turn off the power switch.

[0099] In summary, in the power converter, its control circuit and control method according to the embodiments of the present invention, the on-time control circuit sets a fixed first on-time according to the compensation signal, and at the same time sets a variable second on-time according to the current sampling signal. When the on-time of the power switch reaches the sum of the first on-time and the second on-time, the power switch is triggered to turn off. Compared with the existing power converter, the time envelope of the power switch is larger when approaching the zero-crossing point of the AC voltage and smaller when approaching the peak or valley value of the AC voltage, thereby further optimizing the input current distortion problem caused by the on-delay of the input capacitor and the power switch in the existing power converter and optimizing the power factor correction effect. In addition, the circuit structure of the power converter of the present invention is simple, without significant changes to the circuit structure, and can be applied to various existing topologies, which is beneficial to reducing the circuit cost.

[0100] It should be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0101] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the above description. The purpose of selecting and specifically describing these embodiments in this specification is to better explain the principle and practical application of the present invention, so that those skilled in the art can make good use of the present invention and its modifications based on the present invention. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A control circuit for a power converter, the control circuit comprising: An error amplifier adapted to compare an output voltage sampling signal and a first reference signal to generate a compensation signal; A turn-on control circuit adapted to generate a set signal when the inductor current is zero, the set signal being used to control the turn-on moment of the power switch; A conduction time control circuit adapted to set a first conduction time according to the compensation signal, set a second conduction time according to a current sampling signal, and generate a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time, the first control signal being used to control the turn-off moment of the power switch; And A logic circuit adapted to generate a switch control signal according to the set signal and a reset signal related to the first control signal.

2. The control circuit according to claim 1, wherein, The second conduction time is the time required for the change amount of the current sampling signal to reach a second reference signal.

3. The control circuit according to claim 2, wherein, The first conduction time is obtained by timing.

4. The control circuit according to claim 1 or 3, wherein The conduction time control circuit includes: A first comparator adapted to compare the current sampling signal with a second reference signal to obtain a first trigger signal; A first timing unit that times according to the first trigger signal to generate a first timing signal; and A second comparator adapted to compare the first timing signal with the compensation signal to obtain the first control signal.

5. The control circuit according to claim 4, wherein, The first timing unit includes: A first switch, a first capacitor, and a first current source connected in parallel between one input terminal of the second comparator and the ground, wherein, the control terminal of the first switch is controlled by the first trigger signal, when the first trigger signal flips to a low level, the first switch is in an off state, and the first current source charges the first capacitor.

6. The control circuit according to claim 5, wherein The first conduction time is the time from the start of the charging operation to the first timing signal rising to the compensation signal, and the second conduction time is the time required for the current sampling signal to increase to the second reference signal.

7. The control circuit according to claim 1, wherein The conduction time control circuit includes: A second timing unit that times according to the switch control signal to generate a second timing signal; A third comparator adapted to compare the second timing signal with the compensation signal to obtain a second trigger signal; An adder adapted to superimpose the second reference signal and the current sampling signal to obtain a superimposed signal of the two; A second switch and a second capacitor, one end of the second switch receives the superimposed signal of the second reference signal and the current sampling signal, the other end is connected to the first end of the second capacitor, and the second end of the second capacitor is grounded; and A fourth comparator adapted to compare the current sampling signal with the voltage at the first end of the second capacitor to obtain the first control signal.

8. The control circuit according to claim 7, wherein, The second timing unit includes: A third switch, a third capacitor, and a second current source connected in parallel between one input terminal of the third comparator and the ground, Wherein, the control terminal of the third switch is controlled by the inverted signal of the switch control signal. When the inverted signal of the switch control signal flips to a low level, the third switch is in an off state, and the second current source charges the third capacitor.

9. The control circuit according to claim 8, wherein, When the second timing signal is lower than the compensation signal, the second switch is turned on to store the superimposed signal of the current sampling signal and the second reference signal at the first end of the second capacitor. And when the second timing signal is higher than the compensation signal, the second switch is turned off, and the voltage at the first end of the second capacitor is held.

10. The control circuit according to claim 9, wherein, The first conduction time is the time from the start of the charging operation to the second timing signal rising to the compensation signal, and the second conduction time is the time from the turn-off of the second switch to the current sampling signal increasing to the voltage at the first end of the second capacitor.

11. The control circuit according to claim 4, wherein, The second reference signal is a DC voltage.

12. The control circuit according to claim 4, wherein, The second reference signal is a voltage related to time.

13. The control circuit according to claim 12, wherein, When the bus voltage obtained by converting the AC input voltage through a rectifier bridge is: ， Wherein, is the peak value of the bus voltage, f is the frequency of the AC input voltage, and t is time, then the second reference signal is obtained by the following formula: ， Among them, and , where f is the frequency of the AC input voltage, t is the time, and a and b are constants.

14. The control circuit according to claim 13, wherein, The second conduction time is obtained by the following formula: ， Wherein, Lm is the inductance of the inductor, Rcs is the resistance value of the current sampling resistor, and Vbus is the bus voltage obtained by converting the AC input voltage through the rectifier bridge.

15. The control circuit according to claim 1, further comprising: A maximum conduction time control circuit adapted to set the maximum conduction time of the power switch.

16. The control circuit according to claim 15, further comprising: A peak protection circuit adapted to generate a second control signal according to the current sampling signal to turn off the power switch when the current sampling signal is too large.

17. The control circuit according to claim 16, further comprising: An OR gate, whose first input terminal is used to receive the first control signal, the second input terminal is used to receive the maximum conduction time, the third input terminal is used to receive the second control signal, and the output terminal is used to provide the reset signal.

18. The control circuit according to claim 1, wherein, The logic circuit is an RS flip-flop.

19. The control circuit according to claim 1, wherein, The power converter is a boost topology.

20. A control method for a power converter, the power converter being used to convert an AC input voltage into a DC output voltage, comprising a rectifier bridge, an input capacitor, a freewheeling diode, a voltage-dividing resistor, a current-sampling resistor, an inductor, and a power switch, wherein, The control method includes: Generating a set signal when the inductor current is zero, and the set signal is used to control the turn-on moment of the power switch; Comparing the output voltage sampling signal with the first reference signal to generate a compensation signal; Setting a first conduction time according to the compensation signal, setting a second conduction time according to the current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time, and the first control signal is used to control the turn-off moment of the power switch; and Generating a switch control signal according to the set signal and a reset signal related to the first control signal.

21. The control method according to claim 20, wherein, The second conduction time is the time required for the change amount of the current sampling signal to reach the second reference signal.

22. The control method according to claim 21, wherein, The first conduction time is obtained by timing.

23. The control method according to claim 20 or 22, wherein Setting the first conduction time according to the compensation signal, setting the second conduction time according to the current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time includes: Comparing the current sampling signal with a second reference signal to obtain a first trigger signal; Timing according to the first trigger signal to generate a first timing signal; and Comparing the first timing signal with the compensation signal to obtain the first control signal.

24. The control method according to claim 23, wherein, The timing according to the first trigger signal to generate a first timing signal includes: When the first trigger signal flips to a low level, turning off the first switch, charging a first capacitor with a first current source to provide the first timing signal at a first end of the first capacitor.

25. The control method according to claim 24, wherein, The first conduction time is the time from the start of the charging operation to when the first timing signal rises to the compensation signal, and the second conduction time is the time for the current sampling signal to increase to the second reference signal.

26. The control method according to claim 20, wherein, Setting the first conduction time according to the compensation signal, setting the second conduction time according to the current sampling signal, and generating a first control signal when the conduction time of the power switch reaches the sum of the first conduction time and the second conduction time includes: Timing according to the switch control signal to generate a second timing signal; Comparing the second timing signal with the compensation signal to obtain a second trigger signal; Superimposing the second reference signal and the current sampling signal to obtain a superimposed signal of the two; When the second timing signal is lower than the compensation signal, turning on a second switch, storing the superimposed signal of the current sampling signal and the second reference signal at a first end of a second capacitor, and when the second timing signal is higher than the compensation signal, turning off the second switch so that the voltage at the first end of the second capacitor is maintained; and Comparing the current sampling signal with the voltage at the first end of the second capacitor, and generating the first control signal when the current sampling signal rises to the voltage at the first end of the second capacitor.

27. The control method according to claim 26, wherein, The timing according to the switch control signal to generate a second timing signal includes: When the inverted signal of the switch control signal flips to a low level, turning off a third switch, charging a third capacitor with a second current source to provide the second timing signal at a first end of the third capacitor.

28. The control method according to claim 27, wherein, The first conduction time is the time from the start of the charging operation to when the second timing signal rises to the compensation signal, and the second conduction time is the time from the turn-off of the second switch to when the current sampling signal increases to the voltage at the first end of the second capacitor.

29. The control method according to claim 23, wherein, The second reference signal is a DC voltage.

30. The control method according to claim 23, wherein The second reference signal is a voltage related to time.

31. The control method according to claim 30, wherein, When the bus voltage obtained by converting the AC input voltage through the rectifier bridge is: ， Wherein, is the peak value of the bus voltage, f is the frequency of the AC input voltage, and t is the time, then the second reference signal is obtained by the following formula: ， Among them, and , where f is the frequency of the AC input voltage, t is time, and a and b are constants.

32. The control method according to claim 31, wherein, The second conduction time is obtained by the following formula: ， Wherein, Lm is the inductance of the inductor, Rcs is the resistance value of the current sampling resistor, and Vbus is the bus voltage obtained by converting the AC input voltage through the rectifier bridge.

33. The control method according to claim 20 further includes: Setting the maximum conduction time of the power switch, and turning off the power switch when the conduction time of the power switch reaches the maximum conduction time.

34. The control method according to claim 33 further includes: Generating a second control signal when the current sampling signal is too large to turn off the power switch.

35. A power converter for converting an AC input voltage into a DC output voltage, comprising: A rectifier bridge, an input capacitor, a freewheeling diode, a current sampling resistor, an inductor and a power switch, and The control circuit according to any one of claims 1 to 19.

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