High dynamic performance synchronous rectification method and system with over-temperature protection

Abstract

The application relates to the field of over-temperature protection, in particular to a high-dynamic-performance synchronous rectification method and system with over-temperature protection, which comprises detecting the temperature of a secondary circuit in a synchronous rectification system and generating an OTP signal, performing frequency division processing on a preset clock signal according to the OTP signal to generate a first logic output signal and a second logic output signal; performing logic processing on the OTP signal, the first logic output signal and the second logic output signal to generate an OTP logic control signal; performing processing on the OTP logic control signal through a driving circuit in the synchronous rectification system to generate an output voltage control signal; and controlling an output voltage circuit of the synchronous rectification system according to the output voltage control signal. The application has the effect of preventing the burning of components in the circuit and in the machine due to the excessively high temperature of the secondary circuit.

Description

Technical Field

[0001] This application relates to the field of over-temperature protection, and in particular to a high-dynamic-performance synchronous rectification method and system with over-temperature protection. Background Technology

[0002] Currently, with the rapid development of charging technology, the charging power of electronic products such as smartphones and tablets is also increasing.

[0003] Currently, when smartphones, tablets and other electronic products that support fast charging are charged using a charging head, the synchronous rectification system in the charging head contains a primary chip and a secondary circuit, and the primary chip has OTP (over temp protection) protection function.

[0004] In the process of developing this application, the inventors discovered that the above-mentioned technology has at least the following problems: The primary chip has an OTP function, which activates OTP protection when the temperature of the primary chip exceeds the upper limit. In synchronous rectification systems, the secondary circuit sometimes experiences overheating. When the secondary circuit temperature is too high, the primary chip's OTP cannot be detected, thus preventing the OTP function from activating. This could potentially burn out components within the circuit / machine due to the excessively high secondary circuit temperature. Summary of the Invention

[0005] To prevent components inside the circuit / machine from burning out due to excessively high secondary circuit temperature, this application provides a high dynamic performance synchronous rectification method and system with over-temperature protection.

[0006] In a first aspect, this application provides a high-dynamic-performance synchronous rectification method with over-temperature protection, employing the following technical solution:

[0007] A high dynamic performance synchronous rectification method with over-temperature protection includes: detecting the temperature of the secondary circuit in the synchronous rectification system and generating an OTP signal, and performing frequency division processing on a preset clock signal based on the OTP signal to generate a first logic output signal and a second logic output signal.

[0008] The OTP signal, the first logic output signal, and the second logic output signal are logically processed to generate the OTP logic control signal.

[0009] The output voltage control signal is generated by the driving circuit in the synchronous rectification system through the processing of the OTP logic control signal.

[0010] The output voltage circuit of the synchronous rectification system is controlled according to the output voltage control signal.

[0011] By adopting the above technical solution, the temperature of the secondary circuit can be detected, thus facilitating the generation of an OTP signal when the temperature of the secondary circuit is too high. The OTP signal triggers the frequency division of the clock signal, which facilitates the generation of the first logic output signal and the second logic output signal. Furthermore, based on the first logic output signal and the second logic output signal, the OTP logic control signal is obtained. Then, the OTP logic control signal is further processed to generate the output voltage control signal. This facilitates the reduction of the output voltage of the synchronous rectification system based on the voltage control signal, thereby reducing the output power of the synchronous rectification system and achieving the purpose of reducing the temperature of the secondary circuit. This helps to prevent the components inside the circuit / machine from burning out due to excessively high secondary circuit temperature.

[0012] In one specific implementation, detecting the temperature of the secondary circuit in the synchronous rectification system and generating an OTP signal includes:

[0013] The analog temperature data of the secondary circuit is obtained through the temperature detection circuit in the secondary circuit.

[0014] The simulated temperature data is converted from digital to digital (A / D) to generate an OTP signal.

[0015] By adopting the above technical solution, the temperature of the secondary circuit can be detected by the temperature detection circuit, which facilitates the acquisition of the analog temperature data of the secondary chip. Then, the analog temperature data is converted into a digital OTP signal by A / D conversion, which can be used as the digital input signal of the secondary circuit cooling circuit.

[0016] In one specific implementation, the OTP signal includes a first OTP signal and a second OTP signal; the step of generating the OTP signal by performing A / D conversion on the analog temperature data includes:

[0017] The simulated temperature data is compared with a preset simulated temperature threshold.

[0018] If the simulated temperature data exceeds the simulated temperature threshold, then the simulated temperature data is digitally converted to digital (A / D) to generate a first OTP signal.

[0019] If the simulated temperature data does not exceed the simulated temperature threshold, then the simulated temperature data is digitally converted to digital (A / D) to generate a second OTP signal.

[0020] By adopting the above technical solution, the analog temperature threshold is compared with the OTP signal, and the analog temperature data exceeding the analog temperature threshold is converted into a first OTP signal by digital A / D conversion; the analog temperature data not exceeding the analog temperature threshold is also converted into a second OTP signal by digital A / D conversion, thereby facilitating the determination of whether the temperature of the secondary circuit is too high based on the first OTP signal and the second OTP signal.

[0021] In one specific implementation, the step of dividing a preset clock signal based on the OTP signal to generate a first logic output signal and a second logic output signal includes:

[0022] The OTP signal and the clock signal are sent to a frequency divider composed of several D flip-flops;

[0023] The clock signal is processed by the frequency divider to generate the first logic output signal and the second logic output signal.

[0024] By adopting the above technical solution, the OTP signal is sent to the frequency divider, which then generates the first logic output signal and the second logic output signal based on the clock signal, thereby facilitating the subsequent acquisition of the output voltage control signal.

[0025] In one specific implementation, the step of detecting the temperature of the secondary circuit in the synchronous rectification system and generating an OTP signal further includes:

[0026] The OTP signal is logically processed to generate a dynamic adjustment signal;

[0027] The dynamic adjustment circuit in the secondary circuit is adjusted according to the dynamic adjustment signal. The dynamic adjustment circuit is used to control the output voltage of the primary circuit in the synchronous rectification system according to the output voltage of the synchronous rectification system.

[0028] By adopting the above technical solution, the OTP signal facilitates the control of the dynamic adjustment circuit to stop adjusting the output voltage of the primary circuit when the secondary circuit temperature is too high, thereby facilitating the cooling of the secondary circuit.

[0029] In one specific implementation, the step of processing the OTP logic control signal through the drive circuit in the synchronous rectification system to generate the output voltage control signal includes:

[0030] The OTP logic control signal is input to the drive circuit;

[0031] The output voltage control signal is generated by processing the OTP logic control signal through the driving circuit.

[0032] By adopting the above technical solution, the OTP logic control signal is processed by the driving circuit to generate an output voltage control signal, which facilitates the subsequent reduction of the output voltage of the synchronous rectification system based on the output voltage control signal, thereby reducing the temperature of the secondary circuit.

[0033] Secondly, this application provides a high-dynamic-performance synchronous rectification system with over-temperature protection, employing the following technical solution:

[0034] A high-dynamic-performance synchronous rectification system with over-temperature protection includes:

[0035] The primary circuit (100) is used to power a high-dynamic-performance synchronous rectification system with over-temperature protection;

[0036] The output voltage circuit (200) is used to electrically connect to the primary circuit in a transformer manner and output voltage;

[0037] The over-temperature protection circuit (300) is used to detect the temperature of the secondary circuit side in a high dynamic performance synchronous rectifier system with over-temperature protection, and to generate an OTP logic control signal based on the temperature of the secondary circuit side.

[0038] The driving circuit (400) is used to receive and process the OTP logic control signal to generate a voltage control signal for adjusting the output voltage of the output voltage circuit (200).

[0039] By adopting the above technical solution, the primary circuit provides voltage to the secondary circuit in a transformer manner. The over-temperature protection circuit can generate a corresponding OTP logic control signal according to the temperature of the secondary circuit side. The further driving circuit can adjust the output voltage of the output voltage circuit according to the OTP logic control signal. When the temperature of the secondary circuit side is too high, the driving circuit can reduce the output voltage of the output voltage circuit according to the OTP logic control signal to reduce the output power. This facilitates the reduction of the output power of the synchronous rectification system to achieve the purpose of reducing the temperature of the secondary circuit side. This helps to prevent the components inside the circuit / machine from burning out due to the excessive temperature of the secondary circuit.

[0040] In one specific implementation, the high dynamic performance synchronous rectification system with over-temperature protection further includes:

[0041] A logic gate circuit (500) is used to acquire the OTP signal output by the over-temperature protection circuit and generate a logic signal by processing the OTP signal;

[0042] A dynamic adjustment circuit (600) is used to receive the logic signal and process the logic signal to generate a dynamic adjustment signal;

[0043] The logic control circuit (700) is used to receive the dynamic adjustment signal and process the dynamic adjustment signal to generate a time delay signal, and also send the time delay signal to the drive circuit (400) to control the drive circuit (400) to dynamically adjust the output voltage of the output voltage circuit (200).

[0044] By adopting the above technical solution, when the temperature on the secondary circuit side is normal, the OTP logic control signal issued by the over-temperature protection circuit will not control the drive circuit to adjust the output voltage of the voltage output circuit. At this time, the OTP logic control signal issued by the over-temperature protection circuit can control the dynamic adjustment circuit, which further facilitates the dynamic adjustment circuit to control the logic control circuit to adjust the output voltage of the output voltage.

[0045] In one specific implementation, the over-temperature protection circuit (300) includes:

[0046] Temperature detection circuit (301) is used to detect the temperature on the secondary circuit side;

[0047] A / D conversion circuit (302) is used to perform A / D conversion on the temperature detected by the temperature detection circuit (301) to generate the OTP signal;

[0048] A two-stage frequency divider circuit (303) is used to receive the OTP signal and divide the clock signal of the high dynamic performance synchronous rectifier system with over-temperature protection according to the OTP signal to generate a first frequency divider signal and a second frequency divider signal.

[0049] A three-input NAND gate circuit (304) is used to acquire and process the OTP signal, the first frequency divider signal and the second frequency divider signal to generate an OTP logic control signal.

[0050] By adopting the above technical solution, the temperature detected by the temperature detection circuit on the secondary circuit side is further converted into a digital OTP signal by the A / D conversion circuit, which facilitates the two-stage frequency divider circuit to work according to the OTP signal and divide the clock signal. In this way, the OTP logic control signal can be generated according to the OTP signal and the first and second frequency divider signals.

[0051] In one specific implementation, when the over-temperature protection circuit (300) controls the drive circuit (400) to control the output voltage of the output voltage circuit (200) according to the OTP logic control signal, the over-temperature protection circuit (300) controls the dynamic adjustment circuit (600) to stop working according to the OTP logic control signal.

[0052] By adopting the above technical solution, when the secondary side overheats, the dynamic adjustment circuit stops working when the overheat protection circuit controls the output voltage to decrease according to the OTP logic control signal. This helps to prevent overheating, and the dynamic adjustment circuit will increase the output voltage again after the overheat protection circuit controls the output voltage to decrease according to the OTP logic control signal.

[0053] In summary, this application includes at least one of the following beneficial technical effects:

[0054] 1. The temperature of the secondary circuit is detected to generate an OTP signal when the temperature of the secondary circuit is too high. Then, the OTP signal is logically processed to obtain a first logic output signal and a second logic output signal. Based on the first logic output signal and the second logic output signal, an OTP logic control signal is obtained. Then, the OTP logic control signal is further logically processed to generate an output voltage control signal. This allows the output voltage of the synchronous rectification system to be reduced according to the voltage control signal, thereby reducing the output power of the synchronous rectification system and achieving the purpose of reducing the temperature of the secondary circuit.

[0055] 2. By comparing the simulated temperature threshold with the OTP signal, the simulated temperature data exceeding the simulated temperature threshold is converted into a first OTP signal by digital A / D conversion; the simulated temperature data not exceeding the simulated temperature threshold is also converted into a second OTP signal by digital A / D conversion, thereby facilitating the determination of whether the temperature of the secondary circuit is too high based on the first OTP signal and the second OTP signal.

[0056] 3. The OTP logic control signal is processed by the driving circuit to generate an output voltage control signal, which facilitates the subsequent reduction of the output voltage of the synchronous rectification system based on the output voltage control signal, thereby reducing the temperature of the secondary circuit. Attached Figure Description

[0057] Figure 1 This is a flowchart illustrating a high dynamic performance synchronous rectification method with over-temperature protection according to Embodiment 1 of this application.

[0058] Figure 2 This is a schematic diagram of the overall structure of the synchronous rectification circuit in the charging head in Embodiment 1 of this application.

[0059] Figure 3 This is a schematic diagram of the secondary synchronous rectifier circuit in Embodiment 1 of this application.

[0060] Figure 4 This is a schematic diagram of the overall circuit of the over-temperature protection circuit in Embodiment 1 of this application.

[0061] Figure 5This is a schematic diagram of the clock signal waveform, the output waveform of the first signal output terminal of the first D flip-flop, and the output waveform of the first signal output terminal of the second D flip-flop in Embodiment 1 of this application.

[0062] Figure 6 This is a schematic diagram of the overall circuit of the driving circuit in Embodiment 1 of this application.

[0063] Figure 7 This is a structural diagram of a high dynamic performance synchronous rectification system with over-temperature protection according to Embodiment 2 of this application.

[0064] Figure 8 This is a block diagram of the over-temperature protection circuit in a high dynamic performance synchronous rectification system with over-temperature protection, according to Embodiment 2 of this application.

[0065] Explanation of reference numerals in the attached diagram: 100, primary circuit; 200, output voltage circuit; 300, over-temperature protection circuit; 301, temperature detection circuit; 302, A / D conversion circuit; 303, two-stage frequency divider circuit; 304, three-input NAND gate circuit; 400, driver circuit; 500, logic gate circuit; 600, dynamic adjustment circuit; 700, logic control circuit. Detailed Implementation

[0066] The following is in conjunction with the appendix Figure 1-7 This application will be described in further detail.

[0067] Example 1

[0068] Embodiment 1 of this application discloses a high-dynamic-performance synchronous rectification method with over-temperature protection. (Refer to...) Figure 1 High-dynamic-performance synchronous rectification methods with over-temperature protection include:

[0069] S100: Detect the temperature of the secondary circuit in the synchronous rectification system and generate an OTP signal. Based on the OTP signal, perform frequency division processing on the preset clock signal to generate a first logic output signal and a second logic output signal.

[0070] Reference Figure 2 The synchronous rectification system in the charging head includes a primary circuit and a secondary circuit. The secondary circuit includes an output voltage circuit electrically connected to the primary circuit via a transformer circuit, and also includes a secondary synchronous rectification circuit for controlling the output voltage of the output voltage circuit.

[0071] Reference Figure 3 The secondary synchronous rectifier circuit includes an over-temperature protection circuit, combined with... Figure 4The over-temperature protection circuit includes a temperature detection circuit for detecting the temperature of the secondary synchronous rectifier circuit. After detecting the temperature of the secondary synchronous rectifier circuit, the temperature detection circuit outputs an analog voltage value to characterize the analog temperature data of the secondary circuit. An A / D conversion circuit is connected to the output of the temperature detection circuit, and the output of the temperature detection circuit is connected to the input of the A / D conversion circuit; additionally, an analog temperature threshold is set in the A / D conversion circuit.

[0072] In implementation, the A / D conversion circuit compares the acquired analog temperature data with a preset analog temperature threshold. If the analog temperature data is greater than the preset threshold, it is converted into a high-level temperature signal via A / D conversion. If the analog temperature data is not greater than the preset threshold, it is converted into a low-level temperature signal via A / D conversion. Both the high-level and low-level temperature signals are denoted as OTP signals, with the high-level signal designated as the first OTP signal and the low-level signal designated as the second OTP signal.

[0073] Reference Figure 3 The output of the A / D conversion circuit is connected to a two-stage frequency divider consisting of two D flip-flops. These two D flip-flops are referred to as the first D flip-flop and the second D flip-flop, respectively. Both the first D flip-flop and the second D flip-flop have a clock input terminal, a signal input terminal D, a CR terminal, a first signal output terminal corresponding to the signal input terminal D, and a second signal output terminal that outputs a signal opposite to the first signal output terminal.

[0074] In implementation, the clock input terminal of the first D flip-flop receives the clock signal CK, the second signal output terminal of the first D flip-flop is electrically connected to its signal input terminal D, the first signal output terminal of the first D flip-flop is electrically connected to the clock input terminal of the second D flip-flop, and the second signal output terminal of the second D flip-flop is electrically connected to its first signal output terminal; in addition, the output terminal of the A / D conversion circuit is connected to the CR terminals of both the first and second D flip-flops.

[0075] When the A / D conversion circuit sends a first OTP signal to the CR terminal of the first D flip-flop and the second D flip-flop, the first D flip-flop and the second D flip-flop are in the working state; when the A / D conversion circuit sends a second OTP signal to the CR terminal of the first D flip-flop and the second D flip-flop, the first D flip-flop and the second D flip-flop are in the reset state, and when the first D flip-flop and the second D flip-flop are in the reset state, the first signal output terminal of the first D flip-flop and the first signal output terminal of the second D flip-flop are both at a high level.

[0076] It should be noted that, referring to Figure 5After inputting the CK signal to the two-stage frequency divider, the frequency of the signal output from the first signal output terminal of the first D flip-flop is 1 / 2 of the CK signal, and the frequency of the signal output from the first signal output terminal of the second D flip-flop is 1 / 4 of the CK signal. In the initial state, both the first and second D flip-flops are in the reset state, and the signals output from the first signal output terminals of the first and second D flip-flops are both high level. The signal output from the first signal output terminal of the first D flip-flop is recorded as the first logic output signal, and the signal output from the first signal output terminal of the second D flip-flop is recorded as the second logic output signal.

[0077] S200 performs logical processing on the OTP signal, the first logic output signal, and the second logic output signal to generate the OTP logic control signal.

[0078] In implementation, the secondary synchronous rectifier circuit also includes a three-input NAND gate circuit, whose three inputs are designated as the first NAND gate input, the second NAND gate input, and the third NAND gate input. The first NAND gate input is electrically connected to the clock circuit, the second NAND gate input is electrically connected to the first signal output of the first D flip-flop, and the third NAND gate input is electrically connected to the first signal output of the second D flip-flop.

[0079] The three-input NAND gate circuit performs NAND logic operations on the clock signal generated by the clock circuit, the signal output from the first signal output terminal of the first D flip-flop, and the signal output from the first signal output terminal of the second D flip-flop, and records the result of the NAND logic operation as the OTP logic control signal OTP_logic.

[0080] It should be noted that when the temperature of the secondary synchronous rectifier circuit does not exceed the preset analog temperature threshold, that is, when the secondary synchronous rectifier circuit is not overheated, the output of the A / D conversion circuit is a low-level signal. At this time, both the first and second D flip-flops are in the reset state, and the first signal outputs of both the first and second D flip-flops are high-level. Thus, the three-input NAND gate will output a high level under this condition.

[0081] When the temperature of the secondary synchronous rectifier circuit exceeds the preset analog temperature threshold, i.e., when the secondary synchronous rectifier circuit overheats, the output of the A / D conversion circuit will be a high-level signal. (Refer to...) Figure 5 Initially, the clock signal is high, and the signals output from the first output terminals of both the first and second D flip-flops are also high. At this time, the OTP logic control signal OTP_logic is low. When the next three clock signals arrive, combined with... Figure 5 As can be seen, the OTP logic control signal OTP_logic is always high. Then, when the fourth clock signal arrives, both the first and second logic output signals are high. Figure 5 As can be seen, the OTP logic control signal OTP_logic is always at a low level. At this time, the clock signal, the first logic output signal, and the second logic output signal are all at the same level as when the first and second D flip-flops are in the reset state. The low level is represented by signal 0, and the high level by signal 1. Thus, the OTP logic control signal OTP_logic will be 1110, 1110, 1110… With the continuous input of the clock signal, the OTP logic control signal OTP_logic output from the three-input NAND gate will be continuously output in groups of 1110.

[0082] S300 generates an output voltage control signal by processing the OTP logic control signal through the drive circuit in the synchronous rectification system.

[0083] Reference Figure 6 The secondary synchronous rectifier circuit also includes a driving circuit, which includes a first dual-input AND gate. An NPN transistor is electrically connected to the input of the first dual-input AND gate, and the base of the first transistor is electrically connected to the input of the first dual-input AND gate. The collector of the first transistor is connected to a high level. An NOT gate is also electrically connected to the input of the first dual-input AND gate, and the output of the NOT gate is electrically connected to a second NPN transistor, and the output of the NOT gate is electrically connected to the base of the second transistor. The collector of the second transistor is electrically connected to the emitter of the first transistor, and the collector and emitter of the second transistor are grounded.

[0084] The first dual-input AND gate has a high-level delayed signal input at one of its input terminals, and the other input terminal is connected to the output terminal of the three-input NAND gate circuit to receive the OTP logic control signal OTP_logic output by the three-input NAND gate circuit.

[0085] The portion of the collector of the second transistor that is electrically connected to the emitter of the first transistor outputs a voltage signal, and this voltage signal is denoted as the output voltage control signal GATE.

[0086] S400, the output voltage circuit of the synchronous rectification system is controlled according to the output voltage control signal.

[0087] Reference Figure 5One input of the AND gate receives a continuous sequence of OTP logic control signals: 1110, 1110, 1110... In implementation, when the OTP signal is detected to be 1, that is, when the temperature detection circuit detects that the temperature of the secondary synchronous rectifier circuit is too high, the high-level delay signal is also set to a continuous high-level signal. As can be seen from the circuit shown: when the OTP logic control signal OTP_logic is 1, the output voltage control signal output by the driver circuit is 1, that is, the output is high-level; when the OTP logic control signal OTP_logic is 0, the output voltage control signal output by the driver circuit is 0, that is, the output is low-level.

[0088] Reference Figure 2 and Figure 6 The output terminal of the driving circuit, which is the location where the collector of the second transistor is electrically connected to the emitter of the first transistor, is connected to a MOSFET. Parasitic diodes are electrically connected to the source and drain of the MOSFET. The positive terminal of the parasitic diode is electrically connected to the source of the MOSFET, and the negative terminal of the parasitic diode is electrically connected to the drain of the MOSFET. The output terminal of the driving circuit is electrically connected to the gate of the MOSFET.

[0089] Combination Figure 2 As can be seen, when the output of the drive circuit is high, the MOSFET is turned on. At this time, the voltage transformed from the primary circuit to the secondary synchronous rectifier circuit can be almost entirely converted into the output voltage V0 of the output voltage circuit. When the output of the drive circuit is low, the MOSFET is turned off. At this time, the voltage transformed from the primary circuit to the secondary synchronous rectifier circuit needs to overcome the forward voltage of the parasitic diode. Since the forward voltage of the parasitic diode is high, the output voltage V0 of the output voltage circuit will drop significantly after overcoming the forward voltage of the parasitic diode, thus making the output voltage V0 of the output voltage circuit too low. When the output voltage V0 of the output voltage circuit drops significantly, the voltage value of V0 will be relatively small. At this time, the output power of the synchronous rectifier circuit will also decrease, which facilitates the cooling of the secondary synchronous rectifier circuit.

[0090] To further facilitate the cooling of the secondary synchronous rectification circuit, this embodiment of a high dynamic performance synchronous rectification method with over-temperature protection also includes the following steps:

[0091] The OTP signal is logically processed to generate a dynamic adjustment signal.

[0092] In implementation, a synchronous rectification system includes a primary circuit and a secondary synchronous rectification circuit. The synchronous rectification system requires good dynamic response characteristics, meaning the primary chip needs to respond promptly when the load changes from light to heavy load. (Refer to...) Figure 3Therefore, a dynamic detection circuit DYN and a logic control circuit electrically connected to the dynamic detection circuit DYN are usually set in the secondary synchronous rectifier circuit. The dynamic detection circuit detects the voltage drop change of the output voltage V0 (current cycle output voltage - previous cycle output voltage). Then, the dynamic detection circuit DYN sends the voltage drop change as an electrical signal to the logic control circuit, which has a voltage drop change threshold. The logic control circuit then determines whether the voltage drop change of the output voltage V0 detected by the circuit is a normal loss voltage drop or a sudden load voltage drop based on the voltage drop change threshold. A normal loss voltage drop is a voltage drop change that is less than the voltage drop change threshold, and a sudden load voltage drop is a voltage drop change that is not less than the voltage drop change threshold. When the output voltage V0 of the secondary synchronous rectifier circuit is detected to drop to the normal loss voltage drop, the control signal fed back to the primary circuit by the logic control circuit includes a pulse signal; when the output voltage drop is detected to be a sudden load voltage drop, the control signal fed back to the primary circuit by the logic control circuit in the secondary synchronous rectifier circuit includes two consecutive pulse signals. The primary circuit distinguishes the output voltage state according to the number of pulses of the received control signal, so as to increase the output voltage V0 of the secondary synchronous rectifier circuit by increasing the input voltage of the primary circuit under the condition of sudden load voltage drop.

[0093] Reference Figure 3 and Figure 4 The output of the A / D conversion circuit is also connected to a second dual-input AND gate. One input of the second dual-input AND gate is the input of the NOT gate, and the output of the A / D conversion circuit is electrically connected to the NOT gate input. The other input of the second dual-input AND gate is a dynamic detection enable signal EN that is always high. The output of the second dual-input AND gate is electrically connected to the input of the dynamic detection circuit, and the signal output from the output of the second dual-input AND gate is recorded as the dynamic adjustment signal.

[0094] The dynamic adjustment circuit in the secondary circuit is adjusted according to the dynamic adjustment signal. The dynamic adjustment circuit is used to control the output voltage of the primary circuit in the synchronous rectification system based on the output voltage of the synchronous rectification system.

[0095] In implementation, when the output of the A / D conversion circuit is high, that is, after the OTP protection of the secondary synchronous rectifier circuit is activated, the OTP signal is high, and the output of the second dual-input AND gate is low, so that the dynamic detection circuit does not work. This prevents the dynamic detection circuit from increasing the output voltage of the secondary synchronous rectifier circuit by increasing the input voltage of the primary circuit after the secondary circuit output voltage V0 drops through the steps of S100, S200, S300 and S400. When the OTP protection is not activated, the gate circuit outputs a high level, and the dynamic detection circuit works.

[0096] Figure 1This is a flowchart illustrating a high-dynamic-performance synchronous rectification method with over-temperature protection in one embodiment. It should be understood that, although... Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows; unless explicitly stated otherwise, there is no strict order requirement for the execution of these steps, and they can be executed in other orders; and Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0097] Example 2

[0098] Embodiment 2 of this application discloses a high-dynamic-performance synchronous rectification system with over-temperature protection. (Refer to...) Figure 7 High dynamic performance synchronous rectification systems with over-temperature protection include:

[0099] Primary circuit 100 is used to power a high-dynamic-performance synchronous rectification system with over-temperature protection;

[0100] The output voltage circuit 200 is used to electrically connect to the primary circuit in a transformer manner and output voltage.

[0101] The over-temperature protection circuit 300 is used to detect the temperature of the secondary circuit side in a high dynamic performance synchronous rectifier system with over-temperature protection, and to generate the OTP logic control signal OTP_logic based on the temperature of the secondary circuit side.

[0102] The driving circuit 400 is used to receive and process the OTP logic control signal OTP_logic to generate a voltage control signal GATE for adjusting the output voltage of the output voltage circuit 200.

[0103] Logic gate 500 is used to obtain the OTP logic control signal output by the over-temperature protection circuit, and to generate a logic signal by processing the OTP logic control signal and the enable signal EN of logic gate 500.

[0104] The dynamic adjustment circuit 600 is used to receive logic signals and process them to generate dynamic adjustment signals.

[0105] The logic control circuit 700 is used to receive and process the dynamic adjustment signal to generate a time delay signal, and also sends the time delay signal to the drive circuit 400 to control the drive circuit 400 to dynamically adjust the output voltage of the output voltage circuit 200.

[0106] Specifically, refer to Figure 8 The over-temperature protection circuit 300 includes:

[0107] Temperature detection circuit 301 is used to detect the temperature on the secondary circuit side;

[0108] A / D conversion circuit 302 is used to perform A / D conversion on the temperature detected by temperature detection circuit 301 to generate an OTP signal;

[0109] The two-stage frequency divider circuit 303 is used to receive the OTP signal and divide the clock signal of the high dynamic performance synchronous rectifier system with over-temperature protection according to the OTP signal to generate the first frequency divider signal and the second frequency divider signal.

[0110] The three-input NAND gate circuit 304 is used to acquire and process the OTP signal, the first frequency division signal and the second frequency division signal to generate the OTP logic control signal, wherein the first frequency division signal is the first logic output signal in the corresponding embodiment 1 and the second frequency division signal is the second logic output signal in the corresponding embodiment 1.

[0111] It should be noted that, in the event of over-temperature, the over-temperature protection circuit 300 controls the drive circuit 400 to control the output voltage of the output voltage circuit 200 according to the OTP logic control signal. At this time, the over-temperature protection circuit 300 also controls the dynamic adjustment circuit 600 to stop working according to the OTP logic control signal. When the temperature is not over-temperature, the over-temperature protection circuit 300 stops controlling the drive circuit 400 to control the output voltage of the output voltage circuit 200 according to the OTP logic control signal, and the dynamic adjustment circuit 600 continues to work according to the OTP logic control signal.

[0112] This specific embodiment is merely an explanation of the present invention and is not intended to limit the invention. After reading this specification, those skilled in the art can make modifications to this embodiment without contributing any inventive step, but such modifications are protected by patent law as long as they are within the scope of the claims of the present invention.

Claims

1. A high dynamic performance synchronous rectification method with over-temperature protection, characterized in that: The method comprises the following steps: detecting the temperature of the secondary circuit of the synchronous rectification system and generating an OTP signal, and performing frequency division processing on a preset clock signal according to the OTP signal to generate a first logic output signal and a second logic output signal; performing logic processing on the clock signal, the first logic output signal and the second logic output signal to generate an OTP logic control signal; processing the OTP logic control signal through a drive circuit in the synchronous rectification system to generate an output voltage control signal; controlling the output voltage circuit of the synchronous rectification system according to the output voltage control signal; the frequency division processing on the preset clock signal according to the OTP signal to generate the first logic output signal and the second logic output signal comprises the following steps: sending the OTP signal and the clock signal to a frequency divider composed of a plurality of D flip-flops; processing the clock signal through the frequency divider to generate the first logic output signal and the second logic output signal; after the step of detecting the temperature of the secondary circuit of the synchronous rectification system and generating the OTP signal, the method further comprises the following steps: performing logic processing on the OTP signal to generate a dynamic adjustment signal; adjusting a dynamic adjustment circuit in the secondary circuit according to the dynamic adjustment signal, wherein the dynamic adjustment circuit is used to control the output voltage of the primary circuit in the synchronous rectification system according to the output voltage of the synchronous rectification system.

2. The high dynamic performance synchronous rectification method with over-temperature protection as claimed in claim 1, characterized in that: the step of detecting the temperature of the secondary circuit of the synchronous rectification system and generating the OTP signal comprises the following steps: obtaining analog temperature data of the secondary circuit through a temperature detection circuit in the secondary circuit; performing A / D conversion on the analog temperature data to generate the OTP signal.

3. The high dynamic performance synchronous rectification method with over-temperature protection as claimed in claim 2, characterized in that: The OTP signal comprises a first OTP signal and a second OTP signal; the step of performing A / D conversion on the analog temperature data to generate the OTP signal comprises the following steps: comparing the analog temperature data with a preset analog temperature threshold value; if the analog temperature data exceeds the analog temperature threshold value, performing digital A / D conversion on the analog temperature data exceeding the analog temperature threshold value to generate the first OTP signal; if the analog temperature data does not exceed the analog temperature threshold value, performing digital A / D conversion on the analog temperature data not exceeding the analog temperature threshold value to generate the second OTP signal.

4. The high dynamic performance synchronous rectification method with over-temperature protection as claimed in claim 3, characterized in that: the step of processing the OTP logic control signal through the drive circuit in the synchronous rectification system to generate the output voltage control signal comprises the following steps: inputting the OTP logic control signal into the drive circuit; processing the OTP logic control signal through the drive circuit to generate the output voltage control signal.

5. A high dynamic performance synchronous rectification system with over-temperature protection, applied to the high dynamic performance synchronous rectification method with over-temperature protection of claim 1, characterized in that: The high-dynamic-performance synchronous rectification system with over-temperature protection comprises: a primary circuit (100) for supplying power to the high-dynamic-performance synchronous rectification system with over-temperature protection; an output voltage circuit (200) for being electrically connected to the primary circuit in a transformer mode and outputting voltage; an over-temperature protection circuit (300) for detecting the temperature of the secondary circuit side of the high-dynamic-performance synchronous rectification system with over-temperature protection and generating an OTP logic control signal according to the temperature of the secondary circuit side; The drive circuit (400) is configured to receive and process the OTP logic control signal to generate a voltage control signal for regulating the output voltage of the output voltage circuit (200).

6. The over-temperature protected high dynamic performance synchronous rectification system of claim 5, wherein: The high-dynamic-performance synchronous rectification system with over-temperature protection further comprises: The logic gate circuit (500) is configured to obtain the OTP logic control signal output by the over-temperature protection circuit and generate a logic signal by processing the OTP logic control signal. The dynamic adjustment circuit (600) is configured to receive the logic signal and process the logic signal to generate a dynamic adjustment signal. The logic control circuit (700) is configured to receive the dynamic adjustment signal and process the dynamic adjustment signal to generate a time delay signal, and send the time delay signal to the drive circuit (400) to control the drive circuit (400) to dynamically adjust the output voltage of the output voltage circuit (200).

7. The over-temperature protected high dynamic performance synchronous rectification system of claim 6, wherein: The over-temperature protection circuit (300) comprises: The temperature detection circuit (301) is configured to detect the temperature of the secondary circuit side. The A / D conversion circuit (302) is configured to perform A / D conversion on the temperature detected by the temperature detection circuit (301) to generate an OTP signal. The two-stage frequency divider circuit (303) is configured to receive the OTP signal and divide the clock signal of the high-dynamic-performance synchronous rectification system with over-temperature protection according to the OTP signal to generate a first frequency division signal and a second frequency division signal. The three-input NAND gate circuit (304) is configured to obtain and process the clock signal, the first frequency division signal and the second frequency division signal to generate an OTP logic control signal.

8. The over-temperature protected high dynamic performance synchronous rectification system of claim 7, wherein: When the over-temperature protection circuit (300) controls the drive circuit (400) to control the output voltage of the output voltage circuit (200) according to the OTP logic control signal, the over-temperature protection circuit (300) suspends the operation of the dynamic adjustment circuit (600) according to the OTP logic control signal.

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