Method for measuring thermal resistance of a bonding interface layer
By using the laser scintillation method and the finite element thermal conductivity simulation model, the problem of accurately measuring the thermal resistance of the interface layer of semiconductor heterobonding was solved, realizing rapid and low-cost thermal resistance analysis, and supporting the improvement of bonding quality and the enhancement of device heat dissipation capability.
Patent Information
- Application Number
- CN202210069820.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-21
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2042-01-21
AI Technical Summary
Existing technologies cannot accurately measure and quickly assess the thermal resistance of semiconductor heterobonding interface layers, which makes it impossible to achieve rapid feedback and optimization of the bonding interface layers. Furthermore, commonly used methods are costly and time-consuming.
The thermal diffusivity and thermal conductivity of semiconductor material layers were measured using the laser flare method. The measured temperature rise curves were then fitted using a finite element thermal conductivity simulation model to calculate the thermal conductivity and thermal resistance of the bonding interface layer.
It enables accurate measurement and analysis of the thermal resistance of the bonding interface layer, with a short testing cycle and low cost, providing a basis for improving bonding quality and enhancing device heat dissipation capabilities.
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Figure CN114462273B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of thermal resistance measurement, and particularly relates to a thermal resistance measurement and analysis method for a bonding interface layer. BACKGROUND
[0002] Semiconductor chips are one of the core components of modern computing, and are crucial to the realization of modern computing architecture, power electronics, rewritable media, and data storage and transmission. With the increasing integration and miniaturization of electronic devices, the heat problem increasingly restricts further development. In addition to causing increased energy consumption and reduced energy efficiency, self-heating of semiconductor chips can also significantly reduce device performance and seriously degrade reliability, leading to failure. The structure of semiconductor chips often includes a heterojunction formed by bonding two or more different semiconductor materials, and current advanced bonding processes can minimize the thickness of the bonding interface layer. The quality of this micro-nano scale thick bonding interface layer determines the ability of the self-heating of the device to diffuse through the heterojunction, which is very important in high-power density electronic components and directly affects the junction temperature and reliability of the device during operation.
[0003] Currently, there is no accurate and effective characterization method for the thermal resistance of such semiconductor heterojunction bonding interface layer. One common method in the industry is to use electrical measurement, that is, to infer the junction temperature from subtle changes in electrical parameters, and to construct a structure function to fit the thermal resistance of each layer of material or structure in the device by measuring the curve of the junction temperature changing with time in the pulse operating state. This electrical method is based on the corresponding relationship between electrical parameters and temperature changes, as well as the corresponding relationship between the speed of change of junction temperature with time and the internal thermal resistance of the device, and is an indirect measurement technique. When dealing with semiconductor heterojunction bonding interface layers, the thickness of the bonding interface layer in advanced processes can be as low as nanometers, and its structure function cannot be constructed, so the interface thermal resistance cannot be accurately extracted using this electrical method, and it is often ignored in industry testing and analysis. In addition, the measurement object of the electrical measurement method is an electronic device, which requires device processing on the semiconductor heterostructure, resulting in a longer period required for thermal resistance evaluation, and making it impossible to achieve rapid evaluation, feedback, and subsequent interface optimization of the bonding interface layer. The above two reasons make the electrical measurement method unable to be widely applied to the measurement and analysis of the thermal resistance of semiconductor heterojunction bonding interface layers. In addition to the electrical measurement method, commonly used optical measurement methods such as micro-Raman and infrared thermal imaging are more suitable for evaluating and micro-thermal imaging of device junction temperature, and cannot accurately extract the thermal resistance of the heterojunction bonding interface layer through a substrate of several hundred microns thick. Moreover, these methods are also based on already processed electronic devices, and the period and cost required for thermal resistance evaluation are high. SUMMARY
[0004] The purpose of the present application is to provide a thermal resistance measurement and analysis method for a bonding interface layer, aiming to solve the problem of how to better measure and analyze the thermal resistance of a semiconductor bonding interface layer.
[0005] To achieve the above application purposes, the technical scheme adopted by the present application is as follows:
[0006] The present application provides a thermal resistance measurement and analysis method of a bonding interface layer, comprising the following steps:
[0007] A first semiconductor material layer and a second semiconductor material layer are provided, the thermal diffusivity α1 of the first semiconductor material layer and the thermal diffusivity α2 of the second semiconductor material layer are measured by using a laser flash method, and then the thermal conductivity λ1 = α1C p1 ρ1 of the first semiconductor material layer and the thermal conductivity λ2 = α2C p2 ρ2 of the second semiconductor material layer are obtained; wherein, C p1 and ρ1 are the heat capacity and density of the first semiconductor material in the first semiconductor material layer, C p2 and ρ2 are the heat capacity and density of the second semiconductor material in the second semiconductor material layer.
[0008] The first semiconductor material layer and the second semiconductor material layer are bonded by using a bonding material, and the bonding material forms a bonding interface layer; wherein, the heat capacity and density of the bonding material are C p0 and ρ0, and the thickness of the bonding interface layer is h0.
[0009] The first semiconductor material layer, the bonding interface layer and the second semiconductor material layer are taken as a whole as a sample, and a measurement temperature rise curve of the sample surface is obtained by using a laser flash method.
[0010] A finite element heat conduction simulation model with the same structure size as the sample is established; λ1, C p1 , ρ1, λ2, C p2 , ρ2, C p0 , ρ0 and the parameters of the laser flash method used when obtaining the measurement temperature rise curve are input into the finite element heat conduction simulation model, and then the thermal conductivity of the bonding interface layer is set as a variable to set different thermal conductivities of the bonding interface layer to fit the measurement temperature rise curve, when a fitting temperature rise curve matching the measurement temperature rise curve is obtained, the corresponding thermal conductivity λ0 of the bonding interface layer is obtained, and then the thermal resistance R θ of the interface bonding layer is calculated as h0 / λ0.
[0011] The thermal resistance measurement and analysis method of the bonding interface layer provided in the application first measures the thermal diffusion coefficients of the first semiconductor material layer and the second semiconductor material layer respectively by using the laser flash method before the sample is bonded, and then calculates the respective thermal conductivities. After the sample is bonded, the measurement temperature rise curve of the sample surface is obtained by using the laser flash method. Then, by inputting the foregoing parameters into a finite element heat conduction simulation model of the same structure size as the sample, the measurement temperature rise curve obtained in the foregoing experiment is fitted by transient thermal analysis of the finite element, and when the fitted temperature rise curve matching the measurement temperature rise curve is obtained, the thermal conductivity λ0 of the corresponding bonding interface layer is obtained. Finally, the thermal resistance R of the interface bonding layer can be calculated θ The thermal resistance measurement and analysis method of the application can more accurately measure and analyze the thermal resistance of the bonding interface layer, and provides a test analysis basis for improving the bonding quality and enhancing the heat dissipation capacity of the device. BRIEF DESCRIPTION OF DRAWINGS
[0012] In order to more clearly illustrate the technical solutions in the embodiments of the application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.
[0013] Figure 1 is a sample structure schematic diagram of the thermal resistance measurement and analysis method of the bonding interface layer provided in the embodiments of the application;
[0014] Figure 2 is a sample temperature rise curve schematic diagram of the thermal resistance measurement and analysis method of the bonding interface layer provided in the embodiments of the application. DETAILED DESCRIPTION
[0015] In order to make the technical problems, technical solutions and beneficial effects of the application more clearly understood, the application will be further described in detail in combination with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the application and not to limit the application.
[0016] In the application, the term "and / or" describes the association relationship of the associated objects, which means that there can be three kinds of relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. Wherein A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after it.
[0017] In the present application, "at least one" means one or more, "multiple times" means two or more than two times. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items.
[0018] It should be understood that the size of the sequence number of the above-mentioned processes in various embodiments of the present application does not mean the order of execution, and part or all of the steps can be executed in parallel or in sequence, and the execution order of the processes should be determined according to its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0019] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.
[0020] The weight of the related components mentioned in the embodiments of the present application can not only refer to the specific content of each component, but also represent the weight ratio relationship between each component, therefore, as long as the content of the related components in the embodiments of the present application is enlarged or reduced in proportion, it is within the scope disclosed in the embodiments of the present application. Specifically, the mass mentioned in the embodiments of the present application can be μg, mg, g, kg and other mass units commonly known in the chemical field.
[0021] The terms "first", "second" are only used for description purposes, to distinguish objects such as substances from each other, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. For example, without departing from the scope of the embodiments of the present application, the first XX can also be referred to as the second XX, and similarly, the second XX can also be referred to as the first XX. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features.
[0022] The embodiments of the present application provide a method for measuring and analyzing the thermal resistance of a bonding interface layer, comprising the following steps:
[0023] S01: providing a first semiconductor material layer and a second semiconductor material layer, measuring the thermal diffusivity α1 of the first semiconductor material layer and the thermal diffusivity α2 of the second semiconductor material layer by laser flash method, and then obtaining the thermal conductivity λ1 = α1C p1 ρ1 of the first semiconductor material layer, and the thermal conductivity λ2 = α2C p2 ρ2 of the second semiconductor material layer; wherein, C p1 and ρ1 are the heat capacity and density of the first semiconductor material in the first semiconductor material layer, Cp2 and ρ2 are the heat capacity and density of the second semiconductor material in the second semiconductor material layer, respectively;
[0024] S02: bonding the first semiconductor material layer and the second semiconductor material layer by using a bonding material, the bonding material forming a bonding interface layer; wherein the heat capacity and density of the bonding material are C p0 and ρ0, and the thickness of the bonding interface layer is h0;
[0025] S03: taking the first semiconductor material layer, the bonding interface layer and the second semiconductor material layer as a whole as a sample, and obtaining a measured temperature rise curve of the surface of the sample by using a laser flash method;
[0026] S04: establishing a finite element heat conduction simulation model with the same structure size as the sample; inputting λ1, C p1 , ρ1, λ2, C p2 , ρ2, C p0 , ρ0 and laser parameters of the laser flash method used in obtaining the experimental measured temperature rise curve into the finite element heat conduction simulation model, and then setting different thermal conductivities of the bonding interface layer as variables to fit the measured temperature rise curve, when a fitted temperature rise curve matching the measured temperature rise curve is obtained, the thermal conductivity λ0 of the corresponding bonding interface layer is obtained, and then the thermal resistance R θ of the interface bonding layer is calculated as h0 / λ0.
[0027] The thermal resistance measurement and analysis method of the bonding interface layer provided by the embodiments of the present application measures and analyzes the thermal resistance of the semiconductor bonding interface layer through semiconductor interface structure design and bonding process, and combines the laser flash heat conduction test technology and the transient heat conduction simulation of the finite element simulation software. Specifically, the thermal diffusivity of the first semiconductor material layer and the second semiconductor material layer is measured by using the laser flash method before the sample is bonded, and then the thermal conductivity of each is calculated. The measured temperature rise curve of the surface of the sample is obtained by using the laser flash method after the sample is bonded. Then, by inputting the foregoing parameters into the finite element heat conduction simulation model with the same structure size as the sample, the transient heat analysis of the finite element is used to fit the measured temperature rise curve obtained by the foregoing experiment, when a fitted temperature rise curve matching the measured temperature rise curve is obtained, the thermal conductivity λ0 of the corresponding bonding interface layer is obtained, and finally the thermal resistance R θ=h0 / λ0. The thermal resistance measurement and analysis method of this application establishes a finite element thermal conductivity simulation model for the semiconductor bonding structure. By comparing and fitting the model with the measured temperature rise curve from the experiment, the thermal resistance of the bonding interface layer is characterized and quantitatively analyzed. This eliminates the need for thermal resistance testing on the fabricated device, resulting in a short testing cycle and low cost. Moreover, this thermal resistance measurement and analysis method can accurately measure and analyze the thermal resistance of the bonding interface layer, providing a basis for testing and analysis to improve the bonding quality of semiconductors and enhance the heat dissipation capability of devices.
[0028] In this application embodiment, a suitable test sample can be pre-designed before performing thermal resistance measurement and analysis of the bonding interface layer. Specifically, if there are... Figure 1 As shown, the sample can be a structure consisting of a stacked first semiconductor material layer, a bonding interface layer, and a second semiconductor material layer. In this sample structure, the first and second semiconductor material layers can be on the micrometer scale, while the bonding interface layer can be on the micro-nano scale. Thus, embodiments of this application can detect the thermal resistance of the bonding interface within semiconductor materials with thicknesses on the millimeter or hundred-micrometer scale, thereby extracting the thermal resistance of the bonding interface layer with a thickness on the micro-nano scale from a multilayer material with a semiconductor bonding structure. This thermal resistance measurement and analysis method is applicable to the thermal resistance measurement and analysis of semiconductor heterogeneous bonding interface layers as well as semiconductor homogeneous bonding interface layers.
[0029] The sample shape can be circular or square. To better meet the fixture requirements of the laser flare thermal conductivity test instrument, the sample can generally include, but is not limited to, circular samples with a diameter of 12.7±0.5mm and square samples of 10*10mm.
[0030] In some embodiments, the total thickness of the sample is 0.2 mm to 3 mm. Further, in the sample, the thickness of the bonding interface layer is generally h0 = 50 nm to 10 μm, the thickness of the first semiconductor material layer is generally h1 = 100 μm to 1000 μm, and the thickness of the second semiconductor material layer is generally h2 = 100 μm to 1000 μm.
[0031] In some embodiments, the first semiconductor material in the first semiconductor material layer and the second semiconductor material in the second semiconductor material layer can be different materials or the same material, and do not affect the analysis results of the thermal resistance measurement. The first semiconductor material and the second semiconductor material can be organic semiconductor materials or inorganic semiconductor materials, and can be selected from commonly used inorganic semiconductor materials, for example, the first semiconductor material is selected from at least one of semiconductor materials such as diamond, silicon, germanium, indium phosphide, gallium arsenide, gallium nitride, and silicon carbide. The second semiconductor material is selected from at least one of semiconductor materials such as diamond, silicon, germanium, indium phosphide, gallium arsenide, gallium nitride, and silicon carbide. The bonding material bonding the first semiconductor material layer and the second semiconductor material layer can be at least one of metal materials, oxide materials, and organic polymer materials (organic polymer materials), for example, the bonding material is selected from at least one of gold, silver, and copper.
[0032] The heat capacity and density of the semiconductor material and the bonding material can be directly obtained from literature data, and the thermal diffusivity of the semiconductor material layer can be obtained by laser flash method, and then the thermal conductivity λ = αC p ρ is calculated. After the sample structure size is designed, the materials are selected, and the relevant data are searched, measured, and calculated, the thermal resistance measurement step of the bonding interface layer can be started.
[0033] In step S01, the thermal diffusivity measurement step before the sample is bonded. The thermal diffusivity α1 of the first semiconductor material layer and the thermal diffusivity α2 of the second semiconductor material layer are measured by laser flash method, and then the thermal conductivities λ1 = α1C p1 ρ1 and λ2 = α2C p2 ρ2 (C p1 , ρ1, C p2 , and ρ2 can be searched from literature); the thermal diffusivity can be measured by laser flash method.
[0034] Further, when the thermal diffusivity α1 of the first semiconductor material layer and the thermal diffusivity α2 of the second semiconductor material layer are measured by laser flash method, multiple measurements and multiple site measurements can be performed, and then the average value is calculated, which can increase the accuracy of the test.
[0035] In step S02, the sample bonding step. The first semiconductor material layer and the second semiconductor material layer can be bonded by using existing appropriate bonding process, so as to obtain a certain micro-nano scale thickness of the heterogeneous or homogeneous bonding interface layer. After the thickness h0 of the bonding interface layer is determined, the thermal resistance R θ= h0 / λ0; the heat capacity and density of the bonding material can be obtained by investigating related information.
[0036] In step S03, the experimental step of measuring the temperature rise curve after the sample is bonded. The laser flash method can be used to obtain the measurement temperature rise curve of the sample surface. Specifically, the surface of the sample is heated by a pulsed laser (which can be the upper surface or the lower surface. When the pulsed laser heats the surface, the temperature rises, the heat is transferred to the interior of the semiconductor material layer, and then transferred to the interior of the other semiconductor material layer through the bonding interface layer), and then the temperature change of the other surface of the sample is detected by infrared (forming a temperature-time curve), so that the transient signal curve of the overall sample detection surface, i.e. the measurement temperature rise curve, can be measured.
[0037] In step S04, the step of establishing the finite element heat conduction simulation model and fitting the temperature rise curve. Through fitting, the thermal conductivity λ0 of the bonding interface layer can be obtained, and then the thermal resistance R0 of the interface bonding layer can be calculated. θ = h0 / λ0.
[0038] Through the structural parameters of the sample in the early stage (including the thickness of the two semiconductor material layers and the intermediate bonding interface layer and the size of the sample), a finite element heat conduction simulation model, i.e. a finite element transient heat conduction model, can be designed. Specifically, a finite element heat conduction simulation model with the same size as the sample structure can be constructed in the finite element model software. After inputting relevant information (such as sample material parameters λ1, C p1 1, ρ1, λ2, C p2 2, ρ2, C p0 0 and the parameters of the laser flash method used to obtain the measurement temperature rise curve) into the model, the transient heat analysis method is used to fit the measurement temperature rise curve obtained in the previous experiment on the surface of the model, where the parameters of the laser flash method used to obtain the measurement temperature rise curve can be the laser parameters of the pulsed laser used to heat the sample.
[0039] Specifically, by obtaining the laser parameters used to obtain the measurement temperature rise curve, the laser parameters are coupled to the lower surface material of the finite element transient heat conduction model (the incident laser heating surface), different thermal conductivities of the bonding interface layer are set, and then the temperature curve of the upper surface (the detection laser measurement surface) with time is obtained by finite element software simulation calculation. When the simulated fitting temperature rise curve and the measured temperature rise curve obtained in the experiment coincide, the thermal resistance of the bonding interface layer used in the finite element heat conduction simulation model can be obtained.
[0040] The detailed fitting process includes: designing a finite element thermal conductivity simulation model based on the sample structure parameters; inputting material parameters such as the density, heat capacity, and thermal diffusivity of the first and second semiconductor materials, as well as the density and heat capacity of the bonding material, into the finite element thermal conductivity simulation model; coupling the parameters of the laser flare method used to obtain the measured temperature rise curve, such as pulsed laser parameters, into the finite element thermal conductivity simulation model; setting the lower surface as the heating surface in the model; setting different thermal conductivityes of the bonding interface layer in the model; and setting the solution to calculate the temperature data of the measurement surface (i.e., the probe laser measurement surface) over time. When the fitted temperature rise curve of the upper surface obtained by fitting the thermal conductivity of a certain bonding interface layer matches the experimentally measured temperature rise curve, it can be considered that the thermal conductivity of the bonding interface layer used in the fitting is the actual thermal conductivity of the bonding interface layer of the structure.
[0041] It should be noted that the measured temperature rise curves and fitted temperature rise curves mentioned above refer to the transient signal curves of the sample surface, such as... Figure 2 The difference is that the measured temperature rise curve refers to the transient signal curve of the measurement surface obtained by laser flare thermal conductivity measurement during the actual experiment, while the fitted temperature rise curve is obtained by fitting the measured temperature rise curve obtained by the aforementioned experiment through finite element transient thermal analysis. When a fitted temperature rise curve that matches the measured temperature rise curve is obtained, the corresponding thermal conductivity λ0 of the bonding interface layer is obtained, and then the thermal resistance R of the interface bonding layer is calculated. θ =h0 / λ0. If the fitted temperature rise curve does not match the measured temperature rise curve, continue to set different thermal conductivities of the bonding interface layer until the fitted temperature rise curve formed by a certain thermal conductivity can match the measured temperature rise curve.
[0042] In some embodiments, the square of the correlation coefficient between the fitted temperature rise curve and the measured temperature rise curve is greater than 0.9, so that the fitted temperature rise curve can better match the measured temperature rise curve. For example, the square of the correlation coefficient is 0.9, 0.92, 0.95, 0.99, etc. Optimally, when the square of the correlation coefficient between the fitted temperature rise curve and the measured temperature rise curve is 1, that is, the fitted temperature rise curve and the measured temperature rise curve completely overlap, the obtained thermal resistance R... θ =h0 / λ0 is the most accurate.
[0043] The following description is based on specific embodiments.
[0044] Example 1
[0045] Take the thermal resistance analysis of the gold layer (i.e. the bonding interface layer) in the wafer-level diamond-silicon hetero-bonding in microelectronic devices as an example, first design a sample with a three-layer structure from top to bottom according to the actual size of the gold interface in the diamond-silicon bonding in the device: diamond layer-gold layer-silicon layer; wherein the thickness of the diamond layer h1 is 0.405 mm, the thickness of the silicon layer h2 is 0.38 mm, the thickness of the gold layer h0 is 120 nm, and the sample size is a square of 10 mm*10 mm. After designing the sample size, the following operations are performed.
[0046] Step one: Obtain the heat capacity C of the diamond from the literature p1 = 0.538 J / gK, the density ρ1 = 3.515 g / cm 3 , and the heat capacity C of the silicon p2 = 0.699 J / gK, the density ρ2 = 2.33 g / cm 3 , then calculate the thermal conductivity λ1 = α1C p1 ρ1 = 1480 W / mK of the diamond layer, and the thermal conductivity λ2 = α2C p2 ρ2 = 63 W / mK of the silicon layer;
[0047] Step two: After obtaining the above parameters of the diamond layer and the silicon layer, the diamond layer and the silicon layer are bonded by a gold material, and the gold material forms a gold layer (i.e. a bonding interface layer); wherein the heat capacity C of the gold material p0 = 0.129 J / gK, the density ρ0 = 19.32 g / cm 3 ;
[0048] Step three: The entire diamond layer, gold layer and silicon layer are regarded as a sample, and the sample is measured by a laser flash method (a pulsed laser heats the lower surface of the sample, i.e. the lower surface of the silicon layer, to cause the temperature to rise, and an infrared temperature measuring instrument is used to measure the temperature of the upper surface of the sample, i.e. the upper surface of the diamond layer, as a function of time), so that the temperature rise curve can be obtained.
[0049] Step four: A finite element heat conduction simulation model consistent with the size of the sample is established, and the previously obtained parameters are input (including λ1, C p1 , ρ1, λ2, C p2 , ρ2, C p0, and parameters of the heating pulse laser), and then setting different thermal conductivities of the gold layer, fitting a fitting temperature rise curve (the square of the correlation coefficient of the fitting temperature rise curve and the measured temperature rise curve obtained above reaches 0.9) that matches the measured temperature rise curve through the finite element transient thermal analysis, so that it is known that the gold layer thermal conductivity λ0 corresponding to the fitting temperature rise curve is about 0.5 W / mK, in combination with the thickness h0=120 nm of the gold layer, and then the thermal resistance R of the gold layer is calculated θ = h0 / λ0, and it is known that the thermal resistance of the bonding interface layer, i.e., the gold layer, is about 2.4 x 10 -7 m 2 K / W.
[0050] Example 2
[0051] Taking the thermal resistance analysis of the silver layer (i.e., the bonding interface layer) of wafer-level diamond-silicon heterogeneous bonding in microelectronic devices as an example, first, a sample with a three-layer structure from top to bottom, i.e., a diamond layer-silver layer-silicon layer, is designed according to the actual size of the silver interface of the diamond-silicon bonding in the device; wherein the thickness h1 of the diamond layer is 0.405 mm, the thickness h2 of the silicon layer is 0.38 mm, and the thickness h0 of the silver layer is 200 nm; the sample size is a square of 10 mm*10 mm; after the sample size is designed, the following operations are performed.
[0052] Step one: The heat capacity C p1 of the diamond obtained from the literature is 0.538 J / gK, the density ρ1 of the diamond is 3.515 g / cm 3 , and the heat capacity C p2 of the silicon is 0.699 J / gK, and the density ρ2 of the silicon is 2.33 g / cm 3 ; the thermal diffusivity α1 of the diamond layer and the thermal diffusivity α2 of the silicon layer are measured by the laser flash method, and then the thermal conductivity λ1 of the diamond layer is calculated as λ1=α1C p1 ρ1=1480 W / mK, and the thermal conductivity λ2 of the silicon layer is calculated as λ2=α2C p2 ρ2=63 W / mK;
[0053] Step two: After obtaining the above parameters of the diamond layer and the silicon layer, the diamond layer and the silicon layer are bonded by a bonding process using silver paste material to form a silver layer (i.e., a bonding interface layer); wherein the heat capacity C p0 of the silver material is 0.232 J / gK, and the density ρ0 of the silver material is 10.49 g / cm 3 ;
[0054] Step three:The diamond layer, the silver layer and the silicon layer are regarded as a sample as a whole, and the sample is measured by using a laser flash method (a lower surface of the sample, i.e. a lower surface of the silicon layer, is heated by a pulsed laser to increase the temperature, and an infrared temperature measuring instrument is used to measure the temperature of an upper surface of the sample, i.e. an upper surface of the diamond layer, changing with time), so that a temperature rise curve can be obtained.
[0055] Step four: A finite element heat conduction simulation model consistent with the size specification of the sample is established, and the parameters obtained before are input (including λ1, C p1 1, ρ1, λ2, C p2 2, C p0 0, and parameters of the heating pulsed laser), then different thermal conductivities of the gold layer are set, and a fitting temperature rise curve matching the measured temperature rise curve is obtained by transient thermal analysis of the finite element (the square of the correlation coefficient of the fitting temperature rise curve and the measured temperature rise curve is 0.9), so that it can be known that the thermal conductivity λ0 of the silver layer corresponding to the fitting temperature rise curve is about 0.145 W / mK, and the thickness h0 of the silver layer is 200 nm, then the thermal resistance R θ of the gold layer is calculated as h0 / λ0, and it can be known that the thermal resistance of the bonding interface layer, i.e. the gold layer, is about 1.38×10 -6 m 2 K / W.
[0056] The above only describes the preferred embodiments of the present application and is not used to limit the present application, and any modification, equivalent replacement and improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims
1. A method of thermal resistance measurement analysis of a bonding interface layer, characterized by, The bonding interface layer is a semiconductor hetero-bonding interface layer, comprising the following steps: The first semiconductor material layer and the second semiconductor material layer are provided, the thermal diffusion coefficient α1 of the first semiconductor material layer and the thermal diffusion coefficient α2 of the second semiconductor material layer are measured by using a laser flash method, and then the thermal conductivity λ1 of the first semiconductor material layer is obtained as λ1 = α1C p1 ρ1, and the thermal conductivity λ2 of the second semiconductor material layer is obtained as λ2 = α2C p2 ρ2. wherein C p1 and pi are the heat capacity and density, respectively, of a first semiconductor material in the first semiconductor material layer, C p2 and p2 are the heat capacity and density, respectively, of a second semiconductor material in the second semiconductor material layer, the first semiconductor material and the second semiconductor material being different materials; The first semiconductor material layer and the second semiconductor material layer are bonded by a bonding material, and the bonding material forms a bonding interface layer; wherein the heat capacity and the density of the bonding material are C p0 and p0, respectively, and the thickness of the bonding interface layer is h0. The first semiconductor material layer, the bonding interface layer and the second semiconductor material layer are taken as a sample, and a measured temperature rise curve of a surface of the sample is obtained by using a laser flash method. establishing a finite element heat conduction simulation model with same structure size as the sample; inputting λ1, C p1 , ρ1, λ2, C p2 , ρ2, C p0 , ρ0 and parameters of the laser flash method used in obtaining the measured temperature rise curve into the finite element heat conduction simulation model, then setting different thermal conductivities of the bonding interface layer as variables to fit the measured temperature rise curve, when a fitting temperature rise curve matching the measured temperature rise curve is obtained, the thermal conductivity λ0 of the corresponding bonding interface layer is obtained, and then the thermal resistance R θ of the bonding interface layer is calculated = h0 / λ0; When a fitting temperature rise curve matching the measured temperature rise curve is obtained, the square of a correlation coefficient of the fitting temperature rise curve and the measured temperature rise curve is above 0.
9.
2. The thermal resistance measurement analysis method according to claim 1, wherein The step of obtaining the measured temperature rise curve of the surface of the sample by using the laser flash method comprises the following steps: heating one surface of the sample by using a pulsed laser, and then detecting temperature change of another surface of the sample by using infrared rays to obtain the measured temperature rise curve.
3. The thermal resistance measurement analysis method according to claim 2, wherein The parameters of the laser flash method used when obtaining the measured temperature rise curve comprise laser parameters of the pulsed laser.
4. The thermal resistance measurement analysis method of claim 1, wherein, In the step of measuring the thermal diffusivity α1 of the first semiconductor material layer and the thermal diffusivity α2 of the second semiconductor material layer by using the laser flash method, multiple measurements and multiple site measurements are performed, and then an average value is obtained.
5. The thermal resistance measurement analysis method of claim 1, wherein, The thickness of the sample is 0.2mm-3mm; and / or, The sample is a circular sample or a square sample.
6. The thermal resistance measurement analysis method according to claim 5, wherein The thickness h0 of the bonding interface layer is 50nm-10μm, the thickness h1 of the first semiconductor material layer is 100μm-1000μm, and the thickness h2 of the second semiconductor material layer is 100μm-1000μm.
7. The thermal resistance measurement analysis method according to any one of claims 1 to 6, characterized by, The first semiconductor material is selected from at least one of semiconductor materials diamond, silicon, germanium, indium phosphide, gallium arsenide, gallium nitride and silicon carbide.
8. The thermal resistance measurement analysis method according to any one of claims 1 to 6, wherein The second semiconductor material is selected from at least one of semiconductor materials diamond, silicon, germanium, indium phosphide, gallium arsenide, gallium nitride and silicon carbide.
9. The thermal resistance measurement analysis method according to any one of claims 1 to 6, wherein, The bonding material is selected from at least one of metal materials, oxide materials and organic polymer materials.
Citation Information
Patent Citations
Microelectronic device nanometer interface bonding layer thermal resistance analyzing method
CN106682279A