Data storage method and device

Abstract

The embodiments of this specification provide a data storage method and apparatus. The data storage method includes: storing the received target data to be stored through a preset processing method; in the case of determining that abnormal power failure occurs during the data storage process, determining the target data to be cached during the data storage process based on the pre-configured capacitance, and recording the power failure position of the target data to be cached; storing the target data to be cached and the power failure position in a cache pool based on a preset storage method, which can not only prevent data loss caused by power failure, but also facilitate subsequent obtaining of the target data to be cached and the power failure position from the cache pool to continue data storage to meet the requirements of actual applications.

Description

Technical Field

[0001] The embodiments of this specification relate to the field of computer technology, and particularly to a data storage method. Background Art

[0002] With the development of various flash technologies, due to their respective structures and high-capacity characteristics, they have become the focus of future applications and research. For example, QLC NAND refers to NAND flash memory in which each storage unit can store 4 bits of data, and 3D design refers to a chip design that realizes three-dimensional stacking of multiple layers in the vertical direction of a silicon wafer. Using QLC particles in a fixed hard disk can significantly reduce costs.

[0003] However, due to the complexity of storage, once a power failure occurs in the server, currently, data that has not been stored in the storage unit cannot be processed, which may lead to data loss and affect the realization of actual application requirements. Summary of the Invention

[0004] In view of this, the embodiments of this specification provide a data storage method. One or more embodiments of this specification also relate to a data storage device, a computing device, a computer-readable storage medium, and a computer program to solve the technical defects existing in the prior art.

[0005] According to the first aspect of the embodiments of this specification, a data storage method is provided, including:

[0006] Storing the received target data to be stored through a preset processing method;

[0007] When it is determined that an abnormal power failure occurs during the data storage process, determining the target data to be cached during the data storage process based on a pre-configured capacitance, and recording the power failure position of the target data to be cached;

[0008] Storing the target data to be cached and the power failure position in a cache pool based on a preset storage method.

[0009] According to the second aspect of the embodiments of this specification, a data storage device is provided, including:

[0010] A data storage module configured to store the received target data to be stored through a preset processing method;

[0011] A power failure processing module configured to determine the target data to be cached during the data storage process based on a pre-configured capacitance when it is determined that an abnormal power failure occurs during the data storage process, and record the power failure position of the target data to be cached;

[0012] A data caching module, configured to store the target data to be cached and the power-off position in a cache pool based on a preset storage method.

[0013] According to a third aspect of the embodiments of the present specification, a computing device is provided, including:

[0014] A memory and a processor;

[0015] The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. Wherein, when the processor executes the computer-executable instructions, the steps of the data storage method are implemented.

[0016] According to a fourth aspect of the embodiments of the present specification, a computer-readable storage medium is provided, which stores computer-executable instructions, and when the instructions are executed by a processor, the steps of the data storage method are implemented.

[0017] According to a fifth aspect of the embodiments of the present specification, a computer program is provided. Wherein, when the computer program is executed on a computer, the computer is made to execute the steps of the above data storage method.

[0018] In an embodiment of the present specification, the received target data to be stored is stored through a preset processing method; in the case of abnormal power-off during the process of determining the data storage, the target data to be cached is determined during the data storage process based on a pre-configured capacitance, and the power-off position of the target data to be cached is recorded; the target data to be cached and the power-off position are stored in a cache pool based on a preset storage method.

[0019] Specifically, in the case of abnormal power-off during the data storage process, through a pre-configured capacitance, it supports the caching process of the target data to be cached, and at the same time records the power-off position of the target data to be cached, so as to facilitate the subsequent process of continuing to store the target data to be cached according to the power-off position. This can not only prevent data loss caused by power-off, but also facilitate obtaining the target data to be cached and the power-off position from the cache pool to continue the data storage process to meet the requirements of actual applications. Description of the Drawings

[0020] Figure 1 is a flowchart of a data storage method provided by an embodiment of the present specification;

[0021] Figure 2 is a schematic diagram of the double-write characteristic logic processing of a data storage method provided by an embodiment of the present specification applied to a QLC data storage system;

[0022] Figure 3It is a flowchart for transferring data in a non-aligned data pool to the WBG layer for processing in a data storage method provided by an embodiment of this specification;

[0023] Figure 4 It is a schematic flowchart of intelligent data splitting and stacking in a data storage method provided by an embodiment of this specification;

[0024] Figure 5 It is a schematic diagram of the processing process of a data storage method provided by an embodiment of this specification;

[0025] Figure 6 It is a schematic structural diagram of a data storage device provided by an embodiment of this specification;

[0026] Figure 7 It is a structural block diagram of a computing device provided by an embodiment of this specification. Detailed implementation manners

[0027] Many specific details are set forth in the following description in order to provide a thorough understanding of this specification. However, this specification can be implemented in many other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the connotation of this specification. Therefore, this specification is not limited by the specific implementations disclosed below.

[0028] The terms used in one or more embodiments of this specification are for the purpose of describing specific embodiments only and are not intended to limit one or more embodiments of this specification. The singular forms "a", "the", and "said" used in one or more embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the term "and / or" used in one or more embodiments of this specification refers to and includes any or all possible combinations of one or more of the associated listed items.

[0029] It should be understood that although the terms first, second, etc. may be used in one or more embodiments of this specification to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of one or more embodiments of this specification, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "when" or "upon" or "in response to determining".

[0030] First, the noun terms related to one or more embodiments of this specification are explained.

[0031] QLC (Quad-level cells): Four-level cells, each QLC cell can store 4 bits of data.

[0032] NAND (computer flash memory device): NAND flash memory is a storage device similar to a hard drive.

[0033] QLC NAND: A medium that does not lose information when power is off. A single cell can store four states.

[0034] Double Write: The programming algorithm of the physical page in NAND. Each WL needs to be overlapped and written twice to complete normal particle programming.

[0035] WL: word line, is a segmentation dimension for data management in NAND cells. From the firmware point of view, the next WL of QLC contains 4 pages of data.

[0036] BAND: The management strength of the physical blocks in the SSD. Generally, a row of physical blocks with the same block number will be managed as a group.

[0037] WBG: Write data management unit. All backend dies with the same WL number under the same block number form a management unit.

[0038] Solid-state drive: A hard drive that uses a new type of storage medium, which is different from traditional mechanical hard drives that rely on motors to seek and read and write data.

[0039] QLC NAND technology is a medium in which information is not lost when power is off. Due to its cost advantages and particle density advantages, major mainstream manufacturers are also launching various series of QLC NAND. At the same time, SSDs using QLC NAND play a key role in reducing the cost of the entire disk and further reducing the cost of server storage. At the same time, a series of problems based on the special programming mode of QLC NAND, low bandwidth, and increased capacity of a single package have led to new methods in firmware design. The embodiments of this specification discuss NAND particles. Since different NAND particles have different characteristics and different support strategies, capacitors are selected as a double-write cache solution based on the controllable data volume under BICS5 dual planes.

[0040] When storing data with the double write feature, if an abnormal power outage occurs, the preset capacitor configuration is used to support the continued storage of data that has not completed the double write in the SLC pool, so that after the power is turned on, the data that has not completed the double write can be directly obtained from the SLC pool and then continue to be stored in the SSD disk. That is, a large capacitor is used to support data power failure, which has solved the problems of SLCOP consumption and bandwidth consumption.

[0041] In this specification, a data storage method is provided. This specification also relates to a data storage device, a computing device, a computer-readable storage medium, and a computer program, which will be described in detail one by one in the following embodiments.

[0042] Figure 1 The flowchart of a data storage method provided according to an embodiment of this specification is shown, which specifically includes the following steps.

[0043] It should be noted that the data storage method provided in the embodiments of this specification can be applied to a QLC NAND data storage system. Based on the characteristics of QLC flash memory, the data storage method will be described in detail. However, the data storage method is not limited to being applied in a QLC NAND data storage system and can also be applied to other data storage systems, which will not be specifically limited in the embodiments of this specification.

[0044] Step 102: Store the received target data to be stored through a preset processing method.

[0045] Among them, the target data to be stored can be understood as the target data to be stored in the NAND flash memory cells. In the embodiments of this specification, there is no limit on the data volume of the target data to be stored.

[0046] The preset processing method can be understood as having different data processing methods for different data storage characteristics. For example, during the process of caching QLC data, based on the characteristics of the programming algorithm of the physical pages in the NAND, the preset processing method can refer to a double-write processing method.

[0047] Specifically, the data storage method provided in the embodiments of this specification can be applied to a QLC data storage system, and the preset processing method includes a double-write logic processing method.

[0048] See Figure 2 , Figure 2 which shows a schematic diagram of the double-write characteristic logic processing of a data storage method provided in the embodiments of this specification applied to a QLC data storage system.

[0049] Figure 2 In the QLC NAND, each physical layer has four WLs, as Figure 1Layer 0 has WL0, WL1, WL2, and WL3, and there are page0, page1, page2, and page3 between each WL. Further, each physical WL needs to complete overlapping double writes to ensure data solidification. After the four WLs in the current layer complete the first programming, the firmware side needs to initiate the first programming of the four WLs in the second layer before initiating the second programming of the first layer. After alternating programming, the four WLs in a layer are considered programmed.

[0050] It should be noted that the management unit of the NAND medium inside the SSD is such that one LUN contains 2 planes, and each plane has several blocks. In practical applications, it is used in the form of a whole row according to the supper block group. The specific number of LUNs from LUN0 to LUN*** provides the number of blocks in a row for the data storage method provided in the embodiments of this specification. Among them, the embodiments of this specification do not limit the number of LUNs. There are multiple layers in a physical block, and each layer has four super pages. Layer 0 and layer 1 are in an upper and lower relationship, and there are more than 100 layers in a physical block. There are thousands of blocks in a plane, and there are 2 planes in a LUN. A row of blocks with the same block number in each plane forms an SPB, which is a firmware management method. Order is the order of NAND programming and is a requirement for the operation steps.

[0051] Based on the above double-write feature, when data is stored in the NAND particles, it will consume a certain storage time. Then, during the above storage process, if the server loses power and the double-write programming is not completed, how to store the data to be stored while ensuring data is not lost and complete the storage process of the data to be stored will be specifically described in the following embodiments.

[0052] In order to quickly store the target data to be stored in the NAND particles, the data storage method provided in the embodiments of this specification realizes the rapid disk drop of the target data to be stored and completes data storage by intelligently splitting and stacking the target data to be stored. Specifically, the data storage of the received target data to be stored through a preset storage method includes:

[0053] Split the received target data to be stored and process the split target data to obtain target aligned data;

[0054] Based on a preset processing method, perform data stacking processing on the target aligned data to obtain target storage data, and store the target storage data in the storage unit.

[0055] Among them, the target alignment data can be understood as data with a fixed data volume size after splitting the target data to be stored. For example, the target data to be stored of 64 KB is the target alignment data.

[0056] The target storage data can be understood as the data obtained after performing double-write logic alternating programming processing on the target alignment data.

[0057] In specific implementation, the server can split the target data to be stored received, process the split target data respectively to obtain the target alignment data; then perform stacking logic processing on the target alignment data according to the double-write logic processing method to obtain the target storage data that can be stored in the NAND particle medium, and then store the target storage data in the NAND particle medium.

[0058] In practical applications, the target data to be stored from the driving end will be split by the driver program in the disk, and the split target data will be placed in the first-level cache unit for processing to obtain the target alignment data. Then, the target alignment data will be transferred to the second-level cache, and data stacking processing will be performed on the target alignment data in the WBG management layer according to the double-write logic processing to obtain the target storage data, and then the target storage data will be stored in the NAND particle medium.

[0059] The data storage method provided by the embodiments of this specification splits the target data to be stored to obtain the target alignment data, and then uses the processing method with the double-write characteristic to perform stacking processing on the target alignment data, so as to quickly obtain the target storage data, which is convenient for quickly storing the target data to be stored to the disk subsequently.

[0060] In order to quickly perform double-write logic processing on the target data to be stored, the target data to be stored can be split to determine the alignment data and the non-alignment data, so as to be able to perform logic processing on the alignment data and quickly realize data disk writing, and also be able to process the non-alignment data to facilitate subsequent disk writing operations; specifically, splitting the received target data to be stored and processing the split target data to obtain the target alignment data includes:

[0061] Splitting the received target data to be stored to obtain the first alignment data and the non-alignment data, and performing merging processing on the non-alignment data based on a preset data alignment method to obtain the second alignment data;

[0062] Determining the target alignment data based on the first alignment data and the second alignment data.

[0063] The first aligned data may be understood as data to be stored that meets the data size after the target data to be stored is split. For example, 64KB of data to be stored may be understood as 64KB aligned data.

[0064] Non-aligned data can be understood as data to be stored that does not meet a certain data size after data splitting. For example, data to be stored that is less than 64KB can be understood as non-aligned data.

[0065] The second aligned data may be understood as aligned data obtained after merging a plurality of non-aligned data.

[0066] The target alignment data can be understood as the alignment data obtained after the target data to be stored is split and merged, and can be placed in the WBG management layer for data logical accumulation.

[0067] In actual applications, the data from the driver end will be split by the disk program to obtain the first aligned data and the unaligned data. The purpose of data splitting is, first, to make the aligned data fall to the disk as soon as possible. At the same time, the unaligned data falling to the disk will involve the read-write modification process, which will slow down the entire double write process and cause the data accumulation to continue to increase. The second unaligned data will try to wait for the subsequent new data to be gathered and merged to avoid blocking the double write process too early. Therefore, after the unaligned data is merged to obtain the second aligned data, the first aligned data and the second aligned data can together constitute the target aligned data.

[0068] The data storage method provided in the embodiments of the present specification splits the target data to be stored, determines the aligned data and the unaligned data, and then processes the unaligned data, and finally obtains the target aligned data, thereby ensuring that the aligned data can quickly perform double write logic processing, so as to achieve rapid storage of the target data to be stored.

[0069] Regarding the process of how to process the non-aligned data to obtain the aligned data, the data storage method provided in the embodiment of this specification obtains the aligned data from a plurality of non-aligned data through the mode of logical block addressing of the data; specifically, the non-aligned data is merged based on the preset data alignment mode to obtain the second aligned data, including:

[0070] Sending the unaligned data to an unaligned data pool, and determining a data block address where the unaligned data is stored in the unaligned data pool;

[0071] The non-aligned data stored in the same data block address are merged, and the merged non-aligned data are used as the second aligned data.

[0072] Among them, the non-aligned data pool can be understood as a module for performing data merging processing on non-aligned data, and the processed data in the non-aligned data pool can be transferred to the aligned data pool for subsequent processing. The processing method of the aligned data pool can be referred to the description of the subsequent embodiments.

[0073] In practical applications, when the non-aligned data pool receives non-aligned data, it can first determine the data block address where the non-aligned data is stored in the non-aligned data pool, which can also be understood as a specific data segment, and merge the non-aligned data stored in the same data segment until the data volume size of the merged non-aligned data meets the preset data volume. For example, when the non-aligned data meets the 64KB size mentioned in the above embodiments, it can be regarded as the second aligned data. For example, in the storage address, 0KB to 64KB is data segment 1, and 64KB to 128KB is data segment 2. Then, if the data volume size of the non-aligned data 1 after data splitting of the target data to be stored is 4KB, and the data volume size of the non-aligned data 2 is 12KB, then both the non-aligned data 1 and the non-aligned data 2 can be stored in data segment 1, that is, the non-aligned data 1 and the non-aligned data 2 can be merged, and other non-aligned data can be waited for until finally it can be merged into a 64KB size data, which is transferred to the WBG management layer as aligned data for logical processing.

[0074] The data storage method provided by the embodiments of this specification can avoid the premature blocking of the double write process during the WBG data accumulation process of non-aligned data and perform accumulation processing on the aligned data by sending the non-aligned data after splitting the target data to be stored to the non-aligned data pool and performing merging processing according to the data block address, thereby quickly realizing data disk writing.

[0075] See Figure 3 , Figure 3 shows the flowchart of data transfer from the non-aligned data pool to the WBG layer processing in a data storage method provided by the embodiments of this specification.

[0076] It should be noted that the following steps are the processing process of merging the non-aligned data in the non-aligned pool to obtain aligned data and putting the aligned data into the WBG layer for double write logic processing.

[0077] Step 302: The management module in the non-aligned data pool determines the logical address where the non-aligned data is stored.

[0078] Step 304: The management module in the non-aligned data pool determines whether the non-aligned data stored at the logical address belongs to the same data segment. If so, execute step 308; if not, execute step 306.

[0079] Step 306: The management module in the misaligned data pool generates a new management node and stores the misaligned data in the new management node.

[0080] Step 308: The management module in the misaligned data pool performs data merging processing on the data stored in the same data segment.

[0081] Step 310: The management module in the misaligned data pool determines whether the amount of merged data reaches 64 KB. If so, it executes Step 312; if not, it continues to execute Step 308.

[0082] It should be noted that the size of the 64 KB data volume can be different under different applications, and the embodiments of this specification do not limit it here.

[0083] Step 312: The management module in the misaligned data pool takes the data reaching 64 KB as aligned data and spits it to the WBG layer for processing.

[0084] The data storage method provided by the embodiments of this specification can avoid blocking the double write logic processing by putting misaligned data into the WBG layer prematurely by merging misaligned data in the misaligned data pool to determine aligned data and transferring the aligned data to the WBG layer for processing.

[0085] Further, the aligned data after splitting the target data to be stored is placed in the aligned data pool for management. After determining the target aligned data, the target aligned data is transferred to the WBG layer for subsequent double write logic processing; specifically, determining the target aligned data based on the first aligned data and the second aligned data includes:

[0086] Sending the first aligned data and the second aligned data to the aligned data pool, and determining the first aligned data and the second aligned data in the aligned data pool as the target aligned data.

[0087] Among them, the aligned data pool can be understood as a management module for data accumulation of aligned data.

[0088] In practical applications, the first aligned data after splitting the target data to be stored is directly sent to the aligned data pool for management, and the second aligned data obtained after merging the misaligned data pool is also sent to the aligned data pool. The first aligned data and the second aligned data in the aligned data pool are determined as the target aligned data, which is convenient for subsequent transferring the data in the aligned pool to the WBG layer for data accumulation processing to complete the double write logic processing and achieve the rapid disk writing of the target data to be stored.

[0089] The data storage method provided in the embodiment of the present specification determines the aligned data transferred to the aligned data pool as the target aligned data, so as to facilitate the subsequent double write logic processing on the target aligned data and store it in the NAND particle medium.

[0090] See also Figure 4 , Figure 4 A schematic diagram of the process of intelligently splitting and stacking data in a data storage method provided in an embodiment of this specification is shown.

[0091] Figure 4 There are two cache levels in the system. The first-level cache can be understood as the cache stage that splits the target data to be stored and stores it in the aligned data pool and the unaligned data pool; the second-level cache can be understood as the cache stage that performs double-write logic processing on the aligned data.

[0092] Specifically, the target data to be stored from the drive end will be split by the disk program, the aligned data will be placed in the aligned data pool for data accumulation, and the unaligned data will be placed in the unaligned pool for data accumulation. At the same time, the unaligned data can obtain aligned data through merging processing in the unaligned data pool, and the aligned data will be sent to the aligned data pool to wait for transfer to the secondary cache; after the aligned data is sent to the aligned data pool for data accumulation, the aligned data can be transferred to the WBG layer in the secondary cache for data accumulation, and the double write logic processing is performed in the aligned data in the secondary cache, and the processed data is stored in the NAND medium.

[0093] The data storage method provided in the embodiments of the present specification can not only make the aligned data fall to the disk as soon as possible by intelligently splitting and stacking the data, but also wait as much as possible for the subsequent new data to be gathered to form the aligned data before processing the non-aligned data, so as to avoid the non-aligned data blocking the double write process too early.

[0094] Step 104: when it is determined that an abnormal power failure occurs during the data storage process, target data to be cached is determined during the data storage process based on a pre-configured capacity, and a power failure position of the target data to be cached is recorded.

[0095] Among them, abnormal power failure can be understood as a power failure that is not caused by the normal logic of the server during the data storage process of the server, such as power failure due to human reasons or other hardware reasons. The embodiments of this specification do not impose too many restrictions on the specific power failure method.

[0096] The power-off position may be understood as a stop position of data processing of the target data to be cached when power is off abnormally.

[0097] In practical applications, when storing the target data to be stored according to the characteristics of the double-write logic processing, if abnormal power failure occurs at any time point, the data storage method provided by the embodiments of this specification can rely on the pre-configured capacitance to cache the data, so as to prevent the loss of the target data to be stored. Among them, the pre-configured capacitance can be determined according to different application requirements. This capacitance can be understood as being configured on the hardware device. When the server loses power, it can still rely on this capacitance to complete the corresponding software execution operations. Whether the size of the capacitance can support the caching process of the data to be stored this time can be determined according to different calculation methods, and this specification does not limit it too much in the embodiments.

[0098] Further, on the premise that the pre-configured capacitance provides support, after determining the target data to be cached during the data storage process, at the same time, the power failure position of the target data to be cached can be recorded, and the power failure position of the target data to be cached is recorded in the cache management data structure.

[0099] In practical applications, during the above data storage process, power failure at any time point may lead to data loss. To avoid this situation, the data storage method provided by the embodiments of this specification can obtain the data at the current time node when the power failure occurs from multiple processing levels and cache the data; specifically, determining the target data to be cached during the data storage process based on the pre-configured capacitance includes:

[0100] Obtaining the first data to be cached from the aligned data pool, the second data to be cached from the unaligned data pool, and the third data to be cached from the data management unit based on the pre-configured capacitance, where the third data to be cached is the data that has not been processed based on the preset processing method in the case of abnormal power failure;

[0101] Determining the target data to be cached based on the first data to be cached, the second data to be cached, and the third data to be cached.

[0102] Among them, the first data to be cached can be understood as the data to be cached existing in the aligned data pool when abnormal power failure occurs; the second data to be cached can be understood as the data to be cached existing in the unaligned data pool when abnormal power failure occurs; the third data to be cached can be understood as the data to be cached that has not completed the double-write processing in the WBG layer when abnormal power failure occurs.

[0103] Among them, the data management unit can be understood as the logic processing unit of the WBG layer in the secondary cache.

[0104] To prevent data loss during abnormal power failure, it is possible to determine the data that has not been completely stored at the time of abnormal power failure and cache this data in a timely manner, facilitating subsequent double-write processing of the incomplete data to complete the data storage process. In practical applications, after the server experiences abnormal power failure, the pre-configured capacitance can be used to obtain the data that has not been completely cached from the aligned data pool as the first data to be cached. Secondly, the data that has not been completely merged from the unaligned data pool is obtained as the second data to be cached. Finally, the data that has not been completely processed by the double-write logic in the logic processing unit of the WBG layer is obtained as the third data to be cached. Furthermore, the final target data to be cached is determined based on the first data to be cached, the second data to be cached, and the third data to be cached.

[0105] It should be noted that when a power failure occurs during the data splitting process, the first data to be cached has aligned data, the second data to be cached has unaligned data, but the third data to be cached does not necessarily have data that has not been completely double-written. Because in the initial state, the management module in the aligned data pool has not had time to transfer the aligned data to the secondary cache before the abnormal power failure occurs. Therefore, at different time nodes, the specific data of the first data to be cached, the second data to be cached, and the third data to be cached are not the same. For example, in the aforementioned example, the third data to be cached can be empty. This embodiment of the specification only uses the above method as an example for illustration, and does not specifically limit the data composition of the target data to be cached.

[0106] The data storage method provided by the embodiments of this specification can obtain the data to be cached from the aligned data pool, the unaligned data pool, and the data management unit respectively, so as to cache all the data that has not been completely stored in a timely manner when an abnormal power failure occurs, avoiding data loss.

[0107] Step 106: Store the target data to be cached and the power failure position in the cache pool based on a preset storage method.

[0108] Among them, the preset storage method can be understood as a mirror storage method, but this embodiment of the specification does not make any limitations on this storage method.

[0109] In practical applications, the server can rely on the calculated capacitance support ability and use the mirror finite DRAM storage method to quickly cache the determined target data to be cached and the power failure position recorded in the cache management data structure into the SLC cache pool.

[0110] In order to continue the logical processing of the target data to be cached that has not been processed yet after the server is powered on, data storage processing can also be performed based on the recorded power-off position and the target data to be cached; specifically, after storing the target data to be cached and the power-off position in the cache pool based on a preset storage method, it further includes:

[0111] When it is determined that the power-off is restored during the data storage process, read the target data to be cached and the power-off position from the cache pool;

[0112] Perform data storage on the target data to be cached through a preset processing method based on the power-off position.

[0113] Among them, restoring power-off can be understood as the server restoring power-on and being able to perform data processing normally.

[0114] In practical applications, after it is determined that the server has restored power-on, in order to quickly resume the data storage processing process, the target data to be cached can be read from the SLC cache pool, and the power-off position of the target data to be cached can be read from the cache management data structure, and data storage processing can continue to be performed based on the target data to be cached and the power-off position according to the double-write logic processing method.

[0115] The data storage method provided in the embodiments of this specification can ensure the continuation of the data storage process by reading the target data to be cached from the cache pool and reading the power-off position from the cache management data structure.

[0116] Further, the performing data storage on the target data to be cached through a preset processing method based on the power-off position includes:

[0117] Perform data stacking processing on the third target data to be cached in the target data to be cached through the preset processing method based on the power-off position to obtain target storage data;

[0118] Store the target storage data in the storage unit.

[0119] In practical applications, the server can continue to complete the double-write logic for the third target data to be cached in the target data to be cached according to the power-off position recorded in the cache management data structure, place the data in the restored mirror according to the old and new and specified positions, continue to execute the double-write logic processing, determine the processed data as the target storage data, and directly store it in the storage unit.

[0120] The data storage method provided in the embodiments of this specification can quickly complete the data stacking processing on the target data to be stored that has not completed the double-write logic according to the recorded power-off position, so as to quickly complete the data storage process.

[0121] Further, storing the target stored data in the storage unit includes:

[0122] Storing the target stored data in the storage unit based on the address order of data storage.

[0123] In practical applications, when storing the target stored data in the NAND flash media, it can also be stored according to the address order of data storage. For example, after the storage of the target stored data in large page 0 is sufficient, the target stored data can be stored in large page 1, and so on, until the storage of the target stored data is completed according to the address order of data storage. The embodiments of this specification do not limit the specific data storage method too much here.

[0124] In summary, the data storage method provided by the embodiments of this specification classifies and caches data according to the characteristics of the data storage method, and proposes a mirror recovery mechanism in the QLC double write characteristic. When the server has an abnormal power failure, it can complete the rapid recovery of the target data to be stored during the power failure in the way of pure capacitor supporting the power failure processing, and then continue to complete the storage processing of the target data to be stored, which not only avoids the problem of data loss, but also can solve the problems of SLCOP consumption and bandwidth consumption.

[0125] The following combines the attached Figure 5 , taking the application of the data storage method provided by this specification in the power on and off of a large capacitor as an example, to further illustrate the data storage method. Among them, Figure 5 shows a schematic diagram of the processing process of a data storage method provided by an embodiment of this specification.

[0126] Figure 5 When an abnormal power failure occurs during the data storage process in, it can rely on the calculated capacitor support ability and use the mirror finite DRAM method to quickly store the power-off data. Specifically, the data that has not completed the double write in the WBG data stack can be cached in the SLC pool, the aligned data in the aligned data pool can be cached in the SLC pool, the unaligned data in the unaligned data pool can be cached in the SLC pool, and at the same time, the power-off position recorded in the cache management data structure can also be cached in the SLC pool.

[0127] Further, during the rapid recovery of the power-on data, the data can be read from the SLC pool and placed according to the old and new and specified positions. Specifically, reference can be made to Figure 5 the placement position in the lower part of to achieve the mirror state, and then according to the last power-off position recorded in the management data, continue to complete the double write logic, and store the target stored data in the super page of the NAND media according to the address order from the recovered mirror. For example, Figure 5The NAND medium has multiple superpages, including superpage 0, superpage 1, superpage 2, superpage 3, superpage 4, and superpage 5.

[0128] The data storage method provided by the embodiments of this specification caches the data in the alignment pool, the data in the non-alignment pool, the data that has not completed double writing in the WBG layer data stack, and the recorded power-off position into the cache pool respectively, which facilitates subsequent mirror acquisition of the corresponding data from the cache pool to continue completing the double writing operation of the data, and then stores it into the superpages in the NAND medium according to the address order.

[0129] Corresponding to the above method embodiments, this specification also provides embodiments of an object processing device. Figure 6 The structure diagram of a data storage device provided by an embodiment of this specification is shown. As Figure 6 shown, the device includes:

[0130] A data storage module 602, configured to perform data storage on the received target data to be stored through a preset processing method;

[0131] A power-off processing module 604, configured to determine the target data to be cached during the data storage based on a pre-configured capacitance and record the power-off position of the target data to be cached when it is determined that an abnormal power-off occurs during the data storage process;

[0132] A data caching module 606, configured to store the target data to be cached and the power-off position into the cache pool based on a preset storage method.

[0133] Optionally, the device further includes:

[0134] A data reading module, configured to read the target data to be cached and the power-off position from the cache pool when it is determined that the power-off is restored during the data storage process;

[0135] Perform data storage on the target data to be cached through a preset processing method based on the power-off position.

[0136] Optionally, the data storage module 602 is further configured to:

[0137] Split the received target data to be stored, and process the split target data to obtain target aligned data;

[0138] Perform data stacking processing on the target aligned data through a preset processing method to obtain target storage data, and store the target storage data into the storage unit.

[0139] Optionally, the data storage module 602 is further configured to:

[0140] Split the received target data to be stored to obtain first aligned data and misaligned data, and perform a merging process on the misaligned data based on a preset data alignment method to obtain second aligned data;

[0141] Determine target aligned data based on the first aligned data and the second aligned data.

[0142] Optionally, the data storage module 602 is further configured to:

[0143] Send the misaligned data to a misaligned data pool, and determine the data block address where the misaligned data is stored in the misaligned data pool;

[0144] Merge the misaligned data stored in the same data block address, and use the merged misaligned data as the second aligned data.

[0145] Optionally, the data storage module 602 is further configured to:

[0146] Send the first aligned data and the second aligned data to an aligned data pool, and determine the first aligned data and the second aligned data in the aligned data pool as target aligned data.

[0147] Optionally, the power-off processing module 604 is further configured to:

[0148] Obtain first data to be cached from the aligned data pool based on a pre-configured capacitance, obtain second data to be cached from the misaligned data pool, and obtain third data to be cached from a data management unit, where the third data to be cached is data that has not been processed based on the preset processing method in the case of an abnormal power-off;

[0149] Determine target data to be cached based on the first data to be cached, the second data to be cached, and the third data to be cached.

[0150] Optionally, the data storage module 602 is further configured to:

[0151] Perform a data stacking process on the third data to be cached in the target data to be cached based on the power-off position through the preset processing method to obtain target storage data;

[0152] Store the target storage data in the storage unit.

[0153] Optionally, the data storage module 602 is further configured to:

[0154] Store the target stored data into the storage unit based on the address order of data storage.

[0155] Optionally, the device further includes:

[0156] The preset processing method includes a double-write logic processing method.

[0157] In the data storage device provided in this specification, when an abnormal power failure occurs during the data storage process, the pre-configured capacitance is used to support the caching process of the target data to be cached, and at the same time, the power failure position of the target data to be cached is recorded, so as to facilitate the subsequent storage process of the target data to be cached according to the power failure position. This can not only prevent data loss caused by power failure, but also facilitate the subsequent acquisition of the target data to be cached and the power failure position from the cache pool to continue the data storage to meet the actual application requirements.

[0158] The above is a schematic solution of a data storage device according to an embodiment of this specification. It should be noted that the technical solution of this data storage device and the technical solution of the above data storage method belong to the same concept. For the details not described in the technical solution of the data storage device, reference can be made to the description of the technical solution of the above data storage method.

[0159] Figure 7 FIG. shows a block diagram of a computing device 700 according to an embodiment of this specification. The components of the computing device 700 include but are not limited to a memory 710 and a processor 720. The processor 720 is connected to the memory 710 through a bus 730, and a database 750 is used to store data.

[0160] The computing device 700 further includes an access device 740, and the access device 740 enables the computing device 700 to communicate via one or more networks 760. Examples of these networks include the Public Switched Telephone Network (PSTN), Local Area Network (LAN), Wide Area Network (WAN), Personal Area Network (PAN), or a combination of communication networks such as the Internet. The access device 740 may include one or more of any type of wired or wireless network interfaces (for example, Network Interface Card (NIC)), such as IEEE802.11 Wireless Local Area Network (WLAN) wireless interface, Worldwide Interoperability for Microwave Access (Wi-MAX) interface, Ethernet interface, Universal Serial Bus (USB) interface, cellular network interface, Bluetooth interface, Near Field Communication (NFC) interface, and so on.

[0161] In an embodiment of this specification, the above components of the computing device 700 and Figure 7 other components not shown in the figure may also be connected to each other, for example, through a bus. It should be understood that Figure 7The block diagram of the computing device shown is for illustrative purposes only and is not a limitation on the scope of this specification. Those skilled in the art can add or replace other components as needed.

[0162] The computing device 700 can be any type of stationary or mobile computing device, including mobile computers or mobile computing devices (e.g., tablet computers, personal digital assistants, laptop computers, notebook computers, netbooks, etc.), mobile phones (e.g., smartphones), wearable computing devices (e.g., smartwatches, smart glasses, etc.) or other types of mobile devices, or stationary computing devices such as desktop computers or PCs. The computing device 700 can also be a mobile or stationary server.

[0163] Wherein, the processor 720 is used to execute the following computer-executable instructions, and when the computer-executable instructions are executed by the processor, the steps of the above data storage method are implemented.

[0164] The above is a schematic solution of a computing device according to an embodiment of this specification. It should be noted that the technical solution of this computing device and the technical solution of the above object processing method belong to the same concept. For the details not described in detail in the technical solution of the computing device, reference can be made to the description of the technical solution of the above data storage method.

[0165] An embodiment of this specification also provides a computer-readable storage medium, which stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, the steps of the above data storage method are implemented.

[0166] The above is a schematic solution of a computer-readable storage medium according to an embodiment of this specification. It should be noted that the technical solution of this storage medium and the technical solution of the above data storage method belong to the same concept. For the details not described in detail in the technical solution of the storage medium, reference can be made to the description of the technical solution of the above data storage method.

[0167] An embodiment of this specification also provides a computer program, wherein when the computer program is executed on a computer, the computer is made to execute the steps of the above data storage method.

[0168] The above is a schematic solution of a computer program according to this embodiment. It should be noted that the technical solution of this computer program and the technical solution of the above data storage method belong to the same concept. For the details not described in detail in the technical solution of the computer program, reference can be made to the description of the technical solution of the above data storage method.

[0169] The above describes specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the acts or steps recited in the claims may be performed in a different order than in the embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the particular order or sequential order shown to achieve the desired result. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0170] The computer instructions include computer program code, which may be in source code form, object code form, executable file, or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, removable hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.

[0171] It should be noted that for the foregoing method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of this specification are not limited by the described order of actions, because according to the embodiments of this specification, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments of this specification.

[0172] In the above embodiments, the descriptions of the various embodiments each have their own focuses. For the parts not detailed in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0173] The preferred embodiments of this specification disclosed above are only used to help explain this specification. The alternative embodiments do not detail all the details and do not limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of the embodiments of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the embodiments of this specification, so that those skilled in the art can well understand and utilize this specification. This specification is only limited by the claims and their full scope and equivalents.

Claims

1. A data storage method, comprising: Performing data splitting on the received target data to be stored to obtain target aligned data, and performing data stacking processing and data storage on the target aligned data through a preset processing method, wherein the target aligned data is placed in an aligned data pool for data stacking processing; In the case of determining that abnormal power failure occurs during the data storage process, determining the target data to be cached during the data storage process based on a pre-configured capacitance, and recording the power failure position of the target data to be cached, wherein the target data to be cached is determined based on the first data to be cached, the second data to be cached, and the third data to be cached, the first data to be cached is obtained from the aligned data pool based on a pre-configured capacitance, the second data to be cached is obtained from a non-aligned data pool based on a pre-configured capacitance, the non-aligned data pool stores non-aligned data obtained by performing data splitting on the target data to be stored, and the third data to be cached is data that has not been processed based on the preset processing method and is obtained from a data management unit based on a pre-configured capacitance in the case of abnormal power failure; Storing the target data to be cached and the power failure position to a cache pool based on a preset storage method.

2. The data storage method according to claim 1, after storing the target data to be cached and the power failure position to the cache pool based on a preset storage method, further comprising: In the case of determining that the power failure is restored during the data storage process, reading the target data to be cached and the power failure position from the cache pool; Performing data storage on the target data to be cached through a preset processing method based on the power failure position.

3. The data storage method according to claim 2, wherein performing data splitting on the received target data to be stored to obtain target aligned data, and performing data stacking processing and data storage on the target aligned data through a preset processing method, comprises: Performing data splitting on the received target data to be stored, and processing the split target data to obtain target aligned data; Performing data stacking processing on the target aligned data based on a preset processing method to obtain target storage data, and storing the target storage data to a storage unit.

4. The data storage method according to claim 3, wherein performing data splitting on the received target data to be stored, and processing the split target data to obtain target aligned data, comprises: Performing data splitting on the received target data to be stored to obtain first aligned data and non-aligned data, and performing merging processing on the non-aligned data based on a preset data alignment method to obtain second aligned data; Determining target aligned data based on the first aligned data and the second aligned data.

5. The data storage method according to claim 4, wherein performing merging processing on the non-aligned data based on a preset data alignment method to obtain second aligned data, comprises: Sending the non-aligned data to a non-aligned data pool, and determining the data block address where the non-aligned data is stored in the non-aligned data pool; Merge the misaligned data stored at the same data block address, and use the merged misaligned data as the second aligned data.

6. The data storage method according to claim 5, wherein determining the target aligned data based on the first aligned data and the second aligned data includes: Send the first aligned data and the second aligned data to an aligned data pool, and determine the first aligned data and the second aligned data in the aligned data pool as the target aligned data.

7. The data storage method according to claim 6, wherein determining the target data to be cached during the data storage based on a preconfigured capacitance includes: Obtain first data to be cached from the aligned data pool, second data to be cached from the misaligned data pool, and third data to be cached from a data management unit based on a preconfigured capacitance, where the third data to be cached is data that has not been processed based on the preset processing method in the event of an abnormal power failure; Determine the target data to be cached based on the first data to be cached, the second data to be cached, and the third data to be cached.

8. The data storage method according to claim 6, wherein storing the target data to be cached through a preset processing method based on the power failure position includes: Perform data stacking processing on the third data to be cached in the target data to be cached based on the power failure position through the preset processing method to obtain target stored data; Store the target stored data in the storage unit.

9. The data storage method according to claim 8, wherein storing the target stored data in the storage unit includes: Store the target stored data in the storage unit based on the address order of data storage.

10. The data storage method according to claim 1, applied to a QLC data storage system, wherein the preset processing method includes a double write logic processing method.

11. The data storage method according to claim 1, wherein splitting the received target data to be stored to obtain target aligned data, and performing data stacking processing and data storage on the target aligned data through a preset processing method includes: Split the received target data to be stored, and process the split target data to obtain target aligned data; Perform data stacking processing on the target aligned data based on a preset processing method to obtain target stored data, and store the target stored data in a storage unit.

12. The data storage method according to claim 11, wherein splitting the received target data to be stored, and processing the split target data to obtain target aligned data includes: Split the received target data to be stored to obtain first aligned data and misaligned data, and perform merging processing on the misaligned data based on a preset data alignment method to obtain second aligned data; Determine the target aligned data based on the first aligned data and the second aligned data.

13. The data storage method according to claim 12, wherein the merging process of the misaligned data based on a preset data alignment method to obtain second aligned data includes: Sending the misaligned data to a misaligned data pool, and determining the data block address where the misaligned data is stored in the misaligned data pool; Merging the misaligned data stored at the same data block address, and using the merged misaligned data as the second aligned data.

14. The data storage method according to claim 13, wherein the determination of target aligned data based on the first aligned data and the second aligned data includes: Sending the first aligned data and the second aligned data to an aligned data pool, and determining the first aligned data and the second aligned data in the aligned data pool as the target aligned data.

15. The data storage method according to claim 14, wherein the determination of target data to be cached during the data storage based on a preconfigured capacitance includes: Obtaining first data to be cached from the aligned data pool, second data to be cached from the misaligned data pool, and third data to be cached from a data management unit based on the preconfigured capacitance, wherein the third data to be cached is data that has not been processed based on the preset processing method in the event of abnormal power failure; Determining the target data to be cached based on the first data to be cached, the second data to be cached, and the third data to be cached.

16. A data storage device, comprising: A data storage module configured to split the received target data to be stored to obtain target aligned data, and perform data stacking processing and data storage on the target aligned data through a preset processing method; A power failure processing module configured to, in the event of determining abnormal power failure during the data storage, determine the target data to be cached during the data storage based on the preconfigured capacitance, and record the power failure position of the target data to be cached, wherein the target data to be cached is determined based on the first data to be cached, the second data to be cached, and the third data to be cached, the first data to be cached is obtained from the aligned data pool based on the preconfigured capacitance, the second data to be cached is obtained from the misaligned data pool based on the preconfigured capacitance, the third data to be cached is data that has not been processed based on the preset processing method in the event of abnormal power failure and is obtained from the data management unit based on the preconfigured capacitance, the aligned data pool is a module for performing data stacking processing on the target aligned data, the misaligned data pool is a module for performing data merging processing on the misaligned data, and the misaligned data is the data to be stored that does not meet a certain data volume size after data splitting; A data caching module configured to store the target data to be cached and the power failure position in a cache pool based on a preset storage method.

17. A computing device, comprising: A memory and a processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, the steps of the data storage method according to any one of claims 1-15 are implemented.

18. A computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the steps of the data storage method according to any one of claims 1-15 are implemented.

19. A computer program product, characterized in that, It includes computer instructions. When the computer instructions are executed by a processor, the steps of the data storage method according to any one of claims 1-15 are implemented.

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