Capacitive pressure sensor and preparation method thereof

By bonding the substrate to the bonding substrate to form a cavity structure and forming an electrode thereon, the complex problem of traditional capacitive pressure sensor preparation process is solved, and the process simplification and mass production are achieved.

CN114518186BActive Publication Date: 2025-04-15CSMC TECH FAB2 CO LTD
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Patent Information

Application Number
CN202011301093.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-11-19
Publication Date
2025-04-15
Estimated Expiration
2040-11-19

AI Technical Summary

Technical Problem

The preparation process of traditional capacitive pressure sensors is complicated, resulting in high production costs and difficult mass production.

Method used

By bonding the substrate to the bonding substrate, a cavity structure is formed, and a first electrode and a second electrode are formed on the substrate and the bonding substrate, respectively, the preparation process of the capacitive pressure sensor is simplified.

Benefits of technology

This method simplifies the preparation process of capacitive pressure sensors, reduces production costs, and facilitates mass production and improves product yield.

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Abstract

The present invention relates to a capacitive pressure sensor and a preparation method thereof, comprising: bonding a side of a base substrate formed with an insulating dielectric layer to a bonding substrate, and forming a cavity structure at a position where the insulating dielectric layer is not provided between the base substrate and the bonding substrate; forming a first electrode electrically connected to the base substrate on the base substrate, and forming a second electrode electrically connected to the bonding substrate on the bonding substrate; wherein the base substrate serves as a first plate of the capacitive pressure sensor, and the bonding substrate serves as a second plate of the capacitive pressure sensor. In the present application, the base substrate serves as the first plate of the capacitive pressure sensor, and the bonding substrate serves as the second plate of the capacitive pressure sensor. The cavity structure between the first plate and the second plate can serve as a dielectric material between the two electrodes of the capacitive pressure sensor. Compared with the prior art, the process for preparing the capacitive pressure sensor in the present application is simple and convenient for mass production.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a capacitive pressure sensor and a method for preparing the same. Background Art

[0002] Capacitive pressure sensors are semiconductor devices whose capacitance changes with the pressure they are subjected to. The traditional manufacturing process of capacitive pressure sensors is complex. Summary of the invention

[0003] Based on this, it is necessary to provide a new capacitive pressure sensor and a preparation method thereof to address the problem of complex preparation process of capacitive pressure sensors in traditional technologies.

[0004] A method for preparing a capacitive pressure sensor comprises: bonding a surface of a base substrate having an insulating dielectric layer to a bonding substrate, forming a cavity structure at a position between the base substrate and the bonding substrate where the insulating dielectric layer is not provided; forming a first electrode electrically connected to the base substrate on the base substrate, and forming a second electrode electrically connected to the bonding substrate on the bonding substrate; wherein the base substrate serves as a first electrode plate of the capacitive pressure sensor, and the bonding substrate serves as a second electrode plate of the capacitive pressure sensor.

[0005] In one of the embodiments, before the step of forming a first electrode electrically connected to the base substrate on the base substrate, it also includes the step of forming a first doped region in the base substrate of single crystal silicon material and the step of forming a second doped region in the bonding substrate of single crystal silicon material; the first electrode plate includes the first doped region, and the second electrode plate includes the second doped region.

[0006] In one of the embodiments, the step of bonding the side of the base substrate formed with the insulating dielectric layer to the bonding substrate, and forming a cavity structure at a position where the insulating dielectric layer is not set between the base substrate and the bonding substrate includes: forming an insulating dielectric layer film on the base substrate; etching the insulating dielectric layer film to partially expose the side of the base substrate formed with the insulating dielectric layer film to obtain an insulating dielectric layer; bonding the side of the base substrate formed with the insulating dielectric layer to the bonding substrate, and forming a cavity structure at a position where the insulating dielectric layer is not set between the base substrate and the bonding substrate.

[0007] In one of the embodiments, the bonding substrate bonded to the base substrate includes a first bonding substrate and a second bonding substrate separated from each other, the cavity structure includes a first cavity structure located between the first bonding substrate and the base substrate, and a second cavity structure located between the second bonding substrate and the base substrate, and the volume of the first cavity structure is greater than the volume of the second cavity structure.

[0008] In one of the embodiments, the steps of forming a first electrode electrically connected to the base substrate on the base substrate and forming a second electrode electrically connected to the bonding substrate on the bonding substrate include: forming an insulating dielectric film covering the bonding substrate and the insulating dielectric layer; etching the insulating dielectric film to form a first through hole exposing the first doped region and a second through hole exposing the second doped region; forming a first electrode in the first through hole and forming a second electrode in the second through hole.

[0009] In the method for preparing the above-mentioned capacitive pressure sensor, after bonding the side of the base substrate with the insulating dielectric layer to the bonding substrate, a cavity structure is formed at a position where the insulating dielectric layer is not set between the base substrate and the bonding substrate; the base substrate can be used as the first electrode plate of the capacitive pressure sensor, and the bonding substrate can be used as the second electrode plate of the capacitive pressure sensor. The cavity structure between the first electrode plate and the second electrode plate can serve as a dielectric material between the two electrodes of the capacitive pressure sensor. Compared with the prior art, the process for preparing the capacitive pressure sensor in this application is simple and convenient for mass production.

[0010] A capacitive pressure sensor comprises: a base substrate; an insulating dielectric layer located on the base substrate; a bonding substrate bonded to a surface of the base substrate having the insulating dielectric layer; a first electrode provided on the base substrate and electrically connected to the base substrate; a second electrode provided on the bonding substrate and electrically connected to the bonding substrate; wherein a cavity structure is formed at a position between the base substrate and the bonding substrate where the insulating dielectric layer is not provided, the base substrate serves as a first electrode plate of the capacitive pressure sensor, and the bonding substrate serves as a second electrode plate of the capacitive pressure sensor.

[0011] In one of the embodiments, it also includes: a first doping region, located in the base substrate and below the insulating dielectric layer; a second doping region, located in the bonding substrate and close to the insulating dielectric layer; wherein the first electrode includes the first doping region, and the second electrode includes the second doping region.

[0012] In one of the embodiments, it also includes: an insulating dielectric film covering the bonding substrate and the insulating dielectric layer; wherein the first electrode penetrates the insulating dielectric film and the insulating dielectric layer to be electrically connected to the base substrate, and the second electrode penetrates the insulating dielectric film to be electrically connected to the bonding substrate.

[0013] In one embodiment, the bonding substrate includes a first bonding substrate and a second bonding substrate separated from each other, the cavity structure includes a first cavity structure located between the first bonding substrate and the base substrate, and a second cavity structure located between the second bonding substrate and the base substrate, the volume of the first cavity structure is greater than the volume of the second cavity structure, the first bonding substrate serves as a second plate of a variable capacitor, and the second bonding substrate serves as a second plate of a reference capacitor.

[0014] In one of the embodiments, the second cavity structure corresponding to each of the reference capacitors includes at least two sub-cavities.

[0015] The above-mentioned capacitive pressure sensor uses the base substrate as the first electrode plate of the capacitive pressure sensor, and the bonding substrate as the second electrode plate of the capacitive pressure sensor. The bonding substrate and the base substrate are bonded to each other on one side with an insulating dielectric layer. A cavity structure is formed at a position where no insulating dielectric layer is provided between the base substrate and the bonding substrate. The cavity structure is located between the first electrode plate and the second electrode plate, and can serve as a dielectric material between the two electrodes of the capacitive pressure sensor. Compared with the prior art, the capacitive pressure sensor in the present application has a simple structure and is convenient for mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 is a flow chart of a method for preparing a capacitive pressure sensor in one embodiment;

[0018] Figure 2 is a schematic diagram of the structure of the capacitive pressure sensor in Example 1;

[0019] Figure 3 is a flow chart of forming a cavity structure after bonding a base substrate and a bonding substrate in one embodiment;

[0020] Figure 4 This is a schematic diagram of the structure of the capacitive pressure sensor before the insulating dielectric layer is formed in Example 2;

[0021] Figure 5 This is a schematic diagram of the structure of the capacitive pressure sensor after the insulating dielectric layer is formed in Example 2;

[0022] Figure 6 This is a schematic diagram of the structure of the capacitive pressure sensor after bonding to form a cavity structure in Example 2;

[0023] Figure 7 This is a schematic diagram of the structure of the capacitive pressure sensor after the insulating dielectric film is formed in Example 2;

[0024] Figure 8 is a schematic diagram of a process of forming a first electrode and a second electrode in one embodiment;

[0025] Fig. 9 It is a schematic diagram of the structure of the capacitive pressure sensor after the first through hole and the second through hole are formed in Example 2;

[0026] Fig.10 is a schematic structural diagram of a capacitive pressure sensor formed in Example 2;

[0027] Fig.11 is a schematic structural diagram of a capacitive pressure sensor formed in Example 3;

[0028] Fig.12 Schematic diagram of the structure of the capacitive pressure sensor formed in Example 4. DETAILED DESCRIPTION

[0029] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0031] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0032] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0033] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0034] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic diagrams of ideal embodiments (and intermediate structures) of the invention, such that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances are anticipated. Thus, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include deviations in shapes due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Thus, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the invention.

[0035] In the traditional manufacturing method of capacitive pressure sensors, a cavity is formed between the pressure-bearing membrane serving as the electrode and the substrate through surface welding technology or porous wet etching process; the electrode substrate is mostly polysilicon, glass, metal, etc., with high preparation cost and complex process; in general structures, the variable capacitor and the reference capacitor are prepared separately, and in the structure in which the variable capacitor and the reference capacitor are prepared at the same time, the variable capacitor and the reference capacitor use independent electrode plates, the preparation process is complex, and the reference capacitor often adopts an open-hole structure, that is, the reference capacitor is connected to the atmosphere, and the capacitance of the reference capacitor is uncontrollable.

[0036] Figure 1 is a flow chart of a method for preparing a capacitive pressure sensor in one embodiment, Figure 2 Schematic diagram of the structure of the capacitive pressure sensor in Example 1.

[0037] like Figure 1 , Figure 2 As shown, the present application provides a method for preparing a capacitive pressure sensor, comprising the following steps:

[0038] S102, bonding the base substrate and the bonding substrate to form a cavity structure.

[0039] The side of the base substrate 102 on which the insulating dielectric layer 104 is formed is bonded to the bonding substrate 106 , and a cavity structure 108 is formed at a position between the base substrate 102 and the bonding substrate 106 where the insulating dielectric layer 104 is not formed.

[0040] S104, forming a first electrode on the base substrate and a second electrode on the bonding substrate respectively.

[0041] A first electrode 110 electrically connected to the base substrate 102 is formed on the base substrate 102, and a second electrode 112 electrically connected to the bonding substrate 106 is formed on the bonding substrate 106. The base substrate 102 serves as the lower electrode plate of the capacitive pressure sensor, and the bonding substrate 106 serves as the upper electrode plate of the capacitive pressure sensor. The first electrode 110 and the second electrode 112 lead the base substrate 102 and the bonding substrate 106 to the surface, respectively, to facilitate metal interconnection in subsequent processes.

[0042] The above-mentioned method for preparing the capacitive pressure sensor uses Si-Si bonding technology to prepare the cavity structure of the capacitive pressure sensor. It has a short preparation cycle and a simple preparation process, can effectively improve the product yield, and is convenient for mass production of the product.

[0043] In one embodiment, before step S104 , the steps of forming a first doping region in the base substrate 102 of single crystal silicon material and forming a second doping region in the bonding substrate 106 of single crystal silicon material are also included.

[0044] Figure 3 The flowchart is a process of forming a cavity structure after bonding a base substrate and a bonding substrate in one embodiment.

[0045] Figure 4 Schematic diagram of the structure of the capacitive pressure sensor before the insulating dielectric layer is formed in Example 2.

[0046] Figure 5 Schematic diagram of the structure of the capacitive pressure sensor after the insulating dielectric layer is formed in Example 2.

[0047] like Figure 3 , Figure 4 , Figure 5 As shown, in one embodiment, step S102 includes:

[0048] S202, forming an insulating dielectric layer thin film on the base substrate.

[0049] An insulating dielectric layer film 203 is grown on the base substrate 202, for example, a dielectric layer film including at least one of a silicon nitride film, a silicon oxynitride film, and a silicon oxide film.

[0050] In one embodiment, the first doped region is formed before step S202. Figure 4, the first doping region 214 is located below the insulating dielectric layer film 203, and the lower electrode of the capacitive pressure sensor includes the first doping region 214. Specifically, the steps of forming the first doping region 214 include: a first step, forming a mask structure exposing a preset injection region on a base substrate 202 of single crystal silicon material. A second step, after injecting first conductive type impurity ions into the preset injection region exposed by the mask structure through an ion implantation process, a first doping region 214 is formed in the preset injection region. A third step, removing the mask structure on the surface of the base substrate 202, to obtain a base substrate 202 formed with the first doping region 214. The insulating dielectric layer film 203 subsequently formed on the base substrate 202 is located above the first doping region 214. In one embodiment, only doped single crystal silicon material is used to make the base, that is, the base substrate 202 as the lower electrode, and the preparation process is simple and the cost is low.

[0051] In one embodiment, the first conductive type impurity ions are N-type impurity ions.

[0052] In one embodiment, the resistivity of the first doped region 214 is less than 0.1 ohm-meter, such as 0.04 ohm-meter, 0.05 ohm-meter, 0.08 ohm-meter, 0.09 ohm-meter, etc.

[0053] S204, etching the insulating dielectric layer film to obtain an insulating dielectric layer.

[0054] The insulating dielectric layer film 203 is etched to expose a portion of the base substrate 202 on which the insulating dielectric layer film 203 is formed, thereby obtaining an insulating dielectric layer 204 .

[0055] Specifically, the insulating dielectric layer film 203 is etched to partially expose a side of the base substrate 202 on which the insulating dielectric layer film 203 is formed. In the embodiment in which the first doping region 214 is formed in the base substrate 202, the insulating dielectric layer 204 covers the first doping region 214, and the insulating dielectric layer 204 is provided with a groove exposing a portion of the first doping region 214.

[0056] S206, bonding to form a cavity structure.

[0057] Figure 6 This is a schematic diagram of the structure of the capacitive pressure sensor after bonding to form a cavity structure in Example 2.

[0058] The side of the base substrate 202 on which the insulating dielectric layer 204 is formed is bonded to the bonding substrate 208 , exposing the trench of the first doping region 214 to form a cavity structure 206 .

[0059] like Figure 6As shown, specifically, the bonding substrate 208 is bonded to the side of the base substrate 202 where the insulating dielectric layer 204 is formed, and the bonding substrate 208, the insulating dielectric layer 204, and the base substrate 202 (first doping region 214) form a cavity structure 206 at a position on the base substrate 202 where the insulating dielectric layer 204 is not set.

[0060] Figure 7 Schematic diagram of the structure of the capacitive pressure sensor after the insulating dielectric film is formed in Example 2.

[0061] In one embodiment, the second doped region is formed after step S206. Figure 7 , the upper plate of the capacitive pressure sensor includes a second doped region 216 .

[0062] like Figure 7 As shown, specifically, the steps of forming the second doping region 216 include: a first step, forming a mask structure exposing a preset injection region on a bonding substrate 208 of a single crystal silicon material. A second step, after injecting first conductive type impurity ions into the preset injection region exposed by the mask structure through an injection process, a second doping region 216 is formed in the preset injection region. A third step, removing the mask structure on the surface of the bonding substrate 208, to obtain the second doping region 216 located in the bonding substrate 208. In one embodiment, only the doped single crystal silicon material is used to make the pressure-bearing film, that is, the bonding substrate 208 as the upper plate, and the preparation process is simple and the cost is low.

[0063] In one embodiment, the first conductive type impurity ions are N-type impurity ions.

[0064] In one embodiment, the resistivity of the second doped region 216 is less than 0.1 ohm-meter, such as 0.04 ohm-meter, 0.05 ohm-meter, 0.08 ohm-meter, 0.09 ohm-meter, etc.

[0065] Figure 8 FIG. 4 is a schematic diagram of a process of forming a first electrode and a second electrode in an embodiment.

[0066] Fig. 9 This is a schematic diagram of the structure of the capacitive pressure sensor after the first through hole and the second through hole are formed in Example 2.

[0067] Fig.10 Schematic diagram of the structure of the capacitive pressure sensor formed in Example 2.

[0068] like Figure 8 , Fig. 9 , Fig.10 As shown, in one embodiment, step S104 includes:

[0069] S302, forming an insulating dielectric film covering the bonding substrate and the insulating dielectric layer.

[0070] like Figure 7 As shown, an insulating dielectric film 218 is formed on the base substrate 202 . The insulating dielectric film 218 covers the second doping region 216 and extends along the second doping region 216 to the insulating dielectric layer 204 .

[0071] In one embodiment, the insulating dielectric film 218 includes at least one of a silicon nitride film, a silicon oxynitride film, and a silicon oxide film.

[0072] S304 , forming a first through hole exposing the first doping region and a second through hole exposing the second doping region.

[0073] like Fig. 9 As shown, the insulating dielectric film 218 is etched to form a first through hole 220 exposing the first doping region 214 and a second through hole 222 exposing the second doping region 216. In one embodiment, step S304 includes: a first step of forming a mask layer on the base substrate 202, the mask layer exposing a first preset region on the first doping region 214 and a second preset region on the second doping region 216. In the second step, the insulating dielectric film 218 and the insulating dielectric layer 204 located in the first preset area are removed by a dry etching process or a wet etching process until the first doped area 214 located below the first preset area is exposed, thereby obtaining a first through hole 220 located on the base substrate 202 (first doped area 214), wherein the insulating dielectric film 218 and the insulating dielectric layer 204 are filled between the first through hole 220 and the second doped area 216; and the insulating dielectric film 218 located in the second preset area is removed by a dry etching process or a wet etching process until the second doped area 216 located below the second preset area is exposed, thereby obtaining a second through hole 222 located on the second doped area 216 (i.e., the bonding substrate 208).

[0074] S306, forming a first electrode in the first through hole, and forming a second electrode in the second through hole.

[0075] like Fig.10 As shown, a first electrode 210 is formed in the first through hole 220, and a second electrode 212 is formed in the second through hole 222. The first electrode 210 is used to lead out a first doped region 214 as a lower plate of the capacitive pressure sensor, and the second electrode 212 is used to lead out a second doped region 216 as an upper plate of the capacitive pressure sensor.

[0076] In one embodiment, step S306 includes: a first step, forming a conductive film on the base substrate 202, the conductive film filling the first through hole 220 and the second through hole 222, and the top of the conductive film is higher than the top of the insulating dielectric film 218. A second step, forming a mask layer covering the conductive film retention area on the conductive film, the mask layer covering the first through hole 220 and the second through hole 222. A third step, removing the conductive film in the area not covered by the mask layer by photolithography and etching processes until the insulating dielectric film 218 below is exposed, and obtaining the first electrode 210 and the second electrode 212 formed by the remaining conductive film. Among them, the tops of the first electrode 210 and the second electrode 212 are both higher than the top of the insulating dielectric film 218. The first doped region 214 as the lower plate of the capacitive pressure sensor is led out through the first electrode 210 formed in the first through hole 220, and the second doped region 216 as the upper plate of the capacitive pressure sensor is led out through the second electrode 212 formed in the second through hole 222. The cavity structure 206 serves as a dielectric between the lower plate and the upper plate. The first electrode 210 and the second electrode 212 lead the first doped region 214 and the second doped region 216 to the surface of the insulating dielectric film 218, respectively, to facilitate metal interconnection in subsequent process steps. The plates (the first doped region 214 and the second doped region 216) of the capacitive pressure sensor can be connected at the required position through the first electrode 210 and the second electrode 212.

[0077] In one embodiment, the first electrode 210 and the second electrode 212 are electrodes made of the same conductive material, such as an aluminum metal electrode, a copper metal electrode, etc. In other embodiments, the first electrode 210 and the second electrode 212 are electrodes made of different conductive materials. The first electrode 210 and the second electrode 212 can be electrodes prepared by a process for preparing a conductive plug connecting upper and lower layers of conductive interconnects in an existing process.

[0078] Fig.11 Schematic diagram of the structure of the capacitive pressure sensor formed in Example 3.

[0079] In one of the embodiments, a bonding substrate bonded to a base substrate includes a first bonding substrate and a second bonding substrate separated from each other, the cavity structure includes a first cavity structure located between the first bonding substrate and the base substrate, and a second cavity structure located between the second bonding substrate and the base substrate, and the volume of the first cavity structure is greater than the volume of the second cavity structure.

[0080] Specifically, Fig.11As shown, the bonding substrate 308 bonded to the base substrate 302 includes a first bonding substrate 308A and a second bonding substrate 308B separated from each other, and the cavity structure 306 includes a first cavity structure 306A located between the first bonding substrate 308A and the base substrate 302, and a second cavity structure 306B located between the second bonding substrate 308B and the base substrate 302, and the volume of the first cavity structure 306A is greater than the volume of the second cavity structure 306B.

[0081] When the first bonding substrate 308A and the second bonding substrate 308B are subjected to the same external pressure, the deformation (change in the spacing between the capacitor plates) of the first cavity structure 306A is greater than that of the second cavity structure 306B, that is, the capacitance change of the capacitor formed by the first cavity structure 306A is greater than the capacitance change of the capacitor formed by the second cavity structure 306B. When the capacitor formed by the first bonding substrate 308A, the first cavity structure 306A and the base substrate 302 is used as a variable capacitor A, i.e., a variable capacitance pressure sensor, the capacitor formed by the second bonding substrate 308B, the second cavity structure 306B and the base substrate 302 can be used as a reference capacitor B of the above variable capacitor A, i.e., a reference capacitance pressure sensor. An insulating dielectric layer 304 is formed on the base substrate 302, and the portion of the base substrate 302 where the insulating dielectric layer 304 is not formed respectively forms the first cavity structure 306A and the second cavity structure 306B with the first bonding substrate 308A and the second bonding substrate 308B. The first bonding substrate 308A, the second bonding substrate 308B and the insulating dielectric layer 304 are covered with an insulating dielectric film 318, and the insulating dielectric film 318 has a first electrode 310A of the variable capacitor A, a second electrode 312A of the variable capacitor A, a first electrode 310B of the reference capacitor B and a second electrode 312B of the reference capacitor B, wherein the first electrode 310A is used to lead out the base substrate 302 as the lower plate of the variable capacitor A, the second electrode 312A is used to lead out the first bonding substrate 308A as the upper plate of the variable capacitor A, the first electrode 310B is used to lead out the base substrate 302 as the lower plate of the reference capacitor B, and the second electrode 312B is used to lead out the second bonding substrate 308B as the upper plate of the reference capacitor. The above-mentioned variable capacitor A and reference capacitor B are formed at the same time and integrated in the same tube core, which improves the calibration accuracy of the product compared with separately forming the reference capacitor and the variable capacitor in the capacitive pressure sensor. The variable capacitor A and the reference capacitor B share a lower plate, namely the base substrate 302. Capacitors of the same type are connected in parallel, and the product output value is high, the preparation cost is low, and it is easier to mass produce. The reference capacitor B is a closed cavity structure, and the capacitance value of the capacitor is controllable, which is convenient for the application of calibration test.

[0082] In one embodiment, the second cavity structure 306B corresponding to each reference capacitor B includes at least two sub-cavities. The volume of the first cavity structure 306A is greater than the total volume of the sub-cavities of the second cavity structure 306B. The volume of the second cavity structure 306B can be adjusted by adjusting the volume of the sub-cavities in the second cavity structure 306B to achieve the purpose of adjusting the capacitance value of the reference capacitor B, which is convenient for using reference capacitors with different capacitance values ​​according to the needs of the calibration test (the need for the capacitance to change with the pressure during the test process), and can achieve high-precision test calibration of the product.

[0083] In one embodiment, a distance between two adjacent sub-cavities in the second cavity structure 306B in a direction connecting the first cavity structure 306A and the second cavity structure 306B is greater than 0.8 micrometers.

[0084] Fig.12 Schematic diagram of the structure of the capacitive pressure sensor formed in Example 4.

[0085] In one embodiment, at least two sub-cavities in the second cavity structure 306B have the same volume. In another embodiment, the volumes of the sub-cavities in the second cavity structure 306B are different.

[0086] like Fig.12 As shown, the second cavity structure 306B corresponding to the reference capacitor B includes three sub-cavities 305 , and the volumes of the sub-cavities 305 are the same.

[0087] In the method for preparing the above-mentioned capacitive pressure sensor, after bonding the side of the base substrate with the insulating dielectric layer to the bonding substrate, a cavity structure is formed at a position where the insulating dielectric layer is not set between the base substrate and the bonding substrate; the base substrate can be used as the lower electrode plate of the capacitive pressure sensor, and the bonding substrate can be used as the upper electrode plate of the capacitive pressure sensor. The cavity structure between the lower electrode plate and the upper electrode plate can serve as the dielectric material between the two electrodes of the capacitive pressure sensor. Compared with the prior art, the process for preparing the capacitive pressure sensor in the present application is simple and convenient for mass production.

[0088] like Figure 2 As shown, in one embodiment, a capacitive pressure sensor is provided, comprising:

[0089] Base substrate 102;

[0090] An insulating dielectric layer 104, located on the base substrate 102;

[0091] A bonding substrate 106, bonded to a surface of the base substrate 102 having the insulating dielectric layer 104;

[0092] A first electrode 110, disposed on the base substrate 102 and electrically connected to the base substrate 102;

[0093] A second electrode 112, disposed on the bonding substrate 106 and electrically connected to the bonding substrate 106;

[0094] A cavity structure 108 is formed between the base substrate 102 and the bonding substrate 106 where the insulating dielectric layer 104 is not provided. The base substrate 102 serves as the lower plate of the capacitive pressure sensor, and the bonding substrate 106 serves as the upper plate of the capacitive pressure sensor.

[0095] In one embodiment, the base substrate 102 and the bonding substrate 106 are both single crystal silicon substrates.

[0096] like Figure 6 , Figure 7 As shown, in one embodiment, the capacitive pressure sensor further includes:

[0097] A first doping region 214 is located in the base substrate 202 and below the insulating dielectric layer 204;

[0098] A second doping region 216 is located in the bonding substrate 208 and is close to the insulating dielectric layer 204;

[0099] The lower plate includes the first doping region 214 , and the upper plate includes the second doping region 216 .

[0100] In one embodiment, both the first doping region 214 and the second doping region 216 are N-type doping regions.

[0101] In another embodiment, both the first doping region 214 and the second doping region 216 are P-type doping regions.

[0102] In one embodiment, the resistivity of the first doped region 214 is less than 0.1 ohm-meter, such as 0.04 ohm-meter, 0.05 ohm-meter, 0.08 ohm-meter, 0.09 ohm-meter, etc.

[0103] In one embodiment, the resistivity of the second doped region 216 is less than 0.1 ohm-meter, such as 0.04 ohm-meter, 0.05 ohm-meter, 0.08 ohm-meter, 0.09 ohm-meter, etc.

[0104] like Fig.10 As shown, in one embodiment, the capacitive pressure sensor further includes:

[0105] An insulating dielectric film 218 covering the bonding substrate (ie, the second doping region 216 ) and the insulating dielectric layer 204 ;

[0106] The first electrode 210 penetrates the insulating dielectric film 218 and the insulating dielectric layer 204 and is electrically connected to the base substrate 202 , namely the first doping 214 ; the second electrode 212 penetrates the insulating dielectric film 218 and is electrically connected to the bonding substrate, namely the second doping 216 .

[0107] The first electrode 210 is used to lead out the first doped region 214 as the lower plate of the capacitive pressure sensor, and the second electrode 212 is used to lead out the second doped region 216 as the upper plate of the capacitive pressure sensor. The cavity structure 206 serves as a dielectric between the lower plate and the upper plate. The lower plate and the upper plate of the capacitive pressure sensor can be led to the surface through the first electrode 210 and the second electrode 212, and then connected to the required position. The top surfaces of the first electrode 210 and the second electrode 212 are both higher than the top surface of the insulating dielectric film 218.

[0108] In one embodiment, the first electrode 210 and the second electrode 212 are electrodes made of the same conductive material, such as an aluminum metal electrode, a copper metal electrode, etc. In other embodiments, the first electrode 210 and the second electrode 212 are electrodes made of different conductive materials. The first electrode 210 and the second electrode 212 can be electrodes prepared by a process for preparing a conductive plug connecting upper and lower layers of conductive interconnects in an existing process, which will not be described in detail here.

[0109] like Fig.10 As shown, in one embodiment, the capacitive pressure sensor further includes:

[0110] The first through hole 220 is opened on the base substrate 202 , passes through the insulating dielectric film 218 and the insulating dielectric layer 204 , and exposes the first doped region 214 , and is used for filling to form the first electrode 210 .

[0111] The second through hole 222 is opened on the bonding substrate, penetrates the insulating dielectric film 218 , and exposes the second doping region 216 , and is used to form the second electrode 212 after filling.

[0112] like Fig.11As shown, in one embodiment, the capacitive pressure sensor includes a variable capacitor A and a reference capacitor B, the bonding substrate 308 includes a first bonding substrate 308A and a second bonding substrate 308B separated from each other, and the cavity structure 306 includes a first cavity structure 306A located between the first bonding substrate 308A and the base substrate 302, and a second cavity structure 306B located between the second bonding substrate 308B and the base substrate 302. The volume of the first cavity structure 306A is greater than the volume of the second cavity structure 306B, the first bonding substrate 308A serves as the upper plate of the variable capacitor A, the second bonding substrate 308B serves as the upper plate of the reference capacitor B, and the lower plates of the variable capacitor A and the reference capacitor B are both the base substrate 302.

[0113] When the first bonding substrate 308A and the second bonding substrate 308B are subjected to the same external pressure, the deformation (change in the spacing between the capacitor plates) of the first cavity structure 306A is greater than that of the second cavity structure 306B, that is, the capacitance change of the capacitor formed by the first cavity structure 306A is greater than the capacitance change of the capacitor formed by the second cavity structure 306B. The above-mentioned variable capacitor A and reference capacitor B are formed at the same time and integrated in the same tube core, which improves the calibration accuracy of the product compared with the reference capacitor and variable capacitor formed separately in the capacitive pressure sensor. In addition, the variable capacitor A and the reference capacitor B share a lower plate, namely the base substrate 302, and the same type of capacitors are connected in parallel, the product output value is high, the preparation cost is low, and it is easier to mass produce. In addition, the reference capacitor B is a closed cavity structure, and the capacitance value of the capacitor is controllable, which is convenient for the application of calibration test.

[0114] In one embodiment, the second cavity structure 306B corresponding to each reference capacitor B includes at least two sub-cavities. The volume of the second cavity structure 306B can be adjusted by adjusting the volume of the sub-cavities in the second cavity structure 306B, so as to adjust the capacitance value of the reference capacitor B, and to facilitate the use of reference capacitors with different capacitance values ​​according to the needs of the calibration test (the need for the capacitance to change with the pressure during the test).

[0115] In one embodiment, a distance between two adjacent sub-cavities in the second cavity structure 306B in a direction connecting the first cavity structure 306A and the second cavity structure 306B is greater than 0.8 micrometers.

[0116] In one embodiment, at least two sub-cavities in the second cavity structure 306B have the same volume. In another embodiment, the volumes of the sub-cavities in the second cavity structure 306B are different.

[0117] like Fig.12 As shown, the second cavity structure 306B corresponding to the reference capacitor B includes three sub-cavities 305 , and the volumes of the sub-cavities 305 are the same.

[0118] The above-mentioned capacitive pressure sensor uses the base substrate as the lower electrode plate of the capacitive pressure sensor, and the bonding substrate as the upper electrode plate of the capacitive pressure sensor. The bonding substrate and the base substrate are bonded to each other on one side with an insulating dielectric layer. A cavity structure is formed at a position where no insulating dielectric layer is provided between the base substrate and the bonding substrate. The cavity structure is located between the lower electrode plate and the upper electrode plate, and can serve as a dielectric material between the two electrodes of the capacitive pressure sensor. Compared with the prior art, the capacitive pressure sensor in the present application has a simple structure and is convenient for mass production.

[0119] It should be understood that although Figure 1 , Figure 3 , Figure 8 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 , Figure 3 , Figure 8 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0120] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0121] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features of the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0122] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A method for preparing a capacitive pressure sensor, characterized in that: include: Bonding a surface of the base substrate having an insulating dielectric layer formed thereon to a bonding substrate, wherein a cavity structure is formed at a position between the base substrate and the bonding substrate where the insulating dielectric layer is not provided; forming a first electrode electrically connected to the base substrate on the base substrate, and forming a second electrode electrically connected to the bonding substrate on the bonding substrate; Among them, the base substrate serves as the first electrode plate of the capacitive pressure sensor, and the bonding substrate serves as the second electrode plate of the capacitive pressure sensor; the second electrode contacts the top of the bonding substrate away from the base substrate; the bonding substrate is a substrate of a single crystal silicon material with a second doping region formed thereon, and the second electrode plate includes the second doping region, and the second doping region is formed after the cavity structure is formed by bonding; the steps of forming the second doping region include: forming a mask structure exposing a preset injection region on a bonding substrate of single crystal silicon material; after injecting first conductive type impurity ions into the preset injection region exposed by the mask structure through an injection process, forming a second doping region in the preset injection region; removing the mask structure on the surface of the bonding substrate to obtain the second doping region located in the bonding substrate.

2. The preparation method according to claim 1, characterized in that: Before the step of forming a first electrode electrically connected to the base substrate on the base substrate, the method further includes the step of forming a first doped region in the base substrate of single crystal silicon material; the first electrode plate includes the first doped region.

3. The preparation method according to claim 1 or 2, characterized in that: The step of bonding the one side of the base substrate with the insulating dielectric layer to the bonding substrate, and forming a cavity structure at a position between the base substrate and the bonding substrate where the insulating dielectric layer is not provided, comprises: forming an insulating dielectric layer thin film on a base substrate; Etching the insulating dielectric layer film to expose a portion of the base substrate on which the insulating dielectric layer film is formed, thereby obtaining an insulating dielectric layer; The side of the base substrate on which the insulating dielectric layer is formed is bonded to a bonding substrate, and a cavity structure is formed at a position between the base substrate and the bonding substrate where the insulating dielectric layer is not provided.

4. The preparation method according to claim 3, characterized in that: The bonding substrate bonded to the base substrate includes a first bonding substrate and a second bonding substrate separated from each other, the cavity structure includes a first cavity structure located between the first bonding substrate and the base substrate, and a second cavity structure located between the second bonding substrate and the base substrate, and the volume of the first cavity structure is greater than the volume of the second cavity structure; Among them, one of the first bonding substrate and the second bonding substrate is a substrate made of single crystal silicon material with a second doping region formed thereon; the other is selected from a substrate made of single crystal silicon material with a second doping region formed thereon and a substrate made of doped single crystal silicon material.

5. The preparation method according to claim 2, characterized in that: The step of forming a first electrode electrically connected to the base substrate on the base substrate and forming a second electrode electrically connected to the bonding substrate on the bonding substrate comprises: forming an insulating dielectric film covering the bonding substrate and the insulating dielectric layer; Etching the insulating dielectric film to form a first through hole exposing the first doped region and a second through hole exposing the second doped region; A first electrode is formed in the first through hole, and a second electrode is formed in the second through hole.

6. A capacitive pressure sensor, characterized in that: include: Base substrate; An insulating dielectric layer, located on the base substrate; A bonding substrate, bonded to a surface of the base substrate having an insulating dielectric layer; A first electrode, disposed on the base substrate and electrically connected to the base substrate; a second electrode, disposed on the bonding substrate and electrically connected to the bonding substrate; A cavity structure is formed at a position where no insulating dielectric layer is provided between the base substrate and the bonding substrate, the base substrate serves as the first electrode plate of the capacitive pressure sensor, the bonding substrate serves as the second electrode plate of the capacitive pressure sensor, and the second electrode contacts the top of the bonding substrate away from the base substrate; the bonding substrate is a substrate of a single crystal silicon material having a second doping region formed thereon, the second electrode plate includes the second doping region, and the second doping region is formed after bonding to form the cavity structure; the steps of forming the second doping region include: forming a mask structure exposing a preset injection region on a bonding substrate of a single crystal silicon material; after injecting first conductive type impurity ions into the preset injection region exposed by the mask structure through an injection process, forming a second doping region in the preset injection region; removing the mask structure on the surface of the bonding substrate to obtain the second doping region located in the bonding substrate.

7. The capacitive pressure sensor according to claim 6, characterized in that: Also includes: A first doped region is located in the base substrate and below the insulating dielectric layer; Wherein, the first electrode plate includes the first doped region.

8. The capacitive pressure sensor according to claim 6, characterized in that: Also includes: An insulating dielectric film covering the bonding substrate and the insulating dielectric layer; The first electrode penetrates the insulating dielectric film and the insulating dielectric layer and is electrically connected to the base substrate, and the second electrode penetrates the insulating dielectric film and is electrically connected to the bonding substrate.

9. The capacitive pressure sensor according to claim 6, characterized in that: The bonding substrate includes a first bonding substrate and a second bonding substrate separated from each other, the cavity structure includes a first cavity structure located between the first bonding substrate and the base substrate, and a second cavity structure located between the second bonding substrate and the base substrate, the volume of the first cavity structure is greater than the volume of the second cavity structure, the first bonding substrate serves as a second plate of a variable capacitor, and the second bonding substrate serves as a second plate of a reference capacitor; Among them, one of the first bonding substrate and the second bonding substrate is a substrate made of single crystal silicon material with a second doping region formed thereon; the other is selected from a substrate made of single crystal silicon material with a second doping region formed thereon and a substrate made of doped single crystal silicon material.

10. The capacitive pressure sensor according to claim 9, characterized in that: The second cavity structure corresponding to each of the reference capacitors includes at least two sub-cavities.

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