A low-power tag detection circuit for RFID

Abstract

The present invention discloses a low-power tag detection circuit for RFID, including: a transmitting circuit, a receiving filter circuit, an 8-bit AD circuit and a tag detection logic circuit, wherein: the transmitting circuit includes an internal clock circuit and two driving circuits; under the control of the tag detection logic circuit, when the tag needs to be detected, the internal clock circuit is enabled to generate a 13.56MHz clock; the receiving filter circuit is composed of a sampling follower circuit and an active filter circuit, and two differential inputs are connected by an external coil to the sampling follower circuit; the 8-bit AD circuit is composed of a comparator, an 8-bit DA module and an AD control unit; the tag detection logic circuit includes two modules, a timer and a digital comparator. By setting the counting time of the timer, the entire tag detection system is started at a fixed time, and an enabling control signal of the transmitting circuit, the receiving filter circuit and the 8-bit AD circuit is generated. The present invention determines whether to start the RFID radio frequency identification system by judging whether there is a tag card receiving energy, thereby reducing unnecessary startups and achieving the effect of reducing power consumption.

Description

Technical Field

[0001] The invention relates to the technical field of RFID radio frequency, and more precisely to a low-power consumption tag detection circuit of RFID. Background Art

[0002] The power consumption of RFID system is relatively large when it is working, which can even reach several hundred watts. In order to reduce power consumption in the application, the timed interrupt wake-up method is generally adopted. The RFID system is started by software and a communication signal is sent. If the signal fed back by the tag card is received, the RFID communication device continues to communicate with the tag card. If the signal fed back by the tag card is not received, the RFID communication device stops working to save power consumption.

[0003] For example, patent application No. 202011468165.3 discloses a low-power RFID reading and writing system and method, wherein, in the low-power RFID reading and writing system, the central processing unit controls the selection signal according to the low-power card detection mode, so that the low-power RFID reading and writing system operates in the low-power card detection mode, and detects RFID tags with the sleep stage, preparation stage and detection stage as the detection cycle; in the sleep stage, the central processing unit controls the low-power RFID reading and writing system to operate at the lowest power, and uses a low-frequency ring oscillator to provide a clock signal; in the preparation stage, the central processing unit controls the low-power RFID reading and writing system to turn on the main frequency crystal oscillator; in the detection stage, the central processing unit controls the RFID detection module to detect RFID tags. The power consumption of the reader and processor is greatly reduced, and its endurance is enhanced in battery-powered applications, reducing the waste of power resources.

[0004] This traditional method requires starting up RFID radio frequency communication equipment and CPU and other modules every time, which cannot meet the demand for low power consumption in today's increasing number of lithium battery-powered applications. Summary of the invention

[0005] In view of the shortcomings of the above-mentioned technology, the purpose of the present invention is to provide a low-power RFID tag detection circuit, which determines whether to start the RFID radio frequency identification system by judging whether there is a tag card receiving energy, thereby reducing unnecessary startups and achieving the effect of reducing power consumption.

[0006] Based on this, the present invention is achieved in that:

[0007] A low-power tag detection circuit for RFID, comprising: a transmitting circuit, a receiving filter circuit, an 8-bit AD circuit and a tag detection logic circuit, wherein:

[0008] The transmitting circuit includes an internal clock circuit and two driving circuits. Under the control of the tag detection logic circuit, when a tag needs to be detected, the internal clock circuit is enabled to generate a 13.56MHz clock.

[0009] The receiving filter circuit is composed of a sampling follower circuit and an active filter circuit. Two differential inputs are connected to the sampling follower circuit through an external coil.

[0010] The 8-bit AD circuit is composed of a comparator, an 8-bit DA module and an AD control unit. The receiving filter circuit outputs a sampling voltage as the input of the AD circuit and is connected to the positive input of the comparator. The output of the 8-bit DA module is used as the negative input of the comparator. Under the control of the tag detection logic circuit, when a tag needs to be detected, the AD control unit judges the result of the comparator and then adjusts the output voltage of the DA module, approximating it successively to complete the analog-to-digital conversion of the sampling voltage and obtain the corresponding 8-bit data.

[0011] The tag detection logic circuit includes two modules: a timer and a digital comparator. By setting the counting time of the timer, the entire tag detection system is started at a fixed time to generate the enable control signal of the sending circuit, receiving filter circuit and 8-bit AD circuit.

[0012] Furthermore, the internal clock circuit outputs two complementary 13.56 MHz clock signals, which are output to the external coil through two driving circuits to provide energy to the tag card.

[0013] Furthermore, the sampling follower circuit is composed of two source follower circuits, and the two signals after following serve as single-ended inputs of the active filter circuit. Under the control of the tag detection logic circuit, when a tag needs to be detected, the charging current of the filter capacitor is determined by the input signal. When the charging current is equal to the rated discharge current, the voltage of the filter capacitor is the sampling voltage.

[0014] Furthermore, when there is no tag card on the external coil, the energy sent by the transmitting capacitor is all on the coil, the differential input signal amplitude of the receiving end is also relatively large, and the sampling voltage amplitude obtained by the receiving filter circuit is also large. When there is a tag card on the external coil, most of the energy sent by the transmitting capacitor is absorbed by the tag card, the differential input signal amplitude of the receiving end is also relatively small, and the sampling voltage amplitude obtained by the receiving filter circuit is also small.

[0015] Furthermore, the digital comparator compares the 8-bit data outputted by the AD conversion with the threshold. When the data is greater than the threshold, it indicates that the sampling voltage is relatively high and no tag is stuck on the coil. When the data is less than the threshold, it indicates that the sampling voltage is relatively low and a tag is stuck on the coil. At the same time, a tag valid signal is generated, generating an interrupt.

[0016] Furthermore, the digital comparator circuit can obtain the data converted by the AD circuit for multiple times, and take the average before comparison to reduce external interference.

[0017] The low-power RFID tag detection circuit proposed by the present invention transmits energy regularly by a special transmitting circuit, and samples the transmitted voltage amplitude through a receiving filter circuit, and performs analog-to-digital conversion. By detecting the transmitted voltage amplitude, it can be determined whether there is a tag card receiving energy to decide whether to start the RFID radio frequency identification system. Therefore, it can greatly reduce the startup of RFID radio frequency communication equipment and CPU and other modules in unnecessary situations, reduce the average power consumption of the entire system, and meet the low power consumption requirements of lithium battery-powered RFID devices.

[0018] The present invention greatly reduces the average power consumption of the entire system, and meets the requirement of low power consumption of RFID equipment in lithium battery powered applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Circuit diagram of the present invention.

[0020] Figure 2 Circuit diagram of the transmitting circuit of the present invention.

[0021] Figure 3 A circuit diagram of a receiving filter circuit of the present invention.

[0022] Figure 4 Circuit diagram of the 8 bit AD circuit of the present invention.

[0023] Figure 5 Circuit diagram of the tag detection logic circuit of the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0025] Figure 1 is a circuit structure diagram of an embodiment of the present invention, the circuit includes a transmitting circuit I 11, a receiving sampling and filtering circuit I 12, an 8-bit AD circuit I 13 and a tag detection logic circuit I 14.

[0026] The tag detection logic circuit I14 controls the transmitting circuit I11, the receiving sampling filter circuit I12 and the 8-bit AD circuit I13 respectively through the TX_CTL, RX_CTL and AD_CTL signals, and enables and starts each module respectively when performing tag detection.

[0027] The transmitting circuit is as follows Figure 2 As shown, it includes two driving circuits I21 and I22, and an internal clock circuit I23. When the detection tag is started, the internal clock circuit I23 is enabled to generate a 13.56 MHz clock.

[0028] The outputs of the driving circuits I 21 and I 22 are TX1 and TX2, which are connected to the external coil to provide energy to the tag. The inputs of the driving circuits I 21 and I 22 are TX1_PRE and TX2_PRE, which are two complementary 13.56 MHz clock signals output by the internal clock circuit I 23.

[0029] Receive filter circuit such as Figure 3 As shown, it is composed of a sampling follower circuit and an active filter circuit. The sampling follower circuit includes two source followers, namely, a source follower composed of a PMOS tube M33 and a current source I32 and a source follower composed of a PMOS tube M34 and a current source I33. The differential input signals RX1 and RX2 introduced by the external coil are connected to the gate terminals of M33 and M34 as inputs, respectively. The outputs of the two source follower circuits are FRX1 and FRX2.

[0030] The active filter circuit is composed of NMOS tube M31, NMOS tube M32, switch S31, capacitor C31 and current source I31. FRX1 and FRX2 are connected to the gates of M31 and M32 as input signals to control the charging current of capacitor C31. The current is controlled by the input voltage. When the charging current is equal to the discharge current I31, the voltage SMP_IN of the filter capacitor is the sampling voltage. RX_CTL is used as the enable of the entire module to control the switch S31.

[0031] like Figure 4 As shown in FIG. 1 , the 8-bit AD circuit is composed of a comparator I41, an 8-bit DA module I42, and an AD control unit I43. The output SMP_IN of the receiving filter circuit is used as the input of the AD circuit and connected to the positive input of the comparator I41. The output DA_OUT of the 8-bit DA module is used as the negative input of the comparator. Under the control of the AD_CTL signal, when the tag needs to be detected, the AD control unit I43 judges the result CMP_OUT of the comparator, and then adjusts the output voltage DA_OUT of the DA module, and successively approximates to complete the analog-to-digital conversion of the sampling voltage to obtain the corresponding 8-bit data AD_DAT.

[0032] Tag detection logic circuit such as Figure 5 As shown, it includes two modules, timer I51 and digital comparator I52. By setting the counting time of timer I51, the entire tag detection system is started at a fixed time, and the enable control signals TX_CTL, RX_CTL, AD_CTL and CMP_CTL are generated. The digital comparator I52 averages the data AD_DAT output from 8 AD conversions and compares it with the threshold. When the data is greater than the threshold, it indicates that the sampling voltage is relatively high and there is no tag stuck on the coil. When the data is less than the threshold, it indicates that the sampling voltage is relatively low and there is a tag stuck on the coil. At the same time, a tag valid signal TAGV is generated, and an interrupt signal is generated.

[0033] In this way, a dedicated transmission circuit transmits energy at regular intervals, and the receiving filter circuit samples the transmitted voltage amplitude and performs analog-to-digital conversion. By detecting the transmitted voltage amplitude, it can be determined whether there is a tag card receiving energy to decide whether to start the RFID radio frequency identification system. Therefore, it can greatly reduce the unnecessary startup of RFID radio frequency communication equipment and CPU and other modules, reduce the average power consumption of the entire system, and meet the low power consumption requirements of lithium battery-powered RFID devices.

[0034] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A low-power RFID tag detection circuit, comprising: Transmitting circuit, receiving filter circuit, 8-bit AD circuit and tag detection logic circuit, including: The transmitting circuit includes an internal clock circuit and two driving circuits. Under the control of the tag detection logic circuit, when a tag needs to be detected, the internal clock circuit is enabled to generate a 13.56MHz clock. The receiving filter circuit is composed of a sampling follower circuit and an active filter circuit. Two differential inputs are connected to the sampling follower circuit through an external coil. The sampling follower circuit includes two source followers, namely, a source follower composed of a PMOS tube M33 and a current source I32 and a source follower composed of a PMOS tube M34 and a current source I33; the differential input signals RX1 and RX2 introduced by the external coil are connected to the gate terminals of M33 and M34 as inputs respectively; the outputs of the two source follower circuits are FRX1 and FRX2; The active filter circuit is composed of NMOS tube M31, NMOS tube M32, switch S31, capacitor C31 and current source I31; FRX1 and FRX2 are connected to the gates of M31 and M32 as input signals to control the charging current of capacitor C31; the current size is controlled by the input voltage, when the charging current is equal to the discharge current I31, the voltage SMP_IN of the filter capacitor is the sampling voltage; RX_CTL is used as the enable of the entire module to control the switch S31; The 8-bit AD circuit is composed of a comparator, an 8-bit DA module and an AD control unit. The sampling voltage output by the receiving filter circuit is used as the input of the 8-bit AD circuit and connected to the positive input of the comparator. The output of the 8-bit DA module is used as the negative input of the comparator. Under the control of the tag detection logic circuit, when the tag needs to be detected, the AD control unit judges the result of the comparator and then adjusts the output voltage of the 8-bit DA module, and successively approximates to complete the analog-to-digital conversion of the sampling voltage to obtain the corresponding 8-bit data. The tag detection logic circuit includes two modules: a timer and a digital comparator. By setting the counting time of the timer, the entire tag detection system is started at a fixed time to generate enable control signals for the sending circuit, receiving filter circuit and 8-bit AD circuit.

2. The low power consumption tag detection circuit of RFID as claimed in claim 1, characterized in that The internal clock circuit outputs two complementary 13.56 MHz clock signals, which are output to the external coil through two driving circuits.

3. The low power consumption tag detection circuit of RFID as claimed in claim 1, characterized in that The digital comparator compares the 8-bit data output by the AD conversion with the threshold; when the data is greater than the threshold, it indicates that the sampling voltage is high and no tag is stuck on the coil; when the data is less than the threshold, it indicates that the sampling voltage is low and a tag is stuck on the coil, and a tag valid signal is generated at the same time, generating an interrupt.

4. The low power consumption tag detection circuit of RFID as claimed in claim 1, characterized in that The digital comparator circuit takes the data converted by the AD circuit multiple times, takes the average, and then compares them.

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