An enhanced N-face GaN-based p-channel device and its preparation method

Abstract

The present invention discloses an enhanced-mode N-face GaN-based p-channel device and a method for fabricating the same. The method comprises: providing a first substrate; growing an epitaxial structure on the surface of the first substrate; etching a first groove on the surface of the p-GaN layer away from the AlGaN barrier layer, and depositing a SiN layer; bonding a second substrate to the surface of the SiN layer away from the p-GaN layer; flipping the sample, etching away the first substrate, the GaN buffer layer, and the GaN layer, and fabricating source and drain electrodes in first and second predetermined regions of the AlGaN barrier layer; etching a second groove on the surface of the AlGaN barrier layer away from the second substrate, and fabricating a gate electrode; growing a SiN protective layer on the surface of the AlGaN barrier layer away from the second substrate, and photoetching a metal interconnection layer opening region on the SiN protective layer before extracting the electrode. This method can improve hole mobility, thereby enhancing the performance of the resulting p-channel GaN device.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to an enhanced N-face GaN-based p-channel device and a preparation method thereof. Background Art

[0002] GaN material has excellent material properties, such as a wide bandgap, high electron saturation velocity, good breakdown characteristics, and excellent high-temperature stability, making it very suitable for use in high-frequency power devices and power electronics. However, the demand for HEMT devices used in the high-frequency range is gradually increasing. The severe parasitic effects caused by using Si-based CMOS devices to drive GaN-based devices make it difficult to fully utilize the characteristics of GaN devices. Therefore, GaN-based CMOS devices have begun to be widely researched.

[0003] In the prior art, CMOS devices consist of enhancement-mode n-channel and p-channel devices. For conventional GaN materials with Ga surfaces, p-channel devices fabricated using them require the deposition of an insulating dielectric layer under the gate to improve leakage. However, depositing an insulating dielectric layer under the gate introduces additional fixed charges in the oxide layer and interfacial charges at the interface between the oxide layer and the GaN material. These charges introduce additional scattering issues, significantly affecting carrier mobility and ultimately device characteristics. Summary of the Invention

[0004] In order to solve the above problems existing in the prior art, the present invention provides an enhanced N-face GaN-based p-channel device and a method for preparing the same. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0005] In a first aspect, the present invention provides a method for preparing an enhanced N-face GaN-based p-channel device, comprising:

[0006] providing a first substrate;

[0007] growing an epitaxial structure on the surface of the first substrate, the epitaxial structure comprising a GaN buffer layer, a GaN layer, an AlGaN barrier layer, and a p-GaN layer sequentially grown on the surface of the first substrate;

[0008] Etching a first groove on a surface of the p-GaN layer away from the AlGaN barrier layer, and depositing a SiN layer;

[0009] A second substrate is formed by bonding the surface of the SiN layer away from the p-GaN layer;

[0010] After flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate, the GaN buffer layer, and the GaN layer are sequentially etched away, and a source electrode is formed in a first predetermined region of the AlGaN barrier layer, and a drain electrode is formed in a second predetermined region of the AlGaN barrier layer;

[0011] A second groove is formed by etching a surface of the AlGaN barrier layer away from the second substrate, and a gate electrode is formed;

[0012] A SiN protective layer is grown on the surface of the AlGaN barrier layer away from the second substrate, and a source electrode, a drain electrode and a gate electrode are drawn out after photolithography of a metal interconnection layer opening region on the SiN protective layer to obtain the enhanced N-face GaN-based p-channel device.

[0013] In one embodiment of the present invention, the step of etching a first groove on the surface of the p-GaN layer away from the AlGaN barrier layer and depositing a SiN layer includes:

[0014] The sample is baked at 200° C., and after dropping photoresist on the surface of the first substrate, photoresist is spread using a spreader;

[0015] The sample was rinsed with ultrapure water and dried with nitrogen;

[0016] Using chlorine-based inductively coupled plasma (ICP), etching a first groove on a surface of the p-GaN layer away from the AlGaN barrier layer;

[0017] Using N2 and SiH4 as reaction gases, under the conditions of a first substrate temperature of 250°C, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20W, a SiN layer is deposited on the surface of the p-GaN layer away from the AlGaN barrier layer.

[0018] In one embodiment of the present invention, the first groove includes a first surface parallel to the first substrate;

[0019] Wherein, along a direction perpendicular to the plane where the first substrate is located, the distance between the first surface and the AlGaN barrier layer is 20 nm.

[0020] In one embodiment of the present invention, before the step of bonding the surface of the SiN layer away from the p-GaN layer to form the second substrate, the method further comprises:

[0021] The surface of the SiN layer away from the p-GaN layer is polished by using a chemical mechanical polishing process.

[0022] In one embodiment of the present invention, after flipping the sample in a direction perpendicular to the plane of the first substrate, sequentially etching away the first substrate, the GaN buffer layer, and the GaN layer, and forming a source electrode in a first predetermined region of the AlGaN barrier layer and a drain electrode in a second predetermined region of the AlGaN barrier layer, include:

[0023] After flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate was etched away under the conditions of an upper electrode power of 250 to 350 W, a lower electrode power of 20 to 40 W, a pressure of 5 mTorr, and an SF6 flow rate of 50 sccm;

[0024] Under the conditions of an upper electrode power of 40 to 60 W, a lower electrode power of 20 to 30 W, a pressure of 5 mTorr, a Cl2 flow rate of 8 sccm, and a BCl3 flow rate of 20 sccm, the GaN buffer layer and the GaN layer are sequentially etched away;

[0025] A source electrode is fabricated in a first predetermined region of the AlGaN barrier layer, and a drain electrode is fabricated in a second predetermined region of the AlGaN barrier layer.

[0026] In one embodiment of the present invention, along a direction perpendicular to the plane where the first substrate is located, the orthographic projection of the first groove coincides with the orthographic projection of the second groove.

[0027] In one embodiment of the present invention, the step of etching a second groove on a surface of the AlGaN barrier layer away from the second substrate and forming a gate electrode includes:

[0028] Etching a second groove on a surface of the AlGaN barrier layer away from the second substrate, and photolithographically obtaining a gate electrode pattern in the second groove;

[0029] The sample with the gate electrode photolithography pattern was placed in a plasma stripper for bottom film treatment. Then the sample was placed in an electron beam evaporation station. When the vacuum degree of the reaction chamber of the electron beam evaporation station reached 2×10 -6 When the gate metal is evaporated on the photoresist inside and outside the preset gate electrode area,

[0030] The sample after gate metal evaporation is stripped to remove the gate metal, photoresist and stripping glue outside the preset gate electrode area, and the sample is rinsed with ultrapure water and blown dry with nitrogen to obtain a completed gate electrode.

[0031] In one embodiment of the present invention, the step of growing a SiN protective layer on a surface of the AlGaN barrier layer away from the second substrate includes:

[0032] Using NH3 and SiH4 as reaction gases, a SiN protective layer with a thickness of 200nm was grown on the surface of the AlGaN barrier layer away from the second substrate using a PECVD process under the conditions of a second substrate temperature of 250℃, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20-25W.

[0033] In a second aspect, the present invention further provides an enhancement-mode N-face GaN-based p-channel device, which is manufactured by the method for manufacturing an enhancement-mode N-face GaN-based p-channel device described in the first aspect.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] The present invention adopts conventional Ga-face materials and realizes N-face GaN-based materials through a transfer and flipping method, thereby overcoming the problem that N-face GaN materials are difficult to grow. On the other hand, by using N-face GaN materials to prepare p-channel devices, the deposition of an insulating layer under the gate is avoided by using AlGaN / GaN heterojunction materials, thereby avoiding the scattering effects caused by fixed charges introduced by the dielectric layer and interface charges, and improving the mobility of holes. This improves the performance of p-channel GaN devices, and the characteristics of CMOS devices prepared thereby are also improved.

[0036] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a flow chart of a method for preparing an enhancement mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0039] Figure 3 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0040] Figure 4 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0041] Figure 5 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0042] Figure 6 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0043] Figure 7This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0044] Figure 8 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0045] Figure 9 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0046] Figure 10 This is another schematic diagram of a method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention;

[0047] Figure 11 This is another schematic diagram of the method for preparing an enhancement-mode N-face GaN-based p-channel device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The present invention will be further described in detail below with reference to specific examples, but the embodiments of the present invention are not limited thereto.

[0049] Figure 1 This is a flow chart of a method for preparing an enhanced N-face GaN-based p-channel device provided by an embodiment of the present invention. Figure 2-11 This is a schematic diagram of a method for preparing an enhanced N-face GaN-based p-channel device provided by an embodiment of the present invention. Figure 1-11 The embodiment of the present invention provides a method for preparing an enhancement mode N-face GaN-based p-channel device, comprising:

[0050] S1. providing a first substrate;

[0051] S2. growing an epitaxial structure on the surface of the first substrate, the epitaxial structure comprising a GaN buffer layer, a GaN layer, an AlGaN barrier layer, and a p-GaN layer sequentially grown on the surface of the first substrate;

[0052] S3, etching a first groove on the surface of the p-GaN layer away from the AlGaN barrier layer, and depositing a SiN layer;

[0053] S4, bonding the SiN layer on a surface away from the p-GaN layer to form a second substrate;

[0054] S5, after flipping the sample in a direction perpendicular to the plane of the first substrate, sequentially etching the first substrate, the GaN buffer layer, and the GaN layer, and forming a source electrode in a first predetermined region of the AlGaN barrier layer and a drain electrode in a second predetermined region of the AlGaN barrier layer;

[0055] S6. Etching a second groove on a surface of the AlGaN barrier layer away from the second substrate, and forming a gate electrode;

[0056] S7. A SiN protective layer is grown on the surface of the AlGaN barrier layer away from the second substrate, and a source electrode, a drain electrode and a gate electrode are drawn out after photolithography of a metal interconnection layer opening region on the SiN protective layer to obtain an enhanced N-face GaN-based p-channel device.

[0057] In this embodiment, the first substrate may be a Si substrate, and an MOCVD (Metal-organic Chemical Vapor Deposition) method is used to grow an epitaxial structure on the surface of the first substrate. Optionally, Figure 2 From the perspective shown, the epitaxial structure is composed of a GaN buffer layer, a GaN layer, an AlGaN barrier layer, and a p-GaN layer from bottom to top.

[0058] In step S3, a first groove is etched on the surface of the p-GaN layer away from the AlGaN barrier layer, such as Figure 3 As shown in FIG, in a direction perpendicular to the plane of the first substrate, the first groove is recessed toward the side close to the AlGaN barrier layer, and then a SiN layer is continuously deposited on the surface of the p-GaN layer away from the first substrate to fill the first groove. Further, a second substrate is bonded to the surface of the SiN layer away from the p-GaN layer, and as shown in FIG. Figure 4-5 As shown, the sample is turned upside down in a direction perpendicular to the plane of the first substrate, the first substrate, GaN buffer layer and GaN layer are etched away in sequence, and the source electrode and drain electrode are respectively made in the first preset area and the second preset area of ​​the AlGaN barrier layer.

[0059] It should be noted that, in this embodiment, the second substrate may also be a Si substrate.

[0060] It should be understood that when the above method is used to prepare GaN devices, due to the presence of an AlGaN barrier layer above the channel, the deposition of an insulating layer under the gate can be avoided, thereby avoiding the charge influence of the dielectric layer at the interface of the GaN material, improving the mobility of holes, and improving the performance of the obtained p-channel GaN device, which is also conducive to improving the characteristics of CMOS devices.

[0061] Specifically, see Figure 9-10 , a second groove is formed by etching the surface of the AlGaN barrier layer away from the second substrate, and a gate electrode is made, wherein the gate metal can be a metal stack structure composed of two layers of metal, Ni and Au. Then, as Figure 11As shown, a SiN protective layer is grown on the surface of the AlGaN barrier layer away from the second substrate, a metal interconnection layer opening area is photolithographically formed on the SiN protective layer, and a source electrode, a drain electrode and a gate electrode are led out to complete the fabrication of an enhancement-mode N-face GaN-based p-channel device.

[0062] Optionally, in the above step S2, the step of etching a first groove on the surface of the p-GaN layer away from the AlGaN barrier layer and depositing a SiN layer includes:

[0063] S201, baking the sample at 200° C., and dripping photoresist on the surface of the first substrate, and then performing photoresist coating using a coating machine;

[0064] S202, washing the sample with ultrapure water and drying it with nitrogen;

[0065] S203, using chlorine-based inductively coupled plasma (ICP) to etch a first groove on a surface of the p-GaN layer away from the AlGaN barrier layer;

[0066] S204, using N2 and SiH4 as reaction gases, under the conditions of a first substrate temperature of 250°C, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20W, a SiN layer is deposited on the surface of the p-GaN layer away from the AlGaN barrier layer.

[0067] Specifically, in step S201, the sample is first baked on a 200°C hotplate. It is then placed on a spin coater and EPI621 photoresist is dripped onto the first substrate surface of the sample for spin coating. The sample is then baked on a 90°C hotplate. After baking, the sample is exposed and developed. In step S202, the sample is rinsed with ultrapure water for 2 minutes and blown dry with nitrogen. Optionally, the spin coater is initially spun at 500 rpm for 5 seconds, followed by a spin coater at 3500 rpm for 40 seconds.

[0068] Furthermore, a chlorine-based ICP is used to etch the surface of the p-GaN layer away from the AlGaN barrier layer to form a first groove. Specifically, the gas used in the etching process is Cl2 / BCl3, the flow rate of Cl2 / BCl3 is 8 / 20sccm, the upper electrode power is 40~60W, the lower electrode power is 10~20W, and the pressure is 5mTorr.

[0069] Please continue to see Figure 3 The first groove includes a first surface parallel to the first substrate. A distance H between the first surface and the AlGaN barrier layer, perpendicular to the plane of the first substrate, is 20 nm. In other words, the p-GaN layer is etched until approximately 20 nm remains.

[0070] In this embodiment, before depositing the SiN layer, the sample was ultrasonically cleaned in an acetone solution for 3 minutes with an ultrasonic intensity of 2.0; then, the sample was ultrasonically cleaned in an ethanol solution for 2 minutes with an ultrasonic intensity of 2.0, and then the sample was rinsed with ultrapure water and blown dry with nitrogen.

[0071] In step S204, a SiN layer is grown on the surface of the p-GaN layer away from the AlGaN barrier layer using a plasma enhanced chemical vapor deposition (PECVD) process. The process conditions for depositing the SiN layer are: NH3 and SiH4 as the N source and Si source, a deposition temperature of 250°C, a reaction chamber pressure of 600 mTorr, and an RF power of 20 W.

[0072] Optionally, before the step of bonding the surface of the SiN layer away from the p-GaN layer to form a second substrate, the method further includes:

[0073] The surface of the SiN layer away from the p-GaN layer is polished by using a chemical mechanical polishing process.

[0074] It is understandable that before bonding the second substrate, the surface of the SiN layer away from the p-GaN layer is first polished through a chemical mechanical polishing process. This design method can make the surface of the SiN layer in contact with the second substrate smoother, thereby avoiding unstable bonding between the second substrate and the SiN layer, and preventing the second substrate from falling off due to unstable bonding when the sample is subsequently flipped.

[0075] Please continue to see Figure 6-8 In the above step S5, after flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate, the GaN buffer layer, and the GaN layer are sequentially etched away, and a source electrode is formed in a first predetermined region of the AlGaN barrier layer, and a drain electrode is formed in a second predetermined region of the AlGaN barrier layer, including:

[0076] S501, after flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate is etched away under the conditions of upper electrode power of 250-350W, lower electrode power of 20-40W, pressure of 5mTorr, and SF6 flow rate of 50sccm;

[0077] S502, under the conditions of upper electrode power of 40-60W, lower electrode power of 20-30W, pressure of 5mTorr, Cl2 flow rate of 8sccm, and BCl3 flow rate of 20sccm, sequentially etching away the GaN buffer layer and the GaN layer;

[0078] S503 , fabricating a source electrode in a first predetermined region of the AlGaN barrier layer, and fabricating a drain electrode in a second predetermined region of the AlGaN barrier layer.

[0079] Specifically, after turning the sample upside down, the upper second substrate is first etched away. The etching conditions are: upper electrode power 250~350W, lower electrode power 20~40W, pressure 5mTorr, SF6 flow rate 50sccm, and then ICP chlorine-based etching of the GaN buffer layer and the GaN layer. The etching conditions can be: upper electrode power 40~60W, lower electrode power 20~30W, pressure 5mTorr, Cl2 flow rate 8sccm, and BCl3 flow rate 20sccm.

[0080] Furthermore, in the above step S503, forming a source electrode in a first predetermined region of the AlGaN barrier layer and forming a drain electrode in a second predetermined region of the AlGaN barrier layer includes:

[0081] S5031, etching a first preset region and a second preset region of the AlGaN barrier layer;

[0082] First, the sample is placed on a hot plate at 200°C for baking, and the photoresist is applied and spun at a speed of 3500 rpm. The sample is then placed on a hot plate at 90°C for baking again. Next, the sample is placed in a photolithography machine to expose the photoresist in the first and second preset areas. The exposed sample is placed in a developer to remove the photoresist in the electrically isolated area, and is then rinsed with ultrapure water and blown dry with nitrogen.

[0083] Furthermore, the AlGaN barrier layer in the development area is etched to the p-GaN layer using the ICP process, with an etching depth of about 20 nm. The etching conditions may be: upper electrode power 15-25 W, lower electrode power 3-5 W, pressure 5 mTorr, Cl2 flow rate 4 sccm, and BCl3 flow rate 10 sccm.

[0084] Optionally, the sample is sequentially placed in an acetone solution, a stripping solution, an acetone solution, and an ethanol solution for cleaning to remove the photoresist outside the electrical isolation area, and finally the sample is rinsed with ultrapure water and blown dry with nitrogen gas.

[0085] S5032, photolithography source and drain electrode regions;

[0086] First, the etched sample is placed on a hot plate at 200°C for baking; then, the stripping glue is thrown on the sample, the thickness of the glue thrown can be 0.35μm, and the sample is placed on a hot plate at 200°C for baking; then, photoresist is coated and thrown on the stripping glue, at this time the thickness of the glue thrown is 0.77μm, and the sample is placed on a hot plate at 90°C for baking; the sample is placed in a photolithography machine, and the photoresist in the source electrode area and the drain electrode area is exposed; finally, the exposed sample is placed in a developer, the photoresist and stripping glue in the source electrode area and the drain electrode area are removed, and the sample is rinsed with ultrapure water and blown dry with nitrogen.

[0087] S5033, evaporating source and drain electrodes;

[0088] Specifically, after completing the photolithography, the sample is placed in a plasma stripper for bottom film treatment to remove the undeveloped photoresist layer in the drain electrode area and the source electrode area, which can effectively improve the stripping yield.

[0089] Place the sample after plasma stripping into the electron beam evaporation table and wait until the vacuum degree of the reaction chamber of the electron beam evaporation table reaches 2×10 -6 After the Torr, ohmic metal is evaporated. The ohmic metal is a metal stacked structure consisting of two layers of metal, Ni and Au, in order from bottom to top.

[0090] Next, the sample, after ohmic metal evaporation, is stripped to remove the ohmic metal, photoresist, and stripping adhesive outside the source and drain electrode regions. Finally, the sample is rinsed with ultrapure water and blown dry with nitrogen. Finally, the sample is annealed in a rapid annealing furnace to form the source and drain electrodes. Optionally, the annealing atmosphere is O2, the annealing temperature is 500-550°C, and the annealing time is 5-10 minutes.

[0091] In the above step S6, the step of etching a second groove on the surface of the AlGaN barrier layer away from the second substrate and forming a gate electrode includes:

[0092] S601, etching a second groove on a surface of the AlGaN barrier layer away from the second substrate, and photolithographically obtaining a gate electrode pattern in the second groove;

[0093] S602: Place the sample with the gate electrode pattern into a plasma stripper for base film treatment, then place the sample into an electron beam evaporation station. Wait until the vacuum degree of the reaction chamber of the electron beam evaporation station reaches 2×10 -6 When the gate metal is evaporated on the photoresist inside and outside the preset gate electrode area,

[0094] S603 , stripping the sample after gate metal evaporation, removing the gate metal, photoresist and stripping adhesive outside the preset gate electrode area, rinsing the sample with ultrapure water and drying it with nitrogen to obtain a completed gate electrode.

[0095] In this embodiment, along the direction perpendicular to the plane of the first substrate, the orthographic projection of the first groove coincides with the orthographic projection of the second groove, that is, the first groove and the second groove are aligned. It should be understood that if the first groove and the second groove are not aligned, the device manufactured will not be able to shut down normally due to the thicker p-GaN layer corresponding to the gate electrode, and will not have normal characteristics. Specifically, in the above step S601, the AlGaN barrier layer is etched by 5 to 15 nm using chlorine-based ICP to form the second groove. The etching conditions can be: upper electrode power 15 to 25 W, lower electrode power 3 to 5 W, pressure 5 mTorr, Cl2 flow rate 4 sccm, BCl3 flow rate 10 sccm.

[0096] During the process of making the gate electrode, the gate electrode pattern is first obtained by photolithography in the second groove. Then, the sample with the gate electrode pattern is placed in a plasma stripper for bottom film treatment. The sample is then placed in an electron beam evaporation station. When the vacuum degree of the reaction chamber of the electron beam evaporation station reaches 2×10 -6 After Torr, gate metal is evaporated on the photoresist inside and outside the gate electrode area. The gate metal can be a metal stacked structure composed of two layers of metal, Ni and Au, in order from bottom to top; then, the sample after the gate metal evaporation is stripped, and the gate metal, photoresist and stripping glue outside the gate electrode area are removed. After rinsing with ultrapure water and blowing dry with nitrogen, the gate electrode is completed.

[0097] In the above step S7, the step of growing a SiN protective layer on the surface of the AlGaN barrier layer away from the second substrate includes:

[0098] Using NH3 and SiH4 as reaction gases, a SiN protective layer with a thickness of 200nm was grown on the surface of the AlGaN barrier layer away from the second substrate using a PECVD process under the conditions of a second substrate temperature of 250℃, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20-25W.

[0099] Optionally, after the SiN protective layer is grown, the step of photolithography on the SiN protective layer to form a metal interconnection layer opening region and then lead out a source electrode, a drain electrode, and a gate electrode to obtain an enhancement-mode N-face GaN-based p-channel device includes:

[0100] Photolithography electrode openings. Specifically, the sample is first baked on a 200°C hotplate. Then, photoresist is applied and spun. In this example, EPI621 resin can be used at a spinning speed of 3500 rpm. The sample is then baked on a 90°C hotplate. Next, the sample is placed in a photolithography machine to expose the photoresist in the metal interconnection layer opening area. The exposed sample is then placed in a developer to remove the photoresist in the interconnection opening area. The sample is then rinsed with ultrapure water and blown dry with nitrogen.

[0101] After the photolithography is completed, ICP etching is performed using CF4 and O2 as reaction gases, at a reaction chamber pressure of 10mTorr, an upper electrode RF power of approximately 100W, and a lower electrode RF power of approximately 10W, to remove the 200nm thick SiN protective layer in the interconnect opening area.

[0102] Furthermore, the metal interconnection layer area is photolithographically processed on the SiN protective layer. First, the sample with the metal interconnection layer openings etched is baked on a 200°C hot plate. Then, a stripper is applied and spun onto the source and drain electrodes in the metal interconnection layer opening area and the SiN protective layer that has not been etched. The sample is then baked on a 200°C hot plate, with the spun-on thickness reaching 0.35μm. Next, photoresist is applied and spun onto the stripper, and the sample is baked on a 90°C hot plate, with the spun-on thickness reaching 0.77μm. The sample, which has undergone both coating and spun-on processing, is placed in a photolithography machine to expose the photoresist in the metal interconnection area. The exposed sample is then placed in a developer to remove the photoresist and stripper in the metal interconnection layer area. The sample is then rinsed with ultrapure water and blown dry with nitrogen.

[0103] Next, the metal interconnection is evaporated. In this embodiment, the sample with the metal interconnection photolithography pattern is first placed in an α-plasma plasma stripper for base film treatment, and then the sample is placed in an electron beam evaporation table. When the vacuum degree of the reaction chamber of the electron beam evaporation table reaches 2×10 -6 After 0.5 Torr, the interconnect metal is evaporated on the electrode and SiN protective layer in the interconnect metal area and the photoresist outside the metal interconnect area; then, the sample after the interconnect metal evaporation is stripped to remove the interconnect metal, photoresist and stripping glue outside the metal interconnect layer area. The above-mentioned interconnect metal can be a metal stacked structure composed of two layers of metal, Ti and Au, from bottom to top; finally, the sample is rinsed with ultrapure water and blown dry with nitrogen to obtain the completed enhancement mode N-face GaN-based p-channel device.

[0104] like Figure 11 As shown, an embodiment of the present invention further provides an enhancement-mode N-face GaN-based p-channel device, which is manufactured by the above-mentioned enhancement-mode N-face GaN-based p-channel device manufacturing method.

[0105] It can be seen from the above embodiments that the beneficial effects of the present invention are:

[0106] The present invention adopts conventional Ga-face materials and realizes N-face GaN-based materials through a transfer and flipping method, thereby overcoming the problem that N-face GaN materials are difficult to grow. On the other hand, by using N-face GaN materials to prepare p-channel devices, the deposition of an insulating layer under the gate is avoided by using AlGaN / GaN heterojunction materials, thereby avoiding the scattering effects caused by fixed charges introduced by the dielectric layer and interface charges, and improving the mobility of holes. This improves the performance of p-channel GaN devices, and the characteristics of CMOS devices prepared thereby are also improved.

[0107] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0108] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

[0109] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0110] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0111] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the claimed application, those skilled in the art can understand and implement other changes to the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple situations. A single processor or other unit can implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0112] The above is a further detailed description of the present invention in conjunction with specific preferred embodiments, and the specific implementation of the present invention should not be considered to be limited to these descriptions. For those skilled in the art of the present invention, without departing from the concept of the present invention, several simple deductions or substitutions can be made, which should be considered to fall within the scope of protection of the present invention.

Claims

1. A method for preparing an enhanced N-face GaN-based p-channel device, characterized in that: include: providing a first substrate; growing an epitaxial structure on the surface of the first substrate, the epitaxial structure comprising a GaN buffer layer, a GaN layer, an AlGaN barrier layer, and a p-GaN layer sequentially grown on the surface of the first substrate; Etching a first groove on a surface of the p-GaN layer away from the AlGaN barrier layer, and depositing a SiN layer; A second substrate is formed by bonding the surface of the SiN layer away from the p-GaN layer; After flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate, the GaN buffer layer, and the GaN layer are sequentially etched away to expose the N-polarity surface of the AlGaN barrier layer, and a source electrode is formed in a first predetermined region of the AlGaN barrier layer, and a drain electrode is formed in a second predetermined region of the AlGaN barrier layer; A second groove is formed by etching a surface of the AlGaN barrier layer away from the second substrate, and a gate electrode is formed in the second groove; wherein, along a direction perpendicular to the plane of the first substrate, the orthographic projection of the first groove coincides with the orthographic projection of the second groove, and the gate electrode directly contacts the AlGaN barrier layer; A SiN protective layer is grown on the surface of the AlGaN barrier layer away from the second substrate, and a source electrode, a drain electrode and a gate electrode are drawn out after photolithography of a metal interconnection layer opening region on the SiN protective layer to obtain the enhanced N-face GaN-based p-channel device.

2. The method for preparing an enhanced N-face GaN-based p-channel device according to claim 1, characterized in that: The step of etching a first groove on the surface of the p-GaN layer away from the AlGaN barrier layer and depositing a SiN layer comprises: The sample is baked at 200° C., and after dropping photoresist on the surface of the first substrate, photoresist is spread using a spreader; The sample was rinsed with ultrapure water and dried with nitrogen; Using chlorine-based inductively coupled plasma (ICP), etching a first groove on a surface of the p-GaN layer away from the AlGaN barrier layer; Using N2 and SiH4 as reaction gases, under the conditions of a first substrate temperature of 250°C, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20W, a SiN layer is deposited on the surface of the p-GaN layer away from the AlGaN barrier layer.

3. The method for preparing an enhanced N-face GaN-based p-channel device according to claim 2, characterized in that: The first groove includes a first surface parallel to the first substrate; Wherein, along a direction perpendicular to the plane where the first substrate is located, the distance between the first surface and the AlGaN barrier layer is 20 nm.

4. The method for preparing an enhanced N-face GaN-based p-channel device according to claim 1, wherein: Before the step of bonding the surface of the SiN layer away from the p-GaN layer to form a second substrate, the method further includes: The surface of the SiN layer away from the p-GaN layer is polished by using a chemical mechanical polishing process.

5. The method for preparing an enhanced N-face GaN-based p-channel device according to claim 1, wherein: The step of flipping the sample in a direction perpendicular to the plane of the first substrate, sequentially etching away the first substrate, the GaN buffer layer, and the GaN layer, and forming a source electrode in a first predetermined region of the AlGaN barrier layer and a drain electrode in a second predetermined region of the AlGaN barrier layer includes: After flipping the sample in a direction perpendicular to the plane of the first substrate, the first substrate was etched away under the conditions of an upper electrode power of 250-350 W, a lower electrode power of 20-40 W, a pressure of 5 mTorr, and an SF6 flow rate of 50 sccm; Under the conditions of an upper electrode power of 40-60W, a lower electrode power of 20-30W, a pressure of 5mTorr, a Cl2 flow rate of 8sccm, and a BCl3 flow rate of 20sccm, the GaN buffer layer and the GaN layer are sequentially etched away; A source electrode is fabricated in a first predetermined region of the AlGaN barrier layer, and a drain electrode is fabricated in a second predetermined region of the AlGaN barrier layer.

6. The method for preparing an enhanced N-face GaN-based p-channel device according to claim 1, characterized in that: The step of etching a second groove on the surface of the AlGaN barrier layer away from the second substrate and forming a gate electrode comprises: Etching a second groove on a surface of the AlGaN barrier layer away from the second substrate, and photolithographically obtaining a gate electrode pattern in the second groove; The sample with the gate electrode photolithography pattern was placed in a plasma stripper for bottom film treatment. Then the sample was placed in an electron beam evaporation station. When the vacuum degree of the reaction chamber of the electron beam evaporation station reached 2×10 -6 When the gate metal is evaporated on the photoresist inside and outside the preset gate electrode area, The sample after gate metal evaporation is stripped to remove the gate metal, photoresist and stripping glue outside the preset gate electrode area, and the sample is rinsed with ultrapure water and blown dry with nitrogen to obtain a completed gate electrode.

7. The method for preparing an N-face GaN-based p-channel device according to claim 1, wherein: The step of growing a SiN protective layer on a surface of the AlGaN barrier layer away from the second substrate comprises: Using NH3 and SiH4 as reaction gases, a 200nm thick SiN protective layer was grown on the surface of the AlGaN barrier layer away from the second substrate using a PECVD process under the conditions of a second substrate temperature of 250℃, a reaction chamber pressure of 600mTorr, and a radio frequency power of 20~25W.

8. An enhancement mode N-face GaN-based p-channel device, characterized in that: The device is prepared by the method for preparing an enhanced N-face GaN-based p-channel device according to any one of claims 1 to 7.

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