A high-density multilayer flip-chip stacked packaging structure and method

Abstract

This invention provides a high-density multilayer flip-chip stacking packaging structure and method, improving the integration of the entire packaging structure, realizing three-dimensional stacking of multilayer chips and substrates, while ensuring more chip functions and improving the functionality and stability of the packaging structure. It includes a first substrate, multiple flip chips, and a molding compound surrounding the first substrate and the multiple flip chips. The flip chips are all connected to the first substrate via a flexible printed circuit board (FPCB). The FPCB's bending and folding achieves stacking interconnection between the first substrate and the multiple flip chips. The use of a freely foldable and bendable FPCB enables interconnection between the multilayer flip chips and the first substrate at any position, solving the difficulty of stacking flip-chip bumps, improving product functionality while saving process costs.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit packaging technology, specifically to a high-density multilayer flip-chip stacking packaging structure and method. Background Technology

[0002] The current trend in various electronic products is towards thinner, lighter, and smaller designs. The most important goal is to incorporate more components or circuits within a limited space and achieve more functions on the same-sized chip substrate. Therefore, two-dimensional circuit and component design clearly cannot meet the design requirements for high component and circuit density, making three-dimensional circuit and component design a solution to increase component and circuit density.

[0003] In existing technologies, it is difficult to achieve a three-dimensional package structure by directly stacking chips to obtain a typical FCCSP structure for flip-chip packaging. If ECP technology is used to achieve chip-to-chip stacking, the cost and process become relatively complex due to the introduction of ECP technology. Traditional FC packaging products struggle to achieve multi-layer stacking, but using the more technically challenging through-silicon via (TSV) technology for double-layer stacking not only increases the technical difficulty of stacking but also raises process costs. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides a high-density multilayer flip-chip stacked packaging structure and method, which improves the integration of the entire packaging structure, realizes three-dimensional stacking of multilayer chips and substrates, and at the same time ensures more chip functions, thereby improving the functionality and stability of the packaging structure.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A high-density multilayer flip-chip stacked packaging structure includes a first substrate, multiple flip chips, and a plastic encapsulation covering the first substrate and multiple flip chips. The flip chips are all connected to the first substrate through a flexible circuit board, and the stacked interconnection between the first substrate and multiple flip chips is achieved by bending and folding the flexible circuit board.

[0007] Preferably, the flexible circuit board is made of a metallic material.

[0008] Preferably, the bending angle of the flexible board is 0° to 180°.

[0009] Preferably, the first substrate is one of the following: embedded component packaging substrate (ECP), printed circuit board (PWB), ceramic substrate, copper-clad ceramic substrate (DCB), aluminum-clad ceramic substrate (DAB), and insulating metal substrate (IMS).

[0010] Preferably, the interconnection between the first substrate and the plurality of flip chips is achieved through bump components.

[0011] Preferably, the flexible board is bonded to the upper surface of the first substrate and one side of the flip chip, respectively.

[0012] Preferably, the number of flip chips is 1-4.

[0013] Preferably, the surface area of ​​the flip chip is smaller than the surface area of ​​the first substrate.

[0014] A high-density multilayer flip-chip stacking packaging method includes the following steps:

[0015] A portion of the flexible board is bonded to the first substrate;

[0016] The flip-chip is fabricated on the upper surface of the first substrate using a flip-chip process.

[0017] The portion of the flexible circuit board that is not bonded to the first substrate is bent and flipped until it is parallel to the upper surface of the flip chip opposite the first substrate, and then bonded to that side of the flip chip, thus completing the flip chip stacking.

[0018] Repeat the above steps to stack the next flip chip, until the required number of stacking layers is completed;

[0019] The first substrate and multiple flip chips are molded together to obtain a high-density multilayer flip chip stacked packaging structure.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] This invention provides a high-density multilayer flip-chip stacking packaging structure. By employing an adapter component, namely the flexible board described in this invention, three-dimensional stacking of multilayer chip substrates can be effectively achieved. Since traditional substrates use BT resin material, direct bending for three-dimensional stacking easily leads to breakage of internal circuitry, disrupting the substrate's normal function. Traditional FC packaging products struggle to achieve multilayer stacking. Using the more technically challenging through-silicon via (TSV) technology for double-layer stacking increases technical difficulty and process costs. This invention, however, uses a freely foldable and bendable flexible board to achieve interconnection between multilayer flip chips and the first substrate at any position, solving the difficulty of stacking flip-chip bumps. This improves product functionality while saving process costs. Furthermore, this invention can be combined with traditional gold wire interconnect technology to achieve high-density packaging when stacking multilayer flip chips. Compared to traditional packaging, it can increase the number of I / O channels within the same PKG size, thereby enabling more chip functions. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of the ECP substrate according to an embodiment of the present invention;

[0023] Figure 2 This is a schematic diagram of the structure of the ECP substrate after embedding the chip according to an embodiment of the present invention;

[0024] Figure 3 This is a schematic diagram of the flip chip structure according to an embodiment of the present invention;

[0025] Figure 4 This is a schematic diagram of the structure of a flip-chip connected to a flexible circuit board according to an embodiment of the present invention;

[0026] Figure 5 This is a schematic diagram of the structure of the ECP substrate and flip-chip connected by flexible circuit board flip-stacking in an embodiment of the present invention;

[0027] Figure 6 This is a schematic diagram of the structure after stacking two layers according to an embodiment of the present invention;

[0028] Figure 7 This is a schematic diagram of the structure after stacking and encapsulation according to an embodiment of the present invention.

[0029] In the figure, the first substrate is 1, the flip chip is 2, the flexible circuit board is 3, the adhesive is 4, the molding compound is 5, and the solder ball is 6. Detailed Implementation

[0030] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0032] The present invention will now be described in further detail with reference to the accompanying drawings:

[0033] like Figure 7 As shown, the present invention discloses a high-density multilayer flip chip 2 stacked packaging structure, including a first substrate 1, a plurality of flip chips 2, and a plastic encapsulation body 5 covering the first substrate 1 and the plurality of flip chips 2. The flip chips 2 are respectively connected to the first substrate 1 through a flexible circuit board 3, and the stacked interconnection between the first substrate 1 and the plurality of flip chips 2 is achieved by bending and folding the flexible circuit board 3.

[0034] This invention provides a high-density multilayer flip chip 2 stacked packaging structure. By employing an adapter component, namely the flexible board 3 described in this invention, three-dimensional stacking of multilayer chip substrates can be effectively achieved. Since traditional substrates use BT resin material, direct bending for three-dimensional stacking easily leads to breakage of internal circuitry, disrupting the substrate's normal function. Traditional FC packaging products struggle to achieve multilayer stacking. Using the more technically challenging through-silicon via (TSV) technology for double-layer stacking increases technical difficulty and process costs. This invention utilizes a freely foldable and bendable flexible board 3 to achieve interconnection between multilayer flip chips 2 and the first substrate 1 at any position, solving the difficulty of stacking flip-chip bumps and improving product functionality while saving process costs. Furthermore, this invention can be combined with traditional gold wire interconnect technology to achieve high-density packaging when stacking and interconnecting multilayer flip chips 2. Compared to traditional packaging, it can increase the number of I / O channels within the same PKG size, thereby enabling more chip functions.

[0035] Preferably, in this embodiment, the flexible board 3 is made of a metal material.

[0036] Preferably, the bending angle of the flexible board 3 is 0° to 180°.

[0037] Preferably, the first substrate 1 is one of the following: embedded component packaging substrate (ECP), printed circuit board (PWB), ceramic substrate, copper-clad ceramic substrate (DCB), aluminum-clad ceramic substrate (DAB), and insulating metal substrate (IMS).

[0038] In this embodiment, the first substrate 1 adopts an embedded component packaging substrate (ECP).

[0039] Furthermore, the interconnection between the first substrate 1 and the plurality of flip chips 2 is achieved through bump components.

[0040] Specifically, a silicon crystal is embedded inside the first substrate 1 via pad interconnects. The surface of the silicon crystal includes pads, and solder balls 6 are soldered onto the pads. The solder balls 6 serve as bump components to achieve interconnection between the first substrate 1 and the flip chip 2. Alternatively, multiple conductive pillars can be configured between the first substrate 1 and the flip chip 2. The conductive pillars are used to electrically connect the first substrate 1 and the multilayer flip chip 2, thus shortening the signal transmission path and improving the signal transmission quality of the package structure, thereby improving the electrical performance of the package structure.

[0041] Furthermore, the flexible board 3 is bonded to the upper surface of the first substrate 1 and one side of the flip chip 2, respectively.

[0042] In this embodiment, the flexible board 3 is bonded to the upper surface of the first substrate 1 and one side of the flip chip 2 using a high-temperature resistant adhesive 4.

[0043] Typically, there are 1-4 flip chips, but not limited to this.

[0044] Preferably, the surface area of ​​the flip chip 2 is smaller than the surface area of ​​the first substrate 1, which facilitates the stacking of multiple flip chips 2 on the first substrate 1.

[0045] The present invention also provides a method for stacking and packaging high-density multilayer flip chips 2, comprising the following steps: bonding a portion of a flexible board 3 to a first substrate 1;

[0046] The flip-chip 2 is flipped using a flip-chip process on the upper surface of the first substrate 1;

[0047] The portion of the flexible board 3 that is not bonded to the first substrate 1 is bent and flipped until it is parallel to the upper surface of the flip chip 2 opposite to the first substrate 1, and bonded to that side of the flip chip 2, thus completing the stacking of the flip chip 2.

[0048] Repeat the above operation to stack the next flip chip 2 until the required number of stacking layers are completed;

[0049] The first substrate 1 and multiple flip chips 2, which have been stacked, are molded together to obtain a high-density multilayer flip chip 2 stacked packaging structure.

[0050] Example

[0051] This invention provides a specific implementation method for one embodiment, which includes the following steps:

[0052] Step 1: As Figure 1 As shown, a substrate for obtaining embedded chips within a block is obtained using ECP technology;

[0053] Step 2: As Figure 2 As shown, the ECP substrate uses a traditional flip-chip process to package flip-chip 2.

[0054] Step 3: As Figure 3 As shown, 24 traditional flip-chip chips were selected;

[0055] Step 4: As Figure 4 As shown, the embedded chip and flip chip 2 of the ECP substrate are connected using the flexible circuit board 3 process.

[0056] Step 5: As Figure 5 and 6 As shown, the flexible boards 3 are flipped and stacked;

[0057] Step 6: Repeat steps 2-5 until the required number of layers is completed, then seal the entire structure in plastic.

[0058] The specific operation processes for steps 4, 5, and 6 are as follows:

[0059] ①Use a metal flexible circuit board to Figure 3 and Figure 4 The components are connected to the ECP substrate and a flip chip 2. The ECP substrate can be connected to a structure that is the same as or similar to the metal flexible circuit board used in all four directions, including a first flexible circuit board, a second flexible circuit board, a third flexible circuit board and a fourth flexible circuit board.

[0060] ② First, apply adhesive to the surface of the ECP substrate;

[0061] ③ Use a specific equipment fixture to fix the ECP substrate and flip the first flexible board 180° so that a part of the flexible board is bonded to a layer of flip chip 2. Then apply adhesive to the back of the first flexible board and bond it to the second flexible board. Flip the second flexible board and bond it to the next layer of flip chip 2. Continue until all the flip chips 2 are stacked and then perform overall molding.

[0062] Step 7: Balls are implanted into the IO channels on the other surface of the ECP substrate to facilitate subsequent interconnection with other substrates. The stacked packaging is then complete, resulting in a high-density multilayer flip-chip stacked package structure, such as... Figure 7 As shown.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A high-density multi-layer flip-chip stacked package structure, characterized by, The package structure comprises a first substrate (1), a face-up chip, a plurality of flip chips (2), and a plastic package (5) wrapping the first substrate (1), the face-up chip and the plurality of flip chips (2). Each of the flip chips (2) comprises a chip and a substrate, wherein the chip is flip-chip mounted on the top surface of the substrate. The plurality of flip chips (2) are stacked, in particular: the top surface of the substrate in the flip chip (2) in the upper layer is connected to the bottom surface of the substrate in the flip chip (2) in the lower layer; the face-up chip is arranged on the upper surface of the first substrate (1); the chip in the flip chip (2) in the bottom layer is directly bonded to the face-up chip; the flip chips (2) are connected to the first substrate (1) through soft boards (3); the stacking and interconnection between the first substrate (1) and the substrates in the plurality of flip chips (2) are achieved through the bending and folding of the soft boards (3); the soft boards (3) are made of metal materials; the bending and folding angle of the soft boards (3) is greater than 0° and less than 180°; the interconnection between the first substrate (1) and the face-up chip and between the chips and the substrates in the plurality of flip chips (2) is achieved through bump components.

2. The high-density multi-layer flip-chip package structure of claim 1, wherein, The first substrate (1) is one of embedded component packaging substrate (ECP), printed wiring board (PWB), ceramic substrate, copper-clad ceramic substrate (DCB substrate), aluminum-clad ceramic substrate (DAB substrate) and insulated metal substrate (IMS).

3. The high-density multi-layer flip-chip package structure of claim 1, wherein, The two ends of the soft board (3) after bending and folding are bonded to the upper surface of the first substrate (1) and the top surface of the substrate in the flip chip (2), respectively.

4. The high-density multi-layer flip-chip package structure of claim 1, wherein, The number of flip chips is 1-4.

5. The high-density multi-layer flip-chip package structure of claim 1, wherein, The surface area of the flip chip (2) is less than the surface area of the first substrate (1).

6. A high-density multilayer flip-chip package stacking method, characterized by, The package structure according to any one of claims 1-5, comprising the following steps, providing a flip chip (2) comprising a chip and a substrate, wherein the chip is flip-chip mounted on the top surface of the substrate, and bonding a part of a soft board (3) to the substrate in the flip chip (2); providing a first substrate (1) and a face-up chip, wherein the face-up chip is arranged on the upper surface of the first substrate (1) through bump components; bending and folding the other part of the soft board (3) which is not bonded to the substrate in the flip chip (2) until it is parallel to the side of the face-up chip opposite to the upper surface of the first substrate (1), bonding the other part of the soft board (3) to the upper surface of the first substrate (1), and simultaneously bonding the chip in the flip chip (2) to the top surface of the face-up chip, thereby completing the stacking of the flip chip (2) and the face-up chip; repeating the above operation to stack the next flip chip (2) until the required number of layers is stacked; stacking the first substrate (1), the face-up chip and the plurality of flip chips (2) to form a high-density multi-layer flip chip stacking package structure.

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