An adaptive synchronous rectification control circuit and a control method

Abstract

The present invention discloses an adaptive synchronous rectification control circuit and a control method, including: a fast turn-on module, an adaptive turn-off module, an oscillation shielding module, and a driving module. The input of the fast turn-on module is the drain-source voltage V of the synchronous rectifier power transistor S1 DS , and the output is the turn-on control signal SET_PRE; the input of the adaptive turn-off module is the drain-source voltage V of the synchronous rectifier power transistor S1 DS , and the output is the turn-off control signal RST_PRE; the input of the oscillation shielding module is the minimum conduction time control signal and the minimum turn-off time control signal, and the input signals also include the turn-on control signal SET_PRE and the turn-off control signal RST_PRE, and the output is the control signal Q of the synchronous rectifier power transistor S1 without driving ability; the input of the driving module is the control signal Q of the synchronous rectifier power transistor S1 without driving ability, and the output is the control signal V of the synchronous rectifier power transistor S1 with driving ability GS .

Description

Technical Field

[0001] The present invention relates to the technical field of power integrated circuits, and particularly to an adaptive synchronous rectification control circuit and a control method. Background Art

[0002] With the continuous development of technologies such as electric vehicles, big data, and artificial intelligence, the requirements for power converters are also constantly increasing. Currently, the requirements for power converters are continuously advancing in the direction of high power density. To increase the power density, the frequency of power switches is continuously increased. The switching frequency of current mainstream high-frequency power converters has reached the 1MHz level, and there is a trend towards even higher switching frequencies. At the same time, in high-frequency power converters, synchronous rectification technology (abbreviated as SR) is usually used to replace traditional diode rectification to improve the rectification efficiency, such as Figure 1 and Figure 2 .

[0003] One of the problems in increasing the switching frequency is that the vast majority of traditional synchronous rectification controllers are usually only applicable to lower switching frequencies (≤500KHz). The reason why traditional SR controllers cannot be used for higher switching frequencies is that current SR controllers mainly achieve control by sampling the drain-source voltage V DS of the synchronous rectification power transistor S1, and this control method will cause premature turn-off problems and turn-on delay problems in high-frequency power converters. More specifically, a higher switching frequency means a larger current slope di / dt, and the parasitic inductance of the MOS package and the PCB parasitic inductance Ls will generate a phase lead of the V DS voltage under a large di / dt, thus causing the SR controller to trigger the turn-off threshold prematurely, thereby turning off the synchronous rectification power transistor S1 prematurely, as shown in Figure 3 . And the traditional turn-on control generates a turn-on control signal only after detecting that the body diode is conducting through V DS , which results in the body diode conducting during the first period of turn-on, and this part of the time tdelay is more obvious in high-frequency converters, as shown in Figure 4 .

[0004] In view of the premature turn-off and turn-on delay problems of traditional SR controllers, the present invention proposes a new control scheme, which effectively solves the premature turn-off and turn-on delay problems of the synchronous rectification power transistor S1, and improves the system operating frequency and efficiency. Summary of the Invention

[0005] In view of this, the object of the present invention is to provide an adaptive synchronous rectification control circuit and a control method, which can effectively solve the premature turn-off and turn-on delay problems and are applicable to power converters with higher future switching frequencies.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] An adaptive synchronous rectification control circuit, the control circuit comprising:

[0008] A fast turn-on module, whose input is the drain-source voltage V of the synchronous rectifier power transistor S1 DS , and whose output is a turn-on control signal SET_PRE;

[0009] An adaptive turn-off module, whose input is the drain-source voltage V of the synchronous rectifier power transistor S1 DS , and whose output is a turn-off control signal RST_PRE;

[0010] An oscillation shielding module, whose inputs are a minimum on-time control signal MIN_ON and a minimum off-time control signal MIN_OFF, as well as the turn-on control signal SET_PRE and the turn-off control signal RST_PRE, and whose outputs are a control signal Q for the synchronous rectifier power transistor S1 without driving ability, and a control signal QB;

[0011] A driving module, whose input is the control signal Q for the synchronous rectifier power transistor S1 without driving ability, and whose output is a control signal V for the synchronous rectifier power transistor S1 with driving ability GS .

[0012] Further, the fast turn-on module specifically includes: a capacitor C1, a resistor R1, a voltage reference V bias , a comparator CMP1, a Schmitt trigger SHMT1, and an AND gate AND1;

[0013] The capacitor C1, the resistor R1, and the voltage reference V bias constitute a high-pass network, the input end of this high-pass network is one end of the capacitor C1, and this input end is connected to the sampled drain-source voltage V DS ;

[0014] One end of the resistor R1 is connected to the positive terminal of the voltage reference V bias , and the negative terminal of this voltage reference V bias is grounded;

[0015] The other ends of the capacitor C1 and the resistor R1 are connected and both are connected to the input end of the Schmitt trigger SHMT1, and the output of this Schmitt trigger SHMT1 is the falling-edge slope of the drain-source voltage V DS ;

[0016] The comparator CMP1, its negative input terminal receives the sampled drain-source voltage V DS, its positive input terminal is connected to the turn-on threshold voltage V_TON, and the output of the comparator CMP1 serves as the judgment result of the turn-on threshold;

[0017] The AND gate AND1 has its inputs as the outputs of the comparator CMP1 and the Schmitt trigger SHMT1, and its output is the turn-on control signal SET_PRE.

[0018] Furthermore, the turn-on control signal SET_PRE is generated only when two conditions are met simultaneously. Among them, the first condition is that the sampled drain-source voltage V DS is less than the turn-on threshold V_TON, and the second condition is that the detected falling edge slope of V DS reaches a certain value.

[0019] Furthermore, the adaptive turn-off module specifically includes: a comparator CMP2, an AND gate AND2, a switch M1, a switch M2, a current reference I bias , a capacitor C2, a sample-and-hold circuit SH, a PI compensator, and a comparator CMP3;

[0020] The comparator CMP2 has its negative terminal receiving the drain-source voltage V DS , its positive terminal is the threshold V T , and its output terminal is connected to the input terminal of the AND gate AND2;

[0021] The AND gate AND2 has its input terminal also receiving the control signal QB, and its output controls the charging of the current reference I bias to the capacitor C2 by controlling the on and off of the switch M2. Among them, one end of the capacitor C2 is grounded, and the other end is respectively connected to the switch M1, the switch M2, and the input terminal of the sample-and-hold circuit SH;

[0022] The sample-and-hold circuit SH samples the voltage value of the capacitor C2 under the control of the control signal Q, and this control signal Q also controls the switch M1 to periodically clear the voltage V C2 of the capacitor C2. The output terminal of this sample-and-hold circuit SH is connected to the inverting input terminal of the PI compensator;

[0023] The PI compensator has its non-inverting input terminal connected to the voltage reference V REF , and its output is V_TOFF, and this V_TOFF is output to the inverting input terminal of the comparator CMP3;

[0024] The comparator CMP3 has its non-inverting input terminal receiving the drain-source voltage V DS , and its output is the turn-off control signal RST_PRE, and this turn-off control signal RST_PRE serves as the turn-off control signal for synchronous rectification control.

[0025] Further, the oscillation shielding module specifically includes: a minimum turn-off shielding circuit, a minimum turn-on shielding circuit, an AND gate AND3, an AND gate AND4, and an RS flip-flop;

[0026] The minimum turn-off shielding circuit has its input as the minimum turn-off time control signal MIN_OFF, and its output terminal is connected to the input terminal of the AND gate AND3. Among them, the input terminal of this AND gate AND3 also receives the turn-on control signal SET_PRE;

[0027] The minimum turn-on shielding circuit has its input as the minimum conduction time control signal MIN_ON, and its output terminal is connected to the input terminal of the AND gate AND4. Among them, the input terminal of this AND gate AND4 also receives the turn-off control signal RST_PRE;

[0028] The output signal of the AND gate AND3 is SET, and the output signal of the AND gate AND4 is RST. Among them, the signal SET controls the setting of the RS flip-flop, and the signal RST controls the reset of the RS flip-flop;

[0029] The outputs of the RS flip-flop are the control signal Q and the control signal QB.

[0030] An adaptive synchronous rectification control method, the control method includes the following steps:

[0031] Step S1, setting a threshold value, including: first, by detecting V DS , obtaining the conduction time t of the body diode after the synchronous rectification power transistor S1 is turned off in each period diode , then converting this conduction time t diode into a corresponding voltage signal V d , and then using this voltage signal V d as the inverting terminal input signal of the PI compensator, and using the output V_TOFF of the PI compensator as the threshold value for turning off the synchronous rectification power transistor S1. Among them, the non-inverting terminal input of this PI compensator is the reference voltage V REF ;

[0032] Step S2, adaptive turn-off threshold control, including: obtaining V DS in real time, and then through a comparator, comparing this V DS with V_TOFF. When V DS is greater than or equal to V_TOFF, a turn-off control signal RST_PRE is generated;

[0033] Step S3, fast turn-on control, including: by detecting the falling edge of V DS obtained in real time, if it reaches the set threshold value V_TON, an turn-on control signal SET_PRE is generated.

[0034] The beneficial effects of the present invention are as follows:

[0035] Based on the traditional SR controller, the present invention proposes a new control method. The proposed control method includes two core contents, namely, adaptive turn-off threshold control and fast turn-on control. Through the adaptive turn-off threshold control method, the present invention can effectively solve the problem of premature turn-off.

[0036] The structure of the present invention does not require additional components, which can effectively reduce the system volume. Moreover, the present invention adopts a fully integrated solution and can be applied to current high-frequency converters and future higher-frequency power converters. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a schematic diagram of a traditional diode rectification described in the background art;

[0038] Figure 2 It is a schematic diagram of synchronous rectification control described in the background art;

[0039] Figure 3 It is a waveform diagram of the premature turn-off principle described in the background art;

[0040] Figure 4 It is a waveform diagram of the turn-on delay principle described in the background art;

[0041] Figure 5 It is a module schematic diagram of an adaptive synchronous rectification control circuit provided in Embodiment 1;

[0042] Figure 6 It is a specific structure schematic diagram of an adaptive synchronous rectification control circuit provided in Embodiment 1. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0043] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0044] Embodiment 1

[0045] Refer to Figure 5 and Figure 6 , this embodiment provides an adaptive synchronous rectification control circuit, which includes:

[0046] A fast turn-on module, whose input is the drain-source voltage V of the synchronous rectification power transistor S1DS , its output is the turn-on control signal SET_PRE;

[0047] The adaptive turn-off module, whose input is the drain-source voltage V of the synchronous rectifier power transistor S1 DS , its output is the turn-off control signal RST_PRE;

[0048] The oscillation shielding module, whose inputs are the minimum on-time control signal MIN_ON and the minimum off-time control signal MIN_OFF, as well as the turn-on control signal SET_PRE and the turn-off control signal RST_PRE, and whose output is the control signal Q of the synchronous rectifier power transistor S1 without driving ability;

[0049] The drive module, whose input is the control signal Q of the synchronous rectifier power transistor S1 without driving ability, and whose output is the control signal V of the synchronous rectifier power transistor S1 with driving ability GS .

[0050] Specifically, in this embodiment, after detecting that the body diode is conducting, the fast turn-on module immediately generates the turn-on control signal SET_PRE, and turns on the synchronous rectifier power transistor S1 after shielding by the minimum off-time. The adaptive turn-off module generates the turn-off control signal RST_PRE immediately when detecting that the secondary side current I s is equal to or close to 0, and turns off the synchronous rectifier power transistor S1 after shielding by the minimum turn-on time. The oscillation shielding module can program the shielding time through the minimum on-time control signal MIN_ON and the minimum off-time control signal MIN_OFF. The drive module converts the input control signal Q without driving ability into a control signal V GS , and uses V DS to control the synchronous rectifier power transistor S1.

[0051] Specifically, in this embodiment, the fast turn-on module specifically includes: capacitor C1, resistor R1, voltage reference V bias , comparator CMP1, Schmitt trigger SHMT1, and AND gate AND1;

[0052] The capacitor C1, resistor R1, and voltage reference V bias constitute a high-pass network. The input end of this high-pass network is one end of the capacitor C1, and this input end is connected to the sampled drain-source voltage V DS ;

[0053] One end of the resistor R1 is connected to the positive terminal of the voltage reference V bias , and the negative terminal of this voltage reference V bias is grounded;

[0054] The other ends of the capacitor C1 and the resistor R1 are connected to each other and are both connected to the input end of the Schmitt trigger SHMT1, and the output of the Schmitt trigger SHMT1 is the drain-source voltage V DS of the falling edge slope;

[0055] The comparator CMP1, its negative input end receives the sampled drain-source voltage V DS , its positive input end is connected to the turn-on threshold voltage V_TON, and the output of the comparator CMP1 is used as the judgment result of the turn-on threshold;

[0056] The AND gate AND1, its inputs are the outputs of the comparator CMP1 and the Schmitt trigger SHMT1, and its output is the turn-on control signal SET_PRE;

[0057] More specifically, in this embodiment, in order to avoid mis-triggering, the turn-on control signal SET_PRE is generated only when two conditions are met. Among them, condition 1 is that the sampled drain-source voltage V DS is less than the turn-on threshold V_TON, and condition 2 is that the falling edge slope of the detected V DS reaches a certain value.

[0058] More specifically, in this embodiment, the high-pass network composed of R1 and C1 will generate a negative voltage when detecting the falling edge of V DS , so the present invention introduces a DC voltage bias V bias to ensure the reliability of the single power supply system.

[0059] The fast turn-on module generates the turn-on control signal SET_PRE and outputs it to the oscillation shielding module.

[0060] Specifically, in this embodiment, the input of the adaptive turn-off module is the sampled drain-source voltage V DS . After detecting that QB is at a high level, the output of the comparator CMP2 will reflect the conduction time length t diode of the body diode D1 of the synchronous rectifier power tube S1 after it is turned off.

[0061] During the t diode time, the current source I bias charges the capacitor C2. After the t diode time ends, the voltage V c2 on the capacitor C2 reflects t diode . V c2 is used as the input of the sample and hold circuit and completes sampling under the control of the sampling clock Q to obtain the sampling result V d . Figure 6The PI compensator is a prior art and includes an error amplification module and a compensation network. The inverting input signal of the PI compensator is V d , the non-inverting input signal is the reference voltage VREF, and the output signal is the turn-off threshold V_TOFF. When the adaptive turn-off module detects that V DS ≥V_TOFF, it immediately generates a turn-off control signal RST_PRE. In the steady state, the reference voltage VREF, the capacitor C2, and the current source I bias determine the conduction time t dioderef of the reference diode:

[0062]

[0063] Through the negative feedback loop formed by the PI compensator, V d is adjusted to be equal to VREF, that is, t diode is adjusted to be equal to t dioderef , and t dioderef is usually set to 0 or a very small value. The above process is the adaptive turn-off control, which has nothing to do with the size of the parasitic inductance L s .

[0064] More specifically, in this embodiment, the adaptive turn-off module specifically includes: a comparator CMP2, an AND gate AND2, a switch M1, a switch M2, a current reference Ibias, a capacitor C2, a sample and hold circuit SH, a PI compensator, and a comparator CMP3;

[0065] The comparator CMP2, its negative terminal receives the drain-source voltage V DS , its positive terminal is the threshold V T , and its output terminal is connected to the input terminal of the AND gate AND2;

[0066] The AND gate AND2, its input terminal also receives the signal QB, and its output controls the switch-on and closing of the switch M2 to control the current reference I bias to charge the capacitor C2. Among them, one end of the switch M2 is grounded, and the other end is respectively connected to the switch M1, the switch M2, and the input terminal of the sample and hold circuit SH;

[0067] The sample and hold circuit SH samples the voltage value of the capacitor C2 under the control of the signal Q, and the signal Q also controls the switch M1 to periodically clear the voltage V C2 of the capacitor C2. The output terminal of the sample and hold circuit SH is connected to the inverting input terminal of the PI compensator;

[0068] The PI compensator, its non-inverting input terminal is connected to the voltage reference V REF, its output terminal outputs V_TOFF, and this V_TOFF is output to the inverting input terminal of the comparator CMP3;

[0069] For the comparator CMP3, its non-inverting input terminal receives the drain-source voltage V DS , its output is the turn-off control signal RST_PRE, and this turn-off control signal RST_PRE serves as the turn-off control signal for synchronous rectification control.

[0070] More specifically, in this embodiment, the signal Q is output by the oscillation shielding module, and the signal QB is its inverse signal.

[0071] Specifically, in this embodiment, the oscillation shielding module specifically includes: a minimum turn-off shielding circuit Min_off blanking, a minimum turn-on shielding circuit Min_on blanking, an AND gate AND3, an AND gate AND4, and an RS flip-flop; for the minimum turn-off shielding circuit Min_off blanking, its input is the minimum turn-off time control signal MIN_OFF, and its output terminal is connected to the input terminal of the AND gate AND3. Among them, the input terminal of this AND gate AND3 also receives the turn-on control signal SET_PRE; for the minimum turn-on shielding circuit Min_on blanking, its input is the minimum conduction time control signal MIN_ON, and its output terminal is connected to the input terminal of the AND gate AND4. Among them, the input terminal of this AND gate AND4 also receives the turn-off control signal RST_PRE; for the AND gate AND3, its output signal is SET, and for the AND gate AND4 it is RST. Among them, SET controls the setting of the RS flip-flop, and RST controls the reset of the RS flip-flop; the output of the RS flip-flop is the signal Q and the signal QB.

[0072] More specifically, in this embodiment, the oscillation shielding module has 4 input signals, which are respectively: the turn-on control signal SET_PRE, the turn-off control signal RST_PRE, the minimum conduction time control signal MIN_ON, and the minimum turn-off time control signal MIN_OFF. The oscillation shielding module also has 1 output signal, that is, the non-driving ability control signal Q. The function of the oscillation shielding module is to avoid mis-triggering of the comparator CMP1 or CMP3. Specifically, when the synchronous rectification power transistor S1 is turned on or off, it will cause the drain-source voltage V DS to generate high-frequency oscillation, thereby causing false flipping of the comparator CMP1 or CMP3. Therefore, after receiving the signal SET_PRE or RST_PRE, it is necessary to pass through the minimum conduction time t minon or the minimum turn-off time t minoffto set Q high or low. The programmable port provides the minimum on-time control signal MIN_ON and the minimum off-time control signal MIN_OFF by connecting an external resistor, thereby adjusting the minimum on-time t minon or the minimum off-time t minoff adjustment.

[0073] Specifically, in this embodiment, the driving module is a prior art and will not be elaborated here. Its input signal is the non-driving ability control signal Q, and the output is the driving ability control signal V GS .

[0074] Embodiment 2

[0075] This embodiment also provides an adaptive synchronous rectification control method, and the control method includes the following steps:

[0076] Step S1, set the threshold value, including: first, by detecting V DS , obtain the conduction time t diode of the body diode after the synchronous rectification power tube S1 is turned off in each cycle, then convert the conduction time t diode into the corresponding voltage signal V d , and then use the voltage signal V d as the inverting input signal of the PI compensator, and use the output V_TOFF of the PI compensator as the turn-off threshold of the synchronous rectification power tube S1. Among them, the non-inverting input of the PI compensator is the reference voltage V REF ;

[0077] Step S2, adaptive turn-off threshold control, including: obtain V DS in real time, and then through a comparator, compare the V DS with V_TOFF. When V DS is greater than or equal to V_TOFF, generate a turn-off control signal RST_PRE;

[0078] Step S3, fast turn-on control, including: by detecting the falling edge of V DS obtained in real time, if it reaches the set threshold V_TON, generate a turn-on control signal SET_PRE.

[0079] Specifically, since the traditional SR controller is based on V DSFor the sampling control method, the switching frequency of the application scenario is not very high, so the problems of early turn-off and turn-on delay are not prominent. When a traditional SR controller is used at a relatively high switching frequency (≥500KHz), the problems of early turn-off and turn-on delay can no longer be ignored, and they greatly affect the efficiency of the power converter. To solve the problem of early turn-off, some technologies have been proposed. Among them, the method of RC network compensation has achieved certain results, but this method is greatly affected by device parameter deviations and does not fundamentally solve the problem. Moreover, the method of RC network compensation requires additional external devices, which is not conducive to the improvement of power density. For the problem of turn-on delay, it also urgently needs to be solved, but there is very little research on it at present.

[0080] In summary, based on the traditional SR controller, the present invention proposes a new control method. The proposed control method includes two core contents, namely adaptive turn-off threshold control and fast turn-on control. Adaptive turn-off threshold control detects V DS to obtain the conduction time t of the body diode after S1 is turned off in each cycle diode , and converts t diode into a corresponding voltage signal V d . V d is used as the inverting input signal of the PI (Proportional Integral) compensator, and the output V_TOFF of the PI compensator is used as the turn-off threshold of S1. When the adaptive turn-off module detects that V DS is greater than or equal to V_TOFF, a turn-off control signal RST_PRE is generated. The non-inverting input of the PI compensator is the reference voltage V REF , which is related to the desired conduction time t of the diode dioderef . Through the above adaptive turn-off threshold control method, the problem of early turn-off can be effectively solved. Fast turn-on control detects the falling edge of V DS and whether it reaches the set threshold V_TON. If the above turn-on conditions are met, a turn-on control signal SET_PRE is generated.

[0081] The structure of the present invention does not require additional components, which can effectively reduce the system volume. And the present invention adopts a fully integrated solution and can be applied to current high-frequency converters and future higher-frequency power converters.

[0082] The parts not detailed in the present invention are all well-known technologies to those skilled in the art.

[0083] The preferred specific embodiments of the present invention have been described in detail above. It should be understood that those of ordinary skill in the art can make many modifications and variations based on the concept of the present invention without creative efforts. Therefore, all technical solutions that can be obtained by those skilled in the art in the technical field according to the concept of the present invention through logical analysis, reasoning or limited experiments on the basis of the prior art should fall within the protection scope determined by the claims.

Claims

1. An adaptive synchronous rectification control circuit, characterized in that, The control circuit includes: Fast turn-on module, whose input is the drain-source voltage V of synchronous rectifier power transistor S1 DS , and whose output is the turn-on control signal SET_PRE; Adaptive turn-off module, whose input is the drain-source voltage V of synchronous rectifier power transistor S1 DS , and whose output is the turn-off control signal RST_PRE; An oscillation shielding module, whose inputs are the minimum on-time control signal MIN_ON and the minimum off-time control signal MIN_OFF, as well as the turn-on control signal SET_PRE and the turn-off control signal RST_PRE, and whose outputs are the control signal Q of the synchronous rectifier power transistor S1 without driving ability and the control signal QB; A driving module, whose input is the control signal Q of the synchronous rectifier power tube S1 without driving ability, and whose output is the control signal V of the synchronous rectifier power tube S1 with driving ability GS ; The fast startup module specifically includes: capacitor C1, resistor R1, voltage reference V bias , comparator CMP1, Schmitt trigger SHMT1, and AND gate AND1; The capacitor C1, resistor R1, and voltage reference V bias form a high-pass network. One end of the capacitor C1 is the input end of the high-pass network, and this input end is connected to the sampled drain-source voltage V DS ; One end of the resistor R1 is connected to the positive terminal of the voltage reference V bias and the negative terminal of the voltage reference V bias is grounded; The other ends of the capacitor C1 and the resistor R1 are connected to each other and are both connected to the input end of the Schmitt trigger SHMT1, and the output of the Schmitt trigger SHMT1 is the drain-source voltage V DS of the falling edge slope; The comparator CMP1 has its negative input terminal receiving the sampled drain-source voltage V DS , and its positive input terminal connected to the turn-on threshold voltage V_TON. The output of the comparator CMP1 serves as the judgment result of the turn-on threshold; The AND gate AND1, whose inputs are the outputs of the comparator CMP1 and the Schmitt trigger SHMT1, and whose output is the turn-on control signal SET_PRE; The adaptive shutdown module specifically includes: comparator CMP2, AND gate AND2, switch M1, switch M2, current reference I bias , capacitor C2, sample and hold circuit SH, PI compensator, and comparator CMP3; The comparator CMP2 receives the drain-source voltage V at its negative terminal DS , and its positive terminal is the threshold voltage V T , and its output terminal is connected to the input terminal of the AND gate AND2; The AND gate AND2, whose input terminal also receives the control signal QB, controls the current reference I by controlling the on / off state of the switch M2. bias Charge the capacitor C2. One end of the capacitor C2 is grounded, and the other end is connected to the input terminals of the switch M1, the switch M2, and the sample-and-hold circuit SH respectively. The sampling and holding circuit SH samples the voltage value of the capacitor C2 under the control of the control signal Q, and this control signal Q also controls the switch M1 to periodically clear the voltage V of the capacitor C2. The output terminal of the sampling and holding circuit SH is connected to the inverting input terminal of the PI compensator; C2 ​ The PI compensator has its in-phase input terminal connected to the voltage reference V REF , and its output is V_TOFF, and this V_TOFF is output to the inverting input terminal of the comparator CMP3; The comparator CMP3 has its non-inverting input terminal receiving the drain-source voltage V DS , and its output is the turn-off control signal RST_PRE, and this turn-off control signal RST_PRE serves as the turn-off control signal for synchronous rectification control.

2. The adaptive synchronous rectification control circuit according to claim 1, wherein The enable control signal SET_PRE is generated only when two conditions are met simultaneously. Among them, the first condition is that the sampled drain-source voltage V DS is less than the turn-on threshold V_TON, and the second condition is that the falling edge slope of the detected V DS reaches a certain value.

3. An adaptive synchronous rectification control circuit according to claim 1, wherein, The oscillation shielding module specifically includes: a minimum off-time shielding circuit, a minimum on-time shielding circuit, an AND gate AND3, an AND gate AND4, and an RS flip-flop; The minimum off-time shielding circuit, whose input is the minimum off-time control signal MIN_OFF, and whose output terminal is connected to the input terminal of the AND gate AND3. Among them, the input terminal of this AND gate AND3 also receives the turn-on control signal SET_PRE; The minimum on-time shielding circuit, whose input is the minimum on-time control signal MIN_ON, and whose output terminal is connected to the input terminal of the AND gate AND4. Among them, the input terminal of this AND gate AND4 also receives the turn-off control signal RST_PRE; The output signal of the AND gate AND3 is SET, and the output signal of the AND gate AND4 is RST. Among them, the signal SET controls the setting of the RS flip-flop, and the signal RST controls the reset of the RS flip-flop; The outputs of the RS flip-flop are the control signal Q and the control signal QB.

4. An adaptive synchronous rectification control method, which is applied to an adaptive synchronous rectification control circuit as described in claim 1, and is characterized in that, The control method includes the following steps: Step S1: Set the threshold value, including: First, detect V DS , obtain the conduction time t of the body diode after the synchronous rectifier power transistor S1 is turned off in each period diode , then convert the conduction time t diode into the corresponding voltage signal V d , and then use the voltage signal V d as the inverting input signal of the PI compensator, and use the output V_TOFF of the PI compensator as the threshold for turning off the synchronous rectifier power transistor S1. Among them, the non-inverting input of the PI compensator is the reference voltage V REF ; Step S2, Adaptive Shutdown Threshold Control, includes: obtaining V in real time DS , and then through a comparator, comparing this V DS with V_TOFF. When V DS is greater than or equal to V_TOFF, a shutdown control signal RST_PRE is generated; Step S3, fast turn-on control, including: obtaining the falling edge of V in real time by detection. DS If it reaches the set threshold V_TON, an on control signal SET_PRE is generated.

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