Method for redundant monitoring of inverter PWM modulation and output voltage

A software algorithm for monitoring inverter PWM modulation and output voltage addresses hardware-dependent failures by calculating actual output voltage, ensuring reliable detection without extra hardware, thus improving detection reliability.

CN114594322BActive Publication Date: 2024-12-27HENAN JIACHEN INTELLIGENT CONTROL CO LTD
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Patent Information

Application Number
CN202210186798.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-02-28
Publication Date
2024-12-27
Estimated Expiration
2042-02-28

AI Technical Summary

Technical Problem

Conventional methods for monitoring inverter PWM modulation and output voltage rely on hardware circuits, leading to common cause failures and poor detection effectiveness, necessitating a more robust and redundant detection scheme.

Method used

A software algorithm is employed to monitor inverter PWM modulation and output voltage by calculating the actual output voltage using voltage comparators and time measurements based on a trapezoidal waveform, eliminating the need for additional hardware.

Benefits of technology

The software-based method provides dual redundant verification of PWM modulation and output voltage without additional hardware, enhancing detection reliability and effectiveness.

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Abstract

The invention discloses a method for redundantly monitoring inverter PWM modulation and output voltage, comprising the following steps: step 1: calculating the output voltage Vca; step 2: a power device has a switching transition process, and the waveform actually presented by the output voltage Vout is mostly in a trapezoidal state; step 3: calculating the voltage waveform of the actual output voltage Vout in step 2, setting two voltage comparators, and calculating the time t1 and the time t2 when two level flips occur during the process of turning on and off the power device; and calculating the time t1; similarly, calculating the time t2; step 4: using t1 and t2 obtained in step 3 to obtain the actual output voltage Vout; step 5: performing a difference comparison between Vca and Vout to determine whether the output of Vout is normal. The invention does not add additional hardware equipment, uses a software algorithm to perform estimation, and compares the estimation result with a given expected value to achieve dual redundant verification of the PWM modulation signal and the output voltage.
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Description

Technical Field

[0001] The invention relates to the technical field of electronic circuits, and in particular to a method for redundantly monitoring inverter PWM modulation and output voltage. Background Art

[0002] When the inverter outputs voltage, a certain modulation ratio is usually given. The inverter output voltage = modulation ratio (Duty) * input rated voltage (Vdc). Due to the lack of voltage sampling at the output end in the application, it is impossible to determine whether the inverter output voltage is executed according to the given instructions. The conventional practice is to use megohm resistors and operational amplifiers for differential sampling, and feedback the voltage to the main control chip for judgment. This approach requires additional configuration of hardware sampling circuits. From the perspective of redundancy of the detection scheme, it is easy to cause common cause failures, and the detection effect is poor, which affects the use of the inverter.

[0003] Therefore, it is a worthwhile research issue to provide a method for redundantly monitoring the inverter PWM modulation and output voltage using software algorithms for detection. Summary of the invention

[0004] In order to solve the above-mentioned deficiencies in the prior art, the present invention provides a method for redundantly monitoring inverter PWM modulation and output voltage by using software algorithm for detection.

[0005] The object of the present invention is achieved in that:

[0006] The method for redundantly monitoring inverter PWM modulation and output voltage comprises the following steps: Step 1: When the inverter is working, there is a certain duty cycle D1, and a given voltage Vdc generates a theoretical output voltage Vca under the regulation of the duty cycle, Vca=Vdc*D1; Step 2: In actual work, due to the switching transition process of the power device, the waveform actually presented by the output voltage Vout is mostly in a trapezoidal state; Step 3: The voltage waveform of the actual output voltage Vout in step 2 is calculated, and two voltage comparators are set to compare with 10% Vdc and 90% Vdc voltage values ​​respectively, 10% Vdc and 90% Vdc are considered to be the opening and closing of the power device. The voltage comparator comp1 is set to compare with 90% Vdc, then two level flips will occur during the process of turning on and off the power device. By triggering the MCU to record the moments of the two flips, the time t1 can be calculated; similarly, the voltage comparator comp2 is set to compare with 10% Vdc, and the time t2 can be calculated; Step 4: Using the t1 and t2 obtained in step 3, the actual output voltage Vout can be obtained according to the trapezoidal area calculation formula; Step 5: Compare the theoretically calculated Vca with the actual output voltage Vout to obtain the absolute difference ΔV, and judge whether the Vout output is normal by the absolute difference ΔV.

[0007] The calculation formula of the actual output voltage is:

[0008] .

[0009] In step 5, the absolute difference ΔV= .

[0010] In step 5, ΔV is the basis for judging whether the actual output voltage Vout is normal. Vlimt is set as the limit of the difference between the theoretical value and the actual value. When ΔV>Vlmit, it is judged that the output of the actual output voltage Vout exceeds the requirement set by Vca, which proves that the actual output voltage Vout is abnormal at this time; when ΔV<Vlmit, it is judged that the output of the actual output voltage Vout is within the requirement range set by Vca, and the actual output voltage Vout is normal.

[0011] Positive and beneficial effects: The present invention uses a software algorithm to perform estimation without adding additional hardware equipment, and then compares the estimation result with a given expected value, thereby realizing dual redundant verification of the PWM modulation signal and the output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A schematic diagram of a given duty cycle, a given voltage and a theoretical output voltage of the present invention;

[0013] Figure 2 is a schematic diagram of the actual output voltage of the present invention;

[0014] Figure 3 This is a schematic diagram of calculating time t1 and time t2 according to the present invention. DETAILED DESCRIPTION

[0015] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0016] like Figures 1 to 3 As shown, the method for redundantly monitoring the inverter PWM modulation and output voltage includes the following steps: Step 1: The inverter has a certain duty cycle D1 when working, and a given voltage Vdc generates a theoretical output voltage Vca under the regulation of the duty cycle, Vca=Vdc*D1.

[0017] Step 2: In actual work, due to the switching transition process of the power device, the waveform of the actual output voltage Vout is mostly trapezoidal.

[0018] Step 3: Calculate the voltage waveform of the actual output voltage Vout in step 2, set two voltage comparators, and compare with 10% Vdc and 90% Vdc voltage values ​​respectively. 10% Vdc and 90% Vdc are considered to be the thresholds for turning on and off the power device. The voltage comparator comp1 is set to compare with 90% Vdc, then two level flips will occur during the process of turning on and off the power device. By triggering the MCU to record the moments of the two flips, the time t1 can be calculated; similarly, the voltage comparator comp2 is set to compare with 10% Vdc, and the time t2 can be calculated.

[0019] Step 4: Using t1 and t2 obtained in step 3, the actual output voltage Vout can be obtained according to the trapezoidal area calculation formula; the calculation formula of the actual output voltage is:

[0020]

[0021] Step 5: Compare the theoretically calculated Vca with the actual output voltage Vout to obtain the absolute difference ΔV. The absolute difference ΔV is used to determine whether the actual output voltage Vout is normal. The absolute difference ΔV = .

[0022] ΔV is the basis for judging whether the actual output voltage Vout is normal. Vlimt is set as the limit of the difference between the theoretical value and the actual value. When ΔV>Vlmit, it is judged that the output of the actual output voltage Vout exceeds the requirement set by Vca, which proves that the actual output voltage Vout is abnormal at this time; when ΔV<Vlmit, it is judged that the output of the actual output voltage Vout is within the requirement range set by Vca, and the actual output voltage Vout is normal.

[0023] The present invention uses a software algorithm to perform estimation without adding additional hardware equipment, and then compares the estimation result with a given expected value, thereby realizing double redundancy verification of a PWM modulation signal and an output voltage.

Claims

1. A method for redundantly monitoring inverter PWM modulation and output voltage, characterized in that: The invention comprises the following steps: Step 1: when the inverter is working, there is a certain duty cycle D1. A given voltage Vdc generates a theoretical output voltage Vca under the regulation of the duty cycle, Vca=Vdc*D1; Step 2: in actual work, due to the switching transition process of the power device, the waveform actually presented by the output voltage Vout is mostly in a trapezoidal state; Step 3: the voltage waveform of the actual output voltage Vout in step 2 is calculated, and two voltage comparators are set to compare with the voltage values ​​of 10% Vdc and 90% Vdc respectively. 10% Vdc and 90% Vdc are considered to be the thresholds for turning on and off the power device. The voltage comparator co If mp1 is set to compare with 90% Vdc, two level flips will occur during the process of turning on and off the power device. By triggering the MCU to record the moments of the two flips, the time t1 can be calculated. Similarly, by setting the voltage comparator comp2 to compare with 10% Vdc, the time t2 can be calculated. Step 4: Using the t1 and t2 obtained in step 3, the actual output voltage Vout can be obtained according to the trapezoidal area calculation formula. Step 5: Compare the theoretically calculated Vca with the actual output voltage Vout to obtain the absolute difference ΔV, and judge whether the Vout output is normal by the absolute difference ΔV. The calculation formula of the actual output voltage is: ; Absolute difference ΔV in step 5 = ; In the step 5, ΔV is the basis for judging whether the actual output voltage Vout is normal, and Vlimt is set as the limit of the difference between the theoretical value and the actual value. When ΔV>Vlmit, it is judged that the output of the actual output voltage Vout exceeds the requirement set by Vca, which proves that the actual output voltage Vout is abnormal at this time; when ΔV<Vlmit, it is judged that the output of the actual output voltage Vout is within the requirement range set by Vca, and the actual output voltage Vout is normal.