Double-circle voltage isolation ring automatic layout method, device and storage medium

Abstract

The present invention discloses a method and device for automatically laying out a double-circle voltage isolation ring and a storage medium. The method for automatically laying out a double-circle voltage isolation ring according to an embodiment of the present invention comprises setting isolation ring parameters; obtaining point chain information of the double-circle voltage isolation ring; and laying out the double-circle voltage isolation ring according to the point chain information and the isolation ring parameters. The method and device for automatically laying out a double-circle voltage isolation ring and a storage medium according to an embodiment of the present invention can efficiently realize the automatic layout of the double-circle voltage isolation ring.

Description

Technical Field

[0001] The invention relates to the technical field of automated electronic design, and in particular to an automated layout method and device for a double-loop voltage isolation ring and a storage medium. Background Art

[0002] At present, the high-voltage processes of mainstream wafer factories all require the use of double-circle voltage isolation rings to isolate the circuit. The double-circle voltage isolation ring can not only shield the coupling noise and reduce the voltage drop in the body area, but also reduce the parasitic resistance, enhance the isolation effect, and effectively reduce the risk of latch-up.

[0003] In the existing layout design, two single-circle isolation rings are usually designed separately, and then the two separate isolation rings are assembled into a double-circle voltage isolation ring. The existing method of calling the double-circle voltage isolation ring is not only complicated to operate, but also inefficient.

[0004] Therefore, it is hoped that there will be a new dual-loop voltage isolation ring automatic layout method and device and storage medium that can overcome the above problems. Summary of the invention

[0005] In view of the above problems, an object of the present invention is to provide a method and device for automatic layout of a double-loop voltage isolation ring and a storage medium, so as to efficiently complete the automatic layout of the double-loop voltage isolation ring.

[0006] According to one aspect of the present invention, a method for automatic layout of a double-circle voltage isolation ring is provided, comprising setting isolation ring parameters; obtaining point chain information of the double-circle voltage isolation ring; and laying out the double-circle voltage isolation ring according to the point chain information and the isolation ring parameters.

[0007] Preferably, the automatic layout method of the double-circle voltage isolation ring further comprises setting a hidden system layer; and pre-drawing the inner ring of the double-circle voltage isolation ring in the system layer according to the point chain information.

[0008] Preferably, the point chain information includes the center point chain of the inner ring of the double-circle voltage isolation ring; and the center point chain of the outer ring of the double-circle voltage isolation ring is generated according to the center point chain of the inner ring of the double-circle voltage isolation ring.

[0009] Preferably, the inner ring and the outer ring of the double-ring voltage isolation ring are respectively arranged in different identification layers.

[0010] Preferably, the isolation ring parameters include at least one of inner ring width, outer ring width, inner ring shape, outer ring shape, spacing between inner ring and outer ring, through hole filling method on the ring and relative size between layers.

[0011] Preferably, the automatic layout method of the double-loop voltage isolation ring further comprises, after the double-loop voltage isolation ring is laid out, modifying the isolation ring parameters to adjust the layout of the double-loop voltage isolation ring.

[0012] Preferably, the automatic layout method of the double-loop voltage isolation ring also includes defining the isolation ring parameters in the format of CDF parameters; defining the default values ​​of the CDF parameters in the techfile file; setting the interactive interface parameters of the Aether layout tool to obtain the point chain information; setting the shape of the double-loop voltage isolation ring using the tcl language supported by the Aether layout; and loading the double-loop voltage isolation ring in the initialization file of the Aether PCell Library.

[0013] According to another aspect of the present invention, there is provided a double-circle voltage isolation ring automated layout toolkit, comprising a parameter unit for setting isolation ring parameters; a point chain unit for obtaining point chain information of the double-circle voltage isolation ring; a layout unit connected to the parameter unit to obtain the isolation ring parameters, connected to the point chain unit to obtain the point chain information, and layout the double-circle voltage isolation ring according to the point chain information and the isolation ring parameters.

[0014] According to another aspect of the present invention, there is provided a dual-loop voltage isolation ring automated layout device, comprising a processor; and a memory for storing one or more programs, wherein the one or more programs are executed by the processor, so that the processor implements any one of the dual-loop voltage isolation ring automated layout methods as described above.

[0015] According to another aspect of the present invention, there is provided a computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, any one of the above-mentioned automatic layout methods for a double-loop voltage isolation ring is implemented.

[0016] The dual-circle voltage isolation ring automatic layout method, device and storage medium according to the embodiment of the present invention can automatically layout the dual-circle voltage isolation ring according to the set isolation ring parameters and the obtained point chain information, effectively shorten the layout design cycle, speed up the project development progress, and improve the work efficiency of layout engineers

[0017] According to the dual-loop voltage isolation ring automatic layout method, device and storage medium of the embodiment of the present invention, the inner ring and outer ring of the dual-loop voltage isolation ring are laid out in different layers, and the inner ring or the outer ring can be modified separately, which simplifies the modification process and improves work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A method flow chart of a method for automatic layout of a double-loop voltage isolation ring according to an embodiment of the present invention is shown;

[0020] Figure 2 A method flow chart of a method for automatic layout of a double-loop voltage isolation ring according to an embodiment of the present invention is shown;

[0021] Figure 3 A schematic diagram of the process of the automatic layout method of the double-loop voltage isolation ring according to an embodiment of the present invention is shown;

[0022] Figure 4 A schematic diagram showing the composition of a dual-loop voltage isolation ring automated layout tool kit according to an embodiment of the present invention is shown;

[0023] Figure 5 A structural schematic diagram of a dual-loop voltage isolation ring automatic layout device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0024] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by identical or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown in the drawings.

[0025] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. Many specific details of the present invention, such as the structure, materials, dimensions, processing technology and techniques of the components are described below to provide a clearer understanding of the present invention. However, as those skilled in the art will appreciate, the present invention may be implemented without following these specific details.

[0026] It should be understood that when describing the structure of a component, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean that it is directly on the other layer or another region, or that other layers or regions are included between it and the other layer or another region. Moreover, if the component is turned over, the layer or a region will be "below" or "beneath" another layer or another region.

[0027] The dual-loop voltage isolation ring automated layout method, toolkit, device and storage medium according to the embodiments of the present invention belong to the PDK (Process Design Kit) development field and the Aether layout design field. The present invention discloses a method for implementing a dual-loop voltage isolation ring in a PDK.

[0028] Figure 1A method flow chart of the automatic layout method of the double-loop voltage isolation ring according to an embodiment of the present invention is shown. Figure 1 As shown, the automatic layout method of the double-loop voltage isolation ring according to an embodiment of the present invention includes the following steps:

[0029] In step S101, setting isolation ring parameters;

[0030] The isolation ring parameters are set. The isolation ring parameters include, for example, at least one of the inner ring width, outer ring width, inner ring shape, outer ring shape, the distance between the inner ring and the outer ring, the through hole filling method on the ring, and the relative size between layers.

[0031] In step S102, the point chain information of the double-circle voltage isolation ring is obtained;

[0032] Get the point chain information of the double-circle voltage isolation ring. Optionally, the point chain information includes the center point chain of the inner ring of the double-circle voltage isolation ring, and the center point chain of the inner ring is obtained, for example, by the movement trajectory of the cursor (mouse). Further, the center point chain of the outer ring of the double-circle voltage isolation ring is generated according to the center point chain of the inner ring of the double-circle voltage isolation ring. Optionally, the center point chain of the outer ring of the double-circle voltage isolation ring is obtained according to the center point chain of the inner ring of the double-circle voltage isolation ring and the isolation ring parameters.

[0033] In step S103, a double-circle voltage isolation ring is laid out according to the point chain information and the isolation ring parameters.

[0034] According to the obtained point chain information and the set isolation ring parameters, a double-circle voltage isolation ring is laid out.

[0035] In an optional embodiment of the present invention, the inner ring and the outer ring of the double-circle voltage isolation ring are respectively arranged in different identification layers. Optionally, the double-circle voltage isolation ring (Advance Guard Ring) included in the PDK can be used through identification layers of different voltages (identification layers of isolation rings of different voltages will be different, such as ISO12 for 12V and ISO30 for 30V), in conjunction with other variable parameter units in the PDK, to flexibly set and operate isolation rings of different voltages in the layout.

[0036] In an optional embodiment of the present invention, the automatic layout method of the double-circle voltage isolation ring further includes: after the double-circle voltage isolation ring is laid out, modifying the isolation ring parameters to adjust the layout of the double-circle voltage isolation ring. Optionally, the inner ring and the outer ring of the double-circle voltage isolation ring are respectively laid out in different identification layers, and the layout of the inner ring and / or the outer ring can be independently adjusted by modifying the isolation ring parameters.

[0037] In an optional embodiment of the present invention, the automatic layout method of the double-circle voltage isolation ring further includes: setting a hidden system layer; and pre-drawing the inner ring of the double-circle voltage isolation ring according to the point chain information in the system layer.

[0038] In the above-mentioned embodiment of the present invention, a dual-loop high-voltage Advanced Guard Ring (isolation ring) is developed and implemented in the PDK. It is a variable parameter layout unit supported by the Aether Layout Editor platform and can also be flexibly operated by customers such as stretching, chopping, and splitting, which facilitates customers to perform high-voltage circuit isolation operations during layout design, effectively shortens the layout design cycle, speeds up project development progress, and improves the work efficiency of layout engineers.

[0039] Figure 2 A method flow chart of the automatic layout method of the double-loop voltage isolation ring according to an embodiment of the present invention is shown. Figure 2 As shown, the automatic layout method of the double-loop voltage isolation ring according to an embodiment of the present invention includes the following steps:

[0040] In step S201, the isolation ring parameters are defined in the format of CDF parameters;

[0041] Define the isolation ring parameters in the format of Computable Document Format (CDF) parameters. The isolation ring parameters include the main layer width parameters of the inner and outer rings, the filling method selection of the through holes on the ring, and the relative size information parameters of other layers and the main layer.

[0042] In step S202, the default values ​​of the CDF parameters are defined in the techfile file;

[0043] The default values ​​of CDF parameters are defined in the techfile, including the default size information of each layer of the isolation ring, the size information of the through hole, the corresponding size relationship between the layers, the enclosure and the space, etc.

[0044] In step S203, the interactive interface parameters of the Aether layout tool are set to obtain the point chain information;

[0045] Set the interactive interface function of the Aether layout tool to obtain the operation point chain information of the mouse (cursor).

[0046] In step S204, the shape of the double-circle voltage isolation ring is set using the tcl language supported by the Aether layout;

[0047] Use the tcl language supported by Aether to develop the specific shape of the double-circle voltage isolation ring.

[0048] In step S205, the double-loop voltage isolation ring is loaded into the initialization file of the Aether PCell Library.

[0049] Load the double-loop voltage isolation ring in the initialization file of the Aether PCell Library.

[0050] Optionally, the dual-loop voltage isolation ring automatic layout method according to the embodiment of the present invention further includes step S206: compiling the dual-loop voltage isolation ring into an accessible database (OA (Open Access) Database) together with conventional PCell devices, and then packaging it in the PDK.

[0051] In the above-mentioned embodiment of the present invention, the PCell (variable parameter layout unit) developed in the PDK generally changes the shape of the device by adjusting the CDF parameters on the interface. The present invention realizes a double-circle voltage isolation ring by obtaining the real-time point chain information of the mouse on the Aether layout editing interface and combining it with the development of PCell. It pre-draws the hidden system layer on the layout, and then obtains the point chain of the mouse movement on the Aether layout, which corresponds to the center point chain of the inner ring in the double-circle isolation ring (GuardRing), and then expands outward to generate the center point chain of the outer ring according to the size definition of each layer in the inner and outer ring Guard rings in the process. In addition, the generated double-circle voltage isolation ring has both the CDF parameter attributes of PCell, which can facilitate users to perform secondary editing and modification.

[0052] Figure 3 FIG. 2 is a schematic diagram showing a flow chart of a method for automatically laying out a double-loop voltage isolation ring according to an embodiment of the present invention. Figure 3 As shown in the figure, according to the technical documents of the Foundry process, the specific implementation of the double-loop voltage isolation ring in the PDK is a combination of the design steps of the variable parameter unit and the real-time interactive processing of the Aether layout tool, which specifically includes the following steps:

[0053] In step S301, the foundry technical files required for Aether PDK development are obtained, including the process design manual (Design Rule Manual), device simulation model, voltage information supported by the process, etc.

[0054] In step S302, technical indicators of the double-circle voltage isolation ring are defined, including double-circle voltage isolation ring layers corresponding to different voltages, a list of adjustable parameters of the double-circle voltage isolation ring, etc.

[0055] In step S303, CDF parameters are defined according to the PCell format.

[0056] In step S304, default values ​​for isolation ring operations are defined in the techfile.

[0057] In step S305, the real-time information of the mouse in the Aether map is obtained, thereby obtaining the point chain information.

[0058] In step S306, the inner ring of the isolation ring is pre-drawn using the system layer according to the mouse point link information.

[0059] In step S307, the point chain information of the outer ring is expanded and generated according to the point chain information of the inner ring, and other layer information is drawn and generated using the PCell method.

[0060] In step S308, the Aether PCell Library excluding the AGR is obtained, which specifically includes a process file (techfile), a device schematic unit (symbol view), a device layout unit (Layout view) and a device simulation unit (simulation view).

[0061] In step S309, all PCell devices and dual-circuit voltage isolation ring units (OA database) in the current library are compiled and generated.

[0062] In step S310, the Aether PDK including the AGR is packaged.

[0063] Figure 4 FIG. 2 shows a schematic diagram of the composition of a dual-circuit voltage isolation ring automatic layout tool kit according to an embodiment of the present invention. Figure 4 As shown, the dual-loop voltage isolation ring automatic layout (software) toolkit according to an embodiment of the present invention includes a parameter unit 10 , a point chain unit 20 and a layout unit 30 .

[0064] Specifically, the parameter unit 10 is used to set the isolation ring parameters.

[0065] The point chain unit 20 is used to obtain the point chain information of the double-circle voltage isolation ring.

[0066] The layout unit 30 is connected to the parameter unit 10 to obtain the isolation ring parameters, is connected to the point chain unit 20 to obtain the point chain information, and layouts the double-circle voltage isolation ring according to the point chain information and the isolation ring parameters.

[0067] Figure 5 FIG. 1 is a schematic diagram showing a structure of a dual-loop voltage isolation ring automatic layout device according to an embodiment of the present invention. Figure 5 The present disclosure also provides a block diagram of an exemplary device suitable for implementing the embodiments of the present disclosure. It should be understood that Figure 5 The device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0068] like Figure 5 As shown, the device 200 is in the form of a general-purpose computing device. The components of the device 200 may include, but are not limited to: one or more processors or processing units 210, a memory 220, and a bus 201 connecting different system components (including the memory 220 and the processing unit 210).

[0069] Bus 201 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or a local bus using any of a variety of bus structures. For example, these architectures include but are not limited to Industry Standard Architecture (ISA) bus, Micro Channel Architecture (MAC) bus, Enhanced ISA bus, Video Electronics Standards Association (VESA) local bus and Peripheral Component Interconnect (PCI) bus.

[0070] The device 200 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the device 200, including volatile and non-volatile media, removable and non-removable media.

[0071] System memory 220 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 221 and / or cache memory 222. Device 200 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 223 may be used to read and write non-removable, non-volatile magnetic media ( Figure 5 not shown, usually called a "hard drive"). Although Figure 5 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, a DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 201 via one or more data medium interfaces. Memory 220 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of each embodiment of the present disclosure.

[0072] A program / utility 224 having a set (at least one) of program modules 2241 may be stored, for example, in the memory 220, such program modules 2241 including but not limited to an operating system, one or more application programs, other program modules, and program data, each of which or some combination thereof may include an implementation of a network environment. The program modules 2241 generally perform the functions and / or methods of the embodiments described in the embodiments of the present disclosure.

[0073] Further, the device 200 may also be connected to a display 300 for displaying the results of the screening and sorting. The display 300 may include, but is not limited to, a liquid crystal display (LCD), a light emitting diode (LED) display, and a plasma display. In some embodiments, the display 300 may also be a touch screen.

[0074] Further, the device 200 can also communicate with one or more devices that enable a user to interact with the device 200, and / or communicate with any device (e.g., a network card, a modem, etc.) that enables the device 200 to communicate with one or more other computing devices. This communication can be carried out through an input / output (I / O) interface 230. In addition, the device 200 can also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN) and / or a public network, such as the Internet) through a network adapter 240. As shown in the figure, the network adapter 240 communicates with other modules of the device 200 through bus 201. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with the device 200, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, etc.

[0075] The processing unit 210 executes various functional applications and data processing by running programs stored in the system memory 220 .

[0076] According to another aspect of the present invention, a computer-readable storage medium is provided, on which a computer program (or computer-executable instructions) is stored. When the program is executed by a processor, it is used to execute the integrated circuit layout design device provided in the embodiment of the present disclosure. The method includes:

[0077] Set the isolation ring parameters;

[0078] Obtaining point chain information of the double-circle voltage isolation ring; and

[0079] The double-loop voltage isolation ring is laid out according to the point chain information and the isolation ring parameters.

[0080] The computer storage medium of the embodiment of the present disclosure may adopt any combination of one or more computer-readable media. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by an instruction execution system, device or device or used in combination with it.

[0081] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0082] The program code embodied on the computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0083] Computer program code for performing the operation of the disclosed embodiments may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​(such as Java, Smalltalk, C++), and conventional procedural programming languages ​​such as "C" language or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0084] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0085] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A method for automatic layout of a double-loop voltage isolation ring, characterized in that: include: Setting isolation ring parameters, wherein the isolation ring parameters include at least one of inner ring width, outer ring width, inner ring shape, outer ring shape, spacing between inner ring and outer ring, through hole filling method on the ring, and relative size between layers; Acquire point chain information of a double-circle voltage isolation ring, wherein the point chain information includes a center point chain of an inner ring of the double-circle voltage isolation ring; The double-loop voltage isolation ring is laid out according to the point chain information and the isolation ring parameters.

2. The method for automatic layout of a double-loop voltage isolation ring according to claim 1, characterized in that: The dual-circle voltage isolation ring automatic layout method also includes: Set up hidden system layers; The inner ring of the double-circle voltage isolation ring is pre-drawn in the system layer according to the point chain information.

3. The automatic layout method of the double-loop voltage isolation ring according to claim 1 is characterized in that: The center point chain of the outer ring of the double-circle voltage isolation ring is generated according to the center point chain of the inner ring of the double-circle voltage isolation ring.

4. The automatic layout method of the double-circle voltage isolation ring according to claim 1 is characterized in that: The inner ring and the outer ring of the double-ring voltage isolation ring are respectively arranged in different identification layers.

5. The automatic layout method of the double-loop voltage isolation ring according to claim 1, characterized in that: The dual-circle voltage isolation ring automatic layout method also includes: After the double-circle voltage isolation ring is laid out, the isolation ring parameters are modified to adjust the layout of the double-circle voltage isolation ring.

6. The automatic layout method of the double-circle voltage isolation ring according to claim 1, characterized in that: The dual-circle voltage isolation ring automatic layout method also includes: Defining the isolation ring parameters according to the CDF parameter format; Defining default values ​​of the CDF parameters in the techfile file; Set the interactive interface parameters of the Aether layout tool to obtain the point chain information; Using the tcl language supported by the Aether layout to set the shape of the double-circle voltage isolation ring; The double-loop voltage isolation ring is loaded in the initialization file of the Aether PCell Library.

7. A double-loop voltage isolation ring automated layout toolkit, characterized in that: include: A parameter unit, used to set the isolation ring parameters, wherein the isolation ring parameters include at least one of the inner ring width, the outer ring width, the inner ring shape, the outer ring shape, the spacing between the inner ring and the outer ring, the through hole filling method on the ring, and the relative size between layers; A point chain unit, used for acquiring point chain information of a double-circle voltage isolation ring, wherein the point chain information includes a center point chain of an inner ring of the double-circle voltage isolation ring; A layout unit is connected to the parameter unit to obtain the isolation ring parameters, is connected to the point chain unit to obtain the point chain information, and layouts the double-loop voltage isolation ring according to the point chain information and the isolation ring parameters.

8. A double-loop voltage isolation ring automatic layout device, comprising: processor; a memory for storing one or more programs, The one or more programs are executed by the processor, so that the processor implements the automatic layout method of the double-loop voltage isolation ring as described in any one of claims 1-6.

9. A computer-readable storage medium having a computer program stored thereon, wherein: When the program is executed by a processor, the automatic layout method of the double-loop voltage isolation ring as described in any one of claims 1 to 6 is implemented.

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