A high-voltage MOSFET transistor terminal structure and a preparation method thereof

Abstract

The present application relates to a high-voltage MOSFET transistor terminal structure and preparation method, wherein the method includes: a substrate layer, the substrate layer includes a base and an epitaxial layer, an oxide layer is formed on the epitaxial layer, a plurality of doping windows are laterally opened on the oxide layer, the doping windows extend to the epitaxial layer, and the sizes of the plurality of doping windows gradually decrease in the direction away from the main junction; a lateral variable doping structure, including a plurality of variable doping voltage divider rings formed in the epitaxial layer, each of the variable doping voltage divider rings is located at each doping window, and a plurality of floating PN junctions with junction depths gradually becoming shallower in the direction away from the main junction are formed below the bottom of the variable doping voltage divider ring and between the substrate layer. The technical effect of the present application is: it helps to achieve a terminal structure that maintains a small size while maintaining voltage resistance, thereby helping to improve the problem of a high chip area occupied by the terminal structure.

Description

Technical Field

[0001] The present application relates to a field, in particular, to a high-voltage MOSFET transistor terminal structure and a preparation method. Background Art

[0002] Currently, high-voltage planar MOSFET transistors are primarily used for applications such as modulating switches and synchronous rectification. The transistor's terminal structure forms a ring around the active area of the transistor, with the main junction located at the boundary between the active area and the terminal structure. Because their operating environment is often characterized by high temperature and high pressure, damage to the transistor terminal can damage the transistor, further damaging surrounding components. Therefore, the high-voltage resistance of the terminal structure is a crucial consideration in evaluating MOS devices.

[0003] The terminal structure of existing high-voltage MOS devices typically uses voltage divider rings to expand the width of the main junction's depletion region, allowing the device to withstand higher voltages and improve its voltage resistance. Voltage divider rings, also known as field rings, are used to extend the depletion region. When the voltage is too high, the number of voltage divider rings needs to be increased to further expand the depletion region. However, as the number of voltage divider rings increases, the effect of further adding voltage divider rings decreases.

[0004] With respect to the above-mentioned related technologies, the inventors have found that there are at least the following problems in the technologies: when a large number of voltage divider rings are added due to improving the voltage resistance of the device, the size of the terminal structure of the MOS device will be too large, making the proportion of the chip area occupied by it too large, which will cause the source region area to shrink and affect the conduction parameters of the device. Summary of the Invention

[0005] In order to improve the problem of oversized terminal structures, the present application provides a high-voltage MOSFET transistor terminal structure and a preparation method.

[0006] In a first aspect, the present application provides a high-voltage MOSFET transistor terminal structure, which adopts the following technical solution:

[0007] a substrate layer, the substrate layer comprising a base and an epitaxial layer, an oxide layer formed on the epitaxial layer, a plurality of doping windows being laterally opened on the oxide layer, the doping windows extending to the epitaxial layer, and the sizes of the plurality of doping windows gradually decreasing in a direction away from the main junction;

[0008] A lateral variable doping structure includes multiple variable doping voltage divider rings formed in the epitaxial layer, each of the variable doping voltage divider rings is located at each doping window, and multiple floating PN junctions are formed between the bottom of the variable doping voltage divider ring and the substrate layer, with the junction depth gradually becoming shallower in the direction away from the main junction.

[0009] By adopting the above technical solution, when the reverse bias voltage of the PN junction is high, electrical breakdown caused by impact ionization, i.e., avalanche breakdown, will occur. In the actual process, cylindrical and spherical junctions will be formed at the edge of the PN junction formed. Due to the surface effect, the electric field will be concentrated, and avalanche breakdown will first occur in this area, resulting in lower voltage resistance during the process. The voltage divider ring can play a voltage divider role during the process. As the voltage applied to the device gradually increases, the depletion region of the main junction gradually expands outward. Before the voltage increases to the avalanche voltage of the main junction, the depletion region of the reverse voltage ring has merged with the depletion region of the main junction, thereby expanding the depletion region of the main junction, reducing the curvature of the depletion region and reducing the electric field strength. Because the doping window gradually shrinks, the voltage divider ring of this scheme is a variable doping voltage divider ring. The doping amount of the variable doping voltage divider ring of this scheme gradually decreases, so the junction depth of the floating PN junction gradually decreases, so that the terminal structure as a whole presents the characteristics of a planar junction, and the breakdown voltage of the planar junction is much larger than that of the curved junction. Therefore, compared with the traditional voltage divider ring, the variable doping voltage divider ring of this scheme is more efficient in improving the voltage resistance of the device. Therefore, fewer variable doping voltage divider rings are needed to achieve the effect of greatly improving the voltage resistance of the device, thereby helping to achieve a terminal structure that maintains a smaller size while maintaining voltage resistance, thereby helping to improve the problem of a high chip area occupied by the terminal structure.

[0010] Optionally, the doping window includes a plurality of parallel straight portion grooves and vertical portion grooves located at both ends of the straight portion grooves in the length direction, and the distance between the straight portion grooves of two adjacent doping windows increases successively in the direction away from the main junction.

[0011] By adopting the above technical solution, compared with traditional voltage divider ring technology, this solution has a lower doping dose for the variable doping voltage divider ring due to the unique design of the doping window. When pressure is applied, the depletion region will expand in the direction of the low doping concentration of the PN junction, and mainly expand toward the epitaxial layer. The width of the epitaxial expansion of this solution is smaller than the depletion width of the traditional field limiting ring. The P-type region of the PN junction expands wider than the traditional depletion layer, which will reduce the depletion layer electric field strength of the N-type epitaxial layer. In addition, because the doping dose of the variable doping voltage divider ring of this solution is low and the junction depth is deeper, the cylindrical junction radius of the PN junction is larger and closer to a planar junction. When pressure is applied, the electric field concentration on the cylindrical junction of the PN junction is further reduced, thereby further reducing the electric field strength before avalanche, thereby further improving the withstand voltage. By utilizing the difference in junction depth to reduce the concentration of electric field strength, the depletion layer width of the PN junction varies. The lower the concentration, the wider the width, and the spacing of the straight portions needs to be increased.

[0012] Optionally, the width and depth of the vertical portion groove are equal to those of the straight portion groove.

[0013] By adopting the above technical solution, the width and depth of the vertical groove and the straight groove are made consistent, which can make the process simpler when etching the groove and help improve the consistency of the widening when the depletion region expands.

[0014] Optionally, the width of the straight portion groove and the width of the vertical portion groove gradually decrease in the direction away from the main junction, and the length of the straight portion groove plus the width of the vertical portion grooves at both ends of the straight portion groove is equal to the total width of the doping window, and the total width of each doping window is the same.

[0015] By adopting the above technical solution, the width of the straight trench and the width of the vertical trench gradually become smaller, thereby achieving a gradual reduction in the size of the doping window, the junction depth after diffusion gradually becomes shallower, the total PN junction P region dose becomes smaller, and when pressure is applied, the expansion of the PN junction toward the epitaxial layer becomes smaller, and the expansion toward the PN junction P region increases. The consistent total width helps to balance the charge, thereby improving the reverse pressure efficiency of the terminal structure, making the terminal structure short in length and highly reliable, and having high cost-effectiveness when applied to products.

[0016] Optionally, a plurality of polycrystalline field plates are formed on the oxide layer, and a variable doping voltage divider ring is provided between every two polycrystalline field plates.

[0017] By adopting the above technical solution, the polycrystalline field plate can introduce negative charges on the surface of the N region of the depletion layer and positive charges on the surface of the P+ region. The electric field generated by these two charges is opposite to the original electric field. Therefore, the polycrystalline field plate can improve the strong electric field in the area with variable doping voltage divider ring spacing, thereby helping to further improve the voltage resistance of the terminal structure.

[0018] Optionally, a cut-off ring is formed on the oxide layer, the conductivity type of the cut-off ring is opposite to that of the variable doping voltage divider ring, the variable doping voltage divider ring is located between the cut-off ring and the main junction, a variable doping end node is formed between the cut-off ring and the variable doping voltage divider ring, the oxide layer has two doping windows at the variable doping end junction, and a vertical groove of the two doping windows overlaps and is connected.

[0019] By adopting the above technical solution, the variable doping terminal section, which serves as the end of the lateral variable doping mechanism, can introduce the electric field of the variable doping voltage divider ring into a similar planar PN junction, reducing the strong electric field concentration at the end of the terminal structure, thereby reducing premature breakdown at the terminal structure and lowering the reverse breakdown voltage that the terminal structure can withstand. When the cutoff ring introduces the electric field of the variable doping voltage divider ring into the similar planar PN junction, the PN junction depletion region expands to the cutoff ring and then quickly cuts off, reducing the possibility of leakage in the terminal structure.

[0020] Optionally, a cutoff ring metal field plate and a source metal are formed on the oxide layer, the source metal is electrically connected to the main junction through a first contact hole opened on the oxide layer, the cutoff ring metal field plate is electrically connected to the cutoff ring through a second contact hole opened on the oxide layer, and one end of the source metal and the cutoff ring metal field plate both extend toward the direction of the variable doping voltage divider ring.

[0021] By adopting the above technical solution, when the PN junction is reverse biased, the potential of the source metal and the cutoff ring metal field plate is high relative to the P-type region. The oxide layer under the cutoff ring metal field plate and the active metal is an insulating medium. The high potential causes the P-type silicon surface to be depleted, and the junction depletion region extends to the area below the field plate. The original high electric field near the N+P junction position on the surface is dispersed, which helps to further improve the voltage resistance of the terminal during the period.

[0022] In a second aspect, the present application provides a method for preparing a high-voltage MOSFET transistor terminal structure, which adopts the following technical solution: the method comprises:

[0023] S1, providing a substrate layer, growing an oxide layer on the substrate layer, and laterally opening a plurality of doping windows extending to the epitaxial layer on the oxide layer, wherein the sizes of the plurality of doping windows gradually decrease in a direction away from the main junction;

[0024] S2, implanting first conductive doping impurities into the doping window to form a terminal doping region;

[0025] S3, diffusing the doping impurities in the terminal doping region to form an undoped terminal junction and a plurality of variable doping voltage divider rings in the epitaxial layer;

[0026] S4, forming a cut-off ring inside the epitaxial layer, wherein the conductivity type of the cut-off ring is opposite to that of the variable doping voltage divider ring, and the cut-off ring is located at an end of the doping window away from the main junction;

[0027] S5 , forming a plurality of polycrystalline field plates on the oxide layer.

[0028] By adopting the above technical solution, the field crystal plate and the variable doping voltage divider ring work together to reduce the concentration intensity of the electric field, making the electric field distribution more uniform. The terminal structure designed with the doping amount of the variable doping voltage divider ring gradually decreasing generally presents the characteristics of a planar junction, thereby achieving a smaller size of the terminal structure while further improving the voltage resistance of the terminal structure.

[0029] Optionally, in S1, the doping window includes a straight portion trench and vertical portion trenches located at both ends of the straight portion trench in a length direction, and the width and depth of the vertical portion trench and the straight portion trench are equal:

[0030] After S5, it also includes:

[0031] S6, etching a first contact hole and a second contact hole in the oxide layer, wherein the first contact hole is located above the main junction and the second contact hole is located above the stop ring;

[0032] S7, forming a source metal and a stop ring metal field plate, wherein the stop ring metal field plate is located above the stop ring, the source metal is located above the main junction, and one end of the source metal and the stop ring metal field plate both extend toward the variable doping voltage divider ring.

[0033] By adopting the above technical solution, the design of the special shape of the doping window helps to further reduce the concentration of the electric field and further slow down the electric field strength of the depletion layer of the N-type epitaxial layer, making the terminal structure more voltage-resistant; the source metal and the cutoff ring metal field plate can disperse the original high electric field near the N+P junction position on the surface, thereby improving the voltage resistance of the terminal structure.

[0034] Optionally, S4 further includes: before forming the stop ring inside the epitaxial layer, opening a terminal window on the oxide layer, wherein the terminal window extends to the epitaxial layer, injecting a second conductive heavily doped impurity into the terminal window to obtain a stop ring doped region, and doping the stop ring in a high-temperature furnace tube to diffuse the second conductive heavily doped impurity;

[0035] S5 also includes: before forming a plurality of polycrystalline field plates on the oxide layer, depositing N+ doped polysilicon on the surface of the wafer after S4 to form a polysilicon field plate region, and dry etching the doped polysilicon in the non-polysilicon field plate region.

[0036] By adopting the above technical solution, a cutoff ring can be formed after the second conductive heavily doped impurities are diffused. For the reverse etching of the polysilicon field plate area, the shape of the formed polysilicon field plate can be accurately determined by the coated photoresist, thereby helping to improve the accuracy of controlling the polysilicon field plate.

[0037] In summary, this application includes at least one of the following beneficial technical effects:

[0038] 1. When the reverse bias voltage of the PN junction is high, electrical breakdown caused by impact ionization, i.e., avalanche breakdown, will occur. In the actual process, cylindrical and spherical junctions will be formed at the edge of the PN junction. Due to the surface effect, the electric field will be concentrated, and avalanche breakdown will first occur in this area, resulting in a lower voltage resistance during the process. The voltage divider ring can play a voltage divider role during the process. When the voltage applied to the device gradually increases, the depletion region of the main junction gradually expands outward. Before the voltage increases to the avalanche voltage of the main junction, the depletion region of the reverse voltage ring has merged with the depletion region of the main junction, thereby expanding the depletion region of the main junction, reducing the curvature of the depletion region, and reducing the electric field strength. Because the doping window gradually shrinks, the voltage divider ring of this solution is a variable doping voltage divider ring. The doping amount of the variable doping voltage divider ring of this solution gradually decreases, so the junction depth of the floating PN junction gradually decreases, so that the terminal structure as a whole presents the characteristics of a planar junction, and the breakdown voltage of the planar junction is much greater than that of the curved junction. Therefore, compared with the traditional voltage divider ring, the variable doping voltage divider ring of this solution is more efficient in improving the voltage resistance of the device. Therefore, fewer variable doping voltage divider rings are needed to achieve the effect of greatly improving the voltage resistance of the device, thereby helping to achieve a terminal structure that maintains a small size while maintaining voltage resistance, thereby helping to improve the problem of a high chip area occupied by the terminal structure;

[0039] 2. Compared with traditional voltage divider ring technology, this solution's variable-doped voltage divider ring has a lower doping dose than traditional ones due to the unique design of the doping window. When voltage is applied, the depletion region will expand toward the direction of the PN junction with lower doping concentration, and primarily toward the epitaxial layer. However, the width of this epitaxial expansion is smaller than the depletion width of the traditional field-limiting ring. The P-type region of the PN junction expands wider than the traditional depletion layer, which reduces the depletion layer electric field strength of the N-type epitaxial layer. Furthermore, because the variable-doped voltage divider ring in this solution has a low doping dose and a deeper junction depth, the cylindrical junction radius of the PN junction is larger, closer to a planar junction. When voltage is applied, the electric field concentration on the cylindrical junction of the PN junction is further reduced, thereby further reducing the electric field strength before avalanche, thereby further improving the withstand voltage. By utilizing the difference in junction depth to reduce the concentration of electric field strength, the PN depletion layer width varies. The lower the concentration, the wider the width, and the spacing of the straight portions needs to be increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 This is a top view of a high-voltage MOSFET transistor terminal structure according to an embodiment of the present application.

[0041] Figure 2 yes Figure 1 Cross-sectional view in the AA direction.

[0042] Figure 3 This is a flow chart of a method for preparing a high-voltage MOSFET transistor terminal structure according to an embodiment of the present application.

[0043] Explanation of the accompanying symbols: 1. Main junction; 21. First variable-doped voltage divider ring; 22. Second variable-doped voltage divider ring; 23. Third variable-doped voltage divider ring; 3. Polycrystalline field plate; 4. Cut-off ring metal field plate; 5. Cut-off ring; 6. Variable-doped end junction; 8. Source metal; 9. Oxide layer; 10. Epitaxial layer; 11. Substrate layer. DETAILED DESCRIPTION

[0044] The present application discloses a high-voltage MOSFET transistor terminal structure and a preparation method.

[0045] The present application embodiment provides a high voltage MOSFET transistor terminal structure, referring to Figure 1 and Figure 2 The terminal structure includes a substrate layer 11 and an oxide layer 9. Substrate layer 11 includes a base and an epitaxial layer 10. Oxide layer 9 is formed on epitaxial layer 10. Oxide layer 9 is made of silicon dioxide. A main junction 1, multiple variable doping voltage divider rings, a variable doping terminal junction 6, and a cutoff ring 5 are sequentially arranged within epitaxial layer 10. The multiple variable doping voltage divider rings form a lateral variable doping structure.

[0046] The cutoff ring 5 is located at the edge of the terminal structure. Multiple doping windows are defined in the oxide layer 9, distributed along the main junction 1 toward the cutoff ring 5. These doping windows include two vertical trenches and multiple parallel straight trenches arranged perpendicular to the vertical trenches. The two vertical trenches are located at either end of the straight trench, interconnecting the vertical trenches. The straight trenches and vertical trenches have equal widths, and their depths gradually decrease from the variable doping divider ring adjacent to the main junction 1 to the variable doping divider ring adjacent to the cutoff ring 5. The total width of each doping window is the same. First conductive doping impurities diffuse through the doping windows into the epitaxial layer 10 to form variable doping divider rings. The variable doping divider rings gradually decrease in size from the main junction 1 toward the cutoff ring 5, and the conductivity type of the variable doping divider rings is opposite to that of the cutoff ring 5. Figure 1 The number of variable doping voltage divider rings is shown as three, comprising a first variable doping voltage divider ring 21, a second variable doping voltage divider ring 22, and a third variable doping voltage divider ring 23. The number of variable doping voltage divider rings can be any integer. The oxide layer 9 defines two doping windows at the variable doping terminal junction 6, with vertical trenches in the two doping windows overlapping and interconnecting.

[0047] The principle behind this embodiment is that multiple floating PN junctions are formed below the variable-doped voltage divider ring and the epitaxial layer 10, with the junction depth of the floating PN junctions gradually becoming shallower. As the voltage across the loading device gradually increases, the depletion layer of the main junction 1 expands outward, while the depletion layer of the back-voltage ring also expands outward until it merges with the depletion layer of the main junction 1. As the junction depth of the floating PN junction gradually decreases, the PN junction formed between the depletion layer and the cutoff layer becomes almost planar, thereby improving the withstand voltage of the terminal. Furthermore, the terminal structure can be more than 50% smaller than that of a terminal structure using a traditional voltage divider ring.

[0048] Due to the unique shape of the doping window, compared with the traditional voltage divider ring technology, this solution can make the terminal structure as a whole present characteristics closer to a planar junction, further reducing the concentration of electric field strength, thereby improving the voltage resistance during the period. The width of the straight portion groove and the vertical portion groove are consistent, which is conducive to simplifying the manufacturing process. The size of the doping window increases or decreases with the width of the straight portion and the vertical portion. The variable doping terminal energy saving introduces the electric field of the variable doping voltage divider ring into a similar planar PN junction, reducing the strong electric field concentration at the end of the terminal structure, so that the PN junction depletion region will be quickly cut off after expanding to the cut-off ring 5, reducing the possibility of leakage in the terminal structure.

[0049] In one embodiment, multiple polycrystalline field plates 3 are formed on the oxide layer 9, each of which is separated by a variable doping voltage divider ring. A stop ring metal field plate 4 and a source metal 8 are also formed on the oxide layer 9, with the polycrystalline field plate 3 located between the stop ring metal field plate 4 and the source metal 8.

[0050] The oxide layer 9 is provided with a first contact hole and a second contact hole. The source metal 8 is electrically connected to the main junction 1 through the first contact hole, and the stop ring 5 is electrically connected to the stop ring metal field plate 4 through the second contact hole. The source metal 8 and the stop ring metal field plate 4, facing the polycrystalline field plate 3, are both oriented between the polycrystalline field plates 3. The polycrystalline field plate 3, the stop ring metal field plate 4, and the source metal 8 all improve local field strength, reduce local field concentration, and enhance the voltage resistance of the terminal structure.

[0051] Based on the above terminal structure, the present application also discloses a method for preparing a high-voltage MOSFET transistor terminal structure, such as Figure 3 As shown, the preparation method comprises the following steps:

[0052] S1, providing a substrate layer 11, growing an oxide layer 9 on the substrate layer 11, and laterally opening a plurality of doping windows in the oxide layer 9 extending to the epitaxial layer 10, wherein the sizes of the plurality of doping windows gradually decrease in a direction away from the main junction 1;

[0053] Specifically, the substrate 11 is a first conductive heavily doped substrate 11, the epitaxial layer 10 is a first conductive lightly doped epitaxial layer 10, a 1000-15000Å thermal oxide layer 9 is thermally grown on the front of the epitaxial layer 10, and then the epitaxial layer 10 silicon is exposed by photoresist and wet etching to form a doping window. The doping window is set from the source region to the edge of the period, and the total width of each doping window is equal. Each doping window includes two vertical trenches and a horizontal trench. The trench width and trench depth of the vertical trench and the horizontal trench are equal, and the trench width gradually decreases as the doping window moves away from the source region. Two doping windows are opened on the oxide layer 9, and a vertical trench of the two doping windows overlaps and is connected. The two connected doping windows are the farthest from the main junction 1 among all the doping windows.

[0054] S2, implanting first conductive doping impurities into the doping window to form a terminal doping region.

[0055] Specifically, a first conductive doping impurity is implanted into the formed doping window by using semiconductor dedicated implantation doping equipment to form a terminal doping region.

[0056] S3 , diffusing the doping impurities in the terminal doping region to form an undoped terminal junction and a plurality of variable doping voltage divider rings in the epitaxial layer 10 .

[0057] Specifically, the photoresist outside the injection doping window is removed through wet and dry processes, and the doping window area is oxidized and shielded at a certain temperature and time, and the doping impurities in the terminal area are diffused at a certain temperature and time through semiconductor-specific high-temperature furnace tube equipment to form a variable doping voltage divider ring and an undoped terminal junction, and a PN junction with a certain junction depth is formed between the variable doping voltage divider ring and the epitaxial layer 10.

[0058] S4 , forming a cutoff ring 5 inside the epitaxial layer 10 . The cutoff ring 5 has a conductivity type opposite to that of the variable doping voltage divider ring and is located at one end of the doping window away from the main junction 1 .

[0059] Specifically, a photoresist with a thickness of approximately 7,000-12,000 Å is applied, exposed, and developed to form a second conductive N+ doped window region. The thermal oxide layer 9 within the second conductive N+ doped window region is then wet-etched clean, exposing the silicon in the epitaxial layer 10. Semiconductor-specific implant doping equipment is then used to implant the second conductive N+ impurities into the exposed window region to form a terminal cutoff region. The photoresist outside the implanted doping window is removed through wet and dry processes. The formed terminal cutoff region is then passed through a high-temperature furnace tube, where the impurities are diffused at a specific temperature and time to form a cutoff ring 5 and the N+ cutoff region.

[0060] S5 , a plurality of polycrystalline field plates 3 are formed on the oxide layer 9 .

[0061] Specifically, a 2000-12000Å thick N+-doped polysilicon layer is deposited on the wafer surface after completing the S4 process, followed by annealing. A photoresist layer of approximately 7000-12000Å is then applied, exposed, and developed to form the polysilicon field plate region. Semiconductor-specific dry etching equipment is then used to etch the doped polysilicon in the non-field plate region to form polycrystalline field plates 3 beneath the photoresist. A variable doping voltage divider ring is placed between each two polycrystalline field plates 3. Finally, the photoresist from the polycrystalline etching is removed using wet and dry processes.

[0062] S6, etching a metal contact hole region on the oxide layer 9.

[0063] Specifically, a photoresist with a thickness of about 7000-12000Å is coated, and the photoresist is exposed and developed to form the first source contact hole area and the second contact hole area. The dry-etched trumpet mouth of the contact hole is formed by wet etching for a certain period of time. After baking the hard film, the oxide layer 9 in the source area and the oxide layer 9 in the stop ring 5 area are dry-etched to form the first contact hole and the second contact hole. The photoresist etched in the contact hole area is removed by wet and dry processes.

[0064] S7 , forming the source metal 8 and the stop ring metal field plate 4 .

[0065] Specifically, a 20,000-60,000 Å thick aluminum layer is deposited using specialized semiconductor equipment to cover the wafer surface. A photoresist layer approximately 7,000-12,000 Å thick is then applied. The process is then exposed and developed to form the source main junction metal region and the terminal stop ring metal field plate region. The aluminum layer is then wet-etched and the remaining aluminum-silicon particles are dry-etched to form the source metal 8 and the stop ring metal field plate 4. The source metal 8 is electrically connected to the main junction 1 via a first contact hole, and the stop ring metal field plate 4 is electrically connected to the stop ring 5 via a second contact hole. The photoresist coated with the metal etching is then wet-removed. Finally, the wafer alloy is annealed in a furnace at a specific temperature and time to form the terminal structure.

[0066] It is worth mentioning that every time the photoresist is coated, the photoresist can be thermally baked to remove the moisture inside the photoresist and make the area formed by the development more obvious.

[0067] This specific embodiment is merely an explanation of the present invention and is not intended to limit the present invention. After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed. However, as long as such modifications are within the scope of the claims of the present invention, they are protected by patent law.

Claims

1. A high voltage MOSFET transistor terminal structure, characterized in that: The structure includes: A substrate layer (11), the substrate layer (11) comprising a base and an epitaxial layer (10), an oxide layer (9) formed on the epitaxial layer (10), a plurality of doping windows being laterally opened on the oxide layer (9), the doping windows extending to the epitaxial layer (10), the sizes of the plurality of doping windows becoming smaller in a direction away from the main junction (1); A lateral variable doping structure comprises a plurality of variable doping voltage divider rings formed in an epitaxial layer (10), each variable doping voltage divider ring being located at each doping window, and a plurality of floating PN junctions whose junction depths gradually become shallower in a direction away from a main junction (1) being formed between the bottom of the variable doping voltage divider ring and the substrate layer (11); The doping window comprises a plurality of parallel straight grooves and vertical grooves located at both ends of the straight grooves in the length direction, and the distance between the straight grooves of two adjacent doping windows increases in sequence in the direction away from the main junction (1).

2. The structure according to claim 1, characterized in that The vertical portion groove and the straight portion groove have the same width and depth.

3. The structure according to claim 1, characterized in that The width of the straight portion groove and the width of the vertical portion groove successively decrease in a direction away from the main junction (1); the length of the straight portion groove plus the width of the vertical portion grooves at both ends of the straight portion groove equals the total width of the doping window, and the total width of each doping window is the same.

4. The structure according to claim 1, characterized in that A plurality of polycrystalline field plates (3) are formed on the oxide layer (9), and a variable doping voltage divider ring is provided between every two polycrystalline field plates (3).

5. The structure according to claim 1, characterized in that A cutoff ring (5) is formed on the oxide layer (9), the conductivity type of the cutoff ring (5) is opposite to that of the variable doping voltage divider ring, the variable doping voltage divider ring is located between the cutoff ring (5) and the main junction (1), a variable doping terminal junction (6) is formed between the cutoff ring (5) and the variable doping voltage divider ring, the oxide layer (9) is provided with two doping windows at the variable doping terminal junction (6), and a vertical groove of the two doping windows overlaps and is connected.

6. The structure according to claim 5, characterized in that A cutoff ring metal field plate (4) and a source metal (8) are formed on the oxide layer (9); the source metal (8) is electrically connected to the main junction (1) via a first contact hole provided on the oxide layer (9); the cutoff ring metal field plate (4) is electrically connected to the cutoff ring (5) via a second contact hole provided on the oxide layer (9); and one end of each of the source metal (8) and the cutoff ring metal field plate (4) extends in the direction of the variable doping voltage divider ring.

7. A method for preparing a high-voltage MOSFET transistor terminal structure, characterized in that: The method comprises: S1, providing a substrate layer (11), generating an oxide layer (9) on the substrate layer (11), and laterally opening a plurality of doping windows extending to the epitaxial layer (10) on the oxide layer (9), wherein the sizes of the plurality of doping windows gradually decrease in a direction away from the main junction (1); wherein the doping windows include a plurality of parallel straight portion grooves and vertical portion grooves located at both ends of the straight portion grooves in a length direction, and the distance between the straight portion grooves of two adjacent doping windows gradually increases in a direction away from the main junction (1); S2, implanting first conductive doping impurities into the doping window to form a terminal doping region; S3, diffusing the doping impurities in the terminal doping region to form an undoped terminal junction and a plurality of variable doping voltage divider rings in the epitaxial layer (10); S4, forming a cut-off ring (5) inside the epitaxial layer (10), wherein the cut-off ring (5) has a conductivity type opposite to that of the variable doping voltage divider ring and is located at an end of the doping window away from the main junction (1); S5, forming a plurality of polycrystalline field plates (3) on the oxide layer (9).

8. The preparation method according to claim 7, characterized in that In step S1, the doping window includes a straight portion trench and vertical portion trenches located at both ends of the straight portion trench in the length direction, and the width and depth of the vertical portion trench and the straight portion trench are equal: After step S5, the method further includes: S6, etching a first contact hole and a second contact hole on the oxide layer (9), wherein the first contact hole is located above the main junction (1), and the second contact hole is located above the stop ring (5); S7, forming a source metal (8) and a cutoff ring metal field plate (4), wherein the cutoff ring metal field plate (4) is located above the cutoff ring (5), the source metal (8) is located above the main junction (1), and one end of the source metal (8) and the cutoff ring metal field plate (4) both extend toward the variable doping voltage divider ring.

9. The preparation method according to claim 7, characterized in that Step S4 further comprises: before forming the cut-off ring (5) inside the epitaxial layer (10), opening a terminal window on the oxide layer (9), wherein the terminal window extends to the epitaxial layer (10), injecting a second conductive heavily doped impurity into the terminal window to obtain a cut-off ring (5) doping region, and doping the cut-off ring (5) with a high-temperature furnace tube to diffuse the second conductive heavily doped impurity; Step S5 also includes: before forming a plurality of polycrystalline field plates (3) on the oxide layer (9), depositing N+ doped polysilicon on the surface of the wafer after step S4 and forming a polysilicon field plate region, and dry etching the doped polysilicon in the non-polysilicon field plate region.

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