Defect inspection method for epitaxial wafer

Through wafer stress determination technology, infrared light is used to analyze the residual stress of the epitaxial wafer, combined with the surface inspection device and the wafer stress determination device, the identification of slip dislocation defects and mismatch dislocation defects on the epitaxial wafer is solved, and the manufacturing process efficiency and yield rate are improved.

CN114624251BActive Publication Date: 2025-08-22SUMCO CORP
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Patent Information

Application Number
CN202111507360.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-12-11
Filing Date
2021-12-10
Publication Date
2025-08-22
Estimated Expiration
2041-12-10

AI Technical Summary

Technical Problem

The prior art cannot effectively identify slip dislocation defects and mismatch dislocation defects on epitaxial wafers, resulting in a decrease in manufacturing process efficiency and yield.

Method used

Through wafer stress measurement technology, infrared light is used to analyze the residual stress of the epitaxial wafer, and slip dislocation defects and mismatch dislocation defects are determined. Non-destructive inspection is performed by combining a surface inspection device and a wafer stress measurement device.

Benefits of technology

Accurate identification of slip dislocation defects and mismatch dislocation defects is achieved, and the working efficiency and product yield of the epitaxial wafer manufacturing process are improved.

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Abstract

Provided is an epitaxial wafer inspection method capable of identifying slip dislocation defects and misfit dislocation defects. When dislocation defects (DF) including slip dislocation defects and misfit dislocation defects are present in an epitaxial wafer (WF), the residual stress of the epitaxial wafer is determined by wafer stress measurement. If the residual stress is greater than a predetermined value (S0), the defect is identified as a slip dislocation defect. If the residual stress is less than the predetermined value (S0), the defect is identified as a misfit dislocation defect.
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Description

Technical Field

[0001] The present invention relates to a defect inspection method for an epitaxial wafer. Background Art

[0002] A surface inspection device is known that uses a laser to spirally scan the surface of a semiconductor substrate, acquiring specific scattered light information in a specific direction from the scattered light on the surface. Based on this specific scattered light information, it detects the presence of crystal defects occurring along the crystal slip plane of the semiconductor substrate (for example, Patent Document 1). Furthermore, a method is known that irradiates a semiconductor substrate with polarized parallel light and evaluates the crystal quality of the semiconductor substrate based on an image obtained from light transmitted through or reflected from the semiconductor substrate (for example, Patent Document 2).

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 2007-214491.

[0004] Patent Document 2: Japanese Patent Application Publication No. 2017 / 078127.

[0005] However, silicon epitaxial wafer crystal defects include slip dislocation defects caused by external heat or physical pressure, and misfit dislocation defects caused by lattice mismatch at the interface between the substrate and the epitaxial layer. However, the surface inspection device described in Patent Document 1 observes both slip dislocation defects and misfit dislocation defects as identical linear defects, making it impossible to distinguish between the two.

[0006] The problem to be solved by the present invention is to provide an inspection method for an epitaxial wafer, which is capable of identifying slip dislocation defects and misfit dislocation defects. Summary of the Invention

[0007] The present invention solves the aforementioned problems by measuring the residual stress of an epitaxial wafer using wafer stress measurement. When dislocation defects, including slip dislocation defects and misfit dislocation defects, are present on the epitaxial wafer, the residual stress is determined to be a slip dislocation defect if the residual stress is greater than a predetermined value, and a misfit dislocation defect if the residual stress is less than the predetermined value. Furthermore, wafer stress measurement involves irradiating the wafer with infrared light and analyzing the change in polarization state due to the photoelastic effect in the stressed portion to measure as strain.

[0008] In the above invention, the inspection surface of the epitaxial wafer may be irradiated with inspection light, and the presence or absence of dislocation defects including slip dislocation defects and misfit dislocation defects may be determined based on the scattered light.

[0009] According to the present invention, if dislocation defects including slip dislocation defects and misfit dislocation defects are found on an epitaxial wafer, residual stress is measured by wafer stress measurement, and when the residual stress is large, it is determined to be a slip dislocation defect, thereby enabling identification of slip dislocation defects and misfit dislocation defects. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 These are process diagrams showing one embodiment of the epitaxial wafer inspection method of the present invention.

[0011] Figure 2 Yes Figure 1 A structural diagram of an example of a surface inspection device used in a surface inspection process.

[0012] Figure 3 Yes Figure 1 A structural diagram of an example of a wafer stress measuring device used in the residual stress inspection process.

[0013] Figure 4 This is a diagram showing an example of dislocation defects in an epitaxial wafer.

[0014] Figure 5A Yes Figure 3 Diagram of the output waveform of the wafer stress measurement device.

[0015] Figure 5B It means Figure 5A Figure 2. The output waveform of the filtered waveform.

[0016] Figure 5C It means using GBA method and Figure 5B A diagram showing a method for finding the corresponding variable from a waveform. DETAILED DESCRIPTION

[0017] In one embodiment of the epitaxial wafer defect inspection method of the present invention, slip dislocation defects caused by externally applied heat or physical stress and misfit dislocation defects caused by lattice mismatch at the interface between the substrate and the epitaxial layer are inspected.

[0018] Here, slip dislocations are linear steps caused by stress exceeding the yield point in the circumferential direction, such as when there is temperature nonuniformity in the radial direction of the wafer. Since slip dislocations are caused by localized slip of the crystallized region due to thermal factors, they can be suppressed by adjusting the heater temperature conditions in the growth furnace during epitaxial growth on the epitaxial wafer.

[0019] In contrast, in silicon substrates with high impurity concentrations, the atomic radius of impurity atoms differs from that of silicon atoms, causing a slight change in the crystal lattice constant, which in turn causes film strain in the epitaxial layer with low impurity concentrations. Misfit dislocations are linear steps that occur when the strain in the film reaches a critical value. Because these dislocations arise due to the difference in crystal lattice constants between the epitaxial film and the silicon substrate, they can be suppressed by adjusting the impurity concentrations of the epitaxial film and the silicon substrate, or by providing a buffer layer with an intermediate concentration between the epitaxial film and the silicon substrate.

[0020] Each defect is a linear step, making it difficult to visually identify. However, as mentioned above, the countermeasures are completely different, so identifying these dislocation defects is crucial for improving the efficiency of epitaxial wafer manufacturing processes and increasing product yield. While slip and misfit dislocation defects can be identified by observing a cross-section of the epitaxial wafer using X-ray imaging, destructive inspection cannot be performed in real time during the manufacturing process, reducing manufacturing efficiency and product yield until identification results are available.

[0021] Therefore, in the inspection method of this embodiment, attention is paid to the differences in the causes of dislocation defects. If unidentifiable slip dislocation defects or misfit dislocation defects are observed, the residual stress of the epitaxial wafer is obtained by wafer stress measurement. When the obtained residual stress is greater than a predetermined value, it is determined that the defect is a slip dislocation defect caused by stress. When the residual stress is less than the predetermined value, it is determined that the defect is a misfit dislocation defect caused by differences in crystal lattice constants that are not related to stress.

[0022] Figure 1 1 is a process diagram showing an embodiment of the epitaxial wafer inspection method of the present invention. In the epitaxial wafer inspection method of this embodiment, the surface of the epitaxial wafer is inspected in step S1, and in step S2, it is determined whether dislocation defects including slip dislocation defects and misfit dislocation defects are present on the surface of the epitaxial wafer. Dislocation defects DF including slip dislocation defects and misfit dislocation defects are as follows: Figure 4 As shown, it can be observed as a linear step, so it can be checked visually, but if you use Figure 2 The surface inspection apparatus 1 shown can inspect dislocation defects more accurately.

[0023] Figure 2 Yes Figure 1This is a structural diagram of an example of a surface inspection apparatus 1 used in the surface inspection process of step S1. The epitaxial wafer WF to be inspected is placed on a movable table 11, which moves in the XY plane, thereby irradiating the entire surface of the epitaxial wafer WF with laser light. The laser light serving as inspection light is generated by a first laser oscillator 12 and a second laser oscillator 13. The laser light generated by the first laser oscillator 12 is irradiated onto the surface of the epitaxial wafer WF as vertically incident light, while the laser light generated by the second laser oscillator 13 is irradiated onto the surface of the epitaxial wafer WF as obliquely incident light. Although not particularly limited, vertically incident light is preferably used for inspection of scratches, epitaxial defects, and intra-film defects, while obliquely incident light is preferably used for high-sensitivity measurement, measurement of wafers with high roughness, and haze detection.

[0024] The reflected light from the laser beam irradiated onto the surface of the epitaxial wafer WF is received by a first photomultiplier tube 15 via an ellipsoidal condenser 14, and is also received by a second photomultiplier tube 16 via a lens 16 and a mirror 16b. While not particularly limited, the laser beam received by the first photomultiplier tube 15 is preferably used to measure fine particles and smoke, while the laser beam received by the second photomultiplier tube 16 is preferably used to measure linear defects, scratches, COPs (coefficients of penetration) (COPs), epitaxial defects, and the like.

[0025] When the surface of the epitaxial wafer WF is scanned using the surface inspection apparatus 1 of this embodiment, the laser light reflected from the mirror-finished surface is received as is. On the other hand, if there is a step difference such as foreign matter attached to the surface or a depression, the laser light is scattered and received by the first photomultiplier tube 15 and the second photomultiplier tube 16. This makes it possible to determine whether dislocation defects DF, including slip dislocation defects and misfit dislocation defects, are present.

[0026] return Figure 1 If the surface inspections in steps S1 and S2 determine that no linear defects exist, the process proceeds to step S5, where it is determined that no slip dislocation defects or misfit dislocation defects exist. On the other hand, if the surface inspections in steps S1 and S2 determine that linear defects exist, the process proceeds to step S3, where the residual stress of the epitaxial wafer is inspected using wafer stress measurement. Figure 3 Yes Figure 1 FIG. 2 is a structural diagram of an example of a wafer stress measuring device 2 (SIRD (Scanning InfRed Depolarization) measuring device) used in the residual stress inspection process of step S3 .

[0027] The wafer stress measurement apparatus 2 of this embodiment includes an infrared laser oscillator 21. Infrared light emitted from the infrared laser oscillator 21 passes through a lens 22 and enters a polarizer 23. The infrared light is linearly polarized by the polarizer 23 and then enters the epitaxial wafer WF being inspected substantially perpendicularly. If strain exists in the epitaxial wafer WF, the infrared light entering the epitaxial wafer WF becomes circularly polarized and attenuated in response to the strain.

[0028] Infrared light that has passed through epitaxial wafer WF passes through objective lens 24 and enters polarization separation element 25. Polarization separation element 25 separates the infrared light into a linearly polarized component and a circularly polarized component at the strained portion of epitaxial wafer WF. The separated infrared light components are then incident on separate photodiodes 26 and 27.

[0029] Each photodiode 26, 27 detects the intensity of the incident infrared light component and outputs the detection result to the processing unit 28. Based on the input intensity, the processing unit 28 detects the difference between the linear polarization component and the circular polarization component as the strain amount. This strain amount detection process is performed by rotating the epitaxial wafer WF and changing the radial position of the epitaxial wafer WF irradiated with infrared light, thereby detecting the strain amount at each position on the surface of the epitaxial wafer WF. In this detection process, the waveform of the detected strain amount (strain waveform) is Figure 5A This strain waveform includes strain components due to the concentration of dopants such as boron and phosphorus in the epitaxial wafer WF and strain components due to the overall warpage of the epitaxial wafer WF.

[0030] Therefore, in order to extract the local strain components from the strain waveform, the processing unit 28 performs a filtering process, namely a floating average difference process, to remove the long-wavelength strain components corresponding to the strain components caused by the dopant concentration and the overall warpage of the wafer from the strain waveform. Figure 5A The strain waveform shown in the figure is processed by floating average difference, as shown in the figure. Figure 5B As shown, the strain waveform is obtained after removing the long wavelength component.

[0031] Next, processing unit 28 uses the GBA method to determine the corresponding variable based on the strain waveform. Specifically, processing unit 28 divides the entire surface of wafer W into a predetermined grid and detects the corresponding variable, which represents the ratio of the number of cells experiencing strain exceeding a predetermined threshold relative to the total number of cells in a predetermined region. Figure 5C The grid positions in the strain waveform are shown in FIG, and the space between the grids represents the strain of the unit cell.

[0032] Here, the grid can be a vertical coordinate system grid (XY grid) or a polar coordinate system grid (RT grid). In this embodiment, for example, a grid consisting of 1 mm × 1 mm cells is used, and the corresponding variable is detected in the area after removing the outermost 0.5 mm circular area from the outermost circular area of ​​the wafer W, for example, a 5 mm wide circular area.

[0033] By using such a wafer stress measuring device 2, it is possible to obtain a corresponding variable representing the residual stress of the epitaxial wafer WF. Figure 1 In step S4, it is determined whether the obtained residual stress is greater than a predetermined residual stress threshold value S0. This residual stress threshold value S0 can be obtained in advance, for example, as follows. Specifically, epitaxial wafers containing dislocation defects, produced under various manufacturing conditions, are used to measure the residual stresses. Cross-sections are then measured and observed using an X-ray measuring device to identify whether each dislocation defect is a slip dislocation defect or a misfit dislocation defect. The residual stress value that serves as the identification boundary for the identified epitaxial wafer is defined as the threshold value S0.

[0034] As described above, slip dislocations occur due to heat or physical stress, whereas misfit dislocations occur due to the crystal lattice constant, which is unrelated to stress. Therefore, in step S4, if the residual stress determined is greater than or equal to a predetermined threshold value S0, the slip dislocation defect is determined to be caused by stress (step S6). If the residual stress is less than the predetermined threshold value S0, the misfit dislocation defect is determined to be caused by the crystal lattice constant, which is unrelated to stress (step S7).

[0035] As described above, the epitaxial wafer inspection method of this embodiment enables non-destructive inspection to identify whether a linear dislocation defect, such as a slip dislocation, is observed on the wafer surface. This shortens the time from dislocation defect discovery to dislocation treatment. Consequently, it improves the efficiency of the epitaxial wafer manufacturing process and product yield.

[0036] Identification of Wafer Stress and Dislocations

[0037] Epitaxial wafers were produced using conditions 1 to 4, which varied in the heating conditions of the epitaxial growth furnace heater. Upon inspection for dislocations, linear dislocation defects were observed in all cases. Therefore, the residual stress of each epitaxial wafer was measured using wafer stress measurement apparatus 2. The results are shown in Table 1. Residual stress values ​​are normalized by setting the residual stress value for condition 1 to 1.

[0038]

Table 1

[0039] Heater heating condition level Presence of dislocation defects (visual inspection) residual stress Condition 1 have 1.0 Condition 2 have 1.3 Condition 3 have 2.3 Condition 4 have 2.7

[0040] Next, epitaxial wafers were produced using silicon wafers with reduced impurity concentrations, without changing any of the aforementioned conditions 1 to 4. The presence or absence of dislocations in these epitaxial wafers was observed, and the residual stress in each wafer was measured using a wafer stress measurement device 2. The results are shown in Table 2. The residual stress values ​​are normalized by setting the residual stress value under condition 1 to 1.

[0041]

Table 2

[0042] Heater heating condition level Presence of dislocation defects (visual inspection) residual stress Condition 1 none 1.0 Condition 2 none 1.7 Condition 3 have 2.4 Condition 4 have 4.6

[0043] The following insights can be derived from the results in Tables 1 and 2. First, the dislocation defects listed in Table 1 observed in epitaxial wafers under Conditions 1 and 2 are no longer observed by adjusting the impurity concentration as shown in Table 2, and therefore can be determined to be misfit dislocation defects. Furthermore, the dislocation defects listed in Table 1 observed in epitaxial wafers under Conditions 3 and 4 are still observed even after adjusting the impurity concentration as shown in Table 2, and therefore can be determined to be slip dislocation defects.

[0044] Furthermore, as shown in the residual stresses in Tables 1 and 2, it can be understood that the residual stresses of epitaxial wafers under Conditions 3 and 4, which are slip dislocation defects, are significantly greater than the residual stresses of epitaxial wafers under Conditions 1 and 2, which are misfit dislocation defects. Figure 1 In step S4, it is appropriate to determine that the slip dislocation defect occurs due to stress when the residual stress obtained is greater than a predetermined threshold value S0 (step S6), and to determine that the misfit dislocation defect occurs due to a crystal lattice constant that is unrelated to stress when the residual stress is less than the predetermined threshold value S0 (step S7).

[0045]

Explanation of symbols

[0046] 1…Surface inspection device

[0047] 11…Movable table

[0048] 12…1st laser oscillator

[0049] 13…Second laser oscillator

[0050] 14…Concentrator

[0051] 15…1st photomultiplier tube

[0052] 16…2nd photomultiplier tube

[0053] 16a…Lens

[0054] 16b…Mirror

[0055] 2…Wafer stress measurement device

[0056] 21…Infrared laser oscillator

[0057] 22…Lens

[0058] 23…Polarizer

[0059] 24…Objective lens

[0060] 25…Polarized light separation element

[0061] 26, 27…Photodiode

[0062] 28…Processing Department

[0063] WF…Epitaxial wafer

[0064] DF…dislocation defect.

Claims

1. A method for inspecting an epitaxial wafer, wherein, when dislocation defects including slip dislocation defects and misfit dislocation defects are present in the epitaxial wafer, residual stress in the epitaxial wafer is determined by wafer stress measurement, wherein the wafer stress measurement comprises irradiating the epitaxial wafer with infrared light and analyzing changes in polarization state due to a photoelastic effect in the stressed portion to measure the residual stress as strain. When the residual stress is equal to or greater than a predetermined value, the defect is determined to be the slip dislocation defect, and when the residual stress is less than the predetermined value, the defect is determined to be the misfit dislocation defect.

2. The epitaxial wafer inspection method according to claim 1, wherein: Inspection light is irradiated onto the inspection surface of the epitaxial wafer, and the presence or absence of dislocation defects including slip dislocation defects and misfit dislocation defects is determined based on scattered light of the inspection light.

Citation Information

Patent Citations

  • Improved method for eliminating residual stress of GaN epitaxial wafer by laser quasi-stripping

    CN102148139A

  • Method and apparatus for detecting defect of semiconductor substrate

    JP2007214491A