Impedance matching circuit, method, integrated circuit, and electronic device

Abstract

The application discloses an impedance matching circuit, method, integrated circuit and electronic device. The impedance matching circuit comprises a reference module, a biasing module and a connecting module. The biasing module is configured to generate a first feedback signal according to a first node voltage of a first intermediate node and transmit the first feedback signal to a second end of the biasing module. The biasing module is further configured to generate a second feedback signal and transmit the second feedback signal to a third end of the biasing module. When the first node voltage is not equal to a preset reference voltage, the biasing module adjusts the first node voltage according to the first feedback signal, so that the first node voltage is equal to the preset reference voltage. The connecting module adjusts a voltage of a signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and more particularly, to an impedance matching circuit, method, integrated circuit and electronic device. BACKGROUND

[0002] With the rapid development of technology, integrated circuits have been widely used in various electronic devices, such as mobile phones, tablet computers, notebook computers, etc. In order to meet people's requirements for the running speed of electronic devices, the system clock speed becomes faster and faster in modern integrated circuits.

[0003] However, the transmission line has a characteristic impedance, and the faster the system clock speed, the more problems such as reflection and crosstalk will exist, which will affect the integrity of the signal. Generally, an impedance matching circuit can be used to match the impedance of the device input and output port with the characteristic impedance of the transmission line to avoid problems such as reflection and crosstalk.

[0004] However, the existing impedance matching circuit has the technical problems of limited adjustment precision, affecting signal quality, occupying system clock resources, and high application development difficulty, which is difficult to further promote and apply. SUMMARY

[0005] In view of the above problems, the present application provides an impedance matching circuit, method, integrated circuit and electronic device to improve the above problems.

[0006] In a first aspect, an embodiment of the present application provides an impedance matching circuit. The circuit includes a reference module, a biasing module and a connecting module. The first end of the reference module is connected to the first intermediate node, and the second end of the reference module is connected to the power supply voltage. The first end of the biasing module is connected to the first intermediate node, and the biasing module is configured to generate a first feedback signal according to the first node voltage of the first intermediate node and transmit the first feedback signal to the second end of the biasing module; the biasing module is also configured to generate a second feedback signal and transmit the second feedback signal to the third end of the biasing module. The first end of the connecting module is connected to the second end of the biasing module, the second end of the connecting module is connected to the third end of the biasing module, and the third end of the connecting module is connected to the signal port. Wherein, when the first node voltage is not equal to the preset reference voltage, the biasing module adjusts the first node voltage according to the first feedback signal, so that the first node voltage is equal to the preset reference voltage; and the connecting module adjusts the voltage of the signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage.

[0007] In a second aspect, the embodiments of the present application provide an impedance matching method, which comprises: obtaining a first node voltage; when the node voltage is not equal to a preset reference voltage, adjusting the first node voltage according to a first feedback signal, so that the first node voltage is equal to the preset reference voltage; and adjusting a voltage of a signal port according to the first feedback signal and a second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage.

[0008] In a third aspect, the embodiments of the present application provide an integrated circuit, which comprises the above-mentioned impedance matching circuit.

[0009] In a fourth aspect, the embodiments of the present application provide an electronic device, which comprises the above-mentioned impedance matching circuit or the above-mentioned integrated circuit.

[0010] The technical scheme provided by the present application, the impedance matching circuit comprises: a reference module, a biasing module and a connecting module; the biasing module can be used for generating a first feedback signal according to a first node voltage of a first intermediate node, and transmitting the first feedback signal to a second end of the biasing module, and the biasing module is also used for generating a second feedback signal, and transmitting the second feedback signal to a third end of the biasing module; the connecting module can be used for adjusting a voltage of a signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to a preset reference voltage. The impedance matching circuit adjusts the first node voltage in real time according to the first feedback signal when the node voltage is not equal to the preset reference voltage, so that the first node voltage is equal to the preset reference voltage, and then adjusts the voltage of the signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage. Without occupying clock resources, the normal work of other modules is not affected, the application development difficulty is reduced, and high-precision impedance matching can be realized, so that various transmission line characteristic impedances can be accurately matched, and the signal quality is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0012] Figure 1 A structure schematic diagram of an impedance matching circuit provided by the embodiments of the present application is shown.

[0013] Figure 2 A structure schematic diagram of a reference module provided by the embodiments of the present application is shown.

[0014] Figure 3A structure diagram of a bias module is shown.

[0015] Figure 4 A structure diagram of a bias unit is shown.

[0016] Figure 5 A structure diagram of a first bias subunit is shown.

[0017] Figure 6 A structure diagram of a second bias subunit is shown.

[0018] Figure 7 A structure diagram of a pull-up component is shown.

[0019] Figure 8 A structure diagram of a pull-down component is shown.

[0020] Figure 9 A structure diagram of a comparison unit is shown.

[0021] Figure 10 A structure diagram of a connection module is shown.

[0022] Figure 11 A structure diagram of a first connection unit is shown.

[0023] Figure 12 A structure diagram of a second connection unit is shown.

[0024] Figure 13 A flow diagram of another impedance matching circuit is shown.

[0025] Figure 14 A structure diagram of an integrated circuit is shown.

[0026] Figure 15 A structure diagram of an electronic device is shown.

[0027] Figure 16 A structure diagram of another electronic device is shown.

[0028] BRIEF DESCRIPTION OF DRAWINGS: 100, impedance matching circuit; 110, reference module, 110a, first end of the reference module, 110b, second end of the reference module; 120, bias module, 120a, first end of the bias module, 120b, second end of the bias module, 120c, third end of the bias module; 121, bias unit, 121a, first end of the bias unit, 121b, second end of the bias unit, 121c, third end of the bias unit, 121d, fourth end of the bias unit, 121e, fifth end of the bias unit; 1211, first bias subunit, 1211a, first end of the first bias subunit, 1211b, second end of the first bias subunit, 1211c, third end of the first bias subunit; 12111, first switch tube, 12111a, first end of the first switch tube, 12111b, second end of the first switch tube, 12111c, third end of the first switch tube; 12112, second switch tube, 12112a, first end of the second switch tube, 12112b, second end of the second switch tube, 12112c, third end of the second switch tube; 1212, second bias subunit, 1212a, first end of the second bias subunit, 1212b, second end of the second bias subunit, 1212c, third end of the second bias subunit; 12121, pull-up component, 12121a, first end of the pull-up component, 12121b, second end of the pull-up component, 12121c, third end of the pull-up component; 121211, third switch tube, 121211a, first end of the third switch tube, 121211b, second end of the third switch tube, 121211c, third end of the third switch tube; 121212, fourth switch tube, 121212a, first end of the fourth switch tube, 121212b, second end of the fourth switch tube, 121212c, third end of the fourth switch tube; 12122, pull-down component, 12122a, first end of the pull-down component, 12122b, second end of the pull-down component, 12122c, third end of the pull-down component; 121221, fifth switch tube, 121221a, first end of the fifth switch tube, 121221b, second end of the fifth switch tube, 121221c, third end of the fifth switch tube; 121222, sixth switch tube, 121222a, first end of the sixth switch tube, 121222b, second end of the sixth switch tube, 121222c, third end of the sixth switch tube; 122, comparison unit, 122a, first end of the comparison unit, 122b, second end of the comparison unit, 122c, third end of the comparison unit; 1221, first comparator, 1221a, first end of the first comparator, 1221b, second end of the first comparator, 1221c, third end of the first comparator; 1222, second comparator, 1222a, first end of the second comparator, 1222b, second end of the second comparator, 1222c, third end of the second comparator;130, connection module, 130a, first end of the connection module, 130b, second end of the connection module, 130c, third end of the connection module; 131, first connection unit, 131a, first end of the first connection unit, 131b, second end of the first connection unit, 131c, third end of the first connection unit; 1311, seventh switch tube, 1311a, first end of the seventh switch tube, 1311b, second end of the seventh switch tube, 1311c, third end of the seventh switch tube; 1312, eighth switch tube, 1312a, first end of the eighth switch tube, 1312b, second end of the eighth switch tube, 1312c, third end of the eighth switch tube; 132, second connection unit, 132a, first end of the second connection unit, 132b, second end of the second connection unit, 132c, third end of the second connection unit; 1321, ninth switch tube, 1321a, first end of the ninth switch tube, 1321b, second end of the ninth switch tube, 1321c, third end of the ninth switch tube; 1322, tenth switch tube, 1322a, first end of the tenth switch tube, 1322b, second end of the tenth switch tube, 1322c, third end of the tenth switch tube; A, first intermediate node, B, second intermediate node, C, third intermediate node, D, fourth intermediate node, VS, power supply voltage, V1, first reference voltage, V2, second reference voltage, VA, first control voltage, VB, second control voltage. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the scheme of the present application, the technical scheme in the embodiments of the present application will be clearly and completely described below in combination with the drawings in the embodiments of the present application.

[0030] With the rapid development of science and technology, integrated circuits have been widely used in various electronic devices, such as mobile phones, tablet computers, notebook computers, etc. People have an urgent demand for high-speed and high-performance integrated circuits, and in modern integrated circuits, the clock speed of the system is an important indicator to measure the running speed of the system, so the clock speed of the system becomes faster and faster with the update of integrated circuits. With the increase of the system clock speed, the characteristic impedance in the transmission line must be considered. If the impedance in the integrated circuit is not matched, signal reflection and crosstalk will be formed in the integrated circuit, which will have an adverse effect on signal integrity. Therefore, impedance matching is a problem that must be considered when developing high-performance integrated circuits. Impedance matching can usually be achieved by placing an impedance matching circuit in the integrated circuit.

[0031] However, the inventors found in the research that the conventional impedance matching circuit is not very suitable for high-speed and high-performance integrated circuits. Specifically, first, the adjustment precision of the switch tube array and the resistance array of the conventional impedance matching circuit is limited, and generally only 10% precision can be achieved, which itself has adverse effects on signal quality; second, the layout area of the switch tube array and the resistance array of the conventional impedance matching circuit is very large, which causes the chip cost to increase; and finally, the state machine mechanism is introduced in the conventional impedance matching circuit, which occupies the valuable clock resource of the system, and further affects the performance release of the integrated circuit, and in order to enter the calibration impedance program, the normal working state must also be stopped, which also increases the difficulty of application development.

[0032] In order to improve the above problems, the inventors provide an impedance matching circuit and a method, wherein the impedance matching circuit comprises a reference module, a biasing module and a connecting module; the biasing module is configured to generate a first feedback signal according to a first node voltage of a first intermediate node, and transmit the first feedback signal to a second end of the biasing module; the biasing module is further configured to generate a second feedback signal, and transmit the second feedback signal to a third end of the biasing module; and the connecting module is configured to adjust the voltage of a signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to a preset reference voltage. The impedance matching circuit can obtain the first node voltage in real time when working, and when the node voltage is not equal to the preset reference voltage, the first node voltage is adjusted according to the first feedback signal, so that the first node voltage is equal to the preset reference voltage, and then the voltage of the signal port is adjusted according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage, without occupying the clock resource, without affecting the normal work of other modules, reducing the difficulty of application development, and achieving high-precision impedance matching, so as to accurately match various transmission line characteristic impedances, and ensure signal quality.

[0033] The impedance matching circuit provided by the embodiments of the present application will be described in detail below through specific embodiments.

[0034] Please refer to Figure 1 The embodiments of the present application provide an impedance matching circuit 100, which comprises a reference module 110, a biasing module 120 and a connecting module 130.

[0035] In the embodiments of the present application, the first end 110a of the reference module 110 is connected to the first intermediate node A, and the second end 110b of the reference module 110 is connected to the power supply voltage.

[0036] Optionally, the reference module 110 can employ a resistor, and in order to match the signal port E with the impedance of the transmission line, the impedance value of the resistor of the reference module 110 can be set according to the characteristic impedance value of the transmission line. Specifically, the impedance value of the resistor of the reference module 110 is equal to the characteristic impedance value of the transmission line.

[0037] Optionally, the reference module 110 can employ a fixed resistor, and according to the different characteristic impedance values of the corresponding transmission lines, a fixed resistor with a suitable impedance value can be selected.

[0038] Optionally, the reference module 110 can employ an adjustable resistor, and according to the different characteristic impedance values of the corresponding transmission lines, the impedance value of the adjustable resistor can be adjusted.

[0039] In the embodiments of the present application, the first end 120a of the bias module 120 is connected to the first intermediate node A, and the bias module 120 is configured to generate a first feedback signal according to the first node voltage of the first intermediate node A and transmit the first feedback signal to the second end 120b of the bias module 120; the bias module 120 is further configured to generate a second feedback signal and transmit the second feedback signal to the third end 120c of the bias module 120.

[0040] In some embodiments, as shown in Figure 2 the bias module 120 includes a bias unit 121 and a comparison unit 122.

[0041] The first end 121a of the bias unit 121 is connected to the first intermediate node A, the second end 121b of the bias unit 121 is connected to the second intermediate node B, the third end 121c of the bias unit 121 is connected to the third intermediate node C, the fourth end 121d of the bias unit 121 is connected to the fourth intermediate node D, and the fifth end 121e of the bias unit 121 is connected to the power supply voltage VS.

[0042] In some embodiments, as shown in Figure 3 the bias unit 121 includes a first bias sub-unit 1211 and a second bias sub-unit 1212.

[0043] The first end 1211a of the first bias sub-unit 1211 is connected to the first intermediate node A, the second end 1211b of the first bias sub-unit 1211 is connected to the second intermediate node B, and the third end 1211c of the first bias sub-unit 1211 is grounded; the first bias sub-unit 1211 is configured to adjust the first node voltage according to the first feedback signal.

[0044] In some embodiments, as shown in Figure 4 the first bias sub-unit 1211 includes a first switch tube 12111.

[0045] The first terminal 12111a of the first switch transistor 12111 is connected to the second intermediate node B, the second terminal 12111b of the first switch transistor 12111 is grounded, and the third terminal 12111c of the first switch transistor 12111 is connected to the first intermediate node A.

[0046] Optionally, the first switching transistor 12111 can be an NMOS transistor, such as an enhancement-mode NMOS transistor.

[0047] In some implementations, such as Figure 4 As shown, the first bias subunit 1211 also includes a second switch transistor 12112.

[0048] The second switch 12112 is connected between ground and the second terminal 12111b of the first switch 12111; the first terminal 12112a of the second switch 12112 is connected to the first control voltage VA; the second terminal 12112b of the second switch 12112 is grounded; and the third terminal 12112c of the second switch 12112 is connected to the second terminal 12111b of the first switch 12111.

[0049] Optionally, the second switch 12112 may be an NMOS transistor, such as an enhancement-mode NMOS transistor.

[0050] In some implementations, such as Figure 5 As shown, the second bias subunit 1212 includes a pull-up component 12121 and a pull-down component 12122.

[0051] Wherein, the first end 12121a of the pull-up component 12121 is connected to the power supply voltage VS, the second end 12121b of the pull-up component 12121 is connected to the third intermediate node C, and the third end 12121c of the pull-up component 12121 is connected to the fourth intermediate node D; the pull-up component 12121 is used to adjust the voltage of the second node according to the first feedback signal.

[0052] In some implementations, such as Figure 6 As shown, the pull-up assembly 12121 includes a third switch transistor 121211.

[0053] Among them, the first terminal 121211a of the third switch 121211 is connected to the fourth intermediate node D, the second terminal 121211b of the third switch 121211 is connected to the power supply voltage VS, and the third terminal 121211c of the third switch 121211 is connected to the third intermediate node C.

[0054] Optionally, the third switch 121211 can be a PMOS transistor, such as an enhancement-mode PMOS transistor.

[0055] In some implementations, such as Figure 6As shown, the pull-up component 12121 further includes a fourth switch tube 121212.

[0056] The fourth switch tube 121212 is connected between the power supply voltage VS and the second end 1211b of the third switch tube 121211, the first end 121212a of the fourth switch tube 121212 is connected to the second control voltage VB, the second end 121212b of the fourth switch tube 121212 is connected to the power supply voltage VS, and the third end 121212c of the fourth switch tube 121212 is connected to the second end 121211b of the third switch tube 121211.

[0057] Optionally, the fourth switch tube 121212 can be a PMOS tube, such as an enhancement mode PMOS tube.

[0058] The first end 12122a of the pull-down component 12122 is connected to the third intermediate node C, the second end 12122b of the pull-down component 12122 is connected to the second intermediate node B, and the third end 12122c of the pull-down component 12122 is connected to the second intermediate node B; the pull-down component 12122 is configured to adjust the second node voltage according to the first feedback signal.

[0059] In some embodiments, as shown in FIG. 12B, the pull-down component 12122 includes a fifth switch tube 121221. Figure 7 As shown, the pull-down component 12122 further includes a sixth switch tube 121222.

[0060] The first end 121221a of the fifth switch tube 121221 is connected to the fourth intermediate node D, the second end 121221b of the fifth switch tube 121221 is grounded, and the third end 121221c (drain) of the fifth switch tube 121221 is connected to the third intermediate node C.

[0061] Optionally, the fifth switch tube 121221 can be an NMOS tube, such as an enhancement mode NMOS tube.

[0062] In some embodiments, as shown in FIG. 12B, the pull-down component 12122 includes a fifth switch tube 121221. Figure 7 As shown, the pull-down component 12122 further includes a sixth switch tube 121222.

[0063] The sixth switch tube 121222 is connected between the ground and the second end 121221b of the fifth switch tube 121221, the first end 121222a of the sixth switch tube 121222 is connected to the second control voltage VB, the second end 121222b of the sixth switch tube 121222 is grounded, and the third end 121222c of the sixth switch tube 121222 is connected to the second end 121221b of the fifth switch tube 121221.

[0064] Optionally, the sixth switch tube 121222 can be an NMOS tube, such as an enhancement mode NMOS tube.

[0065] The first end 122a of the comparison unit 122 is connected to the first reference voltage V1, the second end 122b of the comparison unit 122 is connected to the first intermediate node A, the third end 122c of the comparison unit 122 is connected to the second intermediate node B, the fourth end 122d of the comparison unit 122 is connected to the third intermediate node C, and the fifth end 122e of the comparison unit 122 is connected to the fourth intermediate node D. The comparison unit 122 is configured to generate the first feedback signal according to the first node voltage and the first reference voltage V1. The comparison unit 122 is further configured to generate the second feedback signal according to the second node voltage of the third intermediate node C and the second reference voltage V2, and transmit the second feedback signal to the fourth intermediate node D.

[0066] In some embodiments, as shown in FIG. 1, the comparison unit 122 includes a first comparator 1221 and a second comparator 1222. Figure 8

[0067] The first end 1221a of the first comparator 1221 is connected to the first intermediate node A, the second end 1221b of the first comparator 1221 is connected to the first reference voltage V1, and the third end 1221c of the first comparator 1221 is connected to the second intermediate node B. The first comparator 1221 is configured to generate the first feedback signal according to the first node voltage and the first reference voltage V1, and transmit the first feedback signal to the second intermediate node B.

[0068] In the embodiments of the present application, the first feedback signal is a signal generated by comparing the voltage value of the first node voltage with the voltage value of the first reference voltage V1 through the first comparator 1221 and transmitted through the third end 1221c of the first comparator 1221. Specifically, the voltage value of the first node voltage changes, which affects the level of the first feedback signal. For example, when the first end 1221a of the first comparator 1221 is a positive input end and the second end 1221b of the first comparator 1221 is a negative input end, if the voltage value of the first node voltage is higher than the voltage value of the first reference voltage V1, the first feedback signal is a high level. For another example, when the voltage value of the first node voltage is not higher than the voltage value of the first reference voltage V1, the first feedback signal is a low level.

[0069] In some embodiments, the voltage value of the first reference voltage V1 is half of the voltage value of the power supply voltage VS.

[0070] That is, when the impedance matching circuit 100 is loop-stable, the equivalent impedance value of the first biasing subunit 1211 composed of the first switch tube 12111 and the second switch tube 12112 is equal to the impedance value of the reference resistor and consistent with the characteristic impedance of the transmission line, and the level value of the first node voltage is equal to the level value of the first reference voltage V1. ​

[0071] The first end 1222a of the second comparator 1222 is connected to the third intermediate node C, the second end 1222b of the second comparator 1222 is connected to the second reference voltage V2, and the third end 1222c of the second comparator 1222 is connected to the fourth intermediate node D. The second comparator 1222 is configured to generate a second feedback signal according to the second node voltage and the second reference voltage V2, and transmit the second feedback signal to the fourth intermediate node D.

[0072] In the embodiments of the present application, the second feedback signal is a signal generated by comparing the second node voltage with the second reference voltage V2 through the second comparator 1222 and transmitted through the third end 1221c of the first comparator 1221. The change of the second node voltage will affect the level of the second feedback signal. For example, when the first end 1222a of the second comparator 1222 is a positive input end and the second end 1221b of the first comparator 1222 is a negative input end, if the voltage value of the second node voltage is higher than the voltage value of the second reference voltage V2, the second feedback signal is high. For another example, when the voltage value of the second node voltage is not higher than the voltage value of the second reference voltage V2, the second feedback signal is low.

[0073] In some embodiments, the voltage value of the second reference voltage V2 is half of the voltage value of the power supply voltage.

[0074] When the impedance matching circuit 100 is loop-stable, the equivalent impedance value of the pull-down component 12122 composed of the fifth switch tube 121221 and the sixth switch tube 121222 is equal to the equivalent impedance value of the pull-up component 12121 composed of the third switch tube 121211 and the fourth switch tube 121212, that is, the equivalent impedance value of the pull-down component 12122 composed of the fifth switch tube 121221 and the sixth switch tube 121222 is equal to the impedance value of the reference resistor and consistent with the characteristic impedance of the transmission line, and the level value of the second node voltage is equal to the level value of the second reference voltage V2.

[0075] In the embodiments of the present application, the first end 130a of the connection module 130 is connected to the second end 120b of the bias module 120, the second end 130b of the connection module 130 is connected to the third end 120c of the bias module 120, and the third end 130c of the connection module 130 is connected to the signal port E.

[0076] The second intermediate node B is connected to the first end 130a of the connection module 130, and the fourth intermediate node D is connected to the second end 130b of the connection module 130.

[0077] In some embodiments, as shown in Figure 9 The connection module 130 includes a first connection unit 131 and a second connection unit 132.

[0078] The first end 131a of the first connection unit 131 is connected to the signal port, the second end 131b of the first connection unit 131 is connected to the second intermediate node B, and the third end 131c of the first connection unit 131 is grounded. The first connection unit 131 is configured to adjust the level value of the signal port E according to the first feedback signal.

[0079] In some embodiments, as shown in Figure 10 The first connection unit 131 includes a seventh switch tube 1311.

[0080] The first end 1311a of the seventh switch tube 1311 is connected to the second intermediate node B, the second end 1311b of the seventh switch tube 1311 is grounded, and the third end 1311c of the seventh switch tube 1311 is connected to the signal port E.

[0081] Optionally, the seventh switch tube 1311 can be an NMOS tube, such as an enhancement-mode NMOS tube.

[0082] In some embodiments, as shown in Figure 10 The first connection unit 131 further includes an eighth switch tube 1312.

[0083] The eighth switch tube 1312 is connected between the power supply voltage VS and the second end 1311b of the seventh switch tube 1311, the first end 1312a of the eighth switch tube 1312 is connected to the first control voltage VA, the second end 1312b of the eighth switch tube 1312 is grounded, and the third end 1312c (drain) of the eighth switch tube 1312 is connected to the second end 1311b of the seventh switch tube 1311.

[0084] Optionally, the eighth switch tube 1312 can be an NMOS tube, such as an enhancement-mode NMOS tube.

[0085] In the embodiments of the present application, the seventh switch tube 1311 and the eighth switch tube 1312 are respectively a copy unit of the first switch tube 12111 and the second switch tube 12112. That is, the first connection unit 131 composed of the seventh switch tube 1311 and the eighth switch tube 1312 has an equivalent impedance value equal to the impedance value of the reference resistor and consistent with the characteristic impedance of the transmission line when the circuit is stable.

[0086] The first end 132a of the second connection unit 132 is connected to the signal port E, the second end 132b of the second connection unit 132 is connected to the fourth intermediate node, and the third end 132c of the second connection unit 132 is connected to the power supply voltage. The second connection unit 132 is configured to adjust the voltage of the signal port E according to the second feedback signal.

[0087] In some embodiments, as shown inFigure 11 As shown, the second connection unit 132 includes a ninth switch transistor 1321.

[0088] Among them, the first terminal 1321a of the ninth switch 1321 is connected to the fourth intermediate node D, the second terminal 1321b of the ninth switch 1321 is connected to the power supply voltage VS, and the third terminal 1321c of the ninth switch 1321 is connected to the signal port E.

[0089] Alternatively, the ninth switch 1321 may be a PMOS transistor, such as an enhancement-mode PMOS transistor.

[0090] In some implementations, such as Figure 11 As shown, the second connection unit 132 also includes a tenth switch transistor 1322.

[0091] The tenth switch 1322 is connected between ground and the second terminal 1321a of the ninth switch 1321. The first terminal 1322a of the tenth switch 1322 is connected to the second control voltage VB, the second terminal 1322b of the tenth switch 1322 is connected to the power supply voltage VS, and the third terminal 1322c of the tenth switch 1322 is connected to the second terminal 1321b of the ninth switch 1321.

[0092] Optionally, the tenth switch 1322 can be a PMOS transistor, such as an enhancement-mode PMOS transistor.

[0093] In the embodiments of this application, the ninth switch 1321 and the tenth switch 1322 are replica units of the third switch 121211 and the fourth switch 121212, respectively. That is, the second connection unit 132 composed of the ninth switch 1321 and the tenth switch 1322 has the same equivalent impedance value as the reference resistor when the circuit is stable, and the impedance value is consistent with the characteristic impedance of the transmission line.

[0094] When the circuit is stable, the equivalent impedance values ​​of the first connection unit 131 and the second connection unit 132 are equal and both are consistent with the characteristic impedance of the transmission line. Therefore, the impedance of the signal port E is matched with the characteristic impedance of the transmission line, and the voltage value of the signal port E is half of the power supply voltage VS.

[0095] like Figure 12 As shown in the figure, this application provides a schematic diagram of another impedance matching circuit 100. In this embodiment, the impedance matching circuit includes: a reference module 110, a bias module 120, and a connection module 130.

[0096] In the embodiments of this application, the reference module 110 is a fixed resistor; wherein the impedance value of the resistor of the reference module is equal to the characteristic impedance of the transmission line.

[0097] In the embodiments of the present application, the biasing module 120 comprises a biasing unit and a comparison unit.

[0098] The biasing unit comprises a first biasing subunit 1211 and a second biasing subunit 1212.

[0099] In the embodiments of the present application, the first biasing subunit 1211 comprises a first switch tube 12111 and a second switch tube 12112. The first switch tube 12111 is an enhancement-mode NMOS tube, and the second switch tube 12112 is an enhancement-mode NMOS tube.

[0100] The first end (gate) of the first switch tube 12111 is connected to the second intermediate node B, the second end (source) of the first switch tube 12111 is grounded, and the third end (drain) of the first switch tube 12111 is connected to the first intermediate node A; the second switch tube 12112 is connected between the ground and the second end of the first switch tube 12111, the first end (gate) of the second switch tube 12112 is connected to the first control voltage VA, the second end (source) of the second switch tube 12112 is grounded, and the third end (drain) of the second switch tube 12112 is connected to the second end of the first switch tube 12111.

[0101] In the embodiments of the present application, the second biasing subunit 1212 comprises a pull-up component 12121 and a pull-down component 12122.

[0102] In the embodiments of the present application, the pull-up component 12121 comprises a third switch tube 121211 and a fourth switch tube 121212. The third switch tube 121211 is an enhancement-mode PMOS tube, and the fourth switch tube 121212 is an enhancement-mode PMOS tube.

[0103] The first end (gate) of the third switch tube 121211 is connected to the fourth intermediate node D, the second end (source) of the third switch tube 121211 is connected to the power supply voltage, and the third end (drain) of the third switch tube 121211 is connected to the third intermediate node; the fourth switch tube 121212 is connected between the power supply voltage VS and the second end of the third switch tube 121211, the first end (gate) of the fourth switch tube 121212 is connected to the second control voltage VB, the second end (source) of the fourth switch tube 121212 is connected to the power supply voltage VS, and the third end (drain) of the fourth switch tube 121212 is connected to the second end of the third switch tube 12111.

[0104] In the embodiment of the present application, the pull-down component 12122 includes a fifth switch tube 121221 and a sixth switch tube 121222. The fifth switch tube 121221 and the sixth switch tube 121222 are respectively a copy unit of the first switch tube 12111 and the second switch tube 12112; the fifth switch tube 121221 is an enhancement-mode NMOS tube, and the sixth switch tube 121222 is an enhancement-mode NMOS tube.

[0105] The first end (gate) of the fifth switch tube 121221 is connected to the second intermediate node B, the second end (source) of the fifth switch tube 121221 is grounded, and the third end (drain) of the fifth switch tube 121221 is connected to the first intermediate node A; the sixth switch tube 121222 is connected between the ground and the second end of the fifth switch tube 121221, the first end (gate) of the sixth switch tube 121221 is connected to the first control voltage VA, the second end (source) of the sixth switch tube 121221 is grounded, and the third end (drain) of the sixth switch tube 121221 is connected to the second end of the fifth switch tube 121221. The comparison unit 122 includes a first comparator 1221 and a second comparator 1222.

[0106] In the embodiment of the present application, the connection module 130 includes a first connection unit 131 and a second connection unit 132.

[0107] In the embodiment of the present application, the first connection unit 131 includes a seventh switch tube 1311 and an eighth switch tube 1312. The seventh switch tube 1311 and the eighth switch tube 1312 are respectively a copy unit of the first switch tube 12111 and the second switch tube 12112; the seventh switch tube 1311 is an enhancement-mode NMOS tube, and the eighth switch tube 1312 is an enhancement-mode NMOS tube.

[0108] The first end (gate) of the seventh switch tube 1311 is connected to the second intermediate node B, the second end (source) of the seventh switch tube 1311 is grounded, and the third end (drain) of the seventh switch tube 1311 is connected to the signal port E; the eighth switch tube 1312 is connected between the ground and the second end of the seventh switch tube 1311, the first end (gate) of the eighth switch tube 1312 is connected to the first control voltage VA, the second end (source) of the eighth switch tube 1312 is grounded, and the third end (drain) of the eighth switch tube 1312 is connected to the second end of the seventh switch tube 1311.

[0109] In the embodiment of the present application, the second connection unit 132 comprises a ninth switch tube 1321 and a tenth switch tube 1322. The ninth switch tube 1321 and the tenth switch tube 1322 are respectively a copy unit of the third switch tube 121211 and the fourth switch tube 121212; the ninth switch tube 1321 is an enhancement mode PMOS tube, and the tenth switch tube 1322 is an enhancement mode PMOS tube.

[0110] The first end (gate) of the ninth switch tube 1321 is connected to the fourth intermediate node D, the second end (source) of the ninth switch tube 1321 is connected to the power supply voltage, and the third end (drain) of the ninth switch tube 1321 is connected to the third intermediate node; the tenth switch tube 1322 is connected between the power supply voltage VS and the second end of the ninth switch tube 1321, the first end (gate) of the tenth switch tube 1322 is connected to the second control voltage VB, the second end (source) of the tenth switch tube 1322 is connected to the power supply voltage VS, and the third end (drain) of the tenth switch tube 121212 is connected to the second end of the ninth switch tube 12111.

[0111] In the embodiment of the present application, the reference voltage values of the first reference voltage V1 and the second reference voltage V2 are equal and are half of the power supply voltage VS; when the circuit is stable, the respective equivalent impedance values of the first connection unit 131 and the second connection unit 132 of the connection module 130 are equal and are equal to the impedance value of the reference resistance 111, and the level value of the signal port E is half of the power supply voltage VS.

[0112] The working process of the impedance matching circuit 110 of the embodiment of the present application will be described in detail below.

[0113] When the level value of the first intermediate node A is higher than the first reference voltage V1, the first comparator 1221 transmits the high level first feedback signal to the second intermediate node B, the first switch tube 12111, the fifth switch tube 121221 and the seventh switch tube 1311 are turned on, the equivalent impedance value of the first biasing sub-unit 1211 will decrease until it is equal to the impedance value of the reference module 110, at this time, the level value of the first intermediate node A is equal to the level value of the first reference voltage V1; the respective equivalent impedance values of the pull-down component 12122 of the second biasing sub-unit 1212 and the first connection unit 131 will also decrease.

[0114] If the level of the third intermediate node C is greater than the second reference voltage V2 at this time, the second comparator 1222 transmits a high-level second feedback signal to the fourth intermediate node D, the third switch tube 121211 and the ninth switch tube 1321 are turned off, the respective equivalent impedance values of the pull-up component 12121 of the second biasing sub-unit 1212 and the second connection unit 132 are both increased until the respective equivalent impedance values of the pull-down component 12122 of the second biasing sub-unit 1212 and the first biasing sub-unit 1211 are equal to the impedance value of the reference module 110. At this time, the level of the third intermediate node C is equal to the level of the second reference voltage V2, and the level of the signal port E is half of the level of the power supply voltage VS.

[0115] If the level of the third intermediate node C is less than the second reference voltage V2 at this time, the second comparator 1222 transmits a low-level second feedback signal to the fourth intermediate node D, the third switch tube 121211 and the ninth switch tube 1321 are turned on, the respective equivalent impedance values of the pull-up component 12121 of the second biasing sub-unit 1212 and the second connection unit 132 are both decreased until the respective equivalent impedance values of the pull-down component 12122 of the second biasing sub-unit 1212 and the first biasing sub-unit 1211 are equal to the impedance value of the reference module 110. At this time, the level of the third intermediate node C is equal to the level of the second reference voltage V2, and the level of the signal port E is half of the level of the power supply voltage VS.

[0116] When the level of the first intermediate node A is lower than the first reference voltage V1, the first comparator 1221 transmits a low-level first feedback signal to the first intermediate node A, the first switch tube 12111, the fifth switch tube 121221 and the seventh switch tube 1311 are turned off, the equivalent impedance value of the first biasing sub-unit 1211 is increased until it is equal to the impedance value of the reference module 110, at which time the level of the first intermediate node A is equal to the level of the first reference voltage V1; the respective equivalent impedance values of the pull-down component 12122 of the second biasing sub-unit 1212 and the first connection unit 131 are also increased.

[0117] If the voltage level of the third intermediate node C is greater than the second reference voltage V2, the second comparator 1222 transmits a high-level second feedback signal to the fourth intermediate node D. The third switch 121211 and the ninth switch 1321 are turned off and on. The equivalent impedance values ​​of the pull-up components 121212 and the second connection unit 132 of the second bias subunit 1212 both rise until they are equal to the equivalent impedance values ​​of the pull-down components 121221 of the second bias subunit 1212 and the first bias subunit 1211, respectively, and both are the impedance values ​​of the reference module 110. At this time, the voltage level of the third intermediate node C is equal to the voltage level of the second reference voltage V2, and the voltage level of the signal port E is half the voltage level of the power supply voltage VS.

[0118] If the voltage level of the third intermediate node C is less than the second reference voltage V2, the second comparator 1222 transmits a low-level second feedback signal to the fourth intermediate node D. The third switch 121211 and the ninth switch 1321 are turned on and off. The equivalent impedance values ​​of the pull-up components 121212 of the second bias subunit 1212 and the second connection unit 132 both decrease and increase until they are equal to the equivalent impedance values ​​of the pull-down and pull-up components 12122 of the second bias subunit 1212 and the first bias subunit 1211, respectively, and both are the impedance values ​​of the reference module 110. At this time, the voltage level of the third intermediate node C is equal to the voltage level of the second reference voltage V2, and the voltage level of the signal port E is half the voltage level of the power supply voltage VS.

[0119] like Figure 13 As shown in the embodiment of this application, an impedance matching method 200 is also provided, the method steps of which include:

[0120] Step 210: Obtain the voltage of the first node.

[0121] Step 220: When the node voltage is not equal to the preset reference voltage, adjust the first node voltage according to the first feedback signal so that the first node voltage is equal to the preset reference voltage.

[0122] Step 230: Adjust the voltage of the signal port according to the first feedback signal and the second feedback signal so that the voltage of the signal port is equal to the preset reference voltage.

[0123] The impedance matching method of this application can be applied to the impedance matching circuit in the above embodiments. For details, please refer to the description of the above embodiments, which will not be repeated here.

[0124] like Figure 14 As shown, this application embodiment also provides an integrated circuit 300, wherein the integrated circuit 300 includes the impedance matching circuit 100 described above.

[0125] As shown in Figure 15 The embodiment of the present application also provides an electronic device 400, wherein the electronic device 400 comprises a shell 410 and the level conversion circuit 100. Figure 16 As shown in

[0126] Optionally, the electronic device 400 can be a mobile phone, a notebook computer, a tablet computer or the like.

[0127] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not drive the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An impedance matching circuit, characterized by, The application relates to a voltage reference module, comprising: a reference module, a first end of the reference module being connected to a first intermediate node, and a second end of the reference module being connected to a power supply voltage; a biasing module, a first end of the biasing module being connected to the first intermediate node, the biasing module being configured to generate a first feedback signal according to a first node voltage of the first intermediate node and transmit the first feedback signal to a second end of the biasing module; the biasing module being further configured to generate a second feedback signal and transmit the second feedback signal to a third end of the biasing module; a connecting module, a first end of the connecting module being connected to the second end of the biasing module, a second end of the connecting module being connected to the third end of the biasing module, and a third end of the connecting module being connected to a signal port; wherein, when the first node voltage is not equal to a preset reference voltage, the biasing module adjusts the first node voltage according to the first feedback signal, so that the first node voltage is equal to the preset reference voltage; and the connecting module adjusts a voltage of the signal port according to the first feedback signal and the second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage; wherein, the biasing module comprises a biasing unit and a comparison unit; a first end of the biasing unit being connected to the first intermediate node, a second end of the biasing unit being connected to a second intermediate node, a third end of the biasing unit being connected to a third intermediate node, a fourth end of the biasing unit being connected to a fourth intermediate node, and a fifth end of the biasing unit being connected to the power supply voltage; a first end of the comparison unit being connected to the first intermediate node, a second end of the comparison unit being connected to the second intermediate node, a third end of the comparison unit being connected to the third intermediate node, a fourth end of the comparison unit being connected to the fourth intermediate node, a fifth end of the comparison unit being connected to a first reference voltage, and a sixth end of the comparison unit being connected to a second reference voltage; wherein, the first reference voltage is half of the power supply voltage, and the second reference voltage is half of the power supply voltage; wherein, the comparison unit is configured to generate the first feedback signal according to the first node voltage and the first reference voltage; and the comparison unit is further configured to generate a second feedback signal according to a second node voltage of the third intermediate node and the second reference voltage and transmit the second feedback signal to the fourth intermediate node; the second intermediate node being connected to the first end of the connecting module; and the fourth intermediate node being connected to the second end of the connecting module; the comparison unit comprising a first comparator and a second comparator; a first end of the first comparator being connected to the first intermediate node, a second end of the first comparator being connected to the first reference voltage, and a third end of the first comparator being connected to the second intermediate node; the first comparator being configured to generate the first feedback signal according to the first node voltage and the first reference voltage and transmit the first feedback signal to the second intermediate node; A first end of the second comparator is connected to the third intermediate node, a second end of the second comparator is connected to the second reference voltage, and a third end of the second comparator is connected to the fourth intermediate node; the second comparator is configured to generate the second feedback signal according to the second node voltage and the second reference voltage, and transmit the second feedback signal to the fourth intermediate node.

2. The impedance matching circuit of claim 1, wherein, The biasing unit comprises a first biasing subunit and a second biasing subunit. A first end of the first biasing subunit is connected to the first intermediate node, a second end of the first biasing subunit is connected to the second intermediate node, and a third end of the first biasing subunit is grounded; the first biasing subunit is configured to adjust the first node voltage according to the first feedback signal. A first end of the second biasing subunit is connected to the power supply voltage, a second end of the second biasing subunit is connected to the second intermediate node, a third end of the second biasing subunit is connected to the third intermediate node, a fourth end of the second biasing subunit is connected to the fourth intermediate node, and a fifth end of the second biasing subunit is grounded; the second biasing subunit is configured to adjust the second node voltage according to the first feedback signal and the second feedback signal.

3. The impedance matching circuit of claim 2, wherein, The first biasing subunit comprises a first switch tube, a first end of the first switch tube is connected to the second intermediate node, a second end of the first switch tube is grounded, and a third end of the first switch tube is connected to the first intermediate node.

4. The impedance matching circuit of claim 3, wherein, The first biasing subunit further comprises a second switch tube, the second switch tube is connected between the ground and the second end of the first switch tube; a first end of the second switch tube is connected to a first control voltage, a second end of the second switch tube is grounded, and a third end of the second switch tube is connected to the second end of the first switch tube.

5. The impedance matching circuit of claim 2, wherein, The second biasing subunit comprises a pull-up component and a pull-down component. A first end of the pull-up component is connected to the power supply voltage, a second end of the pull-up component is connected to the third intermediate node, and a third end of the pull-up component is connected to the fourth intermediate node; the pull-up component is configured to adjust the second node voltage according to the second feedback signal. A first end of the pull-down component is connected to the third intermediate node, a second end of the pull-down component is grounded, and a third end of the pull-down component is connected to the second intermediate node; the pull-down component is configured to adjust the second node voltage according to the first feedback signal.

6. The impedance matching circuit of claim 5, wherein, The pull-up component comprises a third switch tube, a first end of the third switch tube is connected to the fourth intermediate node, a second end of the third switch tube is connected to the power supply voltage, and a third end of the third switch tube is connected to the third intermediate node.

7. The impedance matching circuit of claim 6, wherein, The pull-up component further comprises a fourth switch tube, the fourth switch tube is connected between the power supply voltage and the second end of the third switch tube; a first end of the fourth switch tube is connected to a second control voltage, a second end of the fourth switch tube is connected to the power supply voltage, and a third end of the fourth switch tube is connected to the second end of the third switch tube.

8. The impedance matching circuit of claim 5, wherein, The pull-down component comprises a fifth switch tube, a first end of the fifth switch tube is connected to the second intermediate node, a second end of the fifth switch tube is grounded, and a third end of the fifth switch tube is connected to the third intermediate node.

9. The impedance matching circuit of claim 8, wherein, The pull-down component further comprises a sixth switch tube, the sixth switch tube is connected between the ground and the second end of the fifth switch tube, a first end of the sixth switch tube is connected to a first control voltage, a second end of the sixth switch tube is grounded, and a third end of the sixth switch tube is connected to the second end of the fifth switch tube.

10. The impedance matching circuit of claim 1, wherein, The connection module comprises a first connection unit and a second connection unit. A first end of the first connection unit is connected to the signal port, a second end of the first connection unit is connected to the second intermediate node, and a third end of the first connection unit is grounded; the first connection unit is used for adjusting the level value of the signal port according to the first feedback signal; A first end of the second connection unit is connected to the signal port, a second end of the second connection unit is connected to the fourth intermediate node, and a third end of the second connection unit is connected to the power supply voltage; the second connection unit is used for adjusting the voltage of the signal port according to the second feedback signal.

11. The impedance matching circuit of claim 10, wherein, The first connection unit comprises a seventh switch tube, a first end of the seventh switch tube is connected to the second intermediate node, a second end of the seventh switch tube is grounded, and a third end of the seventh switch tube is connected to the signal port.

12. The impedance matching circuit of claim 11, wherein, The first connection unit further comprises an eighth switch tube, the eighth switch tube is connected between the ground and the second end of the seventh switch tube, a first end of the eighth switch tube is connected to a first control voltage, a second end of the eighth switch tube is grounded, and a third end of the eighth switch tube is connected to the second end of the seventh switch tube.

13. The impedance matching circuit of claim 10, wherein, The second connection unit comprises a ninth switch tube, a first end of the ninth switch tube is connected to the fourth intermediate node, a second end of the ninth switch tube is connected to the power supply voltage, and a third end of the ninth switch tube is connected to the signal port.

14. The impedance matching circuit of claim 13, wherein, The second connection unit further comprises a tenth switch tube, the tenth switch tube is connected between the power supply voltage and the second end of the ninth switch tube, a first end of the tenth switch tube is connected to a second control voltage, a second end of the tenth switch tube is connected to the power supply voltage, and a third end of the tenth switch tube is connected to the second end of the ninth switch tube.

15. An impedance matching method, characterized by, The impedance matching circuit of any one of claims 1-14, acquire a first node voltage; when the first node voltage is not equal to a preset reference voltage, adjust the first node voltage according to a first feedback signal, so that the first node voltage is equal to the preset reference voltage; and adjust the voltage of the signal port according to the first feedback signal and a second feedback signal, so that the voltage of the signal port is equal to the preset reference voltage.

16. An integrated circuit, comprising: The impedance matching circuit of any one of claims 1-14.

17. An electronic device, comprising: The integrated circuit comprises a housing and the impedance matching circuit of any one of claims 1-14 or the integrated circuit of claim 16 in the housing.

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