Fan-out based Micro-LED display and its manufacturing process

Abstract

The present application proposes a Fan‑out-based Mirco‑LED display screen and its manufacturing process, comprising: a substrate; an LED chip array comprising a plurality of LED chips and a TFT array comprising a plurality of TFTs, which are bonded to the upper and lower sides of the substrate through solder joints on the upper and lower sides of the substrate respectively; at least one metal trace is arranged on the upper and / or lower sides of the substrate, and a via is provided on the substrate for the metal trace to pass through up and down, one end of the metal trace is connected to the solder joint on the upper side of the substrate, and the other end extends horizontally outward to exceed the edge of the LED chip array and connects to the solder joint on the lower side of the substrate, thereby achieving electrical conduction between the LED chip array and the TFT array. The Mirco‑LED display screen of the present application has a simple manufacturing process and low cost.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a Fan-out based Mirco-LED display screen and a manufacturing process thereof. Background Art

[0002] With the advancement of new semiconductor material process technology, light-emitting diodes have been widely used in industrial manufacturing as key components in the display field. Micro-LED display is its most promising solution, with the advantages of high brightness, low power consumption, high reliability, etc., and can achieve a very high display density in a limited area. However, there is still no very efficient and accurate wiring solution for small-sized Micro-LED drivers, especially TFT (Thin Film Transistor) drivers. In the field of semiconductor packaging, on the one hand, the technology of integrating electronic components on the Micro-LED chip substrate is limited by high cost and complex processes, and it is difficult to adapt to the various flexibilities of different components. On the other hand, the cost of mass-producing display panels with different spacings is extremely high.

[0003] In view of this, it is particularly important to design and manufacture a Micro-LED display screen based on Fan-out (fan-out wafer-level packaging process) and its manufacturing process. Summary of the invention

[0004] In order to solve the problems of high difficulty and high cost in the existing Micro-LED display manufacturing process, the present application provides a Fan-out based Mirco-LED display and its manufacturing process.

[0005] According to the first aspect of the present application, a Fan-out-based Mirco-LED display screen is proposed, comprising: a substrate; an LED chip array comprising a plurality of LED chips and a TFT array comprising a plurality of TFTs, which are bonded to the upper and lower sides of the substrate through solder joints on the upper and lower sides of the substrate, respectively; at least one metal trace is arranged on the upper and / or lower sides of the substrate, and a via hole is provided on the substrate for the metal trace to pass through up and down, one end of the metal trace is connected to the solder joint on the upper side of the substrate, and the other end extends horizontally outward to exceed the edge of the LED chip array and connects to the solder joint on the lower side of the substrate, thereby achieving electrical conduction between the LED chip array and the TFT array.

[0006] Through the above technical solution, on the one hand, the LED chip array, substrate and TFT array are processed separately, the manufacturing process is simple, and each component is independently welded and can be repaired; on the other hand, the LED chip array and the TFT array are electrically connected through metal traces and vias, and a set of TFT arrays can be used to drive LED chip arrays of various sizes and spacings, so there is no need to change the size of the TFT array to adapt to LED chip arrays of different sizes, thereby reducing production costs.

[0007] Preferably, the LED chip includes a substrate and a functional layer arranged on the substrate, the functional layer is provided with an anode pad and a common cathode pad electrically connected to the substrate; an upper pad and a cathode pad are provided on the upper side of the substrate, the upper pad is electrically connected to the anode pad, and the cathode pad is electrically connected to the common cathode pad and is grounded at the same time; a lower pad is provided on the lower side of the substrate, and two ends of the metal routing are respectively connected to the upper pad and the lower pad; the TFT includes a backplane and an inner layer circuit arranged on the backplane, the surface layer of the backplane is provided with a surface pad electrically connected to the inner layer circuit, and the surface pad is electrically connected to the lower pad.

[0008] Through the above technical solution, the pads in the circuit on the upper surface of the substrate are welded to the LED chip array, and the pads in the circuit on the lower surface of the substrate are welded to the TFT drive array.

[0009] Preferably, a first insulating layer for laying the metal wiring is also provided on the substrate.

[0010] Through the above technical solution, by providing the first insulating layer, it is possible to prevent the metal wiring on the substrate from being short-circuited with other components.

[0011] Preferably, the metal wiring is arranged on the lower side of the substrate, the first insulating layer covers the metal wiring, and a connection hole for the metal wiring to pass through is provided at the connection between the first insulating layer and the lower pad.

[0012] Through the above technical solution, the metal routing is arranged on the lower side of the substrate and covered by the first insulating layer, and then a hole is opened at the connection between the first insulating layer and the lower pad. The metal routing can achieve electrical conduction between the upper and lower pads of the substrate through the vias and connecting holes.

[0013] Preferably, the metal wiring is arranged on the upper side of the substrate, the first insulating layer independently covers the cathode pad and the metal wiring respectively, and the first insulating layer is provided with an opening at the connection between the cathode pad and the common cathode pad.

[0014] Through the above technical solution, a first insulating layer is firstly provided at the cathode pad, and a hole is simultaneously opened at the position where the cathode pad and the common cathode pad need to be welded on the first insulating layer, and then the metal trace is arranged on the upper side of the substrate, and the metal trace is again covered with the first insulating layer. This design method of arranging the metal trace on the upper side of the substrate can avoid the short circuit between the metal trace on the substrate and the inner layer circuit and the surface pad of the TFT.

[0015] Preferably, a second insulating layer is provided between the cathode pad and the substrate.

[0016] Through the above technical solution, a second insulating layer is pre-arranged under the cathode pad, which can avoid the problems of short circuit and cold soldering when the substrate is soldered to the LED chip.

[0017] Preferably, a circuit element area is also provided on the substrate, configured for arranging circuit elements and wiring.

[0018] Through the above technical solution, the unwired area of ​​the substrate can be effectively used to arrange circuit elements and wiring, saving wiring space, increasing the wiring area, and further improving the heat dissipation efficiency.

[0019] Preferably, the functional layer includes an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer from top to bottom, the common cathode pad is arranged on the N-type gallium nitride layer, and the anode pad is arranged on the P-type gallium nitride layer.

[0020] Preferably, the anode pad and the upper pad, the common cathode pad and the cathode pad, and the lower pad and the surface pad are all electrically connected via solder balls.

[0021] According to the second aspect of the present application, based on the above-mentioned Mirco-LED display screen, a manufacturing process of a Mirco-LED display screen is also proposed, comprising the following steps:

[0022] S1. Growing an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer in sequence on a substrate of an LED chip, and coating a common cathode pad and an anode pad on the N-type gallium nitride layer and the P-type gallium nitride layer, respectively;

[0023] S2, respectively plating an upper solder pad and a cathode solder pad on the upper side of the substrate, plating an upper solder pad on the lower side of the substrate at a position beyond the LED chip, and simultaneously opening a via hole on the substrate, electrically connecting the upper solder pad with the lower solder pad by passing a metal trace through the via hole, and providing a first insulating layer covering the metal trace on the substrate;

[0024] S3, arranging an inner circuit on the backplane of the TFT, wherein the inner circuit is connected to an external driving signal, and providing a surface pad on the surface of the backplane corresponding to each unit connected to the driving signal;

[0025] S4. Flip-chip soldering the anode pad and the common cathode pad on the LED chip to the upper pad and cathode pad of the substrate respectively through solder balls, and face-chip soldering the lower pad on the substrate to the surface pad of the TFT through solder balls.

[0026] Compared with the prior art, the beneficial results of this application are:

[0027] (1) The LED chip array, substrate and TFT array are processed separately and the components are independently welded, which makes the manufacturing process simple and can be repaired.

[0028] (2) The LED chip array and the TFT array are electrically connected through metal traces and vias. A set of TFT arrays can be used to drive LED chip arrays of various sizes and spacings, eliminating the need to change the size of the TFT array to accommodate LED chip arrays of different sizes, thereby reducing production costs.

[0029] (3) By setting the circuit component area, the available area is increased, wiring space is saved, and heat dissipation efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate the embodiments and are used together with the description to explain the principles of the present application. It will be easy to recognize other embodiments and many expected advantages of the embodiments because they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale with each other. The same reference numerals refer to corresponding similar parts.

[0031] Figure 1 is a cross-sectional schematic diagram of a Mirco-LED display screen according to Example 1 of the present application;

[0032] Figure 2 is a schematic top view of a substrate according to Example 1 of the present application;

[0033] Figure 3 is a cross-sectional schematic diagram of a Mirco-LED display screen according to Example 2 of the present application;

[0034] Figure 4 is a cross-sectional schematic diagram of a Mirco-LED display screen according to Example 3 of the present application;

[0035] Figure 5is a cross-sectional schematic diagram of a Mirco-LED display screen according to Example 4 of the present application;

[0036] Figure 6 It is a flow chart of the manufacturing process of the Micro-LED display screen according to an embodiment of the present application.

[0037] The meaning of the numbers in the figure are: 100, LED chip array; 200, substrate; 300, TFT array; 1, substrate; 2, N-type gallium nitride layer; 3, multi-quantum well layer; 4, P-type gallium nitride layer; 5, anode pad; 6, common cathode pad; 7, upper pad; 8, cathode pad; 9, via; 10, metal trace; 11, lower pad; 12, first insulating layer; 12', second insulating layer; 13, backplane; 14, inner layer circuit; 15, surface pad; 16, solder ball; 17, circuit component area; 18, connection hole. DETAILED DESCRIPTION

[0038] In the following detailed description, reference is made to the accompanying drawings, which form a part of the detailed description and are shown by illustrative specific embodiments in which the present application can be practiced. To this end, directional terms, such as "top", "bottom", "left", "right", "up", "down", etc., are used with reference to the orientation of the figures described. Because the components of the embodiments can be positioned in several different orientations, directional terms are used for the purpose of illustration and are by no means limiting. It should be understood that other embodiments may be utilized or logical changes may be made without departing from the scope of the present application. Therefore, the following detailed description should not be adopted in a limiting sense, and the scope of the present application is defined by the appended claims.

[0039] According to the first aspect of the present application, a Fan-out based Mirco-LED display screen is proposed.

[0040] Figure 1 A cross-sectional schematic diagram of a Mirco-LED display screen according to Embodiment 1 of the present application is shown, Figure 1 As shown in FIG. 1 , the structure of the Micro-LED display screen includes an LED chip array 100, a substrate 200 and a TFT array 300 from top to bottom. The LED chip array 100 includes a plurality of LED chips bonded to the upper side of the substrate 200; the TFT array 300 includes a plurality of TFTs bonded to the lower side of the substrate 200; and the substrate 200 is a double-layer PCB board using a Fan-out process.

[0041] For details, please refer to Figure 1The structure of the LED chip includes a substrate 1 and a functional layer grown under the substrate 1. In this embodiment, the substrate 1 is a sapphire substrate 1. In other embodiments, the substrate 1 may also be made of other materials. The functional layer includes an N-type gallium nitride layer 2, a multi-quantum well layer 3, and a P-type gallium nitride layer 4. The N-type gallium nitride layer 2 is grown under the substrate 1, the multi-quantum well layer 3 is grown on the N-type gallium nitride layer 2, and the P-type gallium nitride layer 4 is grown on the multi-quantum well layer 3. The bottoms of the P-type gallium nitride layer 4 and the N-type gallium nitride layer 2 are respectively sputtered with an anode pad 5 and a common cathode pad 6 connected to the substrate 200.

[0042] Continue to refer to Figure 1 The upper side pad 7 and the cathode pad 8 are sputtered and plated at the positions corresponding to the anode pad 5 and the common cathode pad 6 on the upper side of the substrate 200, respectively. The anode pad 5 and the upper side pad 7, as well as the common cathode pad 6 and the cathode pad 8 are soldered through the solder ball 16, and the cathode pad 8 is grounded at the same time. The lower side pad 11 is sputtered and plated on the lower side of the substrate 200, and the lower side pad 11 is electrically connected to the upper side pad 7 and the TFT at the same time.

[0043] Continue to refer to Figure 1 TFT includes a backplane 13 and related inner circuits 14 arranged on the backplane 13, and the inner circuits 14 include but are not limited to circuit elements such as transistors, resistors, capacitors, and voltage regulators. The inner circuits 14 are connected to external drive signals, and surface pads 15 are sputtered and plated on the surface of the backplane 13 corresponding to the positions where the inner circuits 14 are connected to each drive signal. The surface pads 15 are also welded to the lower pads 11 through solder balls 16.

[0044] In this embodiment, the arrangement and spacing of the upper pads 7 on the upper side of the substrate 200 are consistent with the arrangement and spacing of the LED chip array 100, the arrangement and spacing of the lower pads 11 on the lower side of the substrate 200 are consistent with the arrangement and spacing of the back plate 13 in the TFT array 300, and the spacing of the LED chips in the LED chip array 100 is smaller than the spacing of the TFTs in the TFT array 300. In other embodiments, the distribution and spacing of the modules or arrays on the upper and lower sides of the substrate 200 can be adjusted according to the application scenario.

[0045] In this embodiment, the materials of the anode pad 5 , the common cathode pad 6 , the upper pad 7 , the cathode pad 8 , the lower pad 11 and the surface pad 15 include but are not limited to gold, titanium, aluminum, nickel and silver.

[0046] In this embodiment, the back plate 13 of the TFT is made of transparent material, and the transparent material includes but is not limited to glass, sapphire, and silicon carbide materials.

[0047] Furthermore, Figure 2 A schematic top view of a substrate 200 according to Embodiment 1 of the present application is shown, with reference to Figure 1 and Figure 2 A via 9 is provided at the middle position of the substrate 200 corresponding to the position of the upper pad 7. At least one metal trace 10 is arranged on the lower side of the substrate 200. The metal trace 10 passes through the via 9 and its two ends are electrically connected to the upper pad 7 and the lower pad 11 respectively, thereby achieving electrical conduction between the lower pad 11 and the upper pad 7.

[0048] In this embodiment, the wiring method of the metal trace 10 is as follows: one end of the metal trace 10 is connected to the upper pad 7, and the other end is provided with a via 9 close to the lower side of the substrate 200 and extends horizontally outward to exceed the edge of the LED chip array 100 and connects to the lower pad 11.

[0049] For further information, please refer to Figure 1 A first insulating layer 12 covering the metal trace 10 is further provided on the lower side of the substrate 200 , and a connection hole 18 for the metal trace 10 to pass through is provided at the connection between the first insulating layer 12 and the lower pad 11 .

[0050] In this embodiment, the material of the first insulating layer 12 includes but is not limited to silicon oxide, aluminum oxide, and silicon carbide.

[0051] Through the above technical scheme, on the one hand, the LED chip array 100, substrate 200 and TFT array 300 of the Mirco-LED display screen can be processed separately, the manufacturing process is simple, and they are independently soldered through different pads, which is conducive to rework; on the other hand, the substrate 200 adopts the Fan-out design of the double-layer PCB to realize the upper and lower side rewiring, which expands the wiring area, and the double-sided wiring of the substrate 200 is connected by the set vias 9 and the metal traces 10. Using a set of TFT arrays 300, it is possible to drive LED chip arrays 100 of various sizes and spacings, so there is no need to change the size of the TFT array 300 to adapt to LED chip arrays 100 of different sizes, thereby reducing production costs.

[0052] It is required to explain that in the traditional design, for example, the original LED chip array 100 with a size of 40μm and a spacing of 10μm needs to be adapted to the TFT array 300 with a center spacing of 50μm. In this way, different TFT arrays 300 need to be designed for LED chip arrays of different sizes and spacings, which requires constant redesign and re-opening, which is very time-consuming and labor-intensive. More importantly, the internal structure of the TFT array 300 is relatively complex, and it is often more expensive to reduce its size. However, the present application can change the restrictions on the TFT array 300 by rewiring, for example, the original LED chip array 100 with center spacings of 20, 50, and 100μm can be controlled by a TFT array 300 with a spacing of 450μm.

[0053] The Mirco-LED display screen of the embodiment of the present application has a simple manufacturing process and low cost, and reduces the spacing between LED chips while ensuring display efficiency and refresh speed, thereby enhancing display capabilities.

[0054] Figure 3 A cross-sectional schematic diagram of a Mirco-LED display screen according to Embodiment 2 of the present application is shown, Figure 3 As shown, the difference from Example 1 is that the metal trace 10 in this embodiment is arranged on the upper side of the substrate 200, the first insulating layer 12 independently covers the cathode pad 8 and the metal trace 10, and the first insulating layer 12 is opened at the connection between the cathode pad 8 and the common cathode pad 6.

[0055] In this embodiment, the wiring method of the metal trace 10 is as follows: one end of the metal trace 10 is connected to the upper pad 7, and the other end is closely attached to the upper side of the substrate 200 and horizontally extends outward beyond the edge of the LED chip array 100 and is connected to the upper pad 7 through a via 9.

[0056] In this embodiment, since the metal trace 10 is arranged on the upper side of the substrate 200 , the cathode pad 8 is also covered with a first insulating layer 12 to prevent the metal trace 10 from being short-circuited with the cathode pad 8 .

[0057] Compared with the first embodiment, the advantage of this embodiment is that the metal wiring 10 is arranged on the upper side of the substrate 200, which can avoid the short circuit between the metal wiring 10 on the substrate 200 and the inner layer circuit 14 and the surface pad 15 of the TFT.

[0058] Figure 4 A cross-sectional schematic diagram of a Mirco-LED display screen according to Embodiment 3 of the present application is shown, Figure 4 As shown, the difference from the first embodiment is that a second insulating layer 12' is provided between the cathode pad 8 and the substrate 200. In this embodiment, the second insulating layer 12' is made of the same material as the first insulating layer 12.

[0059] Compared with the first embodiment, the advantage of the present embodiment is that a second insulating layer 12' is pre-arranged below the cathode pad 8, which can avoid the problem of short circuit and cold solder joint when the substrate 200 is soldered to the LED chip on the upper side.

[0060] Figure 5 A cross-sectional schematic diagram of a Mirco-LED display screen according to Embodiment 4 of the present application is shown, Figure 5As shown, the difference from Example 1 is that circuit element areas 17 are also provided on the unwired areas at both ends of the upper side of the substrate 200, which are configured for welding requirements in various situations. The circuit element area 17 can be used to arrange the circuit elements used in the design of the Mirco-LED display screen and their required wiring.

[0061] Compared with Example 1, the advantage of this embodiment is that the unwired area of ​​the substrate 200 is effectively used to arrange circuit elements and wiring, saving wiring space, increasing the wiring area, and further improving the heat dissipation efficiency of the Micro-LED display.

[0062] According to the second aspect of the present application, based on the above-mentioned Mirco-LED display screen, a manufacturing process of a Mirco-LED display screen based on Fan-out is also proposed.

[0063] Figure 6 FIG. 1 shows a flow chart of a manufacturing process of a Micro-LED display screen according to an embodiment of the present application. Figure 6 As shown, the manufacturing process includes the following steps:

[0064] S1. An N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer are sequentially grown on a substrate of an LED chip, and a common cathode pad and an anode pad are plated on the N-type gallium nitride layer and the P-type gallium nitride layer, respectively.

[0065] In a specific embodiment, a plurality of LED chip arrays are provided, thereby forming an LED chip array with display function.

[0066] S2. Plate an upper solder pad and a cathode solder pad on the upper side of the substrate respectively, plate upper and lower solder pads on the lower side of the substrate beyond the LED chip, and at the same time, open a via hole on the substrate, use a metal trace to pass through the via hole to electrically connect the upper solder pad with the lower solder pad, and set a first insulating layer covering the metal trace on the substrate.

[0067] In a specific embodiment, the substrate adopts a double-layer PCB Fan-out design, the metal traces are arranged on the lower side of the substrate, and the metal traces are then covered by a first insulating layer.

[0068] In a preferred embodiment, a first insulating layer is firstly covered on the cathode pad, and then a metal trace is arranged on the upper side of the substrate, and then a first insulating layer is covered on the metal trace. This embodiment can avoid a short circuit between the metal trace on the substrate and the module on the lower side of the substrate.

[0069] In a preferred embodiment, a second insulating layer is further provided between the cathode pad and the upper side of the substrate. This embodiment can avoid the problem of short circuit and cold solder joint when the substrate is soldered to the LED chip on the upper side.

[0070] In a preferred embodiment, circuit element areas are also provided on the unwired areas at both ends of the upper side of the substrate. This embodiment effectively utilizes the unwired areas of the substrate to arrange circuit elements and wiring, saves wiring space, increases wiring area, and further improves the heat dissipation efficiency of the Mirco-LED display.

[0071] S3. Arrange an inner circuit on the backplane of the TFT, the inner circuit is connected to an external driving signal, and set a surface pad on the surface of the backplane corresponding to the unit connected to each driving signal.

[0072] In a specific embodiment, a plurality of TFTs are also provided to form a TFT array.

[0073] S4. Flip-chip soldering is performed on the anode pad and the common cathode pad on the LED chip respectively with the upper pad and the cathode pad of the substrate by solder balls, and face-chip soldering is performed on the lower pad on the substrate with the surface pad of the TFT by solder balls.

[0074] In a specific embodiment, the anode pad and common cathode pad of the LED chip array are flip-chip soldered to the upper pad and cathode pad on the upper side of the substrate respectively, and the surface pad on the back panel of the TFT array is face-up soldered to the lower pad on the lower side of the substrate respectively.

[0075] The present application proposes a Fan-out-based Mirco-LED display screen and its manufacturing process. The LED chip array 100, substrate 200 and TFT array 300 of the Mirco-LED display screen can be processed separately, the manufacturing process is simple, and they are independently soldered through different pads, which is conducive to rework. The substrate 200 adopts a double-layer PCB Fan-out design to achieve rewiring on the upper and lower sides, which expands the wiring area, and the double-sided wiring of the substrate 200 is connected by the set vias 9 and metal traces 10. Using a set of TFT arrays 300, it is possible to drive LED chip arrays 100 of various sizes and spacings, so there is no need to change the size of the TFT array 300 to adapt to LED chip arrays 100 of different sizes, thereby reducing production costs. By setting the circuit element area 17, the available area is increased, the wiring space is saved, and the heat dissipation efficiency is improved. The Mirco-LED display screen of the present application has the advantages of simple manufacturing process and low production cost.

[0076] Obviously, those skilled in the art can make various modifications and changes to the embodiments of the present application without departing from the spirit and scope of the present application. In this way, if these modifications and changes are within the scope of the claims of the present application and their equivalents, the present application is also intended to cover these modifications and changes. The word "comprising" does not exclude the presence of other elements or steps not listed in the claims. The simple fact that certain measures are recorded in mutually different dependent claims does not indicate that the combination of these measures cannot be used to profit. Any figure mark in the claims should not be considered to limit the scope.

Claims

1. A Fan-out based Micro-LED display screen, characterized in that: include: substrate(200); An LED chip array (100) comprising a plurality of LED chips and a TFT array (300) comprising a plurality of TFTs are respectively bonded to the upper and lower sides of the substrate (200) through solder joints on the upper and lower sides of the substrate (200); At least one metal trace (10) is arranged on the upper side and / or the lower side of the substrate (200); a via hole (9) is provided on the substrate (200) for the metal trace (10) to pass through; one end of the metal trace (10) is connected to a solder joint on the upper side of the substrate (200), and the other end extends horizontally outward to exceed the edge of the LED chip array (100) and connects to a solder joint on the lower side of the substrate (200), thereby achieving electrical conduction between the LED chip array (100) and the TFT array (300).

2. The Micro-LED display screen according to claim 1, characterized in that: The LED chip comprises a substrate (1) and a functional layer arranged on the substrate (1), wherein the functional layer is provided with an anode pad (5) and a common cathode pad (6) electrically connected to the base plate (200); An upper side pad (7) and a cathode pad (8) are provided on the upper side of the substrate (200); the upper side pad (7) is electrically connected to the anode pad (5); the cathode pad (8) is electrically connected to the common cathode pad (6) and is grounded at the same time; A lower pad (11) electrically connected to the TFT is provided on the lower side of the substrate (200), and two ends of the metal wiring (10) are respectively connected to the upper pad (7) and the lower pad (11); The TFT comprises a backplane (13) and an inner circuit (14) arranged on the backplane (13); a surface layer of the backplane (13) is provided with a surface pad (15) electrically connected to the inner circuit (14); and the surface pad (15) is electrically connected to the lower pad (11).

3. The Micro-LED display screen according to claim 2, characterized in that: The substrate (200) is also provided with a first insulating layer (12) for laying the metal wiring (10).

4. The Micro-LED display screen according to claim 3, characterized in that: The metal trace (10) is arranged on the lower side of the substrate (200), the first insulating layer (12) covers the metal trace (10), and a connection hole (18) for the metal trace (10) to pass through is provided at the connection between the first insulating layer (12) and the lower pad (11).

5. The Micro-LED display screen according to claim 3, characterized in that: The metal trace (10) is arranged on the upper side of the substrate (200), the first insulating layer (12) independently covers the cathode pad (8) and the metal trace (10), and the first insulating layer (12) is provided with an opening at the connection between the cathode pad (8) and the common cathode pad (6).

6. The Micro-LED display screen according to claim 2, characterized in that: A second insulating layer (12') is provided between the cathode pad (8) and the substrate (200).

7. The Micro-LED display screen according to claim 1, characterized in that: The substrate (200) is also provided with a circuit element area (17) configured for arranging circuit elements and wiring.

8. The Micro-LED display screen according to claim 2, characterized in that: The functional layer comprises, from top to bottom, an N-type gallium nitride layer (2), a multi-quantum well layer (3) and a P-type gallium nitride layer (4); the common cathode pad (6) is arranged on the N-type gallium nitride layer (2); and the anode pad (5) is arranged on the P-type gallium nitride layer (4).

9. The Micro-LED display screen according to claim 2, characterized in that: The anode pad (5) and the upper pad (7), the common cathode pad (6) and the cathode pad (8), the lower pad (11) and the surface pad (15) are all electrically connected via solder balls (16).

10. A manufacturing process of a Micro-LED display screen according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1. Growing an N-type gallium nitride layer, a multi-quantum well layer and a P-type gallium nitride layer in sequence on a substrate of an LED chip, and coating a common cathode pad and an anode pad on the N-type gallium nitride layer and the P-type gallium nitride layer, respectively; S2, respectively plating an upper solder pad and a cathode solder pad on the upper side of the substrate, plating an upper solder pad on the lower side of the substrate at a position beyond the LED chip, and simultaneously opening a via hole on the substrate, electrically connecting the upper solder pad with the lower solder pad by passing a metal trace through the via hole, and providing a first insulating layer covering the metal trace on the substrate; S3, arranging an inner circuit on the backplane of the TFT, wherein the inner circuit is connected to an external driving signal, and providing a surface pad on the surface of the backplane corresponding to each unit connected to the driving signal; S4. Flip-chip soldering the anode pad and the common cathode pad on the LED chip to the upper pad and cathode pad of the substrate respectively through solder balls, and face-chip soldering the lower pad on the substrate to the surface pad of the TFT through solder balls.

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