Gate drive circuit

Abstract

The present application provides a kind of gate drive circuit, including the active clamping circuit of the collector-emitter of IGBT, inhibits the heat dissipation of constant voltage diode, and the generation of noise is also small.Gate drive circuit includes: clamping circuit, the voltage between the collector (hereinafter referred to as C) - emitter (hereinafter referred to as E) of power semiconductor element is clamped, the clamping circuit has: constant voltage diode (hereinafter referred to as D), is connected to C;Impedance circuit, between the other end of constant voltage D and negative power supply;First acquisition circuit, one end is connected to the junction of constant voltage D and impedance circuit, includes first switch (hereinafter referred to as SW) and first resistance;Second acquisition circuit, including second SW and second resistance which are also connected;And detection circuit, in the case where the rate of change of C voltage exceeds threshold value, output SW open signal, and second SW changes from on state to non-conductive state if receiving SW open signal.

Description

TECHNICAL FIELD

[0001] The present application relates to a gate drive circuit for protecting a power semiconductor switch such as an Insulated Gate Bipolar Transistor (IGBT) module. In particular, the present application relates to protection of collector-emitter voltage of an IGBT. BACKGROUND

[0002] BACKGROUND

[0003] The present application relates to a driving technique of a large power semiconductor switch represented by an IGBT. A semiconductor switch such as an IGBT switches a large current of several hundred to several thousand amperes (A) and a high voltage of several hundred to one thousand volts (V) or more, and thus if the semiconductor switch such as an IGBT is destroyed, the influence is large and extends to the surroundings of the semiconductor switch. That is, not only the IGBT itself but also the control circuit in the surroundings thereof is destroyed, and a failure of the entire system circuit can be caused.

[0004] Therefore, in order to protect the semiconductor switch such as an IGBT from being destroyed, various protection methods are being adopted. For a semiconductor, a maximum rating is specified with respect to current, voltage, power, and temperature, and if these maximum rating values are exceeded for an instant, the semiconductor switch can be destroyed.

[0005] The present application relates to a technique for using a collector-emitter voltage within a maximum rating of a semiconductor switch such as an IGBT within the maximum rating.

[0006] PRIOR ART PROTECTION METHOD

[0007] In a case where a semiconductor switch such as an IGBT is repeatedly turned on (ON) and turned off (OFF), when the IGBT is in a saturated state, a current flowing at a collector terminal of the IGBT accumulates electromagnetic energy in an inductance component of a wiring or a load connected to the collector terminal of the IGBT. Then, if the IGBT is turned off, the accumulated electromagnetic energy is generated as a surge voltage between the collector and the emitter of the IGBT. The surge voltage Es is represented by the following equation (1A) when the inductance component of the wiring or the load is set to L and the current flowing at the collector terminal is set to I(t).

[0008] [Equation 1A]

[0009]

[0010] The higher the inductance value and the greater the rate of change of current, the higher the surge voltage Es becomes. If the surge voltage Es exceeds the maximum rating of the IGBT, it will damage the IGBT. Therefore, in order to suppress the surge voltage Es to below the maximum rating, measures need to be taken to reduce the surge voltage Es before it exceeds the maximum rating.

[0011] Traditionally, as a method to reduce the surge voltage Es, the following methods have been used. Figure 6 The snubber circuit shown is an example of a snubber circuit. A control signal output from a drive circuit (not shown) is supplied to the gate terminal of IGBT 10 to control the ON / OFF state of IGBT 10. A load 12 is connected between the collector terminal of IGBT 10 and the high-voltage power system; the power supplied to the load 12 is controlled by the ON / OFF state of IGBT 10. The snubber circuit 14 is constructed by connecting a capacitor Cs and a resistor Rs in parallel and a diode Ds in series (see reference). Figure 6 The absorption circuit 14 is connected between the high-voltage power system and the collector terminal of the IGBT 10.

[0012] Figure 6 The absorption circuit 14 shown is a typical circuit as follows: a portion of the surge voltage Es is stored in the capacitor Cs via the diode Ds, and then dissipated as heat through the resistor Rs, thereby reducing the surge voltage Es.

[0013] Furthermore, a method known as active clamping has recently been employed. The principle of this method is illustrated in the diagram below. Figure 7 . Figure 7 In, also with Figure 6 Similarly, a load 12 is provided between the collector terminal of the IGBT 10 and the high-voltage power system. Additionally, an active clamping circuit 16 is connected between the collector terminal and the gate terminal of the IGBT 10. The active clamping circuit 16 is a series circuit of diode D1, Zener diode Dz, and limiting resistor Rz. Furthermore, the Zener diode Dz can also be a structure in which multiple Zener diodes are connected in series (see reference). Figure 7 ).

[0014] This method works as follows: when the collector-emitter voltage of IGBT10 exceeds the Zener voltage of the constant voltage diode Dz, the constant voltage diode Dz turns on, and its conduction current flows into the gate terminal of IGBT10 through the limiting resistor Rz. This effectively mitigates the turn-off operation of IGBT10.

[0015] If the turn-off operation is moderated, the rate of decrease of the collector current decreases, and the surge voltage Es goes in the direction of decrease according to the equation (1A). Also, the voltage between the collector and the emitter is clamped by the conduction of the constant voltage diode Dz, and does not become higher than the Zener voltage of the constant voltage diode Dz. By combining these effects, it is possible to use the voltage between the collector and the emitter of the IGBT 10 within the maximum rating.

[0016] Prior Art

[0017] For example, Patent Literature 1 (Japanese Patent No. 4230190) described later discloses a conventional active clamp circuit. In particular, it discloses a technology of detecting a short-circuit failure of any constant voltage element in the case where a plurality of constant voltage elements are connected in series to configure a protection circuit.

[0018] Prior Art Documents

[0019] Patent Literature

[0020] Patent Literature 1: Japanese Patent No. 4230190 SUMMARY

[0021] Problems to be Solved by the Invention

[0022] However, the conventional method has the following problems.

[0023] Use Figure 6 In the method using the snubber circuit, the energy of the generated surge voltage Es is not directly decreased, but is consumed in the snubber circuit (i.e., by the resistor Rs), and thus there is a possibility that the heat dissipation of the resistor Rs of the snubber circuit becomes a problem. Also, in the diode Ds of the snubber circuit, a sharp current flows in association with the ON / OFF of the IGBT. Therefore, there is a possibility that the diode Ds also becomes a source of generation of noise.

[0024] Also, Figure 7 In the active clamp method shown in FIG. 1, there is a possibility that the heat dissipation of the constant voltage diode Dz becomes a problem due to the same reason as the snubber circuit.

[0025] Also, if the constant voltage diode Dz flows an excessive current due to an internal resistance component, there is a possibility that the clamping level deviates accordingly. In order to cope with this situation, it is conceivable to set the Zener voltage low, but if the Zener voltage is set low, there is a problem that the voltage applicable to the IGBT decreases, and the like. Therefore, there is a design problem that it is necessary to increase the withstand voltage of the IGBT in order to satisfy the required specifications of the circuit.

[0026] The present invention addresses the problems of heat dissipation and noise generation, and aims to provide a gate drive circuit for an IGBT, including an active clamping circuit that can protect the collector-emitter junction of the IGBT, further suppressing the heat dissipation of the constant voltage diode, and generating less noise.

[0027] Technical means to solve the problem

[0028] (1) To solve the aforementioned problem, the present invention provides a gate driving circuit for driving a power semiconductor element, comprising: an active clamping circuit, which clamps the collector-emitter voltage of the power semiconductor element to the predetermined voltage when the power semiconductor element is turned off, and supplies a predetermined current to the gate terminal of the power semiconductor element; the active clamping circuit having: a constant voltage diode, one end of which is connected to the collector terminal of the power semiconductor element; an impedance circuit connected between the other end of the constant voltage diode and a negative power supply; an output terminal connected to the connection point of the constant voltage diode and the impedance circuit, and connected to the gate terminal of the power semiconductor element; and a first latching circuit comprising: a series circuit of a first switch and a first resistor, one end of which is connected to the connection point of the constant voltage diode and the impedance circuit, and the other end of which is connected to the first resistor. A first circuit is connected to a negative power supply and is used to extract charge from the gate terminal of the power semiconductor element based on an external on / off signal when the power semiconductor element is turned off; a second extraction circuit includes: a series circuit of a second switch and a second resistor, one end of which is connected to the junction of the constant voltage diode and the impedance circuit, and the other end is connected to the negative power supply, used to extract charge from the gate terminal of the power semiconductor element based on the on / off signal when the power semiconductor element is turned off; and a detection circuit that calculates the rate of change of the collector voltage of the power semiconductor element based on the voltage at the junction of the constant voltage diode and the impedance circuit, and outputs a switch-on signal when the rate of change exceeds a predetermined threshold. If the second switch receives the switch-on signal, it changes from a conducting state to a non-conducting state, thereby increasing the resistance value used to extract the gate charge of the power semiconductor element, easing the turn-off of the power semiconductor element and extracting the gate charge.

[0029] (2) Moreover, the present invention is the gate drive circuit described in (1), wherein the active clamping circuit is an active clamping circuit that clamps the collector-emitter voltage at the voltage when the surge voltage generated when the power semiconductor switching element is turned off is the maximum rated voltage of the collector-emitter voltage of the power semiconductor switching element IGBT or a voltage near it, and simultaneously supplies current to its own gate, thereby reducing the surge voltage and preventing voltage damage.

[0030] (3) Moreover, the present invention is the gate drive circuit described in (1) or (2), wherein the constant voltage diode has a parallel capacitance parasitic on the constant voltage diode, and the impedance circuit includes at least a parallel circuit of a resistor and a capacitor.

[0031] (4) Furthermore, the present invention is a gate driving circuit described in any one of (1) to (3), wherein it includes n-1 types of n-th acquisition circuits from the second acquisition circuit to the nth acquisition circuit, and n-1 types of n-th detection circuits from the second detection circuit to the nth detection circuit, wherein n is a natural number of 3 or more, the nth acquisition circuit includes: a series circuit of the nth switch and the nth resistor, connected to the connection point of the constant voltage diode and the impedance circuit, for acquiring charge from the gate terminal of the power semiconductor element based on the on / off signal when the power semiconductor element is turned off, the nth detection circuit calculates the rate of change of the collector voltage of the power semiconductor element based on the voltage at the connection point of the constant voltage diode and the impedance circuit, and outputs the nth switch on signal when the rate of change exceeds a predetermined nth threshold.

[0032] If the nth switch receives the nth switch on signal, it changes from the on state to the off state, thereby increasing the resistance value used to seize the gate charge of the power semiconductor element, easing the turn-off of the power semiconductor element and seizing the gate charge.

[0033] The effects of the invention

[0034] According to the present invention, a gate driving circuit can be provided to drive IGBTs with low heat generation and low noise. Attached Figure Description

[0035] Figure 1 This is a circuit diagram of the gate drive circuit in Embodiment 1.

[0036] Figure 2 This is an equivalent circuit obtained by approximating the circuit part that includes a constant voltage diode ZD1, a resistor R4, and an impedance circuit Z1.

[0037] Figure 3 This is a circuit diagram of the gate drive circuit in Embodiment 2.

[0038] Figure 4 This is a circuit diagram of the gate drive circuit in a specific embodiment.

[0039] Figure 5 A graph representing experimental data from experiments conducted on a specific embodiment.

[0040] Figure 6 This is an example of a conventional absorption circuit diagram.

[0041] Figure 7 This is an example of a conventional active clamping circuit diagram.

[0042] [Explanation of Symbols]

[0043] 10, 106: IGBT

[0044] 12. ZL104: Load

[0045] 14: Absorption Circuit

[0046] 16: Active clamping circuit

[0047] 100, 200, 300: Gate drive circuit

[0048] 102, 202, 302: Predictive active clamping circuits

[0049] 102a, 202a, 302a: Output terminals

[0050] 102b, 202b, 302b: Detection terminals

[0051] Cd: Capacitor

[0052] Cs: Capacitor

[0053] Cz: Parallel capacitor

[0054] D1, D2, D3, Ds: Diodes

[0055] Dz, ZD1~ZD6: Constant voltage diodes

[0056] DET2, DET3: Detection Circuit

[0057] IN1, IN2, IN3: Input terminals

[0058] R1, R2, R3, R4, R5, R6, R7: Resistors

[0059] Rd: Resistance

[0060] Rs: Resistance

[0061] Rz: Limiting resistor

[0062] SW1, SW2, SW3: Switches

[0063] V1: Inter-terminal voltage

[0064] Vee: Negative power source

[0065] Vz: Ideal constant voltage diode

[0066] Z1, Z2: Impedance circuit

[0067] ZD1: Constant voltage diode Detailed Implementation

[0068] Hereinafter, suitable embodiments of the present invention will be described with reference to the accompanying drawings.

[0069] 1. Embodiment 1

[0070] Figure 1 The diagram shows a circuit diagram illustrating the characteristic structure of the gate drive circuit 100 of this embodiment. The gate drive circuit 100 of this embodiment includes a predictive active clamp circuit 102. In addition to this, the gate drive circuit 100 may also include a driver semiconductor element or a power supply circuit for driving the gate, but these structures are the same as conventional, and therefore... Figure 1 The text is omitted and not illustrated.

[0071] The load ZL104 is a load driving the IGBT106 and is located between the power line and the collector terminal of the IGBT106. The IGBT106 is the IGBT106 that is driven by the gate drive circuit 100, and a control signal from the gate drive circuit 100 is supplied to its gate terminal. Furthermore, the load ZL104 and the IGBT106 (as the driven object) are not included in the structure of the gate drive circuit 100.

[0072] Here, IGBT is a suitable example of the power semiconductor element claimed in the claims.

[0073] like Figure 1 As shown, the characteristic structure in this embodiment is a predictive active clamp circuit 102. This predictive active clamp circuit adds a circuit to the conventional active clamp circuit that opens the gate grabbing circuit (SW) based on the rise rate between the collector and emitter. A control signal is supplied to the gate terminal of the IGBT 106 from the output terminal 102a of the active clamp circuit 102. Furthermore, the detection terminal 102b of the active clamp circuit 102 is connected to the collector terminal of the IGBT 106.

[0074] At detection terminal 102b, the anode terminal of diode D1, which prevents reverse current flow, is connected. The cathode terminal of diode D1 is connected to the cathode terminal of constant voltage diode ZD1. The anode terminal of constant voltage diode ZD1 is connected to impedance circuit Z1 via resistor R4 (see reference). Figure 1 Furthermore, the other end of the impedance circuit Z1 is connected to the negative power supply Vee.

[0075] Furthermore, the constant voltage diode ZD1 can be composed of an ideal constant voltage diode VZ exhibiting constant voltage characteristics, and a parallel capacitance Cz existing between its two terminals. Figure 1 The equivalent circuit shown is represented as shown.

[0076] Here, the predictive active clamping circuit 102 corresponds to a suitable example of the active clamping circuit of the claim. Furthermore, the constant voltage diode ZD1 corresponds to a suitable example of the constant voltage diode of the claim. The parallel capacitor Cz of the constant voltage diode ZD1 corresponds to a suitable example of the parallel capacitor of the claim. In this embodiment, a parasitic parallel capacitor Cz is used considering component cost or mounting area, but a separate capacitor may also be connected in parallel with the constant voltage diode Vz. (The following will be discussed...) Figure 4 The same applies to the parallel capacitor Cz. In this case, the capacitor is also a suitable example of the parallel capacitor claimed in the claim.

[0077] Furthermore, impedance circuit Z1 corresponds to a suitable example of the impedance circuit of the claim. Output terminal 102a (and 202a, 302a described below) corresponds to a suitable example of the output terminal of the claim.

[0078] Switches SW1 and SW2 are used to extract the gate charge of the IGBT106.

[0079] The series circuit of switch SW1 and resistor R1 is connected between the gate terminal of IGBT106 and the negative power supply Vee. When switch SW1 is closed (ON), resistor R1 is connected to the negative power supply Vee, discharging the gate charge of IGBT106.

[0080] The series circuit of switch SW1 and resistor R1 corresponds to a suitable example of the first switching circuit of claim 1. Switch SW1 corresponds to a suitable example of the first switch of claim 1. Resistor R1 corresponds to a suitable example of the first resistor of claim 1.

[0081] Similarly, the series circuit of switch SW2 and resistor R2 is connected between the gate terminal of IGBT106 and the negative power supply Vee. If switch SW2 is closed (ON), resistor R2 is connected to the negative power supply Vee, discharging the gate charge of IGBT106.

[0082] The series circuit of switch SW2 and resistor R2 corresponds to a suitable example of the second switching circuit of claim 1. Switch SW2 corresponds to a suitable example of the second switching circuit of claim 2. Resistor R2 corresponds to a suitable example of the second resistor of claim 2.

[0083] The opening and closing of switches SW1 and SW2 are, in principle, controlled by on / off signals, which originate from a specified control circuit (not shown in the diagram). When IGBT 106 is turned off, the control circuit sends a closed (ON) on / off signal to switches SW1 and SW2, closing both switches (ON). Furthermore, in this text, a low on / off signal represents "on," and a high on / off signal represents "closed," but this can be reversed depending on the polarity (P-channel, N-channel) of the switching element used.

[0084] and, Figure 1 In the diagram, impedance circuit Z2 is the gate termination impedance circuit of IGBT106.

[0085] At the connection point of resistor R4 and impedance circuit Z1, the anode terminal of diode D2 is connected. Additionally, the cathode terminal of diode D2 is connected to output terminal 102. That is, the terminal of resistor R1 opposite to switch SW1 is connected to the anode terminal of diode D2. Similarly, the terminal of resistor R2 opposite to switch SW2 is also connected to the anode terminal of diode D2 (see reference). Figure 1 The diode D2, like the diode D1, is a diode designed to prevent reverse current flow.

[0086] The detection circuit DET2 is a detection circuit that monitors the voltage (terminal voltage) generated in the impedance circuit Z1. When the terminal voltage of the impedance circuit Z1 is higher than a preset threshold (a positive specified value), the detection circuit DET2 supplies an SW2 open signal to switch SW2, regardless of the open / close signal from the control circuit. When switch SW2 receives the SW2 open signal indicating that switch SW2 should be opened, it sets the switch to the open (off) state, regardless of the value of the open / close signal from the control circuit.

[0087] The resistor R4 connected between the anode terminal of the constant voltage diode ZD1 and the impedance circuit Z1 is a limiting resistor, which limits the current flowing into the gate terminal of the IGBT106 when the collector voltage of the IGBT106 rises and the constant voltage diode ZD1 is turned on.

[0088] Here, the detection circuit DET2 corresponds to a suitable example of the detection circuit of the claim. The SW2 on signal corresponds to a suitable example of the switch on signal of the claim.

[0089] To turn off the IGBT106, the control circuit sends on / off signals to switches SW1 and SW2. If both switches are closed (ON), the gate charge of the IGBT106 is removed through the combined resistance value of resistors R1 and R2 (R1R2 / (R1+R2)). In the formula for the combined resistance value, R1 and R2 represent the resistance values ​​of resistors R1 and R2, respectively.

[0090] Thus, if the gate charge of IGBT106 is taken away, IGBT106 will turn off. As a result, the collector current of IGBT106 decreases sharply, and the collector voltage of IGBT106 begins to rise according to equation (3) described later. It can be assumed that if the load ZL of IGBT106 is a constant value, the rate of increase of the collector voltage of IGBT106 is approximately proportional to the rate of decrease of the collector current.

[0091] Impedance circuit Z1 provides impedance for measuring the rate of rise of the collector voltage of IGBT 106. This impedance circuit Z1 can be assumed, for example, to be a parallel circuit of resistor Rd and capacitor Cd. Furthermore, the mechanism for measuring the rate of rise can be as follows: Figure 2 That's simple and equivalent. Figure 2 Indicates to Figure 1 The equivalent circuit is obtained by approximating the circuit part of the predictive active clamping circuit 102, which includes a constant voltage diode ZD1, a resistor R4, and an impedance circuit Z1.

[0092] like Figure 2 As shown, the constant voltage diode ZD1 in the non-conducting state is as follows: Figure 2 As shown, it can be approximated by capacitor Cz. Moreover, when resistor R4 is a sufficiently small value, it can be omitted. Furthermore, the impedance circuit Z1, as described above, can be approximated by a parallel circuit of resistor Rd and capacitor Cd.

[0093] The result of this approximation is that Figure 2 The impedance circuit shown has a voltage between the terminals of Z1. Figure 2 In this context, the voltage can be represented by V1, i.e., the connection point between the impedance circuit Z1 and the constant voltage diode ZD1. The detection circuit DET2 can detect the voltage between the terminals based on V1 and the negative power supply Vee. This approximate result is the rate of rise of the collector voltage VCE(t) of the IGBT106.

[0094] [Number 1B]

[0095]

[0096] The relationship between the voltage V1 between the terminals of the impedance circuit Z1 is expressed by the following equation (2).

[0097] [Number 2]

[0098]

[0099] Here, t represents time. Furthermore, when t < Rd(Cz+Cd), V1 is almost equal to "0", and the detection circuit DET2 does not operate. This is because the threshold voltage of the detection circuit DET2 is a positive voltage value, so a voltage of approximately 0V does not exceed the threshold. That is, by adjusting the value of Rd(Cz+Cd), short-pulse noise can be removed. Specifically, during the period t ≥ Rd(Cz+Cd), the inter-terminal voltage V1 is expressed by the following equation (3A), where the inter-terminal voltage V1 of the impedance circuit Z1 becomes a value proportional to the rate of rise of the collector voltage VCE(t).

[0100] [Math 3A]

[0101]

[0102] A high value of the inter-terminal voltage V1 of the impedance circuit Z1 means a large reduction rate of the collector current of the IGBT106. That is, it means that the amount of gate charge absorbed by the IGBT106 is too large.

[0103] If the collector current decreases too rapidly, the collector voltage VCE(t) will rise rapidly. The value of the inter-terminal voltage V1, which is predicted to eventually exceed the maximum rated value of the IGBT106, can be calculated in advance. A characteristic feature of this embodiment 1 is that the predicted value is preset as the threshold value of the inter-terminal voltage V1 as the limit value of the detection circuit DET2.

[0104] If a threshold is preset for the detection circuit DET2 in this way, when the limit value is reached, the detection circuit DET2 will operate (detecting that the voltage V1 between terminals exceeds the threshold) and output a SW on signal. Switch SW2 receives the SW on signal and becomes on (off), which can change the value of the gate charge extraction resistance of IGBT106 from (R1R2 / (R1+R2)) to R1. That is, the value of the extraction resistance can be increased.

[0105] Through this action, the combined resistance value of the resistance value used for gate charge extraction increases, the amount of gate charge extracted by IGBT106 decreases, and the surge voltage decreases according to the formula (3A).

[0106] also, Figure 1In the example shown, resistors R1 and R2 are equivalently connected in parallel, but they can also be connected in series. In this case, it can also be configured as follows: one end of the series circuit of resistors R1 and R2 is connected to the output terminal 102a, and the other end is connected to a switch SW1 between it and Vee. A switch SW2 is connected between the connection point of resistors R1 and R2 and Vee. The combined resistance value can be adjusted by switching the switches.

[0107] By appropriately selecting the limiting value of the inter-terminal voltage V1 of the impedance circuit Z1, the Zener diode ZD1 is prevented from conducting due to surge voltage, thus protecting the IGBT106. Even if the Zener diode ZD1 conducts, its on-current value or conduction time can be reduced, thereby suppressing heat generation. Furthermore, it can mitigate the sharp rise in the collector voltage VCE(t) or the sharp decrease in the collector current of the IGBT106, thus also contributing to the reduction of noise associated with these events.

[0108] 2. Embodiment 2

[0109] In Implementation 2, an example with two detection circuits DET is described.

[0110] In Embodiment 1, an example was described where the resistance value for gate charge extraction was varied by setting up a detection circuit DET2. Regarding the detection circuit DET, it can be considered that if multiple detection circuits DET with different threshold values ​​are set up, more precise control can be achieved.

[0111] Therefore, the following circuit example will be described in this Embodiment 2: in addition to the circuit described in Embodiment 1. Figure 1 In addition to the detection circuit DET2, a detection circuit DET3 is also provided. Figure 3 The diagram shows a circuit including detection circuit DET2 and detection circuit DET3.

[0112] The Figure 3 Specifically, the circuit example shown is an example of the circuit described in Implementation 1. Figure 1 The circuit adds a detection circuit DET3, a switch SW3, and a resistor R3; other structures are the same as... Figure 1 Exactly the same.

[0113] Like switches SW1 and 2, switch SW3 is a switch used to seize the gate charge of IGBT106. Like switches SW1, it is a switch that performs opening and closing actions based on opening and closing signals from a control circuit (not shown).

[0114] The series circuit of switch SW3 and resistor R3 is connected between the gate terminal of IGBT106 and the negative power supply Vee. When switch SW3 is closed (ON), resistor R3 is connected to the negative power supply Vee, discharging the gate charge of IGBT106. This operation is the same as that of switches SW1 and SW2 described so far.

[0115] Resistor R3 is used to discharge the gate charge and has the same basic function as resistors R1 and R2.

[0116] The series circuit of switch SW3 and resistor R3 corresponds to a suitable example of the nth switching circuit of claim (in the case of n=3). Switch SW3 corresponds to a suitable example of the nth switch of claim (in the case of n=3). Resistor R3 corresponds to a suitable example of the nth resistor of claim (in the case of n=3).

[0117] The detection circuit DET3 is the same as the detection circuit DET2, except that the threshold value is different, as will be described later.

[0118] The detection circuit DET3 also detects the voltage V1 between the terminals of the impedance circuit Z1. If the voltage V1 exceeds a preset threshold, it outputs an SW-on signal. If switch SW3 receives the SW3-on signal, which indicates that switch SW3 is in the on state, it becomes on, disconnecting resistor R3 from the negative power supply Vee. Thus, detection circuit DET3 is the same as detection circuit DET2, except for the threshold value.

[0119] The detection circuit DET3 corresponds to a suitable example of the nth detection circuit of claim (in the case of n=3). The SW3 on signal corresponds to a suitable example of the nth switch on signal of claim.

[0120] Similar to Implementation 1, in order to turn off IGBT 106, an on / off signal is sent from the control circuit to switches SW1 and SW2, and also to switch SW3, causing all switches to close. Switch SW3 also changes to the ON state (closed).

[0121] In this state, the gate charge of the IGBT106 is captured by the combined resistance value of resistors R1, R2, and R3 (1 / ((1 / R1)+(1 / R2)+(1 / R3))). In the formula for the combined resistance value, R1, R2, and R3 represent the resistance values ​​of resistors R1, R2, and R3, respectively.

[0122] Thus, if the gate charge of IGBT106 is stripped, IGBT106 begins to turn off, and the collector current of IGBT106 decreases sharply. As a result, as described above, the collector voltage of IGBT106 begins to rise according to the aforementioned equation (3A). It can be assumed that if the load ZL104 of IGBT106 is a constant value, the rate of increase of the collector voltage of IGBT106 is approximately proportional to the rate of decrease of the collector current.

[0123] Furthermore, as explained above, the inter-terminal voltage V1 of the impedance circuit Z1 becomes a value proportional to the rate of rise of the collector voltage VCE(t). Therefore, if the rate of decrease of the collector current is too large, the result is a high rate of rise of the collector voltage VCE(t), and the value of the inter-terminal voltage V1 that can be predicted to eventually exceed the maximum rated value of the IGBT106 can be calculated in advance.

[0124] In order to prevent exceeding the maximum value, it is preferable to pre-set a threshold value for the detection circuit DET2 that is smaller than the predicted value of the inter-terminal voltage V1.

[0125] On the other hand, if the rate of rise of the collector voltage VCE(t) is high, it may be necessary to further increase the value of the gate charge extraction resistor.

[0126] Therefore, if a voltage greater than the predicted inter-terminal voltage V1 is preset as the threshold of the detection circuit DET3, the resistance value can be further increased if the value of the resistance used to capture the gate charge cannot be sufficiently increased when the resistor R2 is separated by the detection circuit DET2 alone.

[0127] In this second embodiment, a slightly smaller threshold is set for the detection circuit DET2 to separate the resistor R2 as early as possible and increase the value of the resistor used to capture the gate charge as early as possible.

[0128] Furthermore, a slightly larger threshold is set for the detection circuit DET3. When the rate of rise of the collector voltage VCE(t) is very high, resistor R3 is also separated in addition to resistor R2. As a result, the resistor used for gate charge extraction becomes only R1, and the value of the resistor used for gate charge extraction can be further increased.

[0129] also, Figure 3In the example shown, resistors R1, R2, and R3 are connected in parallel from an equivalent perspective, but they can also be connected in series. In this case, it can also be configured as follows: one end of the series circuit of resistors R1, R2, and R3 is connected to output terminal 202a, and switch SW1 is connected between the other end and Vee. Switch SW2 is connected between the connection point of resistors R1 and R2 and Vee, and switch SW3 is connected between the connection point of resistors R2 and R3 and Vee. The combined resistance value can be adjusted by switching the switches.

[0130] The description in this embodiment 2 Figure 3 The predictive active clamping circuit 202 of the gate drive circuit 200 thus includes two detection circuits, and therefore is similar to that of Embodiment 1. Figure 1 Compared to conventional circuits, it can perform more precise control. 3. Specific Examples

[0132] Figure 4 The diagram shows a specific gate drive circuit 300 including a predictive active clamp circuit 302. The actual gate drive circuit 300, in addition to... Figure 4 In addition to the predictive active clamping circuit 302, it also includes various circuits such as power supply circuits or driver elements.

[0133] and Figure 1 , Figure 3 Similarly, the active clamping circuit 302, which is the portion surrounded by solid lines, has its output terminal 302a connected to the gate terminal of the IGBT 106, which is the object being driven. Furthermore, the load 104 and... Figure 1 , Figure 3 Similarly, the IGBT106 is connected to the power line, and the power supply is controlled by the IGBT106. The active clamping circuit 302 is provided with a detection terminal 302b, which is connected to the collector terminal of the IGBT106.

[0134] Figure 4 In this context, Vee, as explained so far, is the negative power supply for the gate drive circuit 300, and Vdc is the positive power supply.

[0135] The gate drive circuit 300 is provided with three input terminals IN1, IN2 and IN3.

[0136] At input terminals IN1 (and IN2, IN3), on / off signals are input from the external control circuit. When the on / off signal input to input terminals IN1 (and IN2, IN3) is low, transistor Q4 is turned on, and IGBT106 is turned on. Conversely, when the on / off signal input to input terminals IN2, IN3 (and IN1) is high, transistors Q2 and Q3 are turned on, and IGBT106 is turned off.

[0137] In this embodiment, the opening and closing signals applied to IN1, IN2 and IN3 are set to be in phase. However, depending on the polarity of the switching element used, the polarity of the opening and closing signals applied to IN2 and IN3 may be set to be opposite to that applied to IN1.

[0138] If the on / off signal input to input terminals IN1 (and IN2, IN3) goes low, transistor Q4 is turned on, supplying current from Vdc through resistor R7 to the gate terminal of IGBT106 connected to output terminal 302a. As a result, IGBT106 is turned on.

[0139] Transistor Q4 is the high-side switch of the gate drive circuit 300, but the Figure 1 , Figure 3 The text is omitted and not illustrated.

[0140] On the other hand, if the control signals input to the input terminals IN2, IN3 (and IN1) become high, transistor Q4 is turned off, and transistors Q2 and Q3 are turned on, drawing gate charge from the IGBT106 through resistors R5 and R6. As a result, the IGBT106 is turned off.

[0141] Furthermore, transistor Q2 is equivalent to Figure 1 ( Figure 3 Switch SW2, transistor Q3 is equivalent to Figure 1 ( Figure 3 The switch SW1. Furthermore, Figure 4 The resistor R4 is equivalent to Figure 1 The impedance circuit Z1 is used for current detection. Additionally... Figure 4 ZD1 to ZD6 are equivalent to Figure 1 The constant voltage diode ZD1 is a diode. Furthermore, Figure 4 Cz is equivalent to Figure 1 The parallel capacitor Cz.

[0142] and, Figure 4 The transistor Q1 is equivalent toFigure 1 In the detection circuit DET2, the gate-source threshold voltage VQITH of transistor Q1 is equivalent to its threshold voltage. If transistor Q1 is turned on, transistor Q2 is turned off regardless of the signal state of the control signal input to input terminal IN3.

[0143] That is, if the voltage across the terminals of resistor R4 reaches the critical voltage VQITH, transistor Q1 will turn on. If transistor Q1 is on, then transistor Q2 will turn off. In other words, the switch SW2 is effectively off (not conducting). Therefore, the circuit that draws charge from the gate of IGBT106 becomes a series circuit consisting only of resistor R6 and transistor Q3, thus stabilizing charge draw and reducing the surge voltage generated at the collector terminals of IGBT106.

[0144] Resistor R3 is used to adjust the ratio of the novel effect of this embodiment to the effect of conventional active clamping circuits. Conventional active clamping circuits involve allowing the current from the constant voltage diode ZD1 to flow directly into the gate terminal of the IGBT106.

[0145] Here, the novel effects of this embodiment mean the following effects, etc.

[0146] • As the combined resistance value of the resistor used for gate charge extraction increases, the amount of gate charge extracted by the IGBT106 decreases, and the surge voltage decreases according to equation (3A).

[0147] • It can suppress the heat dissipation of the constant voltage diode ZD1.

[0148] • It can mitigate the sharp decrease in collector current, thereby achieving the accompanying noise reduction.

[0149] Moreover, the so-called effect of previous active clamping circuit methods is...

[0150] • Reduction of surge voltage.

[0151] If the value of resistor R3 is increased, the detection sensitivity of collector voltage VCE(t) decreases, and therefore the effect of conventional active clamping circuits becomes greater. Conversely, if the value of resistor R3 is decreased, the detection sensitivity of collector voltage VCE(t) increases, and the characteristic effect (novel effect) of this embodiment can be obtained relatively more than that of conventional methods.

[0152] Diode D3 is used to extract the gate charge of transistor Q1.

[0153] The rate of rise of the collector voltage VCE(t) of IGBT106 is expressed by the following equation (3B).

[0154] [Number 3B]

[0155]

[0156] Therefore, if we take Figure 4 The parameters of this embodiment are represented as shown in equation (4) below.

[0157] [Number 4]

[0158]

[0159] Here, Rt is represented by the following equation (5).

[0160] Rt=R1+R3+R4 (5)

[0161] Next, Figure 4 The circuit operation waveform is shown in Figure 5 . Figure 5 In the chart, the horizontal axis represents time, and the vertical axis represents various signals.

[0162] As explained so far, the opening and closing signals are signals output from an external control circuit, used to open and close switches SW1 and SW2. These signals are supplied to... Figure 4 The input terminals IN2, IN3 and IN1.

[0163] SW1 is a signal indicating the open / closed state of switch SW1. A low signal indicates an open (non-conducting) state, and a high signal indicates a conducting state. Similarly, SW2 is a signal indicating the open / closed state of switch SW2. A low signal indicates an open (non-conducting) state, and a high signal indicates a conducting state.

[0164] Vge represents the gate voltage of IGBT106. Furthermore, VCE represents the collector voltage VCE(t) of IGBT106. And Ic represents the collector current of IGBT106.

[0165] The diagram illustrates the action when the on / off signal changes from low to high. At this time, IGBT106 changes from the ON state to the OFF state, and switches SW1 and SW2 essentially change from the open state (non-conducting state) to the closed state (conducting state).

[0166] First, if the on / off signal changes from low to high, transistor Q4 turns off and becomes non-conductive. Simultaneously, switches SW1 and SW2 turn on, starting to acquire gate charge. Thus, IGBT106 begins its transition from the on state to the off state.

[0167] As switches SW1 and SW2 seize the gate charge, the IGBT begins to transition to a non-conducting state. As a result, the collector voltage VCE begins to rise. Figure 5 In the chart, the upward slope is represented as "slope 1".

[0168] In this embodiment, by observing the slope 1, the timing of noise generation or heat release is predicted, and transistor Q1 (equivalent to...) is activated. Figure 1 The detection circuit DET2) is turned on.

[0169] As explained so far, if the slope 1 is large, the timing of transistor Q1 turning on is earlier, and if the slope 1 is small, the timing of transistor Q1 turning on is delayed.

[0170] If transistor Q1 (detection circuit DET2) is turned on, then switch SW2 becomes "on" (non-conducting) (see reference). Figure 5 As a result, the gate voltage Vge rises accordingly. Furthermore, with switch SW2 in the "on" state, the rate of gate charge absorption slows down, and the rise rate of the collector voltage VCE slows down. Consequently, the rise slope of the collector voltage VCE becomes "slope 2" (refer to...). Figure 5 ).

[0171] Then, if the gate charge is removed, the IGBT106 becomes OFF, moving towards a non-conducting state. At this time, the collector voltage VCE is clamped by the constant voltage diode ZD1, which acts as a clamping circuit, thus suppressing surge voltages, etc. Figure 5 The period shown as the conduction period of ZD1 is the period during which the constant voltage diode ZD1 is turned on and surge voltages are suppressed. During this period, the constant voltage diode ZD1 is turned on, and therefore the control signal of the output terminal 102a rises due to the conduction of the constant voltage diode ZD1. This suppresses surge voltages, etc.

[0172] Then, if the collector voltage VCE of IGBT106 becomes below the Zener voltage of the constant voltage diode ZD1, the constant voltage diode ZD1 will switch to a non-conducting state.

[0173] If the constant voltage diode ZD1 becomes non-conducting, the detection circuit DET2 will not detect a voltage exceeding the threshold, and therefore the switch SW2 will also return to the closed state (conducting state).

[0174] Perform the actions described above. Therefore, according to... Figure 4 The circuitry can mitigate the sharp rise in the collector voltage VCE(t) of the IGBT106 or the sharp decrease in the collector current of the IGBT106. Furthermore, by shortening the conduction time of the Zener diode ZD1, the heat dissipation of the Zener diode ZD1 can be suppressed. Moreover, noise reduction can be achieved as a result.

[0175] 4. Effects and Other

[0176] As explained above, the gate drive circuit of this embodiment utilizes an active clamping circuit and observes sharp changes in the collector voltage to predict the generation of surge voltage. It then uses the change in resistance value (increasing the resistance value) to capture gate charge, thereby suppressing surge voltage and inhibiting heat dissipation from the Zener diode in the active clamping circuit. Furthermore, it mitigates sharp increases in the IGBT collector voltage and sharp decreases in the collector current. These results in reduced noise.

[0177] In Implementation 1, one detection circuit DET2 is used, and in Implementation 2, two detection circuits DET1 and DET2 are used, but more than three can also be set.

[0178] Furthermore, the embodiments described above are merely examples of means of implementing the present invention, and should be appropriately modified or changed according to the structure of the device to which the present invention is applicable or various conditions. The present invention is not limited to the form of this embodiment. For example, in the embodiments described above, IGBTs are mainly described as power semiconductor switches that are driven, but the invention can also be applied to gate drive circuits that drive other power semiconductor switches (e.g., metal-oxide-semiconductor field-effect transistors, MOSFETs). Moreover, in the embodiments and examples described above, N-channel MOSFETs and P-channel MOSFETs are mainly used in their circuit diagrams, but N-channel MOSFETs can be used instead of P-channel MOSFETs to construct the circuit, or vice versa. Furthermore, other types of components can also be used. For example, bipolar transistors can also be used to construct the circuit.

[0179] Industrial availability

[0180] According to the present invention, a gate driving circuit can be provided to drive IGBTs with low heat generation and low noise.

Claims

1. A gate driving circuit for driving power semiconductor elements, characterized in that, include: An active clamping circuit, when the power semiconductor element is turned off and the collector-emitter voltage of the power semiconductor element reaches a predetermined voltage, clamps the collector-emitter voltage of the power semiconductor element to the predetermined voltage, and supplies a predetermined current to the gate terminal of the power semiconductor element. The active clamping circuit includes: A constant voltage diode, one end of which is connected to the collector terminal of the power semiconductor element; An impedance circuit is connected between the other end of the constant voltage diode and the negative power supply; The output terminal is connected to the connection point between the constant voltage diode and the impedance circuit, and is also connected to the gate terminal of the power semiconductor element; The first acquisition circuit includes: a series circuit of a first switch and a first resistor, wherein one end is connected to the connection point of the constant voltage diode and the impedance circuit, and the other end is connected to a negative power supply, for acquiring charge from the gate terminal of the power semiconductor element based on an external on / off signal when the power semiconductor element is turned off. The second charge-taking circuit includes: a series circuit of a second switch and a second resistor, one end of which is connected to the junction of the constant voltage diode and the impedance circuit, and the other end is connected to a negative power supply, for drawing charge from the gate terminal of the power semiconductor element based on the on / off signal when the power semiconductor element is turned off; and The detection circuit calculates the rate of rise of the collector voltage of the power semiconductor element over time when it is turned off, based on the voltage at the connection point of the constant voltage diode and the impedance circuit. If the rate of rise exceeds a predetermined threshold, it outputs a switch-on signal. If the second switch receives the switch-on signal, it changes from the on state to the off state, thereby increasing the resistance value used to seize the gate charge of the power semiconductor element, easing the turn-off of the power semiconductor element and seizing the gate charge.

2. The gate driving circuit according to claim 1, characterized in that, The active clamping circuit is the following active clamping circuit: When the surge voltage generated when the power semiconductor switching element is turned off becomes the maximum rated voltage of the collector-emitter voltage of the insulated gate bipolar transistor of the power semiconductor switching element or a voltage near it, the collector-emitter voltage is clamped to the voltage, and at the same time current is supplied to its own gate, thereby reducing the surge voltage and preventing voltage damage.

3. The gate driving circuit according to claim 1 or 2, characterized in that, The constant voltage diode has a parasitic parallel capacitance. The impedance circuit includes at least a parallel circuit of a resistor and a capacitor.

4. The gate driving circuit according to claim 1 or 2, characterized in that... include: The second preemption circuit to the nth preemption circuit, the (n-1)th type of nth preemption circuit, and The n-1 types of nth detection circuits from the second detection circuit to the nth detection circuit The n is a natural number greater than or equal to 3. The nth charge-taking circuit includes: a series circuit of an nth switch and an nth resistor, connected at the junction of the constant voltage diode and the impedance circuit, used to draw charge from the gate terminal of the power semiconductor element based on the on / off signal when the power semiconductor element is turned off. The nth detection circuit calculates the rate of rise of the collector voltage of the power semiconductor element over time when it is turned off based on the voltage at the connection point of the constant voltage diode and the impedance circuit. If the rate of rise exceeds a predetermined nth threshold, it outputs the nth switch-on signal. If the nth switch receives the nth switch open signal, it changes from the on state to the off state, thereby increasing the resistance value used to seize the gate charge of the power semiconductor element, easing the turn-off of the power semiconductor element and seizing the gate charge.

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