Impedance calibration design method and device based on printed circuit board debugging

Abstract

The present invention discloses an impedance calibration design method, device, and computer equipment based on printed circuit board debugging. The method comprises: configuring two pads on the printed circuit board, configuring the network of one of the pads to be ground, and configuring the other pad to have no network, wherein no device is welded between the two pads, and performing short-circuit calibration by short-circuiting the two pads, and after the short-circuit calibration, testing the open-circuit impedance of the printed circuit board, and after the open-circuit impedance of the printed circuit board is tested, performing electrical delay calibration on the printed circuit board. By the above method, the open-circuit impedance of the feeder can be accurately calibrated, and the debugging error caused by the feeder can be reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit board debugging, and in particular to an impedance calibration design method, device and computer equipment based on printed circuit board debugging. Background Art

[0002] When designing a product, in order to match the regulatory components such as modules / antennas / duplexers and other devices to achieve optimal performance, the RF traces on the PCB (Printed Circuit Board) board will require the PCB board manufacturer to control the impedance based on the reference layer.

[0003] Although the impedance of the RF line can be controlled within a small error range in the test report issued by the PCB board factory, the board deviation, module deviation, device deviation and antenna deviation are accumulated, and the impedance of this RF line may eventually deviate to a larger value. At this time, the impedance of the RF line needs to be debugged. Sometimes it also involves component compatibility issues. The matching antenna adjusted according to the impedance deviation of the old version of the product is not suitable for the impedance of the new version of the product, and it also needs to be re-adjusted to adapt to the impedance.

[0004] In order to cope with the situation where impedance needs to be debugged, one or more matching circuits will be reserved in the on-board design of the RF circuit to achieve the optimal performance of the RF line by modifying the matching circuit, for example, the module manufacturer corrects the module, the product manufacturer corrects the PCB RF routing, the antenna manufacturer corrects the antenna, etc., depending on the implementation object.

[0005] In impedance debugging, it is inevitable to measure the current impedance. The most widely used method is to use a network analyzer, also known as a network analyzer, to measure the impedance through the S11 or S12 parameters of the network analyzer. Before measuring the S11 parameter, the port of the network analyzer must be calibrated for a certain frequency band using standard parts such as open circuits, short circuits, and standard loads. However, this is only a calibration of the port, and during debugging, engineers will solder a feeder on the PCB board to connect the RF line on the PCB and the network analyzer. In the network analyzer test system that only calibrates the port, this section of the feeder is not included, which means that the test result should be the result of the feeder plus the PCB RF line, rather than a simple RF line. After a simple port calibration, an open-circuited feeder is connected, and the standard open-circuit Smith chart is not obtained.

[0006] If the impedance is not tested accurately, it will be difficult to locate the problem, such as uncertainty as to whether the poor performance of the product is caused by impedance mismatch, and low debugging efficiency, such as blind adjustment and blind testing because the specific impedance is unknown.

[0007] However, in order to minimize the influence of the feeder line, the existing impedance calibration design scheme based on the debugging of the printed circuit board generally connects a feeder line of the same type and length as that used in the debugging after the network division port is calibrated, and then the port extension option of the network division is calibrated. The increased electrical length delay of the feeder line is calculated, so that the impedance of the debugged frequency band is close to pure resistive infinity. However, the final port extension step of this method can only choose one of the open circuit calibration or short circuit calibration, which only approximately eliminates the influence of the feeder line. For some special projects, such as those requiring a very long feeder line or requiring very precise impedance analysis, the error will appear to be relatively large, and it is impossible to accurately calibrate the open circuit impedance of the feeder line, and it is impossible to reduce the debugging error caused by the feeder line. Summary of the invention

[0008] In view of this, the purpose of the present invention is to propose an impedance calibration design method, device, and computer equipment based on printed circuit board debugging, which can accurately calibrate the open-circuit impedance of the feeder and reduce the debugging error caused by the feeder.

[0009] According to one aspect of the present invention, there is provided an impedance calibration design method based on printed circuit board debugging, comprising: configuring two pads on the printed circuit board, configuring the network of one of the pads to be ground, and configuring the other pad to have no network; wherein no device is soldered between the two pads; performing short-circuit calibration by short-circuiting the two pads; after the short-circuit calibration, testing the open-circuit impedance of the printed circuit board; and after the open-circuit impedance of the printed circuit board is tested, performing electrical delay calibration on the printed circuit board.

[0010] The method of configuring two pads on a printed circuit board, configuring a network of one of the pads as ground, and configuring the other pad as having no network; wherein no components are soldered between the two pads, comprises: reserving two areas on the printed circuit board, configuring two pads on the two areas, configuring a network of one of the pads as ground, and configuring the other pad as having no network; wherein no components are soldered between the two pads.

[0011] The step of testing the open circuit impedance of the printed circuit board after the short circuit calibration comprises: testing the open circuit impedance of the printed circuit board by adopting a network division test method after the short circuit calibration.

[0012] The step of performing electrical delay calibration on the printed circuit board after testing the open circuit impedance of the printed circuit board comprises: performing electrical delay calibration on the printed circuit board by adopting a grid calibration method after testing the open circuit impedance of the printed circuit board.

[0013] Wherein, after the open-circuit impedance of the printed circuit board is tested and the electrical delay calibration is performed on the printed circuit board, the method further includes: after the electrical delay calibration is performed on the printed circuit board, debugging the antenna impedance associated with the printed circuit board.

[0014] According to another aspect of the present invention, there is provided an impedance calibration design device based on printed circuit board debugging, comprising: a configuration module, a short circuit calibration, an open circuit impedance test module and an electrical delay calibration module; the configuration module is used to configure two pads on the printed circuit board, configure the network of one of the pads as ground, and configure the other pad to have no network; wherein no device is soldered between the two pads; the short circuit calibration is used to perform short circuit calibration by short-circuiting the two pads; the open circuit impedance test module is used to test the open circuit impedance of the printed circuit board after the short circuit calibration; the electrical delay calibration module is used to perform electrical delay calibration on the printed circuit board after the open circuit impedance of the printed circuit board is tested.

[0015] The configuration module is specifically used to: reserve two areas on a printed circuit board, configure two pads on the two areas, configure the network of one of the pads as ground, and configure the other pad to have no network; and no components are soldered between the two pads.

[0016] The open circuit impedance test module is specifically used to test the open circuit impedance of the printed circuit board by adopting a network test method after the short circuit calibration.

[0017] Wherein, the electrical delay calibration module is specifically used for: after the open circuit impedance of the printed circuit board is tested, the electrical delay calibration of the printed circuit board is performed by adopting a grid calibration method.

[0018] Among them, the impedance calibration design device based on printed circuit board debugging also includes: an antenna impedance debugging module; the antenna impedance debugging module is used to debug the antenna impedance associated with the printed circuit board after the electrical delay calibration of the printed circuit board.

[0019] According to another aspect of the present invention, there is provided a computer device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the impedance calibration design method based on printed circuit board debugging as described in any one of the above items.

[0020] According to another aspect of the present invention, there is provided a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, the impedance calibration design method based on printed circuit board debugging as described in any one of the above items is implemented.

[0021] It can be found that the above scheme can configure two pads on the printed circuit board, configure the network of one of the pads as ground, and configure the other pad without a network, wherein no device is soldered between the two pads, and the short-circuit calibration can be performed by short-circuiting the two pads, and the open-circuit impedance of the printed circuit board can be tested after the short-circuit calibration, and the electrical delay calibration of the printed circuit board can be performed after the open-circuit impedance of the printed circuit board is tested, so that the open-circuit impedance of the feeder can be accurately calibrated, and the debugging error caused by the feeder can be reduced.

[0022] Furthermore, the above scheme can reserve two areas on the printed circuit board, configure two pads on the two areas, configure the network of one of the pads as ground, and configure the other pad without a network; wherein no components are soldered between the two pads, and the advantage of this is that the design point is relatively simple.

[0023] Furthermore, the above solution can use a network test method to test the open circuit impedance of the printed circuit board after the short circuit calibration. This has the advantage of reducing the dispersion of impedance points.

[0024] Furthermore, the above scheme can use a network calibration method to perform electrical delay calibration on the printed circuit board after testing the open-circuit impedance of the printed circuit board. The advantage of this is that the open-circuit impedance of the feeder can be accurately calibrated, which can reduce the debugging error caused by the feeder.

[0025] Furthermore, the above solution can debug the antenna impedance associated with the printed circuit board after the electrical delay calibration of the printed circuit board. This has the advantage of being able to obtain real impedance data. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 It is a flow chart of an embodiment of an impedance calibration design method based on printed circuit board debugging of the present invention;

[0028] Figure 2It is a flow chart of another embodiment of the impedance calibration design method based on printed circuit board debugging of the present invention;

[0029] Figure 3 It is a structural schematic diagram of an embodiment of an impedance calibration design device based on printed circuit board debugging of the present invention;

[0030] Figure 4 It is a structural schematic diagram of another embodiment of the impedance calibration design device based on printed circuit board debugging of the present invention;

[0031] Figure 5 It is a structural schematic diagram of an embodiment of a computer device of the present invention. DETAILED DESCRIPTION

[0032] The present invention will be further described in detail below in conjunction with the accompanying drawings and examples. It is particularly noted that the following examples are only used to illustrate the present invention, but are not intended to limit the scope of the present invention. Similarly, the following examples are only partial embodiments of the present invention rather than all embodiments, and all other embodiments obtained by those of ordinary skill in the art without creative work are within the scope of protection of the present invention.

[0033] The present invention provides an impedance calibration design method based on printed circuit board debugging, which can realize accurate calibration of feeder open-circuit impedance and reduce debugging errors caused by feeders.

[0034] See also Figure 1 , Figure 1 FIG. 1 is a flow chart of an embodiment of an impedance calibration design method based on printed circuit board debugging of the present invention. It should be noted that if there is substantially the same result, the method of the present invention is not limited to Figure 1 The process sequence shown is limited. Figure 1 As shown, the method comprises the following steps:

[0035] S101: configuring two pads on a printed circuit board, configuring a network on one of the pads to be ground, and configuring the other pad to have no network; wherein no device is soldered between the two pads.

[0036] The method of configuring two pads on a printed circuit board, configuring the network of one pad to be ground, and configuring the other pad to have no network; and not soldering a device between the two pads may include:

[0037] Two areas are reserved on the printed circuit board, and two pads are arranged on the two areas. The network of one of the pads is arranged as ground, and the other pad is arranged without a network. No components are welded between the two pads. This has the advantage of making the design point simpler.

[0038] S102: short-circuiting the two pads to perform short-circuit calibration.

[0039] In this embodiment, the short circuit between the two pads may be caused by the insulation between the connecting wires of the two pads being destroyed to cause a short circuit between the wires, or by the connecting wires of the two pads being incorrectly connected to cause a short circuit, etc., and the present invention is not limited thereto.

[0040] S103: After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested.

[0041] Wherein, after the short circuit calibration, testing the open circuit impedance of the printed circuit board may include:

[0042] After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested by adopting a network division test method, which has the advantage of being able to reduce the dispersion of impedance points.

[0043] S104: After the open circuit impedance of the printed circuit board is tested, electrical delay calibration is performed on the printed circuit board.

[0044] After testing the open circuit impedance of the printed circuit board, performing electrical delay calibration on the printed circuit board may include:

[0045] After testing the open-circuit impedance of the printed circuit board, the network calibration method is used to perform electrical delay calibration on the printed circuit board. The advantage of this is that the open-circuit impedance of the feeder can be accurately calibrated, which can reduce the debugging error caused by the feeder.

[0046] Wherein, after the open circuit impedance of the printed circuit board is tested and the electrical delay calibration of the printed circuit board is performed, the method may further include:

[0047] After the electrical delay calibration of the printed circuit board is performed, the antenna impedance associated with the printed circuit board is debugged, which has the advantage of being able to obtain real impedance data.

[0048] It can be found that in this embodiment, two pads can be configured on the printed circuit board, and the network of one of the pads is configured as ground, and the other pad is configured without a network, wherein no device is soldered between the two pads, and a short-circuit calibration can be performed by short-circuiting the two pads, and the open-circuit impedance of the printed circuit board can be tested after the short-circuit calibration, and the electrical delay calibration of the printed circuit board can be performed after the open-circuit impedance of the printed circuit board is tested, so that the open-circuit impedance of the feeder can be accurately calibrated, and the debugging error caused by the feeder can be reduced.

[0049] Furthermore, in this embodiment, two areas can be reserved on the printed circuit board, and two pads can be configured on the two areas. The network of one of the pads is configured as ground, and the other pad is configured without a network. No components are soldered between the two pads. This has the advantage of a simpler design point.

[0050] Furthermore, in this embodiment, after the short-circuit calibration, a network-division test method can be used to test the open-circuit impedance of the printed circuit board. This has the advantage of being able to reduce the dispersion of impedance points.

[0051] Furthermore, in this embodiment, after testing the open-circuit impedance of the printed circuit board, a network calibration method can be used to perform electrical delay calibration on the printed circuit board. This has the advantage of being able to accurately calibrate the open-circuit impedance of the feeder and reduce the debugging error caused by the feeder.

[0052] See also Figure 2 , Figure 2 FIG. 1 is a flow chart of another embodiment of the impedance calibration design method based on printed circuit board debugging of the present invention. In this embodiment, the method includes the following steps:

[0053] S201: configuring two pads on a printed circuit board, configuring a network on one of the pads to be ground, and configuring the other pad to have no network; wherein no device is soldered between the two pads.

[0054] This can be as described in S101 above and will not be elaborated here.

[0055] S202: short-circuiting the two pads to perform short-circuit calibration.

[0056] This can be as described in S102 above, and will not be elaborated here.

[0057] S203: After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested.

[0058] This can be as described in S103 above, and will not be elaborated here.

[0059] S204: After the open circuit impedance of the printed circuit board is tested, electrical delay calibration is performed on the printed circuit board.

[0060] This can be as described in S104 above, and will not be elaborated here.

[0061] S205: After the electrical delay calibration is performed on the printed circuit board, the antenna impedance associated with the printed circuit board is debugged.

[0062] It can be found that in this embodiment, after the electrical delay calibration of the printed circuit board is performed, the antenna impedance associated with the printed circuit board can be debugged. This has the advantage of being able to obtain real impedance data.

[0063] The present invention also provides an impedance calibration design device based on printed circuit board debugging, which can accurately calibrate the open-circuit impedance of the feeder and reduce the debugging error caused by the feeder.

[0064] See also Figure 3 , Figure 3 1 is a schematic diagram of an embodiment of an impedance calibration design device based on printed circuit board debugging of the present invention. In this embodiment, the impedance calibration design device based on printed circuit board debugging 30 includes a configuration module 31, a short circuit calibration 32, an open circuit impedance test module 33 and an electrical delay calibration module 34.

[0065] The configuration module 31 is used to configure two pads on a printed circuit board, configure the network of one pad to be ground, and configure the other pad to have no network; wherein no device is soldered between the two pads.

[0066] The short circuit calibration 32 is used to perform short circuit calibration by short-circuiting the two pads.

[0067] The open circuit impedance testing module 33 is used to test the open circuit impedance of the printed circuit board after the short circuit calibration.

[0068] The electrical delay calibration module 34 is used to perform electrical delay calibration on the printed circuit board after testing the open circuit impedance of the printed circuit board.

[0069] Optionally, the configuration module 31 may be specifically used for:

[0070] Two areas are reserved on the printed circuit board, two pads are arranged on the two areas, the network of one of the pads is arranged as ground, and the other pad is arranged without network; wherein no device is welded between the two pads.

[0071] Optionally, the open circuit impedance testing module 33 may be specifically used for:

[0072] After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested using a network division test method.

[0073] Optionally, the electrical delay calibration module 34 may be specifically used for:

[0074] After the open circuit impedance of the printed circuit board is tested, the electrical delay calibration of the printed circuit board is performed using a grid calibration method.

[0075] See also Figure 4 , Figure 4 1 is a schematic diagram of another embodiment of the impedance calibration design device based on printed circuit board debugging of the present invention. Different from the previous embodiment, the impedance calibration design device based on printed circuit board debugging described in this embodiment 40 further includes an antenna impedance debugging module 41.

[0076] The antenna impedance debugging module 41 is used to debug the antenna impedance associated with the printed circuit board after the electrical delay calibration of the printed circuit board is performed.

[0077] Each unit module of the impedance calibration design device 30 / 40 based on printed circuit board debugging can respectively execute the corresponding steps in the above method embodiment, so each unit module will not be described in detail here. Please refer to the description of the above corresponding steps for details.

[0078] The present invention further provides a computer device, such as Figure 5 As shown, it includes: at least one processor 51; and a memory 52 that is communicatively connected to the at least one processor 51; wherein the memory 52 stores instructions that can be executed by the at least one processor 51, and the instructions are executed by the at least one processor 51 so that the at least one processor 51 can execute the above-mentioned impedance calibration design method based on printed circuit board debugging.

[0079] The memory 52 and the processor 51 are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors 51 and the memory 52 together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor 51 is transmitted on a wireless medium via an antenna, and further, the antenna also receives data and transmits the data to the processor 51.

[0080] The processor 51 is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management and other control functions. The memory 52 can be used to store data used by the processor 51 when performing operations.

[0081] The present invention further provides a computer-readable storage medium storing a computer program, which implements the above method embodiment when executed by a processor.

[0082] It can be found that the above scheme can configure two pads on the printed circuit board, configure the network of one of the pads as ground, and configure the other pad without a network, wherein no device is soldered between the two pads, and the short-circuit calibration can be performed by short-circuiting the two pads, and the open-circuit impedance of the printed circuit board can be tested after the short-circuit calibration, and the electrical delay calibration of the printed circuit board can be performed after the open-circuit impedance of the printed circuit board is tested, so that the open-circuit impedance of the feeder can be accurately calibrated, and the debugging error caused by the feeder can be reduced.

[0083] Furthermore, the above scheme can reserve two areas on the printed circuit board, configure two pads on the two areas, configure the network of one of the pads as ground, and configure the other pad without a network; wherein no components are soldered between the two pads, and the advantage of this is that the design point is relatively simple.

[0084] Furthermore, the above solution can use a network test method to test the open circuit impedance of the printed circuit board after the short circuit calibration. This has the advantage of reducing the dispersion of impedance points.

[0085] Furthermore, the above scheme can use a network calibration method to perform electrical delay calibration on the printed circuit board after testing the open-circuit impedance of the printed circuit board. The advantage of this is that the open-circuit impedance of the feeder can be accurately calibrated, which can reduce the debugging error caused by the feeder.

[0086] Furthermore, the above solution can debug the antenna impedance associated with the printed circuit board after the electrical delay calibration of the printed circuit board. This has the advantage of being able to obtain real impedance data.

[0087] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device implementation described above is only schematic, for example, the division of modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0088] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0089] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0090] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, server, or network device, etc.) or a processor (processor) to perform all or part of the steps of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0091] The above descriptions are only some embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any equivalent device or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An impedance calibration design method based on printed circuit board debugging, characterized in that: include: Two pads are arranged on a printed circuit board, one of which has a network configured as ground, and the other pad has no network configured; wherein no device is welded between the two pads; Short-circuit calibration is performed by short-circuiting the two pads; After the short-circuit calibration, testing the open-circuit impedance of the printed circuit board; After testing the open circuit impedance of the printed circuit board, performing electrical delay calibration on the printed circuit board; The method of configuring two pads on a printed circuit board, configuring the network of one pad to be ground, and configuring the other pad to have no network; wherein no device is soldered between the two pads, comprises: Two areas are reserved on the printed circuit board, two pads are arranged on the two areas, the network of one of the pads is arranged to be ground, and the other pad is arranged to have no network; wherein no device is welded between the two pads; After the open circuit impedance of the printed circuit board is tested, electrical delay calibration is performed on the printed circuit board, comprising: After the open circuit impedance of the printed circuit board is tested, the electrical delay calibration of the printed circuit board is performed using a grid calibration method.

2. The impedance calibration design method based on printed circuit board debugging according to claim 1, characterized in that: After the short-circuit calibration, testing the open-circuit impedance of the printed circuit board comprises: After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested by adopting a network division test method.

3. The impedance calibration design method based on printed circuit board debugging as claimed in claim 1, characterized in that: After the open circuit impedance of the printed circuit board is tested and the electrical delay calibration is performed on the printed circuit board, the method further includes: After the electrical delay calibration is performed on the printed circuit board, the antenna impedance associated with the printed circuit board is adjusted.

4. An impedance calibration design device based on printed circuit board debugging, characterized in that: include: Configuration module, short circuit calibration, open circuit impedance test module and electrical delay calibration module; The configuration module is used to configure two pads on a printed circuit board, configure the network of one of the pads to be ground, and configure the other pad to have no network; wherein no device is soldered between the two pads; The short circuit calibration is used to perform short circuit calibration by short-circuiting the two pads; The open circuit impedance test module is used to test the open circuit impedance of the printed circuit board after the short circuit calibration; The electrical delay calibration module is used to perform electrical delay calibration on the printed circuit board after the open circuit impedance of the printed circuit board is tested; The configuration module is specifically used for: Two areas are reserved on the printed circuit board, two pads are arranged on the two areas, the network of one of the pads is arranged to be ground, and the other pad is arranged to have no network; wherein no device is welded between the two pads; The electrical delay calibration module is specifically used for: After the open circuit impedance of the printed circuit board is tested, the electrical delay calibration of the printed circuit board is performed using a grid calibration method.

5. The impedance calibration design device based on printed circuit board debugging as claimed in claim 4, characterized in that: The open circuit impedance test module is specifically used for: After the short-circuit calibration, the open-circuit impedance of the printed circuit board is tested by adopting a network division test method.

6. The impedance calibration design device based on printed circuit board debugging according to claim 4, characterized in that: The impedance calibration design device based on printed circuit board debugging also includes: Antenna impedance debugging module; The antenna impedance debugging module is used to debug the antenna impedance associated with the printed circuit board after the electrical delay calibration of the printed circuit board is performed.

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