Multilayer capacitor and board on which the multilayer capacitor is mounted

Abstract

A multilayer capacitor and a board on which the multilayer capacitor is mounted are provided. The multilayer capacitor includes a capacitor body including a plurality of dielectric layers and a plurality of internal electrodes alternately disposed, and each of the plurality of dielectric layers is interposed between the plurality of internal electrodes, and an external electrode disposed on the capacitor body to be connected to the plurality of internal electrodes. At least one intermetallic compound layer is disposed in an area where the plurality of internal electrodes and the external electrode are connected, and a total number of the at least one intermetallic compound layer is greater than or equal to 55% of a total number of the plurality of internal electrodes and less than 100% of the total number of the plurality of internal electrodes.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0187162, filed on December 30, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] This disclosure relates to a multilayer capacitor and a plate on which the multilayer capacitor is mounted. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, passive component assemblies) are used to control electrical signals in circuits.

[0004] Such multilayer capacitors have the advantages of small size, high capacitance and easy installation.

[0005] In recent years, with the increasing demand for industrial and electrical equipment as well as IT, it has become necessary to develop products with stable electrical and mechanical properties and high reliability.

[0006] Multilayer capacitors may develop cracks after installation due to temperature changes, substrate deformation, and moisture resistance, and such cracks may lead to product defects.

[0007] As a method to ensure the high reliability of such multilayer capacitors, a technique is provided to coat an outer electrode with a conductive resin layer to absorb tensile stress generated in a mechanical or thermal environment, thereby preventing stress-induced cracking.

[0008] Such a conductive resin layer is used for the electro- and mechanical bonding of the sintered electrode layer and the plating of the outer electrode of the multilayer capacitor, and protects the multilayer capacitor from mechanical stress, thermal stress and bending impact of the substrate during circuit board mounting, depending on the process temperature.

[0009] However, in order to achieve this effect, the resistance of the conductive resin layer should be relatively low, and the adhesion between the electrode layer and the plating layer should be excellent to prevent the external electrode from separating during the process.

[0010] However, the conductive resin layer in the prior art has high resistance and a high equivalent series resistance (ESR) compared to products without a conductive resin layer. Summary of the Invention

[0011] This summary is provided to introduce selected concepts in a simplified form, which will be further described in the detailed description below. This summary is not intended to limit the key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.

[0012] An exemplary embodiment provides a multilayer capacitor and a plate on which the multilayer capacitor is mounted, wherein the equivalent series resistance (ESR) in the multilayer capacitor is reduced and cracking is prevented.

[0013] According to an exemplary embodiment of this disclosure, a multilayer capacitor may include: a capacitor body including a plurality of alternately disposed dielectric layers and a plurality of internal electrodes, wherein each of the plurality of dielectric layers is disposed between the plurality of internal electrodes; and an external electrode disposed on the capacitor body for connection to the plurality of internal electrodes. At least one intermetallic compound layer may be disposed in the region where the plurality of internal electrodes and the external electrode are connected, and the total number of the intermetallic compound layers may be greater than or equal to 55% and less than 100% of the total number of the plurality of internal electrodes.

[0014] The total number of the at least one intermetallic compound layer can be 55% to 99% of the total number of the plurality of internal electrodes.

[0015] The ratio of the average thickness of the at least one intermetallic compound layer to the average thickness of the plurality of internal electrodes may be greater than or equal to 50%.

[0016] The capacitor body may include: a first surface and a second surface, opposite to each other in a first direction; a third surface and a fourth surface, opposite to each other in a second direction perpendicular to the first direction; and a fifth surface and a sixth surface, opposite to each other in a third direction perpendicular to the first and second directions. In the third surface and the fourth surface, a plurality of trenches may be formed between the plurality of dielectric layers disposed along the first direction, and the at least one intermetallic compound layer may be disposed in the plurality of trenches.

[0017] At the connection between the plurality of inner electrodes and the outer electrode, the average depth of the portion of the outer electrode that diffuses into the plurality of inner electrodes may be greater than or equal to 30 μm.

[0018] The average depth of the plurality of grooves may be greater than or equal to 30 μm.

[0019] The external electrode may include: an electrode layer disposed on the capacitor body and in contact with the at least one intermetallic compound layer; and a conductive resin layer disposed on the electrode layer and including a plurality of metal particles, a conductive connection portion surrounding each of the plurality of metal particles and in contact with the electrode layer, and a matrix resin.

[0020] The plurality of internal electrodes may include nickel, and the at least one intermetallic compound layer may include nickel-copper (Ni-Cu).

[0021] The plurality of metal particles in the conductive resin layer may include at least one of copper, nickel, silver, silver-plated copper, and tin-plated copper.

[0022] The plurality of metal particles in the conductive resin layer may have one of a spherical shape, a sheet shape, or a mixture of a spherical shape and a sheet shape.

[0023] The external electrode may also include a plating layer disposed on the conductive resin layer.

[0024] The plating may include a nickel plating and a tin plating, which are sequentially stacked on the conductive resin layer.

[0025] According to another exemplary embodiment of the present disclosure, a board having a multilayer capacitor mounted thereon includes: a substrate having a plurality of electrode pads located on one surface of the substrate; and the multilayer capacitor mounted on the substrate, wherein the external electrode is connected to the plurality of electrode pads. Attached Figure Description

[0026] The above and other aspects, features, and advantages of the present invention will be more clearly understood by taking into account the accompanying drawings and the following detailed description, wherein:

[0027] Figure 1 This is a schematic perspective view of a multilayer capacitor according to an embodiment;

[0028] Figure 2A and Figure 2B They are shown respectively Figure 1 Plan view of the first and second internal electrodes;

[0029] Figure 3 It is along Figure 1 A cross-sectional view taken from line I-I';

[0030] Figure 4 This is an SEM image showing the ratio of the thickness of the connection portion between the inner and outer electrodes to the thickness of the inner electrode; and

[0031] Figure 5 This is a perspective view schematically illustrating the mounting structure of a multilayer capacitor and a substrate according to an embodiment. Detailed Implementation

[0032] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will be readily understood by those skilled in the art. The order of operations described herein is merely illustrative and is not limited to the order of operations of the examples set forth herein; changes may be made, as will be readily understood by those skilled in the art, except for operations that must occur in a specific order. Furthermore, for clarity and brevity, descriptions of functions and constructions well-known to those skilled in the art may be omitted.

[0033] The features described herein may be presented in different forms and are not to be construed as being limited to the examples described herein. Rather, the examples described herein have been provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0034] Here, it should be noted that the use of the term "may" in relation to an embodiment or example (e.g., what an embodiment or example may include or implement) means that there exists at least one embodiment or example that includes or implements such a feature, and is not limited to all embodiments and examples including or implementing such a feature.

[0035] Throughout the specification, when an element such as a layer, region, or substrate is described as being "on" another element, "connected to" another element, or "bonded to" another element, the element may be directly "on" the other element, directly "connected to" the other element, or directly "bonded to" the other element, or there may be one or more other elements in between. In contrast, when an element is described as being "directly on" another element, "directly connected to" another element, or "directly bonded to" another element, there are no other elements in between.

[0036] As used herein, the term “and / or” includes any one or any combination of two or more of the relevant listed items.

[0037] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, assemblies, regions, layers, or parts, these components, assemblies, regions, layers, or parts are not limited by these terms. Rather, these terms are used only to distinguish one component, assembly, region, layer, or part from another. Therefore, without departing from the teachings of the examples described herein, the first component, first assembly, first region, first layer, or first part mentioned in the examples may also be referred to as a second component, second assembly, second region, second layer, or second part.

[0038] For ease of description, spatial relative terms such as “above,” “upper,” “lower,” and “below” are used herein to describe the relationship between one element and another, as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, such spatial relative terms are also intended to encompass different orientations of the device during use or operation. For example, if the device in the drawings is flipped, an element described as being “above” or “upper” relative to another element will be “below” or “lower” relative to that other element. Thus, the term “above” encompasses both upper and lower orientations depending on the spatial orientation of the device. The device may also be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative terms used herein will be interpreted accordingly.

[0039] The terminology used herein is for the purpose of describing various examples only and is not intended to limit this disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms “comprising,” “including,” and “having” enumerate the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0040] Due to manufacturing techniques and / or tolerances, variations in the shape shown in the accompanying drawings may occur. Therefore, the examples described herein are not limited to the specific shapes shown in the accompanying drawings, but include variations in shape that occur during manufacturing.

[0041] The features of the examples described herein can be combined in a variety of ways that will be readily understood upon understanding the disclosure of this application. Furthermore, although the examples described herein have various constructions, other constructions that will be readily understood upon understanding the disclosure of this application are also possible.

[0042] The accompanying drawings may not be drawn to scale, and for clarity, illustration, and convenience, the relative sizes, proportions, and depictions of the elements in the drawings may be exaggerated.

[0043] In the following description of the embodiments, when the orientation of the capacitor body is defined to clearly describe the embodiments, X, Y and Z in the accompanying drawings represent the length direction, width direction and thickness direction of the capacitor body, respectively.

[0044] Furthermore, in the embodiments, the Z direction can be used with the same concept as the stacking direction of the stacked dielectric layers.

[0045] Figure 1 This is a schematic perspective view of a multilayer capacitor according to an embodiment. Figure 2A and Figure 2B They are shown respectively Figure 1 Plan view of the first and second internal electrodes. Figure 3It is along Figure 1 The cross-sectional view taken from line I-I'.

[0046] Reference Figures 1 to 3 According to an embodiment, the multilayer capacitor 100 includes a capacitor body 110, a first external electrode 130, and a second external electrode 140.

[0047] The capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of first internal electrodes 121 and second internal electrodes 122. The plurality of first internal electrodes 121 and second internal electrodes 122 are alternately arranged in the Z direction, and the dielectric layer 111 is located between the first internal electrodes 121 and the second internal electrodes 122.

[0048] The capacitor body 110 is obtained by stacking multiple dielectric layers 111 in the Z direction and then sintering them, and the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can be integrated to a degree that is difficult to identify without the use of a scanning electron microscope (SEM).

[0049] In this case, the capacitor body 110 may have a substantially hexahedral shape, but this disclosure is not limited thereto. Furthermore, the shape and size of the capacitor body 110 and the number of stacked dielectric layers 111 are not limited to the shape and size of the capacitor body and the number of stacked dielectric layers shown in the accompanying drawings of this embodiment.

[0050] In this embodiment, for ease of description, the two surfaces of the capacitor body 110 that are opposite to each other in the Z direction are defined as the first surface 1 and the second surface 2, the two surfaces connected to the first surface 1 and the second surface 2 and opposite to each other in the X direction are defined as the third surface 3 and the fourth surface 4, and the two surfaces connected to the first surface 1 and the second surface 2, connected to the third surface 3 and the fourth surface 4 and opposite to each other in the Y direction are defined as the fifth surface 5 and the sixth surface 6.

[0051] In addition, in this embodiment, the mounting surface of the multilayer capacitor 100 may be the first surface 1 of the capacitor body 110.

[0052] The dielectric layer 111 may include a ceramic material with a high dielectric constant, such as barium titanate (BaTiO3) or strontium titanate (SrTiO3) based ceramic powder, but this disclosure is not limited thereto.

[0053] In addition to ceramic powder, ceramic additives, organic solvents, plasticizers, binders, dispersants, etc. can also be added to the dielectric layer 111.

[0054] Transition metal oxides or transition metal carbides, rare earth elements, magnesium (Mg) or aluminum (Al) can be used as ceramic additives.

[0055] The capacitor body 110 may include: an effective region, which contributes to the capacitance of the capacitor; and an upper cover 112 and a lower cover 113, which respectively cover the upper and lower surfaces of the effective region in the Z direction.

[0056] Except that the upper cover 112 and the lower cover 113 do not include internal electrodes, the upper cover 112 and the lower cover 113 may have the same material and construction as the dielectric layer 111.

[0057] The upper cover 112 and the lower cover 113 can be formed by stacking a single dielectric layer or two or more dielectric layers on the upper and lower surfaces of the effective region in the Z direction, respectively, and the upper cover 112 and the lower cover 113 can be substantially used to prevent damage to the first inner electrode 121 and the second inner electrode 122 due to physical or chemical stress.

[0058] The first inner electrode 121 and the second inner electrode 122 are electrodes with different polarities and are alternately arranged in the Z direction. The dielectric layer 111 is located between the first inner electrode 121 and the second inner electrode 122. One end of the first inner electrode 121 and one end of the second inner electrode 122 can be exposed through the third surface 3 and the fourth surface 4 of the capacitor body 110, respectively.

[0059] In this case, the first inner electrode 121 and the second inner electrode 122 can be electrically insulated from each other by the dielectric layer 111 disposed between them.

[0060] In this manner, the ends of the first inner electrode 121 and the second inner electrode 122, which are alternately exposed through the third surface 3 and the fourth surface 4 of the capacitor body 110, can respectively contact and be electrically connected to the first outer electrode 130 and the second outer electrode 140, which will be described later. The first outer electrode 130 and the second outer electrode 140 are respectively disposed on the third surface 3 and the fourth surface 4 of the capacitor body 110.

[0061] According to the above structure, when a predetermined voltage is applied to the first external electrode 130 and the second external electrode 140, charge accumulates between the first internal electrode 121 and the second internal electrode 122.

[0062] In this case, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area of ​​the first inner electrode 121 and the second inner electrode 122 in the effective region of the capacitor body 110, which are stacked on top of each other in the Z direction.

[0063] Furthermore, there are no particular limitations on the materials used to form the first internal electrode 121 and the second internal electrode 122. For example, the first internal electrode 121 and the second internal electrode 122 can be formed using a conductive paste made from at least one of noble metal materials (such as platinum (Pt), palladium (Pd) and palladium-silver (Pd-Ag) alloys), nickel (Ni) and copper (Cu).

[0064] In this case, the printing method for conductive paste can be screen printing, gravure printing, etc., but is not limited to these.

[0065] The first external electrode 130 and the second external electrode 140 can provide voltages of different polarities, can be disposed at both ends of the capacitor body 110 in the X direction, and can be electrically connected to the exposed portion of the first internal electrode 121 and the exposed portion of the second internal electrode 122, respectively.

[0066] The first external electrode 130 may include a first connecting portion and a first strip portion.

[0067] The first connection portion is a portion formed on the third surface 3 of the capacitor body 110 and connected to the exposed portion of the first internal electrode 121, and the first strip portion is a portion extending from the first connection portion to a portion of the first surface 1 of the capacitor body 110.

[0068] In this case, the first strip may further extend to a portion of the fifth surface 5 and a portion of the sixth surface 6 of the capacitor body 110, as well as a portion of the second surface 2 of the capacitor body 110, to improve adhesive strength, etc.

[0069] The second external electrode 140 may include a second connecting portion and a second strip portion.

[0070] The second connection portion is the portion formed on the fourth surface 4 of the capacitor body 110 and connected to the exposed portion of the second inner electrode 122, and the second strip portion is the portion that extends from the second connection portion to a portion of the first surface 1 of the capacitor body 110.

[0071] In this case, the second strip may further extend to a portion of the fifth surface 5 and a portion of the sixth surface 6 of the capacitor body 110, as well as a portion of the second surface 2 of the capacitor body 110, to improve adhesive strength.

[0072] In addition, a first intermetallic compound layer 135 is formed in the portion where the first inner electrode 121 and the first outer electrode 130 are connected, and a second intermetallic compound layer 145 is formed in the portion where the second inner electrode 122 and the second outer electrode 140 are connected.

[0073] Additionally, the first internal electrode 121 may include nickel, in which case the first intermetallic compound layer 135 may include nickel-copper (Ni-Cu).

[0074] The second internal electrode 122 may include nickel, in which case the second intermetallic compound layer 145 may include nickel-copper (Ni-Cu).

[0075] In one exemplary embodiment, the number of first intermetallic compound layers 135 may be greater than or equal to 55% of the total number of first internal electrodes 121 and less than 100% of the total number of first internal electrodes 121, preferably 55% to 99% of the total number of first internal electrodes 121, and the number of second intermetallic compound layers 145 may be greater than or equal to 55% of the total number of second internal electrodes 122 and less than 100% of the total number of second internal electrodes 122, preferably 55% to 99% of the total number of second internal electrodes 122.

[0076] Additionally, the capacitor body 110 may have a plurality of first and second slots, which are formed on the third surface 3 and the fourth surface 4 respectively between dielectric layers 111 disposed along the Z direction, and a first intermetallic compound layer 135 and a second intermetallic compound layer 145 may be disposed in the first and second slots respectively.

[0077] In addition, in the connection portion between the first inner electrode 121 and the first outer electrode 130, the depth of the portion of the first outer electrode 130 diffusing into the first inner electrode 121 may be greater than or equal to 30 μm, and in the connection portion between the second inner electrode 122 and the second outer electrode 140, the depth of the portion of the second outer electrode 140 diffusing into the second inner electrode 122 may be greater than or equal to 30 μm.

[0078] For example, the depth of each of the first and second grooves in the X direction may be greater than or equal to 30 μm, which means that the length of each of the first intermetallic compound layer 135 and the second intermetallic compound layer 145 in the X direction is greater than or equal to 30 μm.

[0079] In addition, when the Cu in the outer electrode diffuses to a depth greater than or equal to 30 μm into the inner electrode containing Ni in the cross section where the inner and outer electrodes are connected, the equivalent series resistance (ESR) of the multilayer capacitor can be stably ensured.

[0080] Here, the “depth” of the first groove and the “depth” of the second groove may refer to the average depth of the multiple first grooves and the average depth of the multiple second grooves, respectively, but are not limited thereto.

[0081] The first external electrode 130 includes: a first conductive resin layer 132; and a first electrode layer 131, which is disposed on the capacitor body 110 and contacts the first intermetallic compound layer 135.

[0082] The first conductive resin layer 132 may include a plurality of metal particles, a conductive connection portion surrounding each of the plurality of metal particles, and a matrix resin.

[0083] The metal particles can be at least one of copper, nickel, silver, silver-plated copper, and tin-plated copper.

[0084] Metal particles can have spherical, flake, or a mixture of spherical and flake shapes.

[0085] The first conductive resin layer 132 is disposed on the first electrode layer 131, and the first electrode layer 131 is in contact with the conductive connection portion of the first conductive resin layer 132.

[0086] The first external electrode 130 may further include a first plating layer disposed on the first conductive resin layer 132.

[0087] The first plating layer may include a first nickel plating layer 133 and a first tin plating layer 134 sequentially stacked on a first conductive resin layer 132.

[0088] The second external electrode 140 includes: a second conductive resin layer 142; and a second electrode layer 141, which is disposed on the capacitor body 110 and contacts the second intermetallic compound layer 145.

[0089] The second conductive resin layer 142 may include a plurality of metal particles, a conductive connection portion surrounding each of the plurality of metal particles, and a matrix resin.

[0090] The metal particles can be at least one of copper, nickel, silver, silver-plated copper, and tin-plated copper.

[0091] Metal particles can have spherical, flake, or a mixture of spherical and flake shapes.

[0092] The second conductive resin layer 142 is disposed on the second electrode layer 141, and the second electrode layer 141 is in contact with the conductive connection portion of the second conductive resin layer 142.

[0093] The second external electrode 140 may further include a second plating layer disposed on the second conductive resin layer 142.

[0094] The second plating layer may include a second nickel plating layer 143 and a second tin plating layer 144 sequentially stacked on the second conductive resin layer 142.

[0095] Typically, multilayer capacitors consist of an inner electrode containing nickel and an outer electrode containing copper. During electrode sintering, at the connection between the inner and outer electrodes, the metal of the outer electrode diffuses into the inner electrode through the difference in metal diffusion coefficients, thereby forming a Ni-Cu intermetallic compound (IMC) to achieve the electrical properties of the capacitor (such as capacitance, DF (dissipation factor), and ESR).

[0096] In this case, the capacitance, DF, and ESR of a multilayer capacitor can vary depending on the connectivity between the outer and inner electrodes.

[0097] In detail, the smaller the size and the lower the capacitance of a multilayer capacitor, the smaller the area of ​​the internal electrode and the fewer the layers of the internal electrode. Therefore, the contact performance between the internal electrode and the external electrode may be further reduced.

[0098] Furthermore, in the case of multilayer capacitors, a copper electrode is used as the primary electrode, and an epoxy resin-copper electrode is used as the secondary electrode to ensure flexural strength. This secondary electrode has relatively low conductivity, which may further reduce the connection between the inner and outer electrodes.

[0099] In embodiments of this disclosure, in products with small size and low capacity and low electrode connectivity, particularly small-sized products for electronic devices (e.g., products with dimensions of 1.0 mm × 0.5 mm or less in length in the X direction and width in the Y direction), the degree of connectivity between the inner and outer electrodes is expressed numerically, thereby describing the predictive effect of ESR (electrical characteristics).

[0100] In the following experiments, after adjusting the oxidizing and reducing atmospheres by changing the Wetter conditions (moisture supply) of the electrode sintering furnace, the degree of IMC formation in multilayer capacitors was correlated with ESR, and the appropriate value of IMC formation was determined when predicting ESR.

[0101] [Table 1]

[0102]

[0103] In this test, for small-sized samples (length in the X direction × width in the Y direction of 1.0 mm × 0.5 mm or less), three or more Cu-Ni IMCs formed at the center of a ×1500 cross section in the SEM image were counted and measured. In this case, the ESR was measured for each capacity using a measuring instrument according to the frequencies shown in Table 1.

[0104] [Table 2]

[0105]

[0106]

[0107] Referring to Table 2, it can be seen that in SEM images of the portion where the connection between the inner and outer electrodes is at 3 points in the ×1500 section, the ratio of the number of connections between the inner and outer electrodes to the number of inner electrodes (e.g., the ratio of intermetallic compound formation (e.g., the ratio of the total number of intermetallic compound layers to the total number of inner electrodes)) is greater than or equal to 55% in #3–#11, the ESR of the multilayer capacitor can be stably ensured.

[0108] [Table 3]

[0109]

[0110] Refer to Table 3 and Figure 4 It can be seen that when the average thickness of the connection between the inner and outer electrodes at three points in the ×3000 cross-section of the SEM image of the portion where the inner and outer electrodes connect is greater than or equal to 50% of the average thickness of the inner electrode, the ESR of the multilayer capacitor can be stably ensured. In this specification, the term "thickness" may refer to the thickness of a specific component measured in a direction perpendicular to the component surface, and the term "average thickness" may refer to the thickness measured along a direction parallel to the planar surface of the component (e.g., ...). Figure 3 The average thickness is the arithmetic mean of the thickness of the components measured at a predetermined number of points with equal intervals between them in a cross-section of the multilayer capacitor (in the XZ direction) that simultaneously passes through the center of the multilayer capacitor. The measurement of the average thickness is not limited to these examples; a person skilled in the art can choose the number of measurement points, the intervals between the measurement points, etc., if desired. For example, the number of measurement points could be 3, 5, or 10 per component, but is not limited to this. If multiple components are provided in the multilayer capacitor, the average thickness of the components can refer to the average of the average thicknesses of those multiple components. The thickness measurement at each measurement point can be performed using microscopic images (e.g., scanning electron microscope (SEM) images), but is not limited to this. Furthermore, the ratio of the number of connections between the inner and outer electrodes to the number of inner electrodes (%) in Table 2 and the ratio of the average thickness of the connection portion between the inner and outer electrodes to the average thickness of the inner electrode (%) in Table 3 can be controlled by the sintering temperature of the outer electrodes and the internal atmosphere of the furnace.

[0111] Figure 5 This is a perspective view schematically illustrating the mounting structure of a multilayer capacitor and a substrate according to an embodiment.

[0112] Reference Figure 5According to an embodiment, a board on which a multilayer capacitor is mounted includes: a substrate 210 having a first electrode pad 221 and a second electrode pad 222, the first electrode pad 221 and the second electrode pad 222 being spaced apart from each other on the upper surface of the substrate 210; and a multilayer capacitor 100 mounted on the substrate 210.

[0113] The multilayer capacitor 100 is connected and mounted on the substrate 210 with the first external electrode 130 and the second external electrode 140 respectively positioned in contact with the first electrode pad 221 and the second electrode pad 222.

[0114] In this case, the first external electrode 130 can be bonded to the first electrode pad 221 by solder 231 to be electrically and physically connected to the first electrode pad 221, and the second external electrode 140 can be bonded to the second electrode pad 222 by solder 232 to be electrically and physically connected to the second electrode pad 222.

[0115] In this case, the multilayer capacitor 100 is a multilayer capacitor according to the above embodiments of the present disclosure, and a detailed description thereof will be omitted to avoid redundancy.

[0116] As described above, according to the embodiments, there is an effect of reducing ESR while preventing cracking of multilayer capacitors.

[0117] While this disclosure includes specific examples, it will be readily understood by those skilled in the art that various changes in form and detail may be made to these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered descriptive only and not for limiting purposes. The description of features or aspects in each example is to be considered applicable to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order, and / or if the components in the described system, architecture, apparatus, or circuit are combined in a different manner, and / or if the components in the described system, architecture, apparatus, or circuit are replaced or supplemented by other components or their equivalents. Therefore, the scope of this disclosure is not limited by the specific embodiments but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents shall be construed as included in this disclosure.

Claims

1. A multilayer capacitor, comprising: The capacitor body includes a plurality of dielectric layers and a plurality of internal electrodes arranged alternately, wherein each of the plurality of dielectric layers is located between the plurality of internal electrodes; as well as External electrodes are disposed on the capacitor body to connect to the plurality of internal electrodes. At least one intermetallic compound layer is disposed in the region where the plurality of inner electrodes and the outer electrodes are connected. The total number of the at least one intermetallic compound layer is greater than or equal to 55% and less than 100% of the total number of the plurality of internal electrodes, and The ratio of the average thickness of the at least one intermetallic compound layer to the average thickness of the plurality of internal electrodes is greater than or equal to 50% and less than 100%.

2. The multilayer capacitor according to claim 1, wherein, The total number of the at least one intermetallic compound layer is 55% to 99% of the total number of the plurality of internal electrodes.

3. The multilayer capacitor according to claim 1, wherein, The ratio of the average thickness of the at least one intermetallic compound layer to the average thickness of the plurality of internal electrodes is greater than or equal to 50% and less than 90%.

4. The multilayer capacitor according to claim 1, wherein, The capacitor body includes: a first surface and a second surface opposite to each other in a first direction; a third surface and a fourth surface opposite to each other in a second direction perpendicular to the first direction; and a fifth surface and a sixth surface opposite to each other in a third direction perpendicular to both the first and second directions. In the capacitor body, a plurality of grooves are formed between the plurality of dielectric layers disposed along the first direction on the third and fourth surfaces. The at least one intermetallic compound layer is disposed in the plurality of grooves.

5. The multilayer capacitor according to claim 4, wherein, The average depth of the plurality of grooves is greater than or equal to 30 μm.

6. The multilayer capacitor according to claim 1, wherein, At the connection between the plurality of inner electrodes and the outer electrode, the average depth of the portion of the outer electrode that diffuses into the plurality of inner electrodes is greater than or equal to 30 μm.

7. The multilayer capacitor according to claim 1, wherein, The external electrode includes: An electrode layer is disposed on the capacitor body and in contact with the at least one intermetallic compound layer; and A conductive resin layer is disposed on the electrode layer and includes: a plurality of metal particles; a conductive connection portion surrounding each of the plurality of metal particles and contacting the electrode layer; and a matrix resin.

8. The multilayer capacitor according to claim 7, wherein, The plurality of metal particles in the conductive resin layer include at least one of copper, nickel, silver, silver-plated copper, and tin-plated copper.

9. The multilayer capacitor according to claim 7, wherein, The plurality of metal particles in the conductive resin layer have one of a spherical shape, a sheet shape, or a mixture of a spherical shape and a sheet shape.

10. The multilayer capacitor according to claim 7, wherein, The external electrode also includes a plating layer disposed on the conductive resin layer.

11. The multilayer capacitor according to claim 10, wherein, The coating comprises a nickel plating layer and a tin plating layer stacked sequentially on the conductive resin layer.

12. The multilayer capacitor according to claim 1, wherein, Each of the plurality of internal electrodes comprises nickel, and the at least one intermetallic compound layer comprises nickel-copper.

13. A plate on which a multilayer capacitor is mounted, the plate comprising: A substrate having a plurality of electrode pads located on one surface of the substrate; as well as The multilayer capacitor according to any one of claims 1-12 is mounted on the substrate, wherein the external electrode is connected to the plurality of electrode pads.

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