A Gallium Nitride Schottky Barrier Diode and Preparation Method

Abstract

A gallium nitride Schottky barrier diode and a preparation method thereof, which relate to gallium nitride power semiconductor devices. It includes a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate, and a metal electrode layer; the active region includes a drift layer and a first semiconductor layer of the active region that are connected in sequence; the first semiconductor layer of the active region, the drift layer, and two drift channels form an annular drift region structure. Compared with a lateral gallium nitride Schottky barrier diode structure with only a lateral drift region or a vertical gallium nitride Schottky barrier diode structure with only a vertical drift region, the total path length of the drift region is greater than that of a lateral device structure fabricated on the same substrate and epitaxial layer size, thereby increasing the blocking voltage of the gallium nitride Schottky barrier diode. This case has the characteristics of improving the blocking voltage of the device, and at the same time bringing the anode electrode, the cathode electrode, and the field plate electrode together on the top surface of the device structure to form a coplanar device input / output electrode structure, which is convenient for planar integration of the device, etc.

Description

Technical Field

[0001] The present invention relates to a gallium nitride power semiconductor device, in particular to a gallium nitride Schottky barrier diode with a high blocking voltage and a preparation method thereof, belonging to the technical field of power electronic devices. Background Art

[0002] As a typical representative of the third-generation semiconductors, gallium nitride materials have the advantages of a large bandgap, a high breakdown electric field, a large thermal conductivity, a high electron saturation drift velocity, and a strong radiation resistance. Gallium nitride Schottky barrier diodes (SBDs) have broad application prospects in fields such as 5G mobile communications, semiconductor lighting, and consumer electronics due to their high blocking voltage, high switching speed, and low power consumption.

[0003] The gallium nitride Schottky barrier diodes in the current technology mainly adopt two structural forms: a vertical SBD based on GaN bulk material and a lateral SBD based on a two-dimensional electron gas (2DEG) of heterojunctions such as AlGaN / GaN.

[0004] The vertical gallium nitride Schottky barrier diode is fabricated on a homoepitaxial gallium nitride semiconductor substrate. In the current technology, the vertical gallium nitride Schottky barrier diode generally increases the blocking voltage by increasing the longitudinal thickness of the drift region to achieve a high-power density chip. However, the defect density of the gallium nitride epitaxial semiconductor layer is proportional to the thickness of the epitaxial layer. The defect density in a relatively thick gallium nitride semiconductor epitaxial layer is large, which affects the improvement of key performance indicators of the device such as the blocking voltage and reverse leakage current. Moreover, the deficiencies in the size and cost of the current gallium nitride substrate preparation technology limit the preparation and application of gallium nitride Schottky barrier diodes based on self-supporting gallium nitride substrates.

[0005] The lateral gallium nitride Schottky barrier diode is fabricated on a heteroepitaxial gallium nitride semiconductor substrate, and the epitaxial substrate is an inexpensive silicon substrate, or a silicon carbide substrate, or a sapphire substrate. Compared with the vertical gallium nitride SBD, due to the high electron concentration and high mobility of 2DEG, the lateral gallium nitride SBD based on the AlGaN / GaN heterojunction has the characteristics of a small contact resistance, a small junction capacitance, and a high cut-off frequency. In the current technology, the lateral gallium nitride Schottky barrier diode generally obtains a higher blocking voltage by increasing the inter-pole spacing, that is, increasing the length of the drift region. Therefore, it will increase the chip size and on-resistance of the device, reduce the effective current density and chip performance per unit chip area, and the defect density of the gallium nitride semiconductor epitaxial layer fabricated on the heterogeneous material is large, which affects the improvement of key performance indicators of the device such as the blocking voltage, on-resistance, and reverse leakage current.

[0006] Moreover, in the vertical - structure gallium nitride Schottky - barrier diode, the anode electrode is located on the top surface of the device structure, the cathode electrode is located on the bottom surface of the device structure, or by fabricating a mesa structure, the cathode electrode is located on both sides of the bottom of the mesa. All of these are non - coplanar input - output electrode structures, which are not convenient for the planar integration of the device and its application in power integrated circuits. Summary of the Invention

[0007] In view of the above problems, the present invention provides a gallium nitride Schottky - barrier diode and a preparation method thereof. The diode adopts a two - dimensional annular drift region structure, increases the length of the drift region in the device structure, improves the breakdown voltage of the device, and at the same time, the anode electrode, the cathode electrode, and the field - plate electrode are concentrated on the top surface of the device structure, forming a coplanar device input - output electrode structure, which is convenient for the planar integration of the device and its application in power integrated circuits.

[0008] The technical solution of the present invention is as follows: A gallium nitride Schottky - barrier diode and a preparation method thereof, including the following steps:

[0009] 1) Prepare a substrate;

[0010] 2) Grow a transition layer on the substrate;

[0011] 3) Grow a drift layer on the transition layer;

[0012] 4) Grow an ohmic - contact layer on the drift layer;

[0013] 5) Use a deep - reactive - ion dry - etching method to etch the ohmic - contact layer and the drift layer to form an isolation - layer trench in the drift channel and an isolation - layer trench outside the drift channel;

[0014] 6) Deposit an insulating oxide to fill the isolation - layer trench in the drift channel and the isolation - layer trench outside the drift channel to form an isolation - layer in the drift channel and an isolation - layer outside the drift channel;

[0015] 7) Etch the two isolation - layers in the drift channel to form a field - plate trench;

[0016] 8) Deposit a field - plate metal layer to fill the field - plate trench to form a field - plate;

[0017] 9) Etch the ohmic - contact layer and the drift layer between the two isolation - layers in the drift channel to form an active - region groove;

[0018] 10) Grow an active - region first semiconductor layer connecting the drift layer in the active - region groove and fill the active - region groove;

[0019] 11) Use a photolithography method to form a photoresist mask layer for fabricating a field - plate insulating layer;

[0020] 12) Deposit a silicon - dioxide layer or a silicon - nitride layer for fabricating a field - plate insulating layer;

[0021] 13) Form the field plate insulating layer by a lift-off method;

[0022] 14) Form a photoresist mask layer for fabricating the anode electrode by a photolithography method;

[0023] 15) Deposit the anode electrode metal layer;

[0024] 16) Form the anode electrode by a lift-off method;

[0025] 17) Form a photoresist mask layer for fabricating the cathode electrode and the field plate electrode by a photolithography method;

[0026] 18) Deposit the cathode electrode and the field plate electrode metal layer, and form the cathode electrode and the field plate electrode by a lift-off method;

[0027] 19) Form an ohmic contact between the cathode electrode and the corresponding semiconductor layer by an annealing method.

[0028] It includes a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate, and a metal electrode layer;

[0029] The substrate, the transition layer, and the drift layer are sequentially connected from bottom to top;

[0030] There are two of the drift channels, and the active region and the drift layer are respectively connected to the upper end of the drift layer;

[0031] The two drift channels are respectively located on both sides of the active region and are isolated from the active region by an isolation layer in the drift channel;

[0032] The active region includes a drift layer and a first semiconductor layer of the active region that are sequentially connected from bottom to top;

[0033] The drift channel includes a channel drift layer, a drift channel ohmic contact layer that are sequentially connected from bottom to top, and an inner isolation layer and an outer isolation layer of the drift channel located on the inner and outer sides of the channel drift layer and the drift channel ohmic contact layer;

[0034] There are two of the field plates; the two field plates are respectively embedded in the corresponding inner isolation layer of the drift channel;

[0035] The metal electrode layer includes an anode electrode, a cathode electrode, and a field plate electrode;

[0036] The anode electrode is located at the top of the active region and is connected to the first semiconductor layer of the active region;

[0037] The cathode electrode is located at the top of the drift channel and is connected to the drift channel ohmic contact layer;

[0038] The field plate electrode is connected to the top of the field plate and is isolated from the active region by a field plate insulating layer.

[0039] The substrate is a Si substrate, a SiC substrate or a sapphire substrate.

[0040] The transition layer includes an AlN epitaxial layer.

[0041] It further includes an AlGaN epitaxial layer connected to the AlN epitaxial layer from bottom to top.

[0042] The first semiconductor layer of the active region, the drift layer, and the channel drift layer are respectively an N ― -GaN epitaxial layer or a P ― -GaN epitaxial layer;

[0043] The drift channel ohmic contact layer is an N + -GaN epitaxial layer or a P + -GaN epitaxial layer.

[0044] The inner isolation layer of the drift channel, the outer isolation layer of the drift channel, and the field plate insulating layer are respectively a silicon dioxide layer or a silicon nitride layer.

[0045] The field plate is a Ti / Au double metal layer.

[0046] The anode electrode is a Ni / Au double metal layer.

[0047] The cathode electrode and the field plate electrode are respectively a Ti / Al / Ti / Au multi-metal layer or a Cr / Al / Ti / Au multi-metal layer.

[0048] The present invention includes a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate, and a metal electrode layer; the active region includes a drift layer and a first semiconductor layer of the active region connected in sequence from bottom to top; the drift channel includes a channel drift layer, a drift channel ohmic contact layer connected in sequence from bottom to top, and an inner isolation layer and an outer isolation layer of the drift channel located on both the inner and outer sides of the channel drift layer and the drift channel ohmic contact layer; the first semiconductor layer of the active region, the drift layer, and the two drift channels form an annular drift region structure. Compared with a lateral gallium nitride Schottky barrier diode structure having only a lateral drift region or a vertical gallium nitride Schottky barrier diode structure having only a vertical drift region, the total path length of the drift region in the present invention is greater than the path length of the drift region in a gallium nitride Schottky barrier diode of a lateral device structure or a vertical device structure fabricated on the same substrate and epitaxial layer dimensions, thereby increasing the blocking voltage of the gallium nitride Schottky barrier diode. The present invention has the characteristics of improving the blocking voltage of the device, and at the same time, enabling the anode electrode, the cathode electrode, and the field plate electrode to converge on the top surface of the device structure, forming a coplanar device input / output electrode structure, which is convenient for planar integration of the device and application in power integrated circuits. Description of the Drawings

[0049] Figure 1 is the structural schematic diagram of the present invention,

[0050] Figure 2 is the structural schematic diagram of Step 4 of the present invention,

[0051] Figure 3 is the structural schematic diagram of Step 6 of the present invention,

[0052] Figure 4 is the structural schematic diagram of Step 8 of the present invention,

[0053] Figure 5 is the structural schematic diagram of Step 10 of the present invention,

[0054] Figure 6 is the structural schematic diagram of Step 13 of the present invention,

[0055] Figure 7 is the structural schematic diagram of Step 18 of the present invention. Detailed Embodiment

[0056] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0057] The present invention is as Figures 1-7 shown, a gallium nitride Schottky barrier diode and a preparation method thereof, comprising the following steps:

[0058] 1) Prepare a 6-inch Si substrate or SiC substrate or sapphire substrate;

[0059] 2) Use metalorganic chemical vapor deposition (MOCVD) method to grow a 0.5-μm-thick AlN transition layer on the substrate;

[0060] 3) Use MOCVD method to grow an 8-μm-thick N ― -GaN drift layer on the transition layer, with a Si doping concentration of 1x10 16 cm -3 ;

[0061] 4) Use MOCVD method to grow a 1-μm-thick N + -GaN ohmic contact layer on the drift layer, with a Si doping concentration of 6x10 19 cm -3 ; As Figure 2 shown;

[0062] 5) Etch the N + -GaN ohmic contact layer and the N ― -GaN drift layer by using deep ion dry etching methods such as reactive ion etching (RIE) or inductively coupled plasma (ICP) to form isolation trenches for the drift channel inside and outside the drift channel; + -GaN ohmic contact layer and N ― -GaN drift layer to form isolation trenches for the drift channel inside and outside the drift channel;

[0063] 6) Deposit insulating oxide (SiO 2 ) by using plasma enhanced chemical vapor deposition (PECVD) method to fill the isolation trenches for the drift channel inside and outside the drift channel to form the isolation layer for the drift channel inside and outside the drift channel; as 2 shown; Figure 3 shown;

[0064] 7) Etch the two isolation layers for the drift channel inside by using RIE or ICP method to form field plate trenches;

[0065] 8) Deposit Ti / Au by using electron beam sputtering or magnetron sputtering method to fill the field plate trenches to form field plates; as Figure 4 shown;

[0066] 9) Etch the N + -GaN ohmic contact layer and part of the N ― -GaN drift layer between the two isolation layers for the drift channel inside by using RIE or ICP method to form an active region groove; + -GaN ohmic contact layer and part of N ― -GaN drift layer to form an active region groove;

[0067] 10) Grow a 5.5-μm-thick N ― -GaN active region first semiconductor layer connecting the drift layer in the active region groove by using MOCVD method and fill the active region groove, with Si doping concentration of 1x10 ― cm 16 ; as -3 shown; Figure 5 shown;

[0068] 11) Form a photoresist mask layer for fabricating the field plate insulating layer by using photolithography method;

[0069] 12) Deposit a silicon dioxide layer or a silicon nitride layer for fabricating the field plate insulating layer by using low pressure chemical vapor deposition (LPCVD) method;

[0070] 13) Form the field plate insulating layer by using the lift-off method; as Figure 6 shown;

[0071] 14) Form a photoresist mask layer for fabricating the anode electrode (Schottky electrode) by using photolithography method;

[0072] 15) Deposit a Ni / Au multi-metal layer by using electron beam sputtering or magnetron sputtering method;

[0073] 16) The anode electrode (Schottky electrode) is formed by a lift-off method;

[0074] 17) A photoresist mask layer for fabricating the cathode electrode and the field plate electrode is formed by a photolithography method;

[0075] 18) A Ti / Al / Ti / Au multi-metal layer is deposited by an electron beam sputtering or magnetron sputtering method, and the cathode electrode and the field plate electrode are formed by a lift-off method; as Figure 7 shown;

[0076] 19) An ohmic contact between the cathode electrode and the corresponding semiconductor layer is formed by annealing in an N 2 atmosphere at 600 °C.

[0077] A gallium nitride Schottky barrier diode includes a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate, and a metal electrode layer;

[0078] The substrate, the transition layer, and the drift layer are sequentially arranged in contact from bottom to top;

[0079] There are two drift channels, and the active region and the drift layer are respectively connected to the upper end of the drift layer;

[0080] The two drift channels are respectively located on both sides of the active region and are isolated from the active region by an isolation layer in the drift channel;

[0081] The active region includes a drift layer and a first semiconductor layer of the active region that are sequentially connected in contact from bottom to top;

[0082] The drift channel includes a channel drift layer, a drift channel ohmic contact layer, and an inner isolation layer and an outer isolation layer of the drift channel that are located on the inner and outer sides of the channel drift layer and the drift channel ohmic contact layer; ( Figure 1 The dotted-line frame drift channel in the figure should extend towards the inner isolation layer of the drift channel and should include the entire inner isolation layer of the drift channel, but this will include the field plate, so a part of the inner isolation layer of the drift channel is framed)

[0083] There are two field plates; the two field plates are respectively embedded in the corresponding inner isolation layers of the drift channels;

[0084] The metal electrode layer includes an anode electrode (Schottky electrode), a cathode electrode, and a field plate electrode;

[0085] The anode electrode is located at the top of the active region and is in contact with the first semiconductor layer of the active region;

[0086] The cathode electrode is located at the top of the drift channel and is in contact with the drift channel ohmic contact layer;

[0087] The field plate electrode is connected to the top of the field plate and isolated from the active region by a field plate insulating layer.

[0088] The substrate is a Si substrate, a SiC substrate, or a sapphire substrate.

[0089] The transition layer includes an AlN epitaxial layer.

[0090] It further includes an AlGaN epitaxial layer connected to the AlN epitaxial layer from bottom to top.

[0091] The first semiconductor layer, the drift layer, and the channel drift layer of the active region are N ― -GaN epitaxial layers, or P ― -GaN epitaxial layers;

[0092] The drift channel ohmic contact layer is an N + -GaN epitaxial layer, or P + -GaN epitaxial layer. The inner isolation layer, the outer isolation layer, and the field plate insulating layer in the drift channel are silicon dioxide layers or silicon nitride layers respectively.

[0093] The field plate is a Ti / Au double metal layer.

[0094] The anode electrode (Schottky electrode) is a Ni / Au double metal layer.

[0095] The cathode electrode and the field plate electrode are Ti / Al / Ti / Au multi-metal layers or Cr / Al / Ti / Au multi-metal layers respectively.

[0096] The working process of the device of the present invention:

[0097] A Schottky contact is formed between the first semiconductor layer and the anode electrode (Schottky electrode) in the present invention, constituting the functional region structure of the gallium nitride Schottky barrier diode of the present invention. The first semiconductor layer is simultaneously used as the drift layer, and the second semiconductor layer is used for forming the ohmic contact of the cathode electrode. When forward-biased, the gallium nitride Schottky barrier diode conducts. When reverse-biased, the gallium nitride Schottky barrier diode has a high blocking voltage due to the large bandgap width and high breakdown electric field characteristics of the gallium nitride material. And because the total path length of the unique annular drift region in the present invention is greater than the path length of the drift region in the gallium nitride Schottky barrier diode with a lateral structure or a vertical structure fabricated on the same-sized substrate and epitaxial layer, the blocking voltage of the gallium nitride Schottky barrier diode is further increased. At the same time, the anode electrode, the cathode electrode, and the field plate electrode of the device converge on the top surface of its structure, forming a coplanar device input / output electrode structure, which is convenient for realizing the planar integration of the device and its application in power integrated circuits.

[0098] The first semiconductor layer of the active area, the drift layer and the two drift channels in the present invention form an annular drift zone structure. Compared with a lateral gallium nitride Schottky barrier diode structure with only a lateral drift zone or a vertical gallium nitride Schottky barrier diode structure with only a vertical drift zone, the total path length of the drift zone in the present invention is greater than the path length of the drift zone in a lateral device structure or a vertical device structure of a gallium nitride Schottky barrier diode made on the same substrate and epitaxial layer size, thereby increasing the blocking voltage of the gallium nitride Schottky barrier diode.

[0099] In the present invention, the field plate either applies a potential alone through the field plate electrode, or is connected to the anode electrode to apply a potential, or is connected to the cathode electrode to apply a potential, thereby optimizing the electric field distribution on the annular drift path and further improving the blocking voltage of the gallium nitride Schottky barrier diode.

[0100] Compared with lateral gallium nitride Schottky barrier diodes that require a longer lateral drift region or vertical gallium nitride Schottky barrier diodes that require a thicker vertical drift region, the unique ring-shaped current drift region structure of the present invention does not require a longer or thicker gallium nitride epitaxial layer, and can use the silicon-based gallium nitride substrate material with relatively mature technology and relatively low price in the current technology to produce high blocking voltage gallium nitride Schottky barrier diodes to meet the needs of large-scale applications.

[0101] At the same time, the unique annular current drift region structure of the present invention brings together the anode electrode, cathode electrode and field plate electrode of the device on the top surface of the structure, that is, the gallium nitride Schottky barrier diode of the present invention has the characteristics of a coplanar input and output electrode structure, which facilitates the planar integration of the device and its application in power integrated circuits.

[0102] The field plate used to adjust the junction terminal electric field in the present invention can apply power to the field plate electrode alone, or be connected to the anode electrode to apply the same power supply potential, or be connected to the cathode electrode to apply the same power supply potential.

[0103] Each structural element of the present invention is in a circular or arbitrary polygonal structure, and accordingly, the device chip of the present invention has a circular or arbitrary polygonal shape.

[0104] Regarding the contents disclosed in this case, there are a few points that need to be explained:

[0105] (1) The drawings of the embodiments disclosed in this case only involve the structures involved in the embodiments disclosed in this case. Other structures can refer to the general design;

[0106] (2) In the absence of conflict, the embodiments and features of the embodiments disclosed in this case may be combined with each other to obtain new embodiments;

[0107] The above are only the specific implementation manners disclosed in this case, but the protection scope of this disclosure is not limited thereto. The protection scope disclosed in this case shall be subject to the protection scope of the claims.

Claims

1. A method for fabricating a gallium nitride Schottky barrier diode, characterized in that, it comprises the following steps: 1) Prepare a substrate; 2) Grow a transition layer on the substrate; 3) Grow a drift layer on the transition layer; 4) Grow an ohmic contact layer on the drift layer; 5) Use a deep reactive ion dry etching method to etch the ohmic contact layer and the drift layer to form an isolation layer trench inside the drift channel and an isolation layer trench outside the drift channel; 6) Deposit an insulating oxide to fill the isolation layer trench inside the drift channel and the isolation layer trench outside the drift channel to form an isolation layer inside the drift channel and an isolation layer outside the drift channel; 7) Etch the two isolation layers inside the drift channel to form field plate trenches; 8) Deposit a field plate metal layer to fill the field plate trenches to form field plates; 9) Etch the ohmic contact layer and the drift layer between the two isolation layers inside the drift channel to form an active region groove; 10) Grow an active region first semiconductor layer connecting to the drift layer in the active region groove and fill the active region groove; 11) Use a photolithography method to form a photoresist mask layer for fabricating a field plate insulating layer; 12) Deposit a silicon dioxide layer or a silicon nitride layer for fabricating a field plate insulating layer; 13) Use a lift-off method to form a field plate insulating layer; 14) Use a photolithography method to form a photoresist mask layer for fabricating an anode electrode; 15) Deposit an anode electrode metal layer; 16) Use a lift-off method to form an anode electrode; 17) Use a photolithography method to form a photoresist mask layer for fabricating a cathode electrode and a field plate electrode; 18) Deposit a cathode electrode and a field plate electrode metal layer, and use a lift-off method to form a cathode electrode and a field plate electrode; 19) Use an annealing method to form an ohmic contact between the cathode electrode and the corresponding semiconductor layer.

2. A gallium nitride Schottky barrier diode, characterized in that, it comprises a substrate, a transition layer, a drift layer, an active region, a drift channel, a field plate and a metal electrode layer; the substrate, the transition layer and the drift layer are sequentially connected and arranged from bottom to top; there are two drift channels, and the active region is respectively connected to the upper end of the drift layer; the two drift channels are respectively located on both sides of the active region and are isolated from the active region by an isolation layer inside the drift channel; the active region comprises a drift layer and an active region first semiconductor layer connected in sequence from bottom to top; the drift channel comprises a channel drift layer, a drift channel ohmic contact layer connected in sequence from bottom to top, and an isolation layer inside the drift channel and an isolation layer outside the drift channel located on the inner and outer sides of the channel drift layer and the drift channel ohmic contact layer; there are two field plates; the two field plates are respectively embedded in the corresponding isolation layer inside the drift channel; the metal electrode layer comprises an anode electrode, a cathode electrode and a field plate electrode; the anode electrode is located at the top of the active region and is connected to the active region first semiconductor layer; the cathode electrode is located at the top of the drift channel and is connected to the drift channel ohmic contact layer; the field plate electrode is connected to the top of the field plate and is isolated from the active region by a field plate insulating layer; the substrate is a Si substrate, a SiC substrate or a sapphire substrate; the isolation layer inside the drift channel, the isolation layer outside the drift channel and the field plate insulating layer are respectively a silicon dioxide layer or a silicon nitride layer.

3. A gallium nitride Schottky barrier diode according to claim 2, characterized in that, the transition layer includes an AlN epitaxial layer.

4. A gallium nitride Schottky barrier diode according to claim 3, characterized in that, it further includes an AlGaN epitaxial layer connected to the AlN epitaxial layer from bottom to top.

5. A gallium nitride Schottky barrier diode according to claim 2, characterized in that, The first semiconductor layer of the active region, the drift layer, and the channel drift layer are respectively N ― -GaN epitaxial layer or P ― -GaN epitaxial layer; The drift channel ohmic contact layer is an N + -GaN epitaxial layer or a P + -GaN epitaxial layer.

6. A gallium nitride Schottky barrier diode according to claim 2, characterized in that, the field plate is a Ti / Au bimetallic layer.

7. A gallium nitride Schottky barrier diode according to claim 2, characterized in that, the anode electrode is a Ni / Au bimetallic layer.

8. A gallium nitride Schottky barrier diode according to claim 2, characterized in that, the cathode electrode and the field plate electrode are respectively a Ti / Al / Ti / Au multi-metal layer or a Cr / Al / Ti / Au multi-metal layer.

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