FinFET device, method of forming the same, and electronic device

Abstract

This invention provides a FinFET device and its formation method. Before etching, the method involves covering fins with a protective film, then photolithographically etching the fins to form a first etch pattern on a first set of fins, the first set of fins including a first fin structure to be removed. Next, the first etch pattern is used to etch the first set of fins and the corresponding protective film, removing the first fin structure and forming a first set of pre-defined fins. Then, isotropic etching is used to remove any remaining first fin structure, forming a concave structure on the substrate corresponding to the first set of fins. This avoids the rounded corner problem left after etching in the prior art; simultaneously, the formed concave structure helps maintain a horizontal line and prevents device bending.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more particularly to a FinFET device, a method for forming the same, and an electronic device thereof. Background Technology

[0002] In the field of semiconductor integrated circuit devices, field-effect transistors (FETs) have always been the main semiconductor devices used to manufacture application-specific integrated circuit chips, static random access memory (SRAM) chips, and other products.

[0003] The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the evolution of ICs, functional density (i.e., the number of interconnected devices per chip area) has generally increased, while geometric dimensions (i.e., the smallest components or lines that can be made using manufacturing processes) have decreased. This scaling down generally provides benefits by increasing production efficiency and reducing associated costs. Such scaling down has also increased the complexity of handling and manufacturing ICs, and similar advancements in semiconductor manufacturing are needed to achieve such advancements.

[0004] For example, as the semiconductor industry has progressed to pursuing higher device density, higher performance, and lower cost nanotechnology processing nodes, the challenges from both manufacturing and design have led to the development of FinFET devices. In traditional FinFET device fabrication methods, the fin-cut-last process involves first forming an array of fins, then removing excess fins through horizontal and vertical cuts to form the desired fin structure. However, during the formation of the desired mask pattern using photolithography, the optical proximity effect can easily cause a certain degree of distortion in the ideal image spectrum, resulting in the intended right-angled regions becoming rounded regions. In particular, during fin cutting, the intersection of the horizontal and vertical cuts after cutting is prone to rounding, leading to incomplete fin removal and consequently affecting the performance of the final FinFET device. Summary of the Invention

[0005] The purpose of this invention is to provide a FinFET device, a method for forming the same, and an electronic device thereof.

[0006] The technical solution adopted in this invention is: a method for constructing a FinFET device, characterized by comprising the following steps:

[0007] Multiple fins are formed on a semiconductor substrate;

[0008] The surfaces of the plurality of fins are covered with a protective film;

[0009] The plurality of fins are subjected to photolithography to form a first etched pattern on a first set of fins, the first set of fins including a first fin structure to be removed;

[0010] The first set of fins and the corresponding protective film are etched by the first etching pattern to remove the first fin structure and form the first set of preset fins.

[0011] Isotropic etching continues to remove the remaining first fin structure and forms a concave structure on the substrate corresponding to the first set of fins.

[0012] The method for forming a FinFET device provided by the present invention further includes:

[0013] After the isotropic etching process, the remaining protective film on the first set of fins is removed.

[0014] The method for forming a FinFET device provided by the present invention further includes:

[0015] The plurality of fins are subjected to photolithography to form a second etched pattern on a second set of fins, the second set of fins including a second fin structure to be removed;

[0016] The second set of fins is etched by the second etching pattern to remove the second fin structure and form the second set of preset fins, while a convex structure is formed on the substrate corresponding to the second set of fins.

[0017] In the method for forming a FinFET device provided by the present invention, the etching direction of etching the first group of fins is perpendicular to the etching direction of etching the second group of fins.

[0018] According to another aspect of the present invention, a FinFET device is also provided, comprising:

[0019] Semiconductor substrates; and

[0020] Multiple fins formed on the semiconductor substrate;

[0021] One or more convex structures and one or more concave structures, the convex structures and the convex structures respectively corresponding to a set of fins removed from the semiconductor substrate.

[0022] According to another aspect of the invention, a sub-device is also provided, comprising the FinFET device as described above.

[0023] The FinFET device, its formation method, and electronic device of the present invention have the following beneficial effects: The FinFET device formation method provided by the present invention involves covering the fins with a protective film before etching, then photolithographically etching the fins to form a first etching pattern on a first set of fins, the first set of fins including a first fin structure to be removed; subsequently, the first set of fins and the corresponding protective film are etched using the first etching pattern; then, the remaining first fin structure is removed by isotropic etching, and a concave structure is formed on the substrate corresponding to the first set of fins. This avoids the rounded corner problem left after etching in the prior art; simultaneously, the formed concave structure helps maintain a horizontal line and prevents device bending. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort:

[0025] Figure 1 This is a flowchart of a method for forming SRAM according to an embodiment of the present invention;

[0026] Figures 2-11 These are top views and cross-sectional schematic diagrams of the various stages of the FinFET device fabrication method according to the present invention. Detailed Implementation

[0027] The following discloses many different implementations or examples to carry out different features of the embodiments of the present invention. Specific examples of elements and their arrangements are described below to illustrate the embodiments of the present invention. Of course, these examples are merely illustrative and should not be construed as limiting the scope of the embodiments of the present invention. For example, the description mentioning that a first feature is formed on a second feature includes embodiments where the first and second features are in direct contact, and also includes embodiments where there are other features between the first and second features, i.e., the first and second features are not in direct contact. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the embodiments of the present invention and do not represent a specific relationship between the different embodiments and / or structures discussed.

[0028] Furthermore, spatially related terms may be used, such as "below," "below," "lower," "above," "higher," and similar terms. These spatially related terms are used to facilitate the description of the relationship between one or more elements or features in the illustration and another element or feature(s). These spatially related terms include different orientations of the device in use or operation, as well as the orientations described in the illustration. When the device is turned to a different orientation (rotated 90 degrees or other orientations), the spatially related adjectives used will also be interpreted according to the orientation after the turn.

[0029] While the steps in some embodiments are performed in a specific order, these steps can also be performed in other logical orders. In different embodiments, some of the described steps may be replaced or omitted, and other operations may be performed before, during, and / or after the steps described in the embodiments of the present invention. Other features may be added to the semiconductor device structure in the embodiments of the present invention. In different embodiments, some features may be replaced or omitted.

[0030] This invention provides a method for forming a FinFET device. Before etching, a protective film is used to cover fins, and then photolithography is performed on the fins to form a first etching pattern on a first set of fins, the first set of fins including a first fin structure to be removed. Then, the first fins and the corresponding protective film are etched using the first etching pattern. Afterwards, the remaining first fin structure is removed by isotropic etching, and a concave structure is formed on the substrate corresponding to the first set of fins. This invention, based on the protective film covering the fin structure, removes the rounded corner area where horizontal and vertical cuts intersect using wet etching, avoiding the problem of incomplete fin structure removal. Simultaneously, by forming a concave structure below the substrate horizontal line, the space between the contact plug and the substrate is increased, reducing the risk of the contact plug abutting the substrate. Furthermore, the concave structure, in conjunction with the convex structure formed above the substrate horizontal line, improves the stability of the device structure and reduces the risk of fin structure tilting or bending.

[0031] Figure 1 The diagram shows a flowchart of a method 10 for forming a FinFET device according to an embodiment of the present invention; Figures 2-10 These are top views and cross-sectional diagrams illustrating each stage of the fabrication method for the FinFET device according to the invention. The following will... Figure 1 flowchart pairing Figures 2 to 10 The schematic diagram illustrates an embodiment of the present invention.

[0032] like Figure 1 and Figure 2 As illustrated, method 10 begins with step 101, in which a plurality of fins 202 (202a-202f) are formed on a semiconductor substrate 201;

[0033] Specifically, in some embodiments, Figure 2 The substrate 201 may be a semiconductor substrate, which may include elemental semiconductors such as silicon (Si) and germanium (Ge); compound semiconductors such as gallium nitride (GaN), silicon carbide (SiC), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium arsenide (InAs), indium antimonide (InSb); alloy semiconductors such as silicon-germanium alloy (SiGe), gallium arsenide-gallium phosphide alloy (GaAsP), aluminum-indium arsenide alloy (AlInAs), aluminum-gallium arsenide alloy (AlGaAs), gallium arsenide-gallium phosphide alloy (GaInAs), gallium arsenide-gallium phosphide alloy (GaInP), gallium arsenide-gallium phosphide alloy (GaInAsP), or combinations of the above materials.

[0034] Specifically, in some embodiments, the fin structure (including multiple fins 202a-202f) is formed by any suitable process, such as photolithography and etching. For example, in this embodiment, the fin structure is formed by: depositing a mixed resist layer on a semiconductor substrate; patterning the resist to form gaps in the mixed resist layer; and performing etching to form the fin structure.

[0035] In some embodiments, the fin structure is formed by exposing a photoresist layer under a pattern, performing a post-exposure baking process, and developing the photoresist layer to form a mask element comprising the photoresist layer and a mask layer. Photoresist layer patterning may include the following steps: photoresist coating, soft baking, mask alignment, exposing the pattern, post-exposure baking, developing the photoresist, and hard baking. In some embodiments, patterning may also be implemented or replaced by other suitable methods, such as maskless lithography, electron beam writing, ion beam writing, and molecular imprinting. The mask element (including the photoresist layer and the mask layer) is then used in an etching process to etch the fin structure into the semiconductor substrate 201. The etching process uses the patterned mask layer to define the area to be etched and to protect other areas of the CMOS FinFET device. In some embodiments, the etching process is a dry etching process. In one example, the dry etching process for etching the semiconductor substrate 201 includes a chemical substance containing a halogen gas. In another example, the chemicals used in dry etching include halogen-containing molecules such as Cl2, HBr, CF4, SF6, or NF3. Alternatively, the fin structure is formed using a dual-patterning lithography (DPL) process. DPL is a method of patterning a semiconductor substrate by dividing the pattern into two interlaced patterns. DPL allows for increased component density (e.g., fins). Various DPL methods that can be used include double exposure (e.g., using two sets of masks).

[0036] Specifically, it should be noted that the methods for forming multiple fins are merely exemplary and are not limited to the methods described above.

[0037] like Figure 1 and Figure 3 As illustrated, method 10 then proceeds to step 102, covering the surface of the plurality of fins 202 with a protective film 203.

[0038] Specifically, in some embodiments, the constituent materials of the protective film 203 may vary depending on the specific application, as it may be composed of various materials such as silicon dioxide, silicon nitride, and silicon oxynitride. Furthermore, the protective film 203 may be composed of multiple layers of materials, such as a stack of materials comprising a silicon dioxide layer (e.g., pad oxide), a silicon nitride layer (e.g., pad nitride), and a silicon dioxide protective layer.

[0039] like Figure 1 and Figure 4 and Figure 5 As illustrated, method 10 then proceeds to step 103, performing photolithography on the plurality of fins 202 to form a first etched pattern 204 on a first set of fins (e.g., fins 202c and 202d), the first set of fins containing a first fin structure to be removed.

[0040] Specifically, in some embodiments, such as Figure 4 As shown, a photoresist layer 205 is formed on top of the protective film 203, and then a first etched pattern 204 is formed on the first set of fins by exposure, development and washing with pure water. The photoresist layer 205 can be a multilayer structure made of different materials.

[0041] like Figure 1 and Figure 6 As illustrated, method 10 then proceeds to step 104, etching the first set of fins and corresponding protective films through the first etching pattern, removing the first fin structure and forming the first set of preset fins (210a and 210b), and then removing the photoresist layer 205. Figure 5 and Figure 6 As shown, after etching the fins 202c and 202d using the first etching pattern, residual portions 206a and 206b of the first fin structure remain at the intersection of the cuts.

[0042] Specifically, in some embodiments, the etching process may be a dry etching process (e.g., reactive ion etching, anisotropic plasma etching); in some embodiments, the dry etching process may be implemented with oxygen-containing gas, halogen-containing gas (e.g., CF4, SF6, CH2F2, CHF3, HBr, N2 and / or Cl2), other suitable gases and / or plasma, and / or combinations thereof.

[0043] like Figure 1 and Figure 7As illustrated, method 10 then proceeds to step 105, isotropically etching away the remaining portions 206a and 206b of the first fin structure, and forming recessed structures 207a and 207b on the substrate corresponding to the first set of fins.

[0044] Specifically, in some embodiments, after etching the first set of fins in step 104 above, residual portions 206a and 206b remain in the first fin structure due to the rounded corners. Therefore, the residual portions 206a and 206b are removed by an isotropic etching process. In the isotropic etching process, the remaining portions of the first set of fins (202c and 202d) are removed to form concave structures 207a and 207b with arc-shaped cross-sections. To achieve isotropic etching, the isotropic etching process can be performed by dry or wet processes. In a dry process embodiment, the concave structure of the semiconductor device is formed by controlling factors such as etching time and etching gas. However, more preferably, a wet process is used, which has a better removal effect on the residual portions 206a and 206b. In one embodiment, the wet process can use etchants such as ammonia or tetramethylammonium hydroxide (TMAH).

[0045] like Figure 1 and Figure 8 As illustrated, method 10 then proceeds to step 106, after the isotropic etching process, removing the remaining protective film on the first set of fins.

[0046] After steps 101-106 above, the processing of the first group of fins (202c and 202d) is completed, forming the first group of pre-designed fins and concave structures. Here, the first group of fins includes two fins (202c and 202d). Those skilled in the art will understand that the first group of fins may also include other numbers of fins, and this invention does not specifically limit this. Figure 2-8 As shown, when processing the first group of fins, a horizontal cutting process is performed. Those skilled in the art will understand that a vertical cutting process can also be performed, but this invention does not limit the scope of the cutting process.

[0047] Next, as Figure 1 and Figure 9 As illustrated, method 10 then proceeds to step 107, performing photolithography on the plurality of fins to form a second etched pattern on a second set of fins (e.g., fins 202e and 202f), the second set of fins containing the second fin structure to be removed.

[0048] Specifically, in some embodiments, a photoresist layer 208 is coated, and then a second etched pattern is formed on the second set of fins by exposure, development and washing with pure water.

[0049] like Figure 1 and Figure 10 As illustrated, method 10 then proceeds to step 108, etching the second set of fins through the second etching pattern, removing the second fin structure and forming the second set of preset fins (211a and 211b), while forming convex structures 209a and 209b on the substrate corresponding to the second set of fins.

[0050] Specifically, in some embodiments, the etching process may be a dry etching process (e.g., reactive ion etching, anisotropic plasma etching).

[0051] like Figure 1 and Figure 11 As shown in the figure, method 10 then proceeds to step 109, peeling off the photoresist layer.

[0052] After steps 107-109 above, the processing of the second group of fins (202e and 202f) adjacent to the first group of fins is completed. Figure 9-11 As shown, when processing the second group of fins, a vertical cutting process is performed. Those skilled in the art will understand that a horizontal cutting process is used when processing the first group of fins, and therefore a vertical cutting process is used when processing the second group of fins. In other embodiments, a vertical cutting process is used when processing the first group of fins, while a horizontal cutting process is used when processing the second group of fins. This invention does not limit this.

[0053] In some embodiments, according to the above-described fabrication method, a recessed structure below the substrate horizontal line is formed in a device structure, wherein fin structures (not shown herein) are respectively provided on both sides of the recessed structure. Subsequently, contact plugs are formed above the fin structures on both sides of the recessed structure. Thus, the recessed structure increases the space between the contact plugs and the substrate, reducing the risk of the contact plugs abutting against the substrate.

[0054] The present invention also provides an electronic device comprising a FinFET device manufactured according to an exemplary embodiment of the present invention. The electronic device may be any electronic product or device such as a mobile phone, tablet computer, laptop computer, netbook, game console, television, VCD player, DVD player, navigator, camera, camcorder, voice recorder, MP3 player, MP4 player, PSP, etc., or any intermediate product including the FinFET device. The electronic device, due to the use of the FinFET device, has better performance.

[0055] The present invention has been described through the above embodiments. However, it should be understood that the above embodiments are for illustrative purposes only and are not intended to limit the invention to the scope of the described embodiments. Furthermore, those skilled in the art will understand that the present invention is not limited to the above embodiments, and many more variations and modifications can be made based on the teachings of the present invention, all of which fall within the scope of protection claimed by the present invention. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for forming a FinFET device, characterized in that, Includes the following steps: Multiple fins are formed on a semiconductor substrate; The surfaces of the plurality of fins are covered with a protective film; The plurality of fins are subjected to photolithography to form a first etched pattern on a first set of fins, the first set of fins including a first fin structure to be removed; Two etching processes are performed. The first etching process is performed through the first etching pattern to etch the first set of fins and the corresponding protective film, remove the first fin structure and form the first set of preset fins. The intersection of the horizontal and vertical cuts forms the residual first fin structure. A second etching process is performed, which is an isotropic etching process, to further remove the residual first fin structure and form a concave structure on the substrate corresponding to the first group of fins. The concave structure is lower than the horizontal line of the substrate. The plurality of fins are subjected to photolithography to form a second etched pattern on a second set of fins, the second set of fins including a second fin structure to be removed; The second set of fins is etched by the second etching pattern to remove the second fin structure and form the second set of preset fins. At the same time, a convex structure is formed on the substrate corresponding to the second set of fins, and the convex structure is higher than the horizontal line of the substrate.

2. The method for forming a FinFET device according to claim 1, characterized in that, Also includes: After the isotropic etching process, the remaining protective film on the first set of fins is removed.

3. The method for forming a FinFET device according to claim 1, characterized in that, The etching direction of the first set of fins is perpendicular to the etching direction of the second set of fins.

4. A FinFET device, characterized in that, include: Semiconductor substrate; as well as A plurality of fins are formed on the semiconductor substrate, the plurality of fins including a first group of fins and a second group of fins; The first set of pre-defined fins is obtained by removing a portion of the fins in the first set of fins; The second set of pre-defined fins is obtained by removing a portion of the fins in the second set of fins; One or more convex structures and one or more concave structures, the concave structures and the convex structures respectively corresponding to the first set of fins and the second set of fins removed from the semiconductor substrate, the concave structures being below the substrate horizontal line and the convex structures being above the substrate horizontal line.

5. An electronic device, characterized in that, Includes the FinFET device as described in claim 4.

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