Method of making through-silicon vias

Abstract

The embodiment of the present application provides a method for manufacturing a through silicon via, comprising the following steps: providing a silicon substrate, wherein the upper surface of the silicon substrate has a microstructure; processing the lower part of the silicon substrate to thin the silicon substrate to a predetermined thickness; fixing the lower surface of the silicon substrate to an etching surface; etching a groove through the silicon substrate from the upper surface of the silicon substrate downwards, so as to form a through silicon via; thus, the grinding liquid can be prevented from flowing into the microstructure such as a flow channel, so that permanent stains are not formed in the microstructure, and the performance of a chip is prevented from being seriously affected.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and more particularly to a method for fabricating through-silicon vias (TSVs). Background Technology

[0002] Through Silicon Via (TSV) technology is a high-density packaging technology that can penetrate a silicon wafer or chip and achieve electrical interconnection in the vertical direction by filling it with conductive material.

[0003] Existing methods for fabricating through-silicon vias (TSVs) involve first etching a groove of a certain depth on the upper surface of a silicon substrate, and then thinning the lower part of the substrate until the groove is complete. However, this existing method is only suitable for fabricating silicon substrates with relatively simple front-side structures. Summary of the Invention

[0004] The technical problem solved by this invention is that existing through-silicon via (TSV) fabrication methods are only suitable for fabricating silicon substrates with relatively simple front-side structures.

[0005] This invention provides a method for fabricating through-silicon vias (TSVs), comprising: providing a silicon substrate having a microstructure on its upper surface; processing the lower portion of the silicon substrate to thin it to a predetermined thickness; fixing the lower surface of the silicon substrate to an etched surface; and etching a groove penetrating the silicon substrate downward from the upper surface of the silicon substrate, thereby forming a TSV.

[0006] Optionally, the microstructure is connected to a through-silicon via.

[0007] Optionally, the microstructure is a flow channel for fluid flow, located on the upper surface of the silicon substrate of the microfluidic chip.

[0008] Optionally, the flow channel has a circular structure in the top view of the silicon substrate, with a diameter larger than that of the through-silicon via.

[0009] Optionally, the depth of the flow channel does not exceed 100 micrometers (μm).

[0010] Optionally, the method includes grinding the lower portion of the silicon substrate to thin it to a predetermined thickness.

[0011] Optionally, the predetermined thickness is between 300 μm and 700 μm.

[0012] Optionally, the method includes fixing the lower surface of the silicon substrate to the etched surface using an electrostatic film.

[0013] Optionally, the method includes removing the electrostatic film after forming the through-silicon via.

[0014] The technical solutions of the embodiments of the present invention have beneficial effects. For example, when fabricating through-silicon vias on a silicon substrate with a relatively complex front-side structure, it is possible to prevent polishing slurry from flowing into microstructures such as channels, thereby preventing the formation of permanent stains in the microstructures and thus avoiding serious impact on the chip performance. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the steps involved in fabricating through-silicon vias (TSVs) in the prior art.

[0016] Figure 2 This is a top view of a silicon substrate with through-silicon vias in the prior art;

[0017] Figure 3 This is a flowchart of the fabrication of through-silicon vias in an embodiment of the present invention;

[0018] Figure 4 This is a schematic diagram of the steps for fabricating through-silicon vias in an embodiment of the present invention. Detailed Implementation

[0019] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0020] In existing technologies, the method for fabricating through-silicon vias (TSVs) involves first etching a groove of a certain depth on the upper surface of a silicon substrate, and then thinning the lower part of the silicon substrate through a grinding process until the groove is fully formed to create a TSV. During the grinding process, a grinding slurry is used to improve grinding efficiency and reduce wear on the grinding tool. When the groove is fully formed, the grinding slurry flowing on the lower surface of the silicon substrate flows along the through-silicon via to the upper surface. If the upper surface has a simple structure, such as a continuous smooth plane, it is easy to remove contaminants formed on the upper surface.

[0021] However, this existing method is only suitable for fabricating silicon substrates with relatively simple front structures, especially those with a continuous smooth upper surface. For silicon substrates with more complex upper surface structures, there will be problems in the process of fabricating through-silicon vias.

[0022] For example, microfluidic chips can be manufactured using microelectromechanical systems (MEMS) and are widely used in biochemical analysis and precision optics. The upper surface of the silicon substrate used for microfluidic chips has channels through which tiny volumes of fluid can flow, and its structure is relatively complex.

[0023] During the process of thinning the lower part of the silicon substrate through the polishing process, when the groove is opened, the polishing slurry flowing on the lower surface of the silicon substrate will flow along the through silicon vias into the complex structure on the upper surface. The polishing slurry cannot be removed in this tiny and complex structure, thus forming permanent stains, which seriously affects the performance of the chip.

[0024] Figure 1 The illustration shows steps 1a to 1e of fabricating through-silicon vias in the prior art.

[0025] In the execution of step 1a, a silicon substrate is provided, the upper surface of which has flow channels.

[0026] In step 1b, a groove (i.e. a straight groove) of a certain depth is etched downwards from the upper surface (which can be called the front surface) of the silicon substrate.

[0027] In step 1c, the silicon substrate is inverted and its lower surface (also known as the back surface) is thinned by grinding.

[0028] During step 1d, the lower surface of the silicon substrate is thinned to make the trench open, thereby forming a through-silicon via (TSV). When the trench is open, the polishing slurry flows through the open trench (i.e., the TSV) into the flow channel (in the direction of the arrow in the figure).

[0029] During the execution of step 1e, the abrasive fluid accumulated in the flow channel forms permanent stains.

[0030] Figure 2 The diagram shows a top view of a silicon substrate.

[0031] son Figure 2 Image a shows a control image where no stains (i.e., contamination) have formed, where the through-silicon vias and channels are fluidly connected.

[0032] son Figure 2 Figure b illustrates the formation of stains. Because polishing fluid continues to flow through the tank, it flows along the tank into the channels and then along the channels, forming stains at various points along the channels. Since these stains are difficult to remove, they severely affect the performance of chips fabricated based on this silicon substrate.

[0033] This invention provides a method for fabricating through-silicon vias.

[0034] Through-silicon vias can have different diameters and depths. In some embodiments, the diameter of the through-silicon via is between 80 μm and 200 μm, and in other embodiments, the depth of the through-silicon via is between 300 μm and 700 μm.

[0035] like Figure 3 As shown, method 100 includes steps 110 to 140.

[0036] In the execution of step 110, a silicon substrate is provided, the upper surface of which has a microstructure.

[0037] The upper surface of a silicon substrate is the surface located at the very top of the silicon substrate. In the presence of microstructures, the upper surface may not be continuous.

[0038] Depending on the application scenario, such as microfluidics, inkjet printheads, silicon filters, silicon microphones, nanopores, etc., the upper surface of the silicon substrate can have different microstructures.

[0039] The silicon vias formed during processing penetrate the entire thickness of the silicon substrate, allowing the microstructures on the upper surface of the silicon substrate to communicate with the silicon vias.

[0040] In some embodiments, the microstructure can be a flow channel on the upper surface of the silicon substrate in a microfluidic chip, which allows a small volume of fluid to flow through it, and the relevant parameters of the fluid flow within the chip can be controlled by active or passive means.

[0041] The flow channel in the top view of the silicon substrate may include a circular structure with a diameter larger than that of the through-silicon via.

[0042] In practice, the diameter of the flow channel can range from 120 μm to 300 μm, and the diameter of the through-silicon via (TSV) can range from 80 μm to 200 μm. The ratio of the flow channel diameter to the TSV diameter can be greater than or equal to 3 / 2. In this microstructure, if the polishing slurry flows into the flow channel through the TSV, the stains formed at the flow channel are difficult to remove.

[0043] In some embodiments, the depth of the flow channel does not exceed 100 μm.

[0044] In step 120, the lower part of the silicon substrate is processed to thin it to a predetermined thickness.

[0045] The lower part of the silicon substrate can be processed by processes such as grinding to reduce the thickness of the silicon substrate to a predetermined thickness, which is the distance between the upper and lower surfaces of the thinned silicon substrate. For example, the upper and lower surfaces are parallel, and the predetermined thickness is the distance between these two parallel surfaces. This predetermined thickness can be between 300 μm and 700 μm.

[0046] Unlike existing technologies, in this embodiment of the invention, during the process of reducing the thickness of the silicon substrate to a predetermined thickness through processes such as grinding, no grooves penetrating the silicon substrate are processed. Therefore, fluids such as polishing slurry flowing in the lower part of the silicon substrate will not flow to the upper surface of the silicon substrate, and thus will not accumulate at the microstructure on the upper surface to form stains.

[0047] In step 130, the lower surface of the silicon substrate is fixed to the etched surface; in step 140, a through-silicon via is etched downward from the upper surface of the silicon substrate.

[0048] Specifically, through-silicon vias can be fabricated on silicon substrates using techniques such as photolithography and etching, including steps such as spin coating, development, and etching.

[0049] First, the silicon substrate can be fixed to the etching surface of the etching equipment, that is, the lower surface of the silicon substrate is firmly bonded to the etching surface, so as to facilitate the uniform distribution of photoresist on the upper surface of the silicon substrate and the etching of silicon vias.

[0050] A silicon substrate can be fixed to an etched surface by means of vacuum adsorption. For example, a vacuum pump connected to the etched surface is provided, which creates a vacuum between the silicon substrate and the etched surface when it is in operation, so that the lower surface of the silicon substrate can be firmly bonded to the etched surface.

[0051] The lower surface of the silicon substrate can also be fixed to the etched surface using an electrostatic film.

[0052] In embodiments of the present invention, the electrostatic film comprises a polymer film that is adhesive and resistant to etching and high temperatures.

[0053] Next, photoresist is applied to the upper surface of the silicon substrate. The etched surface can be rotated to uniformly apply the photoresist, which has been dripped onto the upper surface of the silicon substrate, onto that surface.

[0054] In the embodiments of the present invention, through experimental testing and calculation, it was found that the adhesion force formed by the electrostatic film that prevents the silicon substrate from moving relative to the etched surface is greater than the centrifugal force generated by the rotation of the silicon substrate during spin coating. This centrifugal force is mainly determined by parameters such as rotation speed and substrate mass, thereby allowing the silicon substrate to remain stationary relative to the etched surface.

[0055] For example, the adhesion force of the electrostatic film is between 0.1 and 20 Newtons / 25 mm, while the rotation speed of the photolithography process is between 1000 and 5000 rpm. The mass of a silicon substrate is usually less than 80 grams (g). Based on this data, experiments and quantitative calculations have found that the adhesion force formed by the electrostatic film can overcome the centrifugal force generated by rotation.

[0056] Next, selective processing, such as etching, is performed on the silicon substrate by exposing and developing the mask pattern on the photoresist to create trenches that penetrate the silicon substrate, thereby forming through-silicon vias (TSVs).

[0057] In practice, unwanted materials in a silicon substrate can be selectively removed through chemical or physical processes, including dry etching and wet etching. During dry etching, the silicon substrate can be exposed to plasma, which reacts physically and / or chemically with the silicon material, thereby removing the silicon. During wet etching, liquid chemicals can be used to chemically remove the silicon material.

[0058] Finally, after forming the through-silicon vias, the fixed connection between the silicon substrate and the etched surface can be released, for example, by removing the electrostatic film from the lower surface of the silicon substrate; and the silicon substrate with through-silicon vias can be removed from the etched surface, with no stains on its microstructure.

[0059] In some embodiments, after forming through-silicon vias (TSVs), the through-structure of the TSVs makes it difficult to fix the silicon substrate to the etching surface by vacuum adsorption. However, the electrostatic film adsorbed on the lower surface of the silicon substrate can keep the silicon substrate relatively fixed. Furthermore, the machine arm of the etching equipment can adsorb the silicon substrate by adsorbing the electrostatic film and transfer it back to the hopper. During this process, the electrostatic film can keep the silicon substrate relatively fixed. Then, the electrostatic film can be removed from the lower surface of the silicon substrate, leaving no stains on its microstructure.

[0060] The following combination Figure 4 The specific embodiment shown relates to the steps of fabricating through-silicon vias in a silicon substrate for use in microfluidic chips.

[0061] In the execution of step 4a, a silicon substrate is provided, the upper surface of which has flow channels; the upper surface of the silicon substrate is located at the top of the silicon substrate, and the upper surface is not continuous due to the presence of flow channels.

[0062] In step 4b, the lower surface of the silicon substrate is thinned to a predetermined thickness by grinding.

[0063] In step 4c, an electrostatic film is attached to the lower surface of the thinned silicon substrate, and the lower surface of the silicon substrate is fixed to the etched surface by the electrostatic film.

[0064] In step 4d, a groove of a certain depth is etched downwards from the upper surface of the silicon substrate until it penetrates the thickness of the silicon substrate, thereby forming a through-silicon via.

[0065] In step 4e, the electrostatic film is removed to obtain a silicon substrate with through-silicon vias, the channels of which are free of contaminants.

[0066] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for fabricating through-silicon vias, characterized in that, include: A silicon substrate is provided, the upper surface of which has a microstructure; The lower part of the silicon substrate is processed to thin it to a predetermined thickness; Fixing the lower surface of the silicon substrate to the etched surface includes: attaching an electrostatic film to the lower surface of the silicon substrate, and fixing the lower surface of the silicon substrate to the etched surface through the electrostatic film; A groove is etched downward from the upper surface of the silicon substrate to penetrate the silicon substrate, thereby forming the through-silicon via; After the through-silicon via is formed, the electrostatic film is removed.

2. The method according to claim 1, characterized in that, The microstructure is connected to the through-silicon via.

3. The method according to claim 1, characterized in that, The microstructure is a flow channel for fluid flow and is located on the upper surface of the silicon substrate of the microfluidic chip.

4. The method according to claim 3, characterized in that, The flow channel has a circular structure in a top view of the silicon substrate, and its diameter is larger than that of the through-silicon via.

5. The method according to claim 3, characterized in that, The depth of the flow channel does not exceed 100 μm.

6. The method according to claim 1, characterized in that, include: The lower part of the silicon substrate is ground to thin it to a predetermined thickness.

7. The method according to claim 1, characterized in that, The predetermined thickness is between 300 μm and 700 μm.

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