Multilayer electronic components

By setting up a plating layer with a large surface roughness in a multi-layer ceramic capacitor, the internal stress problem caused by different thermal expansion coefficients of the electrode layer and the conductive resin layer is solved, the bonding force and electrical connectivity of the components are improved, and its reliability is enhanced. strength.

CN114709076BActive Publication Date: 2024-12-27SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
CN202210424104.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-08-23
Filing Date
2020-04-09
Publication Date
2024-12-27
Estimated Expiration
2040-04-09

AI Technical Summary

Technical Problem

In multi-layer ceramic capacitors, due to the different thermal expansion coefficients of the electrode layer and the conductive resin layer, internal stress increases, and problems such as layering and cracks may occur, which affects its reliability and strength.

Method used

By providing a first plating layer with a large surface roughness at the junction between the electrode layer and the conductive resin layer, the bonding force and electrical connectivity of the two are improved, and the occurrence of layering and cracks are suppressed.

Benefits of technology

It effectively improves the bonding force and electrical connectivity between the electrode layer and the conductive resin layer, reduces internal stress, enhances the reliability and strength of the multi-layer electronic components, and prevents the occurrence of layering and cracks.

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Abstract

The present invention provides a multilayer electronic component, the multilayer electronic component comprising: a main body including a dielectric layer and an internal electrode; and an external electrode including an electrode layer disposed on the main body and connected to the internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. The surface roughness of the first plating layer at the interface with the conductive resin layer is greater than the surface roughness of the first plating layer at the interface with the electrode layer, the conductive resin layer comprising a conductive metal and a matrix resin, wherein the first plating layer comprises one or more selected from the group consisting of Cu, Sn, Ni and alloys thereof, and wherein the first plating layer comprises an oxide containing Cu in a region having surface roughness at the interface with the conductive resin layer.
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Description

[0001] This application is a divisional application of the invention patent application with the application date of April 9, 2020, application number 202010274058.0, and invention name “Multilayer Electronic Components”. Technical Field

[0002] The present disclosure relates to a multi-layer electronic assembly. Background Art

[0003] A multilayer ceramic capacitor (MLCC), a multilayer electronic component, is a chip capacitor mounted on a printed circuit board of various types of electronic products (including image display devices such as liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smart phones, mobile phones, etc.) for charging or discharging.

[0004] Such multilayer ceramic capacitors are used as components of various electronic devices due to their advantages such as miniaturization, high capacity, and easy installation. As electronic devices such as computers and mobile devices are miniaturized and implemented for high output, the demand for miniaturization and high capacity of multilayer ceramic capacitors is increasing.

[0005] Furthermore, in recent years, as industrial interest in electronic products has increased, multilayer ceramic capacitors have been required to have high reliability and high strength characteristics for use in automobiles and infotainment systems.

[0006] In order to ensure high reliability and high strength characteristics, a method of changing an external electrode composed of a conventional electrode layer to a two-layer structure of an electrode layer and a conductive resin layer has been proposed.

[0007] The two-layer structure of the electrode layer and the conductive resin layer may apply a resin composition including a conductive material to the electrode layer to absorb external vibration and prevent penetration of a plating solution to improve reliability.

[0008] However, since the coefficient of thermal expansion (CTE) of the electrode layer and the conductive resin layer may be different, there is a problem of increased internal stress. As the internal stress increases, delamination, cracks, etc. may occur, which may adversely affect reliability.

[0009] Therefore, there is a need to further improve high reliability and high strength characteristics. Summary of the invention

[0010] An aspect of the present disclosure is to improve the bonding force between an electrode layer and a conductive resin layer.

[0011] An aspect of the present disclosure is to improve electrical connectivity between an electrode layer and a conductive resin layer.

[0012] An aspect of the present disclosure is to suppress the occurrence of delamination, cracks, and the like.

[0013] However, various beneficial advantages and effects of the present disclosure are not limited to the above description and will be more easily understood in the course of describing specific embodiments of the present disclosure.

[0014] According to an embodiment, a multilayer electronic component includes: a body including a dielectric layer and an inner electrode; and an outer electrode including an electrode layer disposed on the body and connected to the inner electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. The surface roughness of the first plating layer at a junction with the conductive resin layer is greater than the surface roughness of the first plating layer at a junction with the electrode layer, and the conductive resin layer includes a conductive metal and a matrix resin.

[0015] According to another embodiment, a multilayer electronic component includes: a body including first and second internal electrodes alternately stacked, with a dielectric layer between the first and second internal electrodes; and first and second external electrodes connected to the first and second internal electrodes, respectively, and each including an electrode layer disposed on the body and connected to the corresponding first or second internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. Each first plating layer has a midline average roughness of 150 nm to 500 nm at a junction with the conductive resin layer.

[0016] According to yet another embodiment, a multilayer electronic component includes: a body including a dielectric layer and an inner electrode; and an outer electrode including an electrode layer disposed on the body and connected to the inner electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. The surface roughness of the first plating layer at a junction with the conductive resin layer is greater than the surface roughness at a junction between the body and the electrode layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other aspects, features and other advantages of the present disclosure will be more clearly understood through the following detailed description taken in conjunction with the accompanying drawings, in which:

[0018] Figure 1 is a schematic perspective view of a multilayer electronic assembly according to an embodiment of the present disclosure;

[0019] Figure 2 is along Figure 1 A schematic cross-sectional view taken along line II' of ;

[0020] Figure 3 is an exploded perspective view schematically showing a body in which a dielectric layer and an internal electrode are stacked according to an embodiment of the present disclosure;

[0021] Figure 4 According to the embodiment of the present disclosure Figure 2 A magnified image of region A; and

[0022] Figure 5 According to another embodiment of the present disclosure Figure 2 A magnified image of area A. DETAILED DESCRIPTION

[0023] Hereinafter, embodiments of the present disclosure will be described as follows with reference to the accompanying drawings. However, the present disclosure may be illustrated in many different forms and should not be construed as being limited to the specific embodiments set forth herein. More specifically, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. Therefore, for the sake of clear description, the shapes and sizes of the elements in the accompanying drawings may be exaggerated, and the elements indicated by the same reference numerals in the accompanying drawings represent the same elements.

[0024] In the drawings and descriptions, irrelevant elements may be omitted to clearly depict the present disclosure, and thickness may be exaggerated to clearly represent multiple layers and regions. Within the scope of the same concept, the same elements with the same functions will be described using the same reference numerals. Throughout the specification, unless otherwise specifically stated, when a component is referred to as "comprising", it means that it may also include other components without excluding other components.

[0025] In the drawings, the X direction may be defined as the second direction, L direction or length direction, the Y direction may be defined as the third direction, W direction or width direction, and the Z direction may be defined as the first direction, T direction or thickness direction.

[0026] Multilayer electronic components

[0027] Figure 1 is a schematic perspective view of a multilayer electronic assembly according to an embodiment of the present disclosure.

[0028] Figure 2 is along Figure 1 Schematic cross-sectional view taken along line II'.

[0029] Figure 3 is an exploded perspective view schematically illustrating a body in which a dielectric layer and an internal electrode are stacked according to an embodiment of the present disclosure.

[0030] Figure 4 According to the embodiment of the present disclosure Figure 2 A magnified image of area A.

[0031] In the following, reference will be made to Figures 1 to 4 A multilayer electronic assembly according to an embodiment of the present disclosure is described in detail.

[0032] According to an embodiment of the present disclosure, a multilayer electronic component 100 includes a main body 110 including a dielectric layer 111 and internal electrodes 121 and 122; and external electrodes 131 and 132, the external electrode 131 including an electrode layer 131a disposed on the main body and connected to the internal electrode 121, a first plating layer 131b disposed on the electrode layer 131a, and a conductive resin layer 131c disposed on the first plating layer 131b, and the external electrode 132 including an electrode layer 132a disposed on the main body and connected to the internal electrode 122, a first plating layer 132b disposed on the electrode layer 132a, and a conductive resin layer 132c disposed on the first plating layer 132b. The first plating layers 131b and 132b have surface roughness at the interface with the conductive resin layers 131c and 132c, and the conductive resin layers 131c and 132c contain a conductive metal and a matrix resin.

[0033] The body 110 has internal electrodes 121 and 122 that are alternately stacked, and a dielectric layer 111 is interposed between the internal electrodes 121 and 122 .

[0034] The specific shape of the body 110 is not particularly limited, but as shown in the figure, the body 110 may have a hexahedral shape or a shape similar to a hexahedral shape. Due to the shrinkage of the ceramic powder particles contained in the body 110 during the sintering process, the body 110 may have a generally hexahedral shape, but may not have a completely straight hexahedral shape.

[0035] The main body 110 may have a first surface 1 and a second surface 2 opposite to each other in the thickness direction (Z direction), a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and opposite to each other in the length direction (X direction), and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 and the second surface 2 and connected to the third surface 3 and the fourth surface 4 and opposite to each other in the width direction (Y direction).

[0036] The plurality of dielectric layers 111 forming the body 110 are in a sintered state, and boundaries between adjacent dielectric layers 111 may be integrated such that it may be difficult to confirm the boundaries without using a scanning electron microscope (SEM).

[0037] According to an embodiment of the present disclosure, the raw material used to form the dielectric layer 111 is not particularly limited as long as sufficient electrostatic capacitance can be obtained. For example, the raw material used to form the dielectric layer 111 can be a barium titanate (BaTiO3) material, a lead composite perovskite material, a strontium titanate (SrTiO3) material, etc.

[0038] As a material for forming the dielectric layer 111, various ceramic additives, organic solvents, plasticizers, binders, dispersants, etc. may be added to powder particles such as barium titanate (BaTiO 3 ) according to the purpose of the present disclosure.

[0039] The main body 110 may include a capacitor forming portion and covering portions 112 and 113, the capacitor forming portion being arranged in the main body 110 and including a first internal electrode 121 and a second internal electrode 122 arranged opposite to each other, a dielectric layer 111 being interposed between the first internal electrode 121 and the second internal electrode 122, the capacitor forming portion having a capacitor formed between the first internal electrode 121 and the second internal electrode 122, and the covering portions 112 and 113 being formed on the upper and lower portions of the capacitor forming portion, respectively.

[0040] The capacitance forming part is a portion for contributing to capacitance formation of a capacitor, and may be formed by repeatedly and alternately stacking a plurality of first and second internal electrodes 121 and 122 with the dielectric layer 111 interposed therebetween.

[0041] The upper covering portion 112 may be formed by stacking a single dielectric layer or two or more dielectric layers in an up-down direction on an upper surface of the capacitor forming portion, the lower covering portion 113 may be formed by stacking a single dielectric layer or two or more dielectric layers in an up-down direction under a lower surface of the capacitor forming portion, and the upper covering portion 112 and the lower covering portion 113 may be used to substantially prevent the internal electrodes from being damaged due to physical or chemical stress.

[0042] The upper cover 112 and the lower cover 113 may not include an internal electrode, and may include the same material as that of the dielectric layer 111. In this regard, the upper cover 112 may be disposed above an uppermost internal electrode among the alternately stacked first and second internal electrodes 121 and 122, and the lower cover 113 may be disposed below a lowermost internal electrode among the alternately stacked first and second internal electrodes 121 and 122.

[0043] The plurality of internal electrodes 121 and 122 are disposed to face each other with the dielectric layer 111 interposed between the internal electrodes 121 and 122 .

[0044] The internal electrodes 121 and 122 may include first internal electrodes 121 and second internal electrodes 122 alternately disposed to be opposite to each other, and a dielectric layer is interposed between each pair of adjacent internal electrodes.

[0045] The first and second internal electrodes 121 and 122 may be exposed to the third and fourth surfaces 3 and 4 of the body 110 , respectively.

[0046] Reference Figure 2, the first internal electrode 121 may be spaced apart from the fourth surface 4 and exposed through the third surface 3, and the second internal electrode 122 may be spaced apart from the third surface 3 and exposed through the fourth surface 4. The first external electrode 131 may be disposed on the third surface 3 of the body to be connected to the first internal electrode 121, and the second external electrode 132 may be disposed on the fourth surface 4 of the body to be connected to the second internal electrode 122.

[0047] The first and second internal electrodes 121 and 122 may be electrically separated and insulated from each other by a dielectric layer 111 disposed therebetween.

[0048] Reference Figure 3 The body 110 may be formed by alternately stacking the dielectric layer 111 on which the first internal electrode 121 is printed and the dielectric layer 111 on which the second internal electrode 122 is printed in a thickness direction (Z direction) and then firing.

[0049] The material forming the first and second internal electrodes 121 and 122 is not particularly limited and may be formed using a noble metal material such as palladium (Pd) and a palladium-silver (Pd—Ag) alloy, and a conductive paste containing one or more materials of nickel (Ni) and copper (Cu).

[0050] As a method of printing the conductive paste, a screen printing method, a gravure printing method, etc. may be used, but the present disclosure is not limited thereto.

[0051] The external electrodes 131 and 132 are disposed on the body 110 and are connected to the internal electrodes 121 and 122, respectively. Figure 2 As shown, the external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 connected to the first internal electrode 121 and the second internal electrode 122 , respectively.

[0052] The first and second external electrodes 131 and 132 may be electrically connected to the first and second internal electrodes 121 and 122 , respectively, to form capacitance, and the second external electrode 132 may be connected to a potential different from that of the first external electrode 131 .

[0053] The external electrodes 131 and 132 may include respective electrode layers 131a and 132a connected to the internal electrodes 121 and 122, respective first plating layers 131b and 132b disposed on the electrode layers 131a and 132a, and respective conductive resin layers 131c and 132c disposed on the first plating layers 131b and 132b.

[0054] The first plating layers 131b and 132b have surface roughness at the interface with the conductive resin layers 131c and 132c. In some examples, the surface roughness of the first plating layers 131b, 132b at the interface with the conductive resin layers 131c, 132c is greater than the surface roughness of the first plating layers 131b, 132b at the interface with the electrode layers 131a, 132a. In other examples, the surface roughness of the first plating layers 131b, 132b at the interface with the conductive resin layers 131c, 132c is greater than the surface roughness of the interface between the main body and the electrode layers 131a, 132a. Therefore, the physical bonding force can be improved by the anchoring effect, the lifting phenomenon between the electrode layers 131a, 132a and the conductive resin layers 131c, 132c can be suppressed, and the delamination and cracks that adversely affect the reliability can be suppressed by suppressing the increase of internal stress.

[0055] Furthermore, the first plating layers 131 b and 132 b may serve not only to improve physical bonding force but also to improve electrical connectivity between the electrode layers 131 a and 132 a and the conductive resin layers 131 c and 132 c .

[0056] The centerline average roughness Ra of the first plating layers 131b and 132b at the interface with the conductive resin layers 131c and 132c may be 150nm to 500nm. That is, the centerline average roughness Ra of the surface roughness of the first plating layers 131b and 132b may be 150nm to 500nm.

[0057] Surface roughness refers to the tiny unevenness produced on the surface when the surface is machined, also known as surface roughness.

[0058] Surface roughness is caused by the tool used for processing, the suitability of the processing method, scratches, rust, etching, etc. on the surface. When expressing the degree of roughness, the surface is intercepted on a plane perpendicular to the surface and has a height observed on its cross section. The average value of the height from the imaginary center line is called the center line average roughness and can be expressed as Ra.

[0059] In the present disclosure, the centerline average roughness of the first plating layers 131 b , 132 b at the interface with the conductive resin layers 131 c , 132 c may be defined as Ra.

[0060] Specifically, the centerline average roughness Ra of the first plating layers 131b and 132b can be calculated by drawing a virtual centerline Rc with respect to peaks and valleys in the surface roughness of the first plating layers 131b, 132b at the interface with the conductive resin layers 131c, 132c.

[0061] Next, the distances between adjacent peaks and valleys on the surface (e.g., r1, r2, r3, ..., r4) are measured on a virtual center line Rc based on the surface roughness. n ), the centerline average roughness Ra of the first plating layers 131b, 132b at the boundaries with the conductive resin layers 131c, 132c may be calculated using a value obtained by calculating the average value of the distances as shown in the following Equation 1.

[0062] [Formula 1]

[0063]

[0064] When the centerline average roughness Ra of the first plating layer 131b, 132b at the interface with the conductive resin layer 131c, 132c is less than 150nm, it may be difficult to ensure sufficient physical bonding with the conductive resin layer 131c, 132c. Note that the centerline average roughness Ra of the first plating layer 131b, 132b at the interface with the electrode layer 131a, 132a may be less than 150nm. In addition, the centerline average roughness Ra of the electrode layer 131a, 132a at the interface with the body 110 may be less than 150nm.

[0065] On the other hand, when the centerline average roughness Ra of the first plating layers 131b, 132b at the boundaries with the conductive resin layers 131c, 132c exceeds 500 nm, the thickness of the first plating layers 131b, 132b may excessively increase and cracks may occur in the first plating layers 131b, 132b.

[0066] The thickness (tb) of the first plating layers 131b, 132b (eg, the maximum thickness of the first plating layers 131b, 132b) may be 300 nm to 2000 nm.

[0067] When the thickness (tb) of the first plating layers 131 b , 132 b is less than 300 nm, it may be difficult to ensure sufficient surface roughness.

[0068] On the other hand, when the thickness (tb) of the first plating layers 131 b , 132 b exceeds 2000 nm, the external electrodes 131 , 132 may be too thick, which may reduce the capacity per unit volume of the multilayer electronic component 100 .

[0069] The material for forming the first plating layers 131 b and 132 b is not particularly limited as long as the material is a material capable of electrically connecting the electrode layers 131 a and 132 a and the conductive resin layers 131 c and 132 c.

[0070] For example, the first plating layers 131 b and 132 b may include one or more selected from the group consisting of Cu, Sn, Ni, and alloys thereof.

[0071] In addition, the method of imparting surface roughness to the first plating layers 131 b and 132 b is not particularly limited.

[0072] For example, in order to impart surface roughness to the first plating layers 131 b and 132 b , a physical treatment method may be used, or a chemical treatment method such as anisotropic etching may be used.

[0073] In addition, an oxide may be formed to impart surface roughness to the first plating layers 131 b and 132 b , or plating process conditions may be changed and plating may be roughly performed to impart surface roughness.

[0074] In an embodiment, the first plating layers 131 b and 132 b may include Cu 2 O in a region having surface roughness.

[0075] When black oxidation treatment is used as a method of forming an oxide to impart surface roughness, the first plating layers 131b and 132b may contain Cu2O in a region having surface roughness. The surface roughness may be formed in a form in which the ends of the uneven portions are blunted and the length of the uneven portions is shortened.

[0076] In an embodiment, the first plating layers 131 b and 132 b may include CuO in a region having surface roughness.

[0077] When brown oxidation treatment is used as a method of forming oxide to impart surface roughness, the first plating layers 131b and 132b may contain CuO in the region having surface roughness. The surface roughness may be formed in a form in which the end of the uneven portion is sharp and the size of the uneven portion becomes large.

[0078] Figure 5 According to another embodiment of the present disclosure Figure 2 A magnified image of area A.

[0079] Reference Figure 5 , the intermetallic compound layer 131 b 2 including Sn may be disposed at a boundary between the first plating layer 131 b ′ and the conductive resin layer 131 c .

[0080] When the first plating layer 131b' is formed using Sn, since Sn has a low melting point, the metal component contained in the conductive resin layer 131c and Sn can be combined at the interface between the first plating layer 131b' and the conductive resin layer 131c to form an intermetallic compound layer 131b2. Therefore, the electrical connectivity between the first plating layer 131b' and the conductive resin layer 131c can be further improved.

[0081] Therefore, according to another embodiment of the present disclosure, the first plating layer 131 b ′ may include a layer 131 b 1 including Sn disposed on the electrode layer and an intermetallic compound layer 131 b 2 disposed on the layer 131 b 1 including Sn.

[0082] The electrode layers 131a and 132a may include conductive metal and glass.

[0083] The conductive metal used for the electrode layers 131a and 132a is not particularly limited as long as the conductive metal is a material that can be electrically connected to the internal electrodes to form a capacitor. For example, the conductive metal may be one or more selected from the group consisting of copper (Cu), silver (Ag), nickel (Ni), and alloys thereof.

[0084] The electrode layers 131a and 132a may be formed by coating a conductive paste prepared by adding glass frit to conductive metal powder particles and then firing the conductive paste.

[0085] In addition, according to an embodiment of the present disclosure, the electrode layers 131 a and 132 a may contain Cu and glass, and the first plating layers 131 b and 132 b may be Cu plating layers.

[0086] The conductive metal included in the electrode layers 131a and 132a and the metal included in the first plating layers 131b and 132b may be made of Cu to improve bonding and electrical connectivity. In the case of the Cu plating layer, since it can be given surface roughness by the above-mentioned various methods, the effects of improving physical bonding and improving electrical connectivity according to the present disclosure can be further enhanced.

[0087] The conductive resin layers 131c and 132c include a conductive metal and a matrix resin.

[0088] The conductive metal included in the conductive resin layers 131 c and 132 c serves to be electrically connected to the first plating layers 131 b and 132 b .

[0089] The conductive metal included in the conductive resin layers 131c and 132c is not particularly limited as long as the conductive metal is a material that can be electrically connected to the first plating layers 131b, 132b, and may include, for example, one or more selected from the group consisting of copper (Cu), silver (Ag) and nickel (Ni) and alloys thereof.

[0090] The conductive metal included in the conductive resin layers 131c and 132c may include one or more of spherical powder particles and flake powder particles. That is, the conductive metal may consist of only flake powder particles, or may consist of only spherical powder particles, or may be in the form of a mixture of flake powder particles and spherical powder particles.

[0091] Here, the spherical powder particles may include an incomplete spherical form, for example, may include a form in which a length ratio of a major axis to a minor axis (major axis / minor axis) may be greater than 1 and less than 1.95.

[0092] The platelet-type powder particles refer to powder particles having a flat and elongated form, and are not particularly limited, but, for example, the length ratio of the major axis to the minor axis (major axis / minor axis) may be 1.95 or more.

[0093] The lengths of the major and minor axes of the spherical powder particles and the flake powder particles can be measured by an image obtained by scanning an XZ-direction cross section (LT cross section) taken at the center portion in the width Y direction of the multilayer electronic component.

[0094] The matrix resin included in the conductive resin layers 131 c and 132 c plays the role of ensuring adhesion and absorbing vibration.

[0095] The base resin included in the conductive resin layers 131c and 132c is not particularly limited as long as the base resin has adhesiveness and vibration absorption and can be mixed with conductive metal powder particles to form a paste. For example, the base resin may include an epoxy-based resin.

[0096] In addition, the conductive resin layers 131 c and 132 c may include a conductive metal, an intermetallic compound, and a matrix resin.

[0097] The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed on the third surface 3 and the fourth surface 4 , respectively.

[0098] The first external electrode 131 may include a connection portion disposed on the third surface 3 of the body and a band portion extending from the connection portion to a portion of the first surface and a portion of the second surface. Similarly, the second external electrode 132 may include a connection portion disposed on the fourth surface 4 of the body and a band portion extending from the connection portion to a portion of the first surface and a portion of the second surface.

[0099] In this case, the belt portion may extend not only to a portion of the first surface 1 and a portion of the second surface 2 , but also to a portion of the fifth surface 5 and a portion of the sixth surface 6 .

[0100] In addition, the external electrodes 131 and 132 may further include a second plating layer disposed on the conductive resin layers 131 c and 132 c to improve mounting characteristics.

[0101] For example, the second plating layer may be a Ni plating layer or a Sn plating layer, and may be a form in which the Ni plating layer and the Sn plating layer are sequentially formed on the conductive resin layers 131c, 132c, and may also include a plurality of Ni plating layers and / or a plurality of Sn plating layers.

[0102] As described above, according to the present disclosure, there is provided a structure in which a bonding force between the electrode layer of the external electrode and the conductive resin layer is improved by providing a plating layer having surface roughness between the electrode layer of the external electrode and the conductive resin layer.

[0103] However, various advantages and effects of the present disclosure are not limited to the above description and will be more easily understood in the course of describing specific embodiments of the present disclosure.

[0104] While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the present disclosure as defined by the appended claims.

Claims

1. A multilayer electronic component comprising: a body including a dielectric layer and an inner electrode; as well as an external electrode including an electrode layer provided on the body and connected to the internal electrode, a first plating layer provided on the electrode layer, and a conductive resin layer provided on the first plating layer, The surface roughness of the first plating layer at the interface with the conductive resin layer is greater than the surface roughness of the first plating layer at the interface with the electrode layer. Wherein, the conductive resin layer comprises conductive metal and matrix resin, wherein the first plating layer comprises one or more selected from the group consisting of Cu, Sn, Ni and alloys thereof, and The first plating layer includes an oxide containing Cu in a region having surface roughness at a boundary with the conductive resin layer.

2. The multilayer electronic component according to claim 1, wherein The centerline average roughness of the first plating layer at the interface with the conductive resin layer is 150 nm to 500 nm.

3. The multilayer electronic component according to claim 1, wherein: The thickness of the first coating layer is 300nm to 2000nm.

4. The multilayer electronic component according to claim 1, wherein: The oxide containing Cu is Cu2O.

5. The multilayer electronic component according to claim 1, wherein The oxide containing Cu is CuO.

6. The multilayer electronic component according to claim 1, wherein: The first plating layer has an intermetallic compound layer at a boundary with the conductive resin layer, and the intermetallic compound layer contains Sn.

7. The multilayer electronic component according to claim 1, wherein: The external electrode further includes a second plating layer disposed on the conductive resin layer.

8. The multilayer electronic component according to claim 7, wherein: The second plating layer includes a Ni plating layer provided on the conductive resin layer and a Sn plating layer provided on the Ni plating layer.

9. The multilayer electronic component according to claim 1, wherein: The electrode layer includes conductive metal and glass.

10. The multilayer electronic component according to claim 1, wherein The electrode layer includes Cu and glass, and the first plating layer is a Cu plating layer.

11. The multilayer electronic component according to claim 1, wherein The base resin includes an epoxy-based resin.

12. A multilayer electronic component comprising: a body including first inner electrodes and second inner electrodes alternately stacked, with a dielectric layer between the first inner electrodes and the second inner electrodes; as well as a first external electrode and a second external electrode, connected to the first internal electrode and the second internal electrode, respectively, and each including an electrode layer provided on the body and connected to the corresponding first internal electrode or the second internal electrode, a first plating layer provided on the electrode layer, and a conductive resin layer provided on the first plating layer, The average roughness of the center line of each first plating layer at the junction with the conductive resin layer is 150nm to 500nm. wherein each first plating layer comprises one or more selected from the group consisting of Cu, Sn, Ni and alloys thereof, and The first plating layer includes an oxide containing Cu in a region having surface roughness at a boundary with the conductive resin layer.

13. The multilayer electronic component according to claim 12, wherein: The thickness of each first plating layer is 300 nm to 2000 nm.

14. The multilayer electronic component according to claim 12, wherein: Each first plating layer has an intermetallic compound layer at a boundary with the conductive resin layer, the intermetallic compound layer containing Sn.

15. The multilayer electronic component according to claim 12, wherein: Each electrode layer contains conductive metal and glass.

16. The multilayer electronic component according to claim 12, wherein: The surface roughness of each first plated layer at the interface with the conductive resin layer is greater than the surface roughness of each first plated layer at the interface with the electrode layer.

17. The multilayer electronic component according to claim 12, wherein: The surface roughness of each first plating layer at the interface with the conductive resin layer is greater than the surface roughness at the interface between the body and the electrode layer.

18. The multilayer electronic component according to claim 12, wherein: The conductive resin layer of each of the first external electrode and the second external electrode includes an epoxy-based resin.

19. A multilayer electronic component comprising: a body including a dielectric layer and an inner electrode; as well as an external electrode including an electrode layer provided on the body and connected to the internal electrode, a first plating layer provided on the electrode layer, and a conductive resin layer provided on the first plating layer, The surface roughness of the first plating layer at the interface with the conductive resin layer is greater than the surface roughness at the interface between the main body and the electrode layer. wherein the first plating layer comprises one or more selected from the group consisting of Cu, Sn, Ni and alloys thereof, and The first plating layer includes an oxide containing Cu in a region having surface roughness at a boundary with the conductive resin layer.

20. The multilayer electronic component according to claim 19, wherein The centerline average roughness of the first plating layer at the interface with the conductive resin layer is 150 nm to 500 nm.

21. The multilayer electronic assembly of claim 19, wherein: The thickness of the first coating layer is 300nm to 2000nm.

22. The multilayer electronic assembly of claim 19, wherein: The surface roughness of the first plating layer at the interface with the conductive resin layer is greater than the surface roughness of the first plating layer at the interface with the electrode layer.

23. The multilayer electronic assembly of claim 19, wherein: The conductive resin layer includes an epoxy-based resin.

24. A multilayer electronic component comprising: a body including a dielectric layer and an inner electrode; as well as an external electrode including an electrode layer provided on the main body and connected to the internal electrode through a surface of the main body, a first plating layer provided on the electrode layer, and a conductive resin layer provided on the first plating layer, wherein the electrode layer comprises Cu and glass, the first plating layer is a Cu plating layer, and the conductive resin layer comprises a conductive metal and a matrix resin, and The first plating layer includes an oxide containing Cu in a region having surface roughness at a boundary with the conductive resin layer.

25. The multilayer electronic assembly of claim 24, wherein: The first plating layer has a center-line average roughness of 150 nm to 500 nm at a boundary with the conductive resin layer.

26. The multilayer electronic assembly of claim 24, wherein: The thickness of the first coating layer is 300nm to 2000nm.

27. The multilayer electronic assembly of claim 24, wherein: The first plating layer has an intermetallic compound layer at a boundary with the conductive resin layer, and the intermetallic compound layer contains Sn.

28. The multilayer electronic assembly of claim 24, wherein: The first plating layer includes one or more selected from the group consisting of Cu, Sn, Ni, and alloys thereof.

29. The multilayer electronic assembly of claim 24, wherein: The conductive resin layer is an outermost layer of the external electrode provided on the surface of the body.

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