Array substrate, preparation method thereof and display panel

Abstract

The application provides an array substrate, a preparation method thereof and a display panel. A first ink is applied on an active region of a substrate to form an active layer pattern, a second ink is applied on the active layer pattern at a position corresponding to a channel region to form a protection layer pattern, and the active layer pattern and the protection layer pattern are solidified to form films, so that the active layer pattern forms an active layer and the protection layer pattern forms a protection layer. In this way, the protection layer is arranged at the channel region of the active layer, the channel region of the active layer is protected, and the problem of corrosion pollution existing in a metal oxide is alleviated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to an array substrate, a preparation method thereof and a display panel. BACKGROUND

[0002] In the current display technology, thin film transistor (TFT) devices are mainly used to control pixel switching to form the picture to be displayed. The semiconductor materials used in the thin film transistor devices mainly include amorphous silicon, metal oxide and low-temperature polysilicon. Compared with amorphous silicon, metal oxide has a higher electron mobility, and compared with low-temperature polysilicon, the manufacturing process is relatively simple, and the requirements of high resolution and high refresh rate can be met. Although the metal oxide semiconductor material has many advantages, it is not stable. For example, after the metal oxide semiconductor process is completed, when the source-drain metal trace is formed above the metal oxide semiconductor, the metal oxide semiconductor is easily corroded and contaminated, resulting in abnormal semiconductor characteristics. SUMMARY

[0003] The present application provides an array substrate, a preparation method thereof and a display panel to alleviate the technical problem of corrosion and contamination of existing metal oxide.

[0004] To solve the above problems, the technical scheme provided by the present application is as follows:

[0005] The array substrate preparation method provided in the embodiments of the present application comprises:

[0006] A substrate is provided, and an active region and a channel region are defined on the substrate, and the channel region is located in the active region;

[0007] A first ink is applied to the active region to form an active layer pattern;

[0008] A second ink is applied to the channel region to form a protective layer pattern;

[0009] The active layer pattern and the protective layer pattern are cured to form a film, so that the active layer pattern forms an active layer, and the protective layer pattern forms a protective layer.

[0010] In the array substrate preparation method provided in the embodiments of the present application, the step of applying the first ink to the active region to form the active layer pattern comprises:

[0011] A metal salt solution is prepared to form the first ink;

[0012] The first ink is printed on the active region by an inkjet printing process to form the active layer pattern.

[0013] In the array substrate preparation method provided in the embodiments of the present application, the metal salt solution comprises one or more of Zn(NO3)2 solution and In(NO3)3 solution.

[0014] In the array substrate preparation method provided in the embodiments of the present application, the step of coating the channel region with the second ink to form a protective layer pattern comprises:

[0015] The SiS2 powder is dissolved in an organic solvent to form the second ink.

[0016] The second ink is printed on the channel region by using an inkjet printing process to form the protective layer pattern.

[0017] In the array substrate preparation method provided in the embodiments of the present application, the organic solvent comprises benzene and alcohol.

[0018] In the array substrate preparation method provided in the embodiments of the present application, the step of curing the active layer pattern and the protective layer pattern to form an active layer from the active layer pattern and a protective layer from the protective layer pattern comprises:

[0019] The substrate with the active layer pattern and the protective layer pattern is sent into a drying oven for drying, and at the same time, air is pumped out to make the solvent in the metal salt solution volatilize to form a metal oxide semiconductor layer as the active layer, and at the same time, SiS2 in the second ink reacts with water vapor in the solution to form SiO2 to form the protective layer on the surface of the active layer.

[0020] In the array substrate preparation method provided in the embodiments of the present application, before the step of printing the first ink on the active region to form an active layer pattern, the method further comprises:

[0021] A first metal thin film is formed on the substrate, and the first metal thin film is patterned to form a gate electrode in the active region.

[0022] A gate insulating layer is prepared on the gate electrode and the substrate.

[0023] In the array substrate preparation method provided in the embodiments of the present application, the method further comprises the following steps:

[0024] A second metal thin film is formed on the protective layer and the substrate, and the second metal thin film is patterned to form a source electrode and a drain electrode, and the source electrode and the drain electrode are respectively connected to the active layer on both sides of the protective layer.

[0025] A gate insulating layer is formed on the source electrode, the drain electrode and the protective layer.

[0026] A gate electrode is formed on the gate insulating layer, and the gate electrode corresponds to the protective layer.

[0027] The embodiment of the present application further provides an array substrate prepared by the array substrate preparation method of any one of the foregoing embodiments.

[0028] The embodiment of the present application further provides a display panel comprising an array substrate prepared by the array substrate preparation method of any one of the foregoing embodiments and a counter substrate.

[0029] The embodiment of the present application further provides an array substrate and a preparation method thereof and a display panel, wherein the first ink is coated on the active region of the substrate to form an active layer pattern, the second ink is coated on the active layer pattern at positions corresponding to the channel regions to form a protective layer pattern, and then the active layer pattern and the protective layer pattern are cured to form a film, so that the active layer pattern forms an active layer and the protective layer pattern forms a protective layer. In this way, the protective layer is arranged at the channel region of the active layer to protect the channel region of the active layer, so as to avoid the channel region of the active layer from being corroded and polluted, thereby solving the problem of corrosion and pollution of the existing metal oxide. Meanwhile, the active layer and the protective layer are formed synchronously, so that one mask can be saved and the cost is saved. BRIEF DESCRIPTION OF DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0031] Figure 1 The flowchart of the array substrate preparation method provided by the embodiment of the present application.

[0032] Figure 2 The cross-sectional structure diagram of the substrate provided by the embodiment of the present application.

[0033] Figure 3 The cross-sectional structure diagram of the gate electrode and the active layer pattern prepared on the substrate provided by the embodiment of the present application. Figure 2

[0034] The cross-sectional structure diagram of the protective layer pattern prepared on the active layer pattern provided by the embodiment of the present application. Figure 4 Figure 3 The cross-sectional structure diagram of the active layer and the protective layer formed by curing the active layer pattern and the protective layer pattern provided by the embodiment of the present application.

[0035] Figure 5 Figure 4 The cross-sectional structure diagram of the active layer and the protective layer formed by curing the active layer pattern and the protective layer pattern provided by the embodiment of the present application.​​

[0036] Figure 6 In order to be in Figure 5 A schematic diagram of the cross-sectional structure of the source and drain electrodes fabricated on the active layer and the protective layer.

[0037] Figure 7 In order to be in Figure 6 A schematic diagram of the cross-sectional structure of the pixel electrode fabricated above the drain electrode.

[0038] Figure 8 This is a schematic diagram of another cross-sectional structure of the array substrate provided in an embodiment of this application. Detailed Implementation

[0039] The following descriptions of the embodiments are based on the accompanying illustrations, illustrating specific embodiments in which this application can be implemented. Directional terms used in this application, such as [up], [down], [front], [back], [left], [right], [inner], [outer], [side], etc., are merely for reference to the accompanying drawings. Therefore, the directional terms used are for illustration and understanding of this application, and not for limiting this application. In the figures, structurally similar units are denoted by the same reference numerals. In the figures, the thickness of some layers and regions is exaggerated for clarity and ease of description. That is, the dimensions and thicknesses of each component shown in the figures are arbitrarily shown, but this application is not limited thereto.

[0040] Please refer to Figures 1 to 7 , Figure 1 This application provides a schematic flowchart of an array substrate fabrication method. Figures 2 to 7 This is a schematic diagram of the partial film structure of the array substrate obtained in each step of the array substrate fabrication method provided in the embodiments of this application, wherein... Figure 2 This is a schematic cross-sectional view of the substrate provided in an embodiment of this application; Figure 3 In order to be in Figure 2 A schematic cross-sectional view of the gate and active layer patterns fabricated on the substrate. Figure 4 In order to be in Figure 3 A schematic diagram of the cross-sectional structure of the protective layer pattern prepared on the active layer pattern; Figure 5 To Figure 4 A schematic diagram of the cross-sectional structure of the active layer and protective layer formed by curing the active layer pattern and protective layer pattern; Figure 6 In order to be in Figure 5 A schematic diagram of the cross-sectional structure of the source and drain electrodes fabricated on the active layer and the protective layer; Figure 7 In order to be in Figure 6 A schematic diagram of the cross-sectional structure of the pixel electrode fabricated above the drain electrode.

[0041] Specifically, the array substrate fabrication method includes the following steps:

[0042] S301: Provide a substrate 10, and define an active region CA and a channel region SA on the substrate 10, wherein the channel region SA is located within the active region CA;

[0043] Specifically, such as Figure 2 As shown, an active region CA and a channel region SA are defined on the substrate 10. The active region CA is used to form an active layer 30, and the channel region SA corresponds to the channel 31 of the active layer 30. The channel region SA is located within the active region CA. Specifically, the channel region SA is located in the middle region of the active region CA.

[0044] Optionally, the substrate 10 can be a rigid substrate or a flexible substrate; when the substrate 10 is a rigid substrate, it may include a rigid substrate such as a glass substrate; when the substrate 10 is a flexible substrate, it may include a flexible substrate such as a polyimide (PI) film or an ultrathin glass film. This application embodiment uses a glass substrate as an example for illustration.

[0045] S302: Apply a first ink to the active area CA to form an active layer pattern 3;

[0046] Specifically, before the step of printing the first ink in the active area CA to form the active layer pattern 3, the following steps are also included:

[0047] like Figure 3 As shown, a first metal thin film is formed on the substrate 10, and the first metal thin film is patterned to form a gate 20 in the corresponding active region CA; and a gate insulating layer 11 is formed on the gate 20 and the substrate 10.

[0048] Specifically, before forming the first metal thin film on the substrate 10, the substrate 10 is pretreated by cleaning and baking. Then, the first metal thin film is deposited on the substrate 10 using a deposition process such as sputtering or physical vapor deposition (PVD). Next, the first metal thin film undergoes photolithography to form the gate 20 at the location corresponding to the active region CA. Optionally, the material of the first metal thin film includes one or more of molybdenum (Mo), aluminum (Al), and copper (Cu).

[0049] Of course, when the substrate 10 is a flexible substrate such as a polyimide film, an inorganic film layer can also be deposited on the substrate 10 as a buffer layer before depositing the first metal film. Optionally, the inorganic film layer includes a silicon nitride (SiNx) layer, a silicon oxide (SiOx) layer, or a laminated composite film of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer. The buffer layer can prevent undesirable impurities or contaminants from diffusing from the substrate 10 to devices that can be damaged by these impurities or contaminants, while also providing a flat top surface.

[0050] Further, one or more inorganic film layers are deposited on the gate 20 and the substrate 10 as a gate insulating layer 11. Optionally, the inorganic film layer includes a silicon oxide (SiOx) layer, or a laminated composite film of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer.

[0051] Further, an Ink jet Print (IJP) process is used to print a first ink on the active area CA to form an active layer pattern 3. Specifically, a metal salt solution is prepared to form the first ink, which includes one or more of a Zn(NO3)2 solution, an In(NO3)3 solution, i.e., one or more metal salt solutions are mixed together to form the first ink.

[0052] The specific metal salt solution can be selected according to the metal oxide semiconductor material to be selected, such as ZnO if a Zn(NO3)2 solution is selected, or InO if an In(NO3)3 solution is selected. Optionally, the metal oxide semiconductor material can also be IGZO, YZO, ITZO, etc. In addition, the concentration of the first ink can be adjusted according to the film thickness and semiconductor properties to be achieved.

[0053] The first ink is then printed on the gate insulating layer 11 at a position corresponding to the active area CA using an ink jet printing process to form the active layer pattern 3. The position and size of the active layer pattern 3 can be achieved by controlling the concentration of the first ink and the speed of ink jet printing.

[0054] S303: A second ink is applied to the channel area SA to form a protective layer pattern 4;

[0055] Specifically, the SiS2 powder is dissolved in an organic solvent to form the second ink, and the organic solvent includes benzene, alcohol, and other volatile organic solvents. Specifically, the nanoscale SiS2 powder is dissolved in benzene, alcohol, and other volatile organic solvents to form a uniformly distributed suspension as the second ink. Then, the second ink is printed on the active layer pattern 3 at a position corresponding to the channel region SA by using an inkjet printing process to form the protective layer pattern 4, as shown in FIG. 4. Figure 4 Similarly, the position and size of the protective layer pattern 4 can also be controlled by controlling the concentration of the second ink and the speed of inkjet printing.

[0056] It should be noted that the smaller the SiS2 powder used to form the second ink, the more uniform the distribution of SiS2 in the suspension formed after the SiS2 powder is dissolved in the organic solvent. Therefore, the nanoscale SiS2 powder is selected in the embodiment. In addition, the substance used to form the second ink is not limited to SiS2 powder, and different substances can be selected according to the material of the protective layer 40 to be formed.

[0057] S304: curing the active layer pattern 3 and the protective layer pattern 4 to form the active layer 30 and the protective layer 40.

[0058] Specifically, the substrate 10 on which the active layer pattern 3 and the protective layer pattern 4 are formed is sent into a drying oven for drying, and at the same time, air is pumped out to make the solvent in the metal salt solution volatilize to form a metal oxide semiconductor layer as the active layer 30, and at the same time, the SiS2 in the second ink reacts with the water vapor in the solution to form SiO2 (of course, if necessary, water vapor can also be introduced during the curing process to ensure that the SiO2 film formation reaction is sufficient), so as to form the protective layer 40 on the surface of the active layer 30, as shown in FIG. 5. Figure 5

[0059] Alternatively, the method of curing the active layer pattern 3 and the protective layer pattern 4 to form a film is not limited to drying in a drying oven, but other heating methods can also be used to cure and form a film. Under the condition of heating, the metal salt solution in the first ink forming the active layer pattern 3 is decomposed to form a metal oxide, such as the first ink formed by using a Zn(NO3)2 solution, which is decomposed to form ZnO under the condition of heating. The moisture in the active layer pattern 3 will volatilize under the condition of heating, and finally the active layer 30 formed by the metal oxide is formed.

[0060] ​Meanwhile, under the heating condition, the volatile organic solvents such as benzene and alcohol in the second ink forming the protective layer pattern 4 can be volatilized, and the SiS2 in the second ink can react with the water volatilized from the first ink to generate SiO2 (of course, water vapor can be introduced during the curing process if necessary to ensure sufficient SiO2 film formation reaction), and finally the protective layer 40 formed by SiO2 is formed. The part of the active layer 30 covered by the protective layer 40 is the channel 31 of the active layer 30, that is, the part of the active layer 30 corresponding to the channel region SA is the channel 31 of the active layer 30, and the active layer 30 on both sides of the channel 31 which is not covered by the protective layer 40 is the source region 32 and the drain region 33 of the active layer 30.

[0061] By forming the protective layer 40 on the channel 31 of the active layer 30, the protective layer 40 can protect the channel 31 from corrosion and pollution damage in subsequent processes. Meanwhile, the active layer 30 and the protective layer 40 of the present application are formed synchronously, compared with forming the protective layer 40 on the active layer 30 by using a separate mask, the preparation method of the present application can save a mask, and thus can simplify the process steps and save costs.

[0062] Further, the array substrate preparation method of the embodiment further includes the following steps after forming the active layer 30 and the protective layer 40:

[0063] forming a second metal thin film on the protective layer 40 and the gate insulating layer 11, and patterning the second metal thin film to form a source 51 and a drain 52, the source 51 and the drain 52 being connected to the active layer 30 on both sides of the protective layer 40 respectively;

[0064] Specifically, a second metal thin film is deposited on the protective layer 40 and the gate insulating layer 11 by using a sputter deposition method or a physical vapor deposition method, and then a photo process is performed on the second metal thin film to form the source 51 corresponding to the source region 32 of the active layer 30 and the drain 52 corresponding to the drain region 33 of the active layer 30, as shown in Figure 6 wherein the source 51 is connected to the source region 32, and the drain 52 is connected to the drain region 33. Optionally, the material of the second metal thin film includes one or more of molybdenum (Mo), aluminum (Al), and copper (Cu).

[0065] It can be understood that before forming the second metal thin film, the active layer 30 also needs to be conductorized, so that the source region 32 and the drain region 33 of the active layer 30 are conductorized, and the channel 31 is covered by the protective layer 40, which can protect the channel 31 from being damaged in the conductorization process. Moreover, when the second metal thin film is subjected to a yellow process to form the source 51 and the drain 52, the protective layer 40 can also protect the channel 31 from being damaged by etching liquid and the like. In addition, the second metal thin film can also form other signal lines, such as data lines, while forming the source 51 and the drain 52.

[0066] A passivation layer 12 is formed on the source 51, the drain 52, the protective layer 40, and the gate insulating layer 11, and a pixel electrode 60 is formed on the passivation layer 12.

[0067] Specifically, as shown in Figure 7 One or more inorganic film layers are formed on the source 51, the drain 52, the protective layer 40, and the gate insulating layer 11 as the passivation layer 12 to protect the source 51 and the drain 52. Optionally, the inorganic film layer includes a silicon nitride (SiNx) layer, a silicon oxide (SiOx) layer, or a laminated composite film of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer. Of course, in order to provide a flat top surface for the array substrate 100, a planarization layer can also be formed on the passivation layer 12, which can use organic photoresist and the like.

[0068] Further, a transparent conductive thin film is deposited on the passivation layer 12, and the transparent conductive thin film is patterned to form the pixel electrode 60 to form the array substrate 100. The pixel electrode 60 is connected to the source 51 or the drain 52 through a via of the passivation layer 12, and the embodiment of the present application takes the pixel electrode 60 connected to the drain 52 as an example. Optionally, the transparent conductive thin film includes a thin film formed by ITO, IZO, ZnO, or In2O3 transparent conductive material.

[0069] In an embodiment, please refer to Figures 1 to 8 , Figure 8 Another cross-sectional structure diagram of the array substrate provided by the embodiment of the present application. Different from the above embodiment, the array substrate 101 formed by the embodiment is a top gate structure, so that after the active layer 30 and the protective layer 40 are formed on the substrate 10 at the same time, the array substrate preparation method further includes the following steps:

[0070] A second metal thin film is deposited on the protective layer 40 and the substrate 10, and the second metal thin film is patterned to form a source electrode 51 and a drain electrode 52, the source electrode 51 and the drain electrode 52 being connected to the active layer 30 on both sides of the protective layer 40 respectively;

[0071] Specifically, a second metal thin film is deposited on the protective layer 40 and the substrate 10 by using a deposition process such as sputter deposition or physical vapor deposition, and then a photolithography process is performed on the second metal thin film to form the source electrode 51 corresponding to the source region 32 of the active layer 30 and the drain electrode 52 corresponding to the drain region 33 of the active layer 30, wherein the source electrode 51 is connected to the source region 32, and the drain electrode 52 is connected to the drain region 33. Optionally, the material of the second metal thin film includes one or more of molybdenum (Mo), aluminum (Al), and copper (Cu).

[0072] A gate insulating layer 11 is formed on the source electrode 51, the drain electrode 52, and the protective layer 40.

[0073] Specifically, one or more inorganic film layers are deposited on the source electrode 51, the drain electrode 52, and the protective layer 40 as the gate insulating layer 11. Optionally, the inorganic film layer includes a silicon nitride (SiNx) layer, a silicon oxide (SiOx) layer, or a laminated composite film of a silicon nitride (SiNx) layer and a silicon oxide (SiOx) layer.

[0074] A gate electrode 20 is formed on the gate insulating layer 11, and the gate electrode 20 is arranged corresponding to the protective layer 40.

[0075] Specifically, a first metal thin film is deposited on the gate insulating layer 11 by using a deposition process such as sputter deposition or physical vapor deposition, and then a photolithography process is performed on the first metal thin film to form the gate electrode 20 corresponding to the position of the protective layer 40. Optionally, the material of the first metal thin film includes one or more of molybdenum (Mo), aluminum (Al), and copper (Cu).

[0076] Of course, the array substrate preparation method of the embodiment also includes the preparation of a pixel electrode 60. Specifically, a passivation layer 12 is formed on the gate electrode 20 and the gate insulating layer 11, and the pixel electrode 60 is formed on the passivation layer 12. For other descriptions, please refer to the above embodiment, which will not be described here.

[0077] In an embodiment, the application also provides an array substrate, which includes an array substrate 100 prepared by the array substrate preparation method of any one of the above embodiments.

[0078] Based on the same inventive concept, the application further provides a display panel, comprising a counter substrate and the array substrate 100 of the foregoing embodiments, wherein the array substrate 100 and the counter substrate are oppositely arranged. The display panel comprises a liquid crystal display (LCD) panel, an organic light emitting display (OLED) panel, etc. When the display panel is a liquid crystal display panel, the counter substrate is a color film substrate, and the display panel further comprises liquid crystal molecules, etc. arranged between the array substrate 100 and the counter substrate. When the display panel is an organic light emitting display panel, the counter substrate is an encapsulation substrate, and the display panel further comprises a light emitting device arranged between the array substrate 100 and the counter substrate.

[0079] According to the foregoing embodiments, it can be known that:

[0080] The application provides an array substrate and a preparation method thereof, and a display panel. A first ink is coated on an active region of a substrate to form an active layer pattern, a second ink is coated on the active layer pattern at a position corresponding to a channel region to form a protection layer pattern, and then the active layer pattern and the protection layer pattern are solidified to form a film, so that the active layer pattern forms an active layer and the protection layer pattern forms a protection layer. In this way, the protection layer is arranged on the channel region of the active layer, the channel region of the active layer is protected, and the channel region of the active layer is prevented from being corroded and polluted, thereby solving the problem of corrosion and pollution of the existing metal oxide. Meanwhile, the active layer and the protection layer are formed synchronously, so that one mask can be saved, and cost is saved.

[0081] In the foregoing embodiments, the description of each embodiment has its own focus, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0082] The embodiments of the application are described in detail above, and the principle and implementation mode of the application are described by applying specific examples; the description of the foregoing embodiments is only used to help understand the technical solutions and core ideas of the application; those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the application.

Claims

1. A method for fabricating an array substrate, characterized in that, include: A substrate is provided, and an active region and a channel region are defined on the substrate, wherein the channel region is located within the active region; A first ink is coated onto the active area to form an active layer pattern; A second ink is applied to the channel area to form a protective layer pattern; The active layer pattern and the protective layer pattern are cured into films, so that the active layer pattern forms an active layer and the protective layer pattern forms a protective layer; The step of coating the active region with a first ink to form an active layer pattern includes: Prepare a metal salt solution to form the first ink; The step of coating the channel region with a second ink to form a protective layer pattern includes: The second ink is formed by dissolving SiS2 powder in an organic solvent; The step of curing the active layer pattern and the protective layer pattern into films, so that the active layer pattern forms an active layer and the protective layer pattern forms a protective layer, includes: The substrate with the active layer pattern and the protective layer pattern is sent into a drying oven for drying. At the same time, air is pumped out to make the solvent in the metal salt solution evaporate to form a metal oxide semiconductor layer as the active layer. Meanwhile, SiS2 in the second ink reacts with water vapor in the solution to form SiO2, so as to form the protective layer on the surface of the active layer.

2. The method for fabricating an array substrate according to claim 1, characterized in that, The step of coating the active region with the first ink to form an active layer pattern further includes: The first ink is printed in the active area using an inkjet printing process to form the active layer pattern.

3. The method for fabricating an array substrate according to claim 2, characterized in that, The metal salt solution includes one or more of Zn(NO3)2 solution and In(NO3)3 solution.

4. The method for fabricating an array substrate according to claim 2, characterized in that, The step of coating the channel region with a second ink to form a protective layer pattern further includes: The second ink is printed in the channel area using an inkjet printing process to form the protective layer pattern.

5. The method for fabricating an array substrate according to claim 4, characterized in that, Organic solvents include benzene and alcohols.

6. The method for fabricating an array substrate according to claim 1, characterized in that, Prior to the step of coating the active region with the first ink to form an active layer pattern, the method further includes: A first metal thin film is formed on the substrate, and the first metal thin film is patterned to form a gate in the corresponding active region; A gate insulating layer is formed on the gate and the substrate.

7. The method for fabricating an array substrate according to claim 1, characterized in that, It also includes the following steps: A second metal thin film is formed on the protective layer and the substrate, and the second metal thin film is patterned to form a source and a drain. The source and the drain are respectively connected to the active layers on both sides of the protective layer. A gate insulating layer is formed on the source, the drain, and the protective layer; A gate is formed on the gate insulating layer, and the gate is disposed corresponding to the protective layer.

8. An array substrate, characterized in that, Includes an array substrate prepared by the array substrate preparation method according to any one of claims 1 to 7.

9. A display panel, characterized in that, It includes a counter substrate and an array substrate as described in claim 8, wherein the array substrate and the counter substrate are disposed at a distance from each other.

Images