A power tube driving power charging circuit for high-power power management

By directly utilizing VIN for BOOST charging, combined with a current mirror structure and a self-biased current circuit, the energy loss and LDO load issues during the charging process of NMOS high-side power transistors are resolved, achieving more efficient power management.

CN114710006BActive Publication Date: 2026-03-10XIAN AEROSPACE MINXIN TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-04-24
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

When using NMOS high-side power transistors, the energy loss during the charging process is relatively large in the existing technology, and the load capacity requirements of the LDO module are high, which leads to limitations in chip area and efficiency.

Method used

The system uses direct BOOST charging via VIN, and utilizes a current mirror structure and a self-biased current circuit to independently set the BOOST voltage, reducing dependence on the LDO and lowering the charging frequency to reduce switching losses.

Benefits of technology

This effectively reduces energy loss during charging, lowers the load requirements on the LDO module, and improves the overall efficiency and area utilization of the chip.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a power tube driving power charging circuit for high-power power management, which comprises a voltage detection unit and a control charging unit. The voltage detection unit outputs a digital signal for voltage judgment. The digital signal is transmitted to the control charging unit through a level shift structure to control the switch of a power tube M17. The gate-drain of M1 is connected with the drain of M7, and the source of M7 is connected with a resistor R1 to SW. The drain of M2 is connected with the gate-drain of M8 and the gate of M7, and the source of M8 is connected with SW through an M10 with a gate-drain. This part forms a self-bias current circuit to provide current for a comparison circuit in the rear stage. Two NMOSs with a gate-drain, M6 and M9, are connected in series on the current branch of M3, and the branch current is imaged to the path of M4 through a current mirror of M11 and M12 to carry out comparison and generate an output signal. The application reduces the requirement for the maximum load capacity of an LDO. Meanwhile, the charging frequency can be reduced through design to reduce the switching loss and improve the chip efficiency.
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Description

Technical Field

[0001] This invention belongs to the field of power supply, and specifically relates to a power transistor drive power charging circuit for high-power power supply management, which is mainly used in DC / DC converters that use NMOS as power transistors. Background Technology

[0002] In the consumer electronics field, various electronic devices require power to operate, and switching power supply management chips are an indispensable part of electronic systems. In an era where chip development is trending towards miniaturization, the requirements for integration are increasing, and the limitations on chip area are becoming more and more pronounced. Because PMOS conducts electricity through holes while NMOS conducts electricity through electrons, and electron mobility is greater than hole mobility, under the same size conditions, NMOS can draw a greater current than PMOS. Therefore, to reduce chip area, most power supply chips now use NMOS transistors.

[0003] When using NMOS, the source-drain voltages of the power transistor are approximately VIN when the high-side power transistor is turned on, thus requiring a drive supply voltage higher than VIN. Typically, the internal power supply VCC is used to charge the boost capacitor on SW when the lower-side transistor is turned on to obtain the BOOST voltage. This adds extra losses and places an additional burden on the LDO module's load capacity.

[0004] Therefore, a power transistor driving power supply charging circuit is needed to minimize energy loss during charging and eliminate additional limitations on the LDO load capacity. Summary of the Invention

[0005] This invention provides a power transistor drive and charging circuit for high-power power management, applicable to switching power supplies employing NMOS high-side power transistors. Instead of charging the boost via the internal power supply generated by the LDO, charging is performed directly through VIN.

[0006] The technical solution of this invention is implemented as follows:

[0007] A power transistor drive charging circuit for high-power power supply management includes a transformer detection unit and a charging control unit. M1, M2, M3, M4, and M5 form a current mirror structure with a BOOST source power supply. M1's gate-drain connection is connected to the drain of M7, and the source of M7 is connected to SW via resistor R1. The drain of M2 is connected to the gate-drain of M8 and the gate of M7, and the source of M8 is connected to SW via a gate-drain connection M10. This section forms a self-biased current circuit, providing current to the subsequent comparator circuit. Two gate-drain connected NMOS transistors, M6 and M9, are connected in series in the current branch of M3. The current in this branch is then mirrored onto the path of M4 via current mirrors M11 and M12 for comparison, generating an output signal.

[0008] The output signal, after being filtered by an inverter and level-shifted, is converted from high to low level to VCC and GND, and then connected to the gate of M16. The source of M16 is connected to GND, and its drain is connected to the source of M15. M15 is a high-voltage transistor; its gate is connected to VCC, and its drain is connected to the drain of M14, the gate of M17, and resistor R2. M13 and M14 are current mirror transistors; M13 is connected to GND through resistor R3. The drains of M13, M14, and M17 are all connected to VIN, and the drain of M17 is connected to a diode D1 to the BOOST.

[0009] Traditional BOOST charging structures all use an internal power supply for charging, and the BOOST voltage is limited by the internal power supply voltage. This new structure allows for free adjustment of the BOOST setting, which is completely independent of the LDO's output internal power supply voltage and can be set independently. Furthermore, since the charging current is directly provided by VIN, compared to traditional structures, this effectively reduces energy loss from VCC to the LDO, thus reducing the load on the LDO and lowering the requirement for its maximum load capacity. Additionally, the charging frequency can be reduced through design to decrease switching losses and improve chip efficiency.

[0010] This invention provides a power transistor drive power charging circuit for high-power power supply management, with the following advantages:

[0011] (1) The setting value can be changed by setting the size of M6, M9, and M11 using this charging structure. This value is completely independent of the internal power supply voltage of the LDO output and can be set separately.

[0012] (2) At the same time, since the charging current is directly provided by VIN, compared with the traditional structure, it is equivalent to reducing the energy loss from VCC to LDO, reducing the load on LDO, and lowering the requirements for the maximum load capacity of LDO.

[0013] (3) By setting the value of R3, the additional charging time can be changed, which is equivalent to changing the threshold range of voltage switching. This can reduce the charging frequency, thereby reducing switching losses and improving chip efficiency. Attached Figure Description

[0014] Figure 1 Power transistor drive power supply charging circuit diagram

[0015] Type 1 MOSFET M1, Type 2 MOSFET M2, Type 3 MOSFET M3, Type 4 MOSFET M4, Type 5 MOSFET M5, Type 7 MOSFET M7, Type 8 MOSFET M8, Type 9 MOSFET M9, Type 10 MOSFET M10, Type 11 MOSFET M11, Type 12 MOSFET M12, Type 13 MOSFET M13, Type 14 MOSFET M14, Type 15 MOSFET M15, Type 16 MOSFET M16, and Type 17 MOSFET M17. Detailed Implementation

[0016] Referring to the attached diagram, M1, M2, M3, M4, and M5 form a current mirror structure with a BOOST power supply at the source. M1's gate-drain connection is connected to the drain of M7, and the source of M7 is connected to SW via resistor R1. The drain of M2 is connected to the gate-drain of M8 and the gate of M7, and the source of M8 is connected to SW via a gate-drain connection, M10. This section forms a self-biased current circuit, providing current for the subsequent comparator circuit. Two gate-drain connected NMOS transistors, M6 and M9, are connected in series in the current branch of M3. The current from this branch is then mirrored onto the path of M4 via current mirrors M11 and M12 for comparison, generating the output signal.

[0017] In the voltage detection unit, the gate and drain of the first type MOSFET M1 are connected to the gates of the second type MOSFET M2, the third type MOSFET M3, the fourth type MOSFET M4, the fifth type MOSFET M5, and the drain of the seventh type MOSFET M7. The sources of M1, M2, M3, and M4 are connected to the BOOST potential. The gate of M7 is connected to the gate and drain of the eighth type MOSFET M8 and the drain of M2. The source of M7 is connected to the SW potential through resistor R1. The sources of the tenth type MOSFET M10, the eleventh type MOSFET M11, and the twelfth type MOSFET M12 are also connected to SW. The drain of M3 is connected to the gate and drain of the sixth type MOSFET M6. The source of M6 is connected to the gate and drain of the ninth type MOSFET M9. The source of M9 is connected to the gate and drain of M11 and the gate of M12. The drain of M12 is connected to the drain of M5 and outputs to the charging unit.

[0018] In the charging unit, the sources of MOSFETs M13 (type 13), M14 (type 14), and M17 are connected to VIN via one end of resistor R2. The gate and drain of M13 are connected to the gate of M14 and then to ground via resistor R3; the drain of M14 is connected to the drain of MOSFET M15 (type 15). The gate of M17 is connected to the other end of resistor R2; the drain of M17 is connected to the source power supply potential via diode D1; the source of M15 is connected to the drain of MOSFET M16 (type 16); the source of M16 is connected to ground.

[0019] The output signal, after being filtered by an inverter and level-shifted, is converted from high to low level to VCC and GND, and then connected to the gate of M16. The source of M16 is connected to GND, and its drain is connected to the source of M15. M15 is a high-voltage transistor; its gate is connected to VCC, and its drain is connected to the drain of M14, the gate of M17, and resistor R2. M13 and M14 are current mirror transistors; M13 is connected to GND through resistor R3. The drains of M13, M14, and M17 are all connected to VIN, and the drain of M17 is connected to a diode D1 to the BOOST.

[0020] The voltage detection unit checks whether the voltage between BOOST and SW is sufficient. A self-biasing current I is generated through M1, M2, M7, M8, M10, and R1.

[0021]

[0022] when

[0023]

[0024] The current branch of M3 cannot conduct, the voltage detection module outputs an insufficient voltage signal to the subsequent stage, and the inverter outputs a low level. This enables the charging module to work and charge the BOOST.

[0025] when

[0026]

[0027] When the current branch of M3 is turned on, the voltage detection module outputs a voltage OK signal to the next stage, the inverter output is high, and there is no longer a need to continue charging the BOOST.

[0028] The charging module works by controlling the on / off state of M16 via a pre-amplifier signal, which in turn controls the charging transistor M17. When M17 is on, it charges the BOOST directly through VIN, rather than using the internal power supply voltage.

[0029] When M16 is turned off, the parasitic capacitance C1 of M17 is charged until the voltage difference between its gate voltage and VIN is less than the turn-on voltage. Then M17 is turned off, and the charging ends. Therefore, VIN will continue to charge BOOST for a period of time before stopping. This duration can prevent the charging signal from repeatedly changing.

[0030] The charging current I1 of the parasitic capacitor M17 can be approximated as a function of VIN. The mirror ratio of the currents of M13 and M14 is 1:k, and the resistance ratio of R2 to R3 is also 1:k.

[0031]

[0032] The duration T is:

[0033]

[0034] Under high voltage input conditions, T can be approximated as C1*R3, which is a constant. That is, after detecting that the BOOST voltage has reached the set value, charging continues for a time T before stopping.

Claims

1. A power tube driving power charging circuit for high power power management, comprising a voltage detecting unit and a charging unit, characterized in that, The voltage detection unit outputs a digital signal for voltage judgment, which is transmitted to the switch of the charging unit control power tube M17 through a level shift circuit. The gate and drain of the first type MOS tube M1 in the voltage detection unit are connected to the gates of the second type MOS tube M2, the third type MOS tube M3, the fourth type MOS tube M4, the fifth type MOS tube M5, and the drain of the seventh type MOS tube M7. The source terminals of the first type MOS tube M1, the second type MOS tube M2, the third type MOS tube M3, and the fourth type MOS tube M4 are connected to the BOOST potential, and the source terminal power supply is BOOST. The gate of the seventh type MOS tube M7 is connected to the gate and drain of the eighth type MOS tube M8 and the drain of the second type MOS tube M2. The source of the seventh type MOS tube M7 is connected to the SW potential through a resistor R1, and the sources of the tenth type MOS tube M10, the eleventh type MOS tube M11, and the twelfth type MOS tube M12 are also connected to the SW potential. The drain of the third type MOS tube M3 is connected to the gate and drain of the sixth type MOS tube M6. The source of the sixth type MOS tube M6 is connected to the gate and drain of the ninth type MOS tube M9. The source of the ninth type MOS tube M9 is connected to the gate and drain of the eleventh type MOS tube M11 and the gate of the twelfth type MOS tube M12. The drain of the twelfth type MOS tube M12 is connected to the drain of the fifth type MOS tube M5 and is output to the charging unit. In the charging unit, the sources of the thirteenth type MOS tube M13, the fourteenth type MOS tube M14, and the seventeenth type MOS tube M17 are connected to one end of the resistor R2 and the VIN. The gate and drain of the thirteenth type MOS tube M13 are connected to the gate of the fourteenth type MOS tube M14 and are connected to the ground through the resistor R3. The drain of the fourteenth type MOS tube M14 is connected to the drain of the fifteenth type MOS tube M15, the gate of the seventeenth type MOS tube M17, and the other end of the resistor R2. The drain of the seventeenth type MOS tube M17 is connected to the source terminal power supply potential through the diode D1. The source of the fifteenth type MOS tube M15 is connected to the drain of the sixteenth type MOS tube M16. The source of the sixteenth type MOS tube M16 is connected to the ground. The source terminal of the eighth type MOS tube M8 is connected to the drain and gate of the tenth type MOS tube M10. The gate of the sixteenth type MOS tube M16 is connected to the output of the level shift circuit. The gate of the fifteenth type MOS tube M15 is connected to the external power supply input VCC.

Citation Information

Patent Citations

  • Boost capacitor charging circuit with under-voltage protection

    CN107508460A

  • Voltage converter and operating method of voltage converter

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