Probe, oscilloscope and digital signal test system

Abstract

An embodiment of the present application provides a probe, an oscilloscope, and a digital signal test system. The probe includes: an input end, a transmission signal conversion module, and an output end. The input end is used to receive a digital signal to be measured. The transmission signal conversion module is connected between the input end and the output end and is used to convert the received digital signal to be measured into a transmission signal that can be received by the analog channel of the oscilloscope according to a first clock signal. The first clock signal and the second clock signal are the same-source clock signals. The second clock signal is the clock signal used when the reception signal conversion module in the oscilloscope works. The reception signal conversion module is a module connected to the analog channel to receive the transmission signal. The output end is used to output the transmission signal to the analog channel of the oscilloscope. In this way, the problem of data recovery error is solved, and the accuracy of digital signal test is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of oscilloscopes, and particularly to a probe, an oscilloscope, and a digital signal test system. Background Art

[0002] In the application of oscilloscopes, most of them integrate the function of a logic analyzer, making it an oscilloscope with logic analysis function. Conventional logic probes generally connect one end to the digital signal to be measured, and the other end is connected to the digital channel of the oscilloscope through an independent logic probe interface. Such a probe not only occupies a large amount of I / O resources, but also needs to be connected to the oscilloscope through an independent logic probe interface, and the oscilloscope also needs to provide a digital channel socket, which is not conducive to improving the product integration.

[0003] Related technologies have proposed to change the probe structure so that it can reuse the analog channel of the oscilloscope, thereby improving the product integration. However, after the digital signal to be measured is converted from digital to analog by the probe and transmitted to the logic channel of the oscilloscope, the signal data still needs to be restored in the oscilloscope and converted back to a digital signal. In this process, data restoration errors often occur. How to reduce the probability of data restoration errors has become a technical problem urgently to be solved in this field. Summary of the Invention

[0004] In view of this, an embodiment of the present application provides a probe, an oscilloscope, and a digital signal test system to solve at least one problem in the background art.

[0005] In a first aspect, an embodiment of the present application provides a probe, including: an input end, a transmission signal conversion module, and an output end; wherein,

[0006] The input end is used to receive the digital signal to be measured;

[0007] The transmission signal conversion module is connected between the input end and the output end, and is used to convert the received digital signal to be measured into a transmission signal that can be received by the analog channel of the oscilloscope according to a first clock signal; wherein, the first clock signal and a second clock signal are the same-source clock signals, the second clock signal is the clock signal used when the reception signal conversion module in the oscilloscope works, and the reception signal conversion module is a module connected to the analog channel to receive the transmission signal;

[0008] The output end is used to output the transmission signal to the analog channel of the oscilloscope.

[0009] In connection with the first aspect of the present application, in an alternative embodiment, the probe further comprises: a clock signal generation module and a clock signal transmission component; the clock signal generation module is configured to generate the first clock signal and the second clock signal; the clock signal transmission component is configured to transmit the first clock signal to the transmission signal conversion module and transmit the second clock signal to the reception signal conversion module of the oscilloscope; or,

[0010] The probe further comprises: a clock signal transmission component, configured to receive the first clock signal sent by the oscilloscope and transmit the first clock signal to the transmission signal conversion module; or,

[0011] The probe further comprises: a clock signal transmission component, configured to receive the first clock signal generated by a clock signal generation device disposed outside the probe and the oscilloscope and transmit the first clock signal to the transmission signal conversion module.

[0012] In connection with the first aspect of the present application, in an alternative embodiment, the first clock signal is sent to the transmission signal conversion module through a high-speed serial protocol.

[0013] In connection with the first aspect of the present application, in an alternative embodiment, the input end comprises a single-channel digital channel to receive a single digital signal to be measured;

[0014] The transmission signal conversion module comprises a comparator, and the comparator is configured to convert the received digital signal to be measured into a binary signal according to the first clock signal;

[0015] The output end is configured to output the binary signal as the transmission signal to the analog channel of the oscilloscope.

[0016] In connection with the first aspect of the present application, in an alternative embodiment, the input end comprises a multi-channel digital channel to receive a single digital signal to be measured or multiple digital signals to be measured;

[0017] The transmission signal conversion module comprises: a comparator and a pattern selection unit; wherein, the comparator is configured to convert the received digital signal to be measured into a binary signal; the pattern selection unit is configured to selectively output the binary signal of a required pattern;

[0018] The output end is configured to output the binary signal selectively output by the pattern selection unit as the transmission signal to the analog channel of the oscilloscope.

[0019] In combination with the first aspect of the present application, in an alternative embodiment, the input end includes multi-channel digital channels to receive a single digital signal to be measured or multiple digital signals to be measured;

[0020] The transmission signal conversion module includes: a comparator, an encoding circuit, and a code pattern selection unit; wherein, the comparator is configured to convert the received digital signal to be measured into a binary signal; the encoding circuit is configured to encode the converted binary signal to obtain an encoded signal; the code pattern selection unit is configured to selectively output the encoded signal of the required code pattern;

[0021] The output end is configured to output the encoded signal selectively output by the code pattern selection unit as the transmission signal to the analog channel of the oscilloscope.

[0022] In combination with the first aspect of the present application, in an alternative embodiment, the code pattern selection unit is configured to obtain the first clock signal and perform the step of selectively outputting the encoded signal of the required code pattern according to the first clock signal.

[0023] In combination with the first aspect of the present application, in an alternative embodiment, the transmission signal conversion module includes a serial-to-parallel conversion module.

[0024] In combination with the first aspect of the present application, in an alternative embodiment, the transmission signal conversion module includes a comparator, an encoding circuit, a code pattern selection unit, and a serial-to-parallel conversion module.

[0025] In a second aspect, an embodiment of the present application provides an oscilloscope, including: an analog channel, a serial-to-parallel conversion module, and a data processing module; wherein,

[0026] The serial-to-parallel conversion module is configured to send a first clock signal to the probe based on a high-speed serial protocol, and perform serial-to-parallel conversion on the transmission signal received from the probe based on the analog channel and transmit it to the data processing module; the clock signal used by the serial-to-parallel conversion module for serial-to-parallel conversion is a second clock signal, and the second clock signal and the first clock signal are the same-source clock signals;

[0027] The data processing module processes the signal after serial-to-parallel conversion by the serial-to-parallel conversion module and outputs it.

[0028] In a third aspect, an embodiment of the present application provides a digital signal test system, including: an oscilloscope and a probe; wherein, the probe is the probe described in any one of the foregoing embodiments.

[0029] In combination with the third aspect of the present application, in an alternative embodiment, the probe is the probe described in the foregoing embodiment; the oscilloscope is the oscilloscope described in the foregoing embodiment.

[0030] The probe, oscilloscope, and digital signal test system provided by the embodiments of the present application. Among them, the probe includes: an input end, a transmission signal conversion module, and an output end; the input end is used to receive a digital signal to be measured; the transmission signal conversion module is connected between the input end and the output end, and is used to convert the received digital signal to be measured into a transmission signal that can be received by the analog channel of the oscilloscope according to a first clock signal; the first clock signal and the second clock signal are the same-source clock signals, and the second clock signal is the clock signal used when the reception signal conversion module in the oscilloscope works. The reception signal conversion module is a module connected to the analog channel to receive the transmission signal; the output end is used to output the transmission signal to the analog channel of the oscilloscope; thus, the problem of data recovery error is solved, and the accuracy of digital signal testing is improved. Description of the Drawings

[0031] The drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation of the present application. In the drawings:

[0032] Figure 1 It is a schematic structural diagram of a probe provided by an embodiment of the present application;

[0033] Figures 2a - 2c They are respectively schematic structural diagrams of probes provided by variant embodiments of the present application;

[0034] Figure 3 It is a schematic structural diagram of a digital signal test system provided by a specific example of the present application;

[0035] Figure 4 It is a schematic structural diagram of a digital signal test system provided by another specific example of the present application;

[0036] Figure 5 It is a schematic circuit diagram of a digital signal test system provided by another specific example of the present application;

[0037] Figure 6 It is a schematic diagram of differential phase shift keying modulation;

[0038] Figure 7a It is a schematic diagram of the principle of generating a modulated signal by the selection method;

[0039] Figure 7b It is a schematic diagram of the principle of generating a modulated signal by the phase multiplication method;

[0040] Figure 8 It is a schematic structural diagram of a digital signal test system provided by another specific example of the present application;

[0041] Figure 9Schematic structural diagram of a probe provided by another embodiment of the present application;

[0042] Figure 10 Schematic structural diagram of an oscilloscope provided by an embodiment of the present application;

[0043] Figure 11 Schematic structural diagram of a digital signal test system provided by an embodiment of the present application. Detailed implementation manners

[0044] To make the technical solutions and beneficial effects of the present invention more obvious and understandable, the technical solutions in the embodiments of the present application will be clearly and completely described below by way of listing specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present application.

[0045] It should be noted that in the present application, words such as "for example" or "exemplary" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "for example" or "exemplary" in the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Exactly speaking, the use of words such as "for example" or "exemplary" is intended to present related concepts in a specific manner.

[0046] In the present application, terms such as "first", "second", "third", etc. are only used for descriptive purposes, serving to distinguish the indicated technical features, and cannot be understood as indicating or implying relative importance or order, nor can they be understood as implicitly indicating the quantity of the indicated technical features. Thus, the technical features defined with "first", "second", "third", etc. may include one or more of such technical features. In the description of this embodiment, unless otherwise specified, the meaning of "a plurality" is two or more (including two). It should also be understood that the terms "include" and "comprise" indicate the presence of the determined features, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements and / or components. When used herein, the term "and / or" includes any and all combinations of the related listed items.

[0047] As described above, a conventional logic probe generally has one end connected to the digital signal to be measured, and the other end is connected to the digital channel of the oscilloscope through an independent logic probe interface. A comparator is provided inside the logic probe. After the digital signal to be measured enters the probe, a binary digital signal (1 or 0) is output through the comparator, and the output digital signal is connected to the digital channel of the oscilloscope through an independent logic probe interface. After the logic data enters the oscilloscope, it is received and sampled through the general I / O (such as differential I / O) ports of the sampling processing chip (such as the digital chips FPGA / ASIC). This method will occupy a large amount of I / O resources, and the sampling rate is affected by the performance of the I / O ports of the FPGA / ASIC chips. It is often only in the order of 1 GSa / s and cannot measure higher-frequency signals. In addition, the probe needs to be connected to the oscilloscope through an independent logic probe interface, increasing the number of designed interfaces; digital channel sockets also need to be provided on the oscilloscope, increasing the volume, which is not conducive to improving the product integration.

[0048] Related technologies have proposed to change the probe structure and use a digital-to-analog converter (DAC) inside the probe to convert the input digital signal to be measured into an analog signal, so that the output end can be connected to the analog channel of the oscilloscope; after the analog signal enters the oscilloscope, it is converted into a digital signal by the analog-to-digital converter (ADC) inside the oscilloscope and then output after processing. In this way, the multiplexing of the analog channel of the oscilloscope is realized, and the product integration is improved. However, since both the DAC and ADC devices need to be driven by a digital clock, if the clocks of the two devices do not use the same source clock and are not synchronized, there will be a risk of metastability in the ADC sampling input data, which will ultimately lead to errors in data recovery (decoding). In addition, the principle of the digital-to-analog converter is simple amplitude modulation (AM modulation), that is, the digital signal is converted to different amplitudes for characterization; and amplitude modulation is prone to interference. If there is movement or bending in the line on the path connecting the probe and the oscilloscope, it is possible to change the amplitude of the amplitude modulation signal, which will also cause data recovery errors.

[0049] Based on this, the embodiments of the present application aim to provide a technical solution that can reduce the probability of data recovery errors and improve the accuracy of digital signal testing.

[0050] First, please refer to Figure 1 . As shown in the figure, the embodiment of the present application provides a probe 100, including: an input end 110, a transmission signal conversion module 120, and an output end 130.

[0051] Here, the probe 100 specifically includes two ends, namely an input end 110 and an output end 130; among them, the input end 110 is used to receive the digital signal to be measured; the output end 130 is used to connect to the oscilloscope 200, specifically for outputting the transmission signal to the analog channel 210 of the oscilloscope 200.

[0052] The transmission signal conversion module 120 is connected between the input end 110 and the output end 130, and is configured to convert the received digital signal to be measured into a transmission signal that can be received by the analog channel 210 of the oscilloscope 200 according to the first clock signal; wherein, the first clock signal and the second clock signal are the same-source clock signals, and the second clock signal is the clock signal used when the reception signal conversion module 220 in the oscilloscope 200 operates, and the reception signal conversion module 220 is a module connected to the analog channel 210 to receive the transmission signal.

[0053] It can be understood that the probe 100 provided in this embodiment is a special logic probe. By setting the transmission signal conversion module 120 inside to convert the digital signal to be measured, it realizes the conversion of the digital signal into a transmission signal that can be received by the analog channel 210 of the oscilloscope 200, and further realizes the multiplexing of the analog channel of the oscilloscope. The function of the transmission signal conversion module 120 to convert the digital signal into a transmission signal that can be received by the analog channel 210 of the oscilloscope 200 can be specifically implemented by the structure described below in this application in order to obtain the corresponding technical effects; however, it should be noted that the structure described below should not be construed as a limitation on the transmission signal conversion module 120 in this embodiment. Using other alternative methods in the art to convert the digital signal into a transmission signal that can be received by the analog channel 210 of the oscilloscope 200 should also be understood to belong to the scope of the transmission signal conversion module 120 in this embodiment.

[0054] It should be noted that in this embodiment, the transmission signal conversion module 120 executes the step of converting the received digital signal to be measured into a transmission signal according to the first clock signal, and the first clock signal is a clock signal that is the same-source as the second clock signal used when the reception signal conversion module 220 in the oscilloscope 200 operates. In other words, the transmission signal conversion module 120 performs synchronous clock processing with the reception signal conversion module 220, ensuring the accuracy of data sampling and reducing the risk of data recovery errors.

[0055] The sources of the first clock signal and the second clock signal can be generated by a clock signal generation module provided inside the probe 100, or can be generated by a clock signal generation module provided inside the oscilloscope 200, or can also be generated by a clock signal generation device provided outside the probe 100 and the oscilloscope 200.

[0056] Figures 2a to 2c The probe structures provided by the respective variant embodiments are respectively shown.

[0057] Please refer to Figure 2a, in this variant embodiment, the probe 100 further includes: a clock signal generation module 140 and a clock signal transmission component 150. Among them, the clock signal generation module 140 is used to generate a first clock signal and a second clock signal; the clock signal transmission component 150 is used to transmit the first clock signal to the transmission signal conversion module 120, and transmit the second clock signal to the reception signal conversion module 220 of the oscilloscope 200.

[0058] And in Figure 2b the structure shown, the probe 100 further includes: a clock signal transmission component 150, which is used to receive the first clock signal sent by the oscilloscope 200 and transmit the first clock signal to the transmission signal conversion module 120. In this variant embodiment, the first clock signal is generated by a clock signal generation module provided in the oscilloscope 200, and the clock signal generation module provided in the oscilloscope 200 can also generate a second clock signal to drive the reception signal conversion module 220.

[0059] In Figure 2c the structure shown, the probe 100 further includes: a clock signal transmission component 150, which is used to receive the first clock signal generated by a clock signal generation device 300 provided outside the probe 100 and the oscilloscope 200 and transmit the first clock signal to the transmission signal conversion module 120. In this variant embodiment, the clock signal generation device 300 can also generate a second clock signal and send the second clock signal into the oscilloscope 200 to drive the reception signal conversion module 220.

[0060] It should be noted that Figure 2c although it is shown that the first clock signal is directly sent from the clock signal generation device 300 into the probe 100, in this variant embodiment, it is not excluded that after the clock signal generation device 300 generates a first clock signal and a second clock signal of the same source, both are sent to the oscilloscope 200, and then the oscilloscope 200 sends the first clock signal to the probe 100.

[0061] As an optional implementation manner, the first clock signal is sent to the transmission signal conversion module 120 through a high-speed serial protocol. When sending data to the transmission signal conversion module 120 through the high-speed serial protocol, the first clock signal is, for example, embedded in the data and sent to the transmission signal conversion module 120. Here, the high-speed serial protocol includes but is not limited to JESD204.

[0062] Next, please refer to Figure 3. In a specific example of the present application, the input end 110 of the probe 100 includes a single-channel digital channel to receive a single digital signal to be measured (LA_IN). The transmission signal conversion module 120 includes a comparator, and the comparator is used to convert the received digital signal to be measured into a binary signal according to the first clock signal. The output end 130 is used to output the binary signal as a transmission signal to the analog channel 210 of the oscilloscope 200.

[0063] After the transmission signal is transmitted to the oscilloscope 200, for example, it is transmitted to the analog-to-digital conversion module (referred to as "analog-to-digital conversion ADC" in the figure) in the oscilloscope 200 through the analog channel 210, so as to be converted into a digital signal, and then output through decoding.

[0064] In this specific example, a single LA channel corresponds to one comparator output. After the measured channel is compared, the analog-to-digital conversion module in the oscilloscope 200 is directly used for sampling; moreover, the comparator serves as a transmission unit, and the analog-to-digital conversion module serving as a receiving unit uses a synchronization module (referred to as "synchronization SYNC" in the figure) for synchronization processing, ensuring the accuracy of data sampling. In addition, since the analog channel of the oscilloscope 200 is multiplexed, there is no need to receive and sample through the general I / O ports of the sampling processing chip, solving the problem of insufficient sampling rate, improving the sampling accuracy, and enabling the measurement of high-frequency signals. In addition, the problem that a conventional logic probe and an oscilloscope need to use a separate probe interface and a separate LA socket for connection is solved, improving the integration of the system.

[0065] Moreover, in this specific example, the binary signal output by the comparator is directly used as the transmission signal and output to the oscilloscope 200. Therefore, the digital 0 and 1 output by the comparator cover the 0 input and full-scale input of the sampling in the oscilloscope, with the largest signal amplitude span and strong anti-interference ability, further reducing the probability of data recovery errors. And, the probe structure in this specific example is simple and the cost is low, which is suitable for the situation of measuring a single digital signal to be measured.

[0066] Next, please refer to Figure 4 . In another specific example of the present application, the input end 110 of the probe 100 includes a multi-channel digital channel to receive a single digital signal to be measured or multiple digital signals to be measured. Figure 4 The situation of receiving four digital signals to be measured (LA_IN) is shown in

[0067] The transmission signal conversion module 120 includes a code pattern selection unit, and specifically performs code pattern selection on the input digital signal through code pattern selection; then, the analog-to-digital conversion module (referred to as "analog-to-digital conversion ADC" in the figure) in the oscilloscope 200 converts the analog signal into a digital signal. Through the synchronization module (referred to as "synchronization SYNC" in the figure), the code pattern selection unit as the transmission unit and the analog-to-digital conversion module as the reception unit are synchronized to avoid data sampling error problems caused by clock asynchronization. In addition, the problem that a conventional logic probe needs to use a separate probe interface and a separate LA socket when connected to the oscilloscope 200 is solved, improving the integration of the system. Since the analog channels of the oscilloscope 200 are multiplexed, there is no need to receive and sample through the ordinary I / O ports of the sampling processing chip, solving the problem of insufficient sampling rate (usually the ADC sampling rate can reach dozens of GSa / s, much higher than the sampling rate of differential I / O), improving the sampling accuracy, and enabling the measurement of high-frequency signals.

[0068] Figure 5 The schematic circuit diagram of the digital signal test system provided for a specific example shows the circuit structure of the probe 100 (including the transmission signal conversion module 120) in this specific example. As shown in the figure, the transmission signal conversion module 120 includes: a comparator, an encoding circuit, and a code pattern selection unit; among them, the comparator is used to convert the received digital signal to be measured into a binary signal; the encoding circuit is used to encode the converted binary signal to obtain an encoded signal; the code pattern selection unit is used to selectively output the encoded signal of the required code pattern.

[0069] The output terminal 130 (not shown in the figure) is used to output the encoded signal selectively output by the code pattern selection unit as the transmission signal to the analog channel 210 of the oscilloscope 200.

[0070] Figure 5 Still taking the received digital signal to be measured as four-channel logic signals as an example, the digital signal to be measured generates four-channel binary data through the comparator, and after being encoded by the encoding circuit, the corresponding code pattern is output through code pattern selection. The signal after code pattern selection is sampled through analog-to-digital conversion to obtain a digital signal; then the logic signal is restored through decoding processing.

[0071] Here, the encoding method of the encoding circuit includes but is not limited to Gray code encoding, differential encoding, etc. The encoding of the encoding circuit can also include the case where the binary data generated by the comparator is not changed, that is, no substantial encoding is performed.

[0072] The corresponding code patterns output by the code pattern selection include, for example, AM, FM, PM debugging code patterns, etc. In this way, a variety of optional code patterns are provided for the user, enabling the user to select a suitable code pattern according to the actual situation. For example, for the case where the line is prone to movement or bending on the path connecting the probe and the oscilloscope, the user can select other code patterns than the AM debugging code pattern, such as selecting FM.

[0073] Optionally, the transmission signal conversion module 120 may also not include an encoding circuit and directly transmit the binary signal output by the comparator to the code pattern selection unit, so as to selectively output the binary signal of the required code pattern. In this way, the transmission signal conversion module 120 may include a comparator and a code pattern selection unit; and, the received digital signal to be measured is converted into a binary signal by the comparator; and the binary signal of the required code pattern is selectively output by the code pattern selection unit.

[0074] It should be noted that the signal obtained after encoding by the encoding circuit is called an encoded signal only to distinguish it from the binary signal output by the comparator, and it does not mean that the encoded signal is not a binary signal. The encoded signal can be an encoded binary signal.

[0075] Figure 5 Specifically shows the use of a 10 MHz homologous clock to output the first and second clock signals to the transmission unit (specifically, the code pattern selection unit in the probe 100) and the receiving unit (specifically, the analog-to-digital conversion module in the oscilloscope 200) respectively. The homologous clock can ensure that the signal frequencies are consistent, and a definite phase relationship can be obtained through calibration. The design of the homologous clock is not limited to using a homologous 10 MHz clock. For example, only a 100 MHz clock can also be used. The clock signal is frequency multiplied to the operating frequencies of the analog-to-digital conversion module and the code pattern selection unit (such as 2 GHz) through a phase-locked loop circuit (PLL); and at the transmission unit or the receiving unit, delay adjustment and calibration are performed ( Figure 5 The specific example shown is for delay adjustment at the probe end); so that the receiving unit avoids the metastable interval, obtains the best sampling window, and reduces sampling error codes.

[0076] It can be understood that Figure 5 The circuit structure related to the clock shown is also applicable to Figure 3 the specific example shown; and it should not be understood that Figures 3 to 5 the specific example shown can only adopt such a circuit structure.

[0077] Any one of the comparator, the encoding circuit, and the code pattern selection unit can be used to obtain the first clock signal.

[0078] In an optional specific example, the code type selection unit is used to obtain the first clock signal, and to perform the step of selectively outputting the coded signal of the required code type according to the first clock signal. It can be understood that the code type selection unit is closer to the output terminal 130 of the probe 100, that is, closer to the oscilloscope 200, so that transmitting the first clock signal to the code type selection unit is more conducive to clock synchronization between the transmitted signal and the received signal, and minimizes the delay effect of the line after the code type selection unit on the transmitted signal.

[0079] In order to clearly explain the encoding method of the encoding circuit, the following takes differential encoding as an example for explanation. Differential encoding refers to encoding a digital data stream in which, except for the first element, each element is represented as the difference between the element and its previous element.

[0080] Figure 6 It is a schematic diagram of differential phase shift keying modulation; as shown in the figure, DPSK (Differential Phase Shift Keying) modulation is taken as an example, in which CLK is the original data clock, S is the absolute code, DS is the relative code, and MS is the modulated signal. The input signal can be regarded as a square wave signal with an amplitude of ±1, and the modulation process is the result of directly multiplying the original signal with the carrier signal. The waveform in the figure assumes that each code element period is an integer multiple of the carrier period. Compared with the absolute code, if the absolute code is 0, the original level remains unchanged (for example, in the second period, S is a low level 0, and DS maintains the level of the first period unchanged, that is, it is still a high level 1); if the absolute code is 1, the level is changed (for example, in the third period, S is a high level 1, and DS changes from the high level 1 of the second period to a low level 0). MS is a modulated signal, and the generation method can be a multiplication method or a selection method. Figure 7a The schematic diagram is a principle diagram of generating a modulated signal by a selection method; Figure 7b The schematic diagram of the principle of generating a modulated signal by multiplication method. The existing multiplication method or selection method can be used here, and no further discussion is given. After modulation, the modulated signal is sent to the receiving unit through the link.

[0081] In this specific example, the input end 110 of the probe 100 includes multi-channel digital channels, which can receive both a single digital signal to be measured and multiple digital signals to be measured. The case of receiving multiple digital signals to be measured has been described above. For the case of receiving a single digital signal to be measured, as an alternative implementation, the single digital signal to be measured is output as a binary signal by a comparator. When this binary signal passes through the encoding circuit, the encoding circuit does not change the binary data generated by the comparator, that is, no substantial encoding is performed, and thus it is directly output to the oscilloscope 200. As another alternative implementation, the probe 100 further includes a selection unit, which is specifically a switch for example; this selection unit is used to select the connection between the output end of the comparator and the input end of the encoding circuit, or to select the connection between the output end of the comparator and the output end 130 of the probe 100; thus, when receiving a single digital signal to be measured, by controlling the selection unit, the connection between the output end of the comparator and the output end 130 of the probe 100 is selected, so as to achieve a signal transmission path similar to that in the specific example shown in Figure 3 When receiving multiple digital signals to be measured, by controlling the selection unit, the output end of the comparator is connected to the input end of the encoding circuit, so that the binary signal output by the comparator is output to the oscilloscope 200 after encoding and pattern selection. Thus, the probe 100 provided in this specific example can detect both a single digital signal to be measured and multiple digital signals to be measured.

[0082] Figure 8 FIG. is a schematic structural diagram of a digital signal test system provided in another specific example of the present application. As shown in the figure, the transmission signal conversion module 120 may include a parallel-to-serial conversion module; specifically, a Serdes parallel-to-serial conversion module for example. Correspondingly, the received signal conversion module 220 in the oscilloscope 200 may include a serial-to-parallel conversion module; specifically, a Serdes serial-to-parallel conversion module for example.

[0083] It can be understood that the parallel-to-serial conversion module performs parallel-to-serial conversion on the received parallel data, and the serially converted data is transmitted using a high-speed interface (for example, transmitted using the JESD204 high-speed serial protocol), and a high-speed interface receiver (which can be a Serdes parallel-to-serial converter of an FPGA) is used; due to the high rate of the high-speed interface, it can support a higher LA sampling rate and parallel input and transmission of more LA channels.

[0084] The high-speed serial protocol is specifically JESD204B / C for example. Using the JESD204B / C protocol as the high-speed serial port protocol, the synchronization module is the clock reference of JESD204B / C, which ensures that the sending unit and the receiving unit are source clock synchronized, and ensures the synchronization and stability of the link.

[0085] The clock signal used by the serial-to-parallel conversion module during operation is the first clock signal; the clock signal used by the serial-to-parallel conversion module in the oscilloscope 200 during operation is the second clock signal; the second clock signal and the first clock signal are derived from the same clock signal source.

[0086] It can be understood that this specific example requires an independent probe interface and socket to connect the high-speed serial data output by the probe 100 to the high-speed serial interface inside the oscilloscope 200; however, this specific example does not require the use of conventional FPGA differential I / O ports, but instead uses a high-speed serial port. In this way, a higher transmission bandwidth can be obtained, and the FPGA differential I / O port resources can be saved.

[0087] As a specific optional implementation manner, the transmission signal conversion module 120 may include both a comparator, an encoding circuit, and a code pattern selection unit, and also include a serial-to-parallel conversion module (refer to Figure 9 ).

[0088] Of course, it can be understood that for the case where the input end 110 of the probe 100 includes a single-channel digital channel to receive a single-channel digital signal to be measured, the transmission signal conversion module 120 may include a comparator and a serial-to-parallel conversion module, which will not be elaborated here.

[0089] In this way, the data received by the probe (LA reception, which can adopt any one of the specific examples shown above Figure 3 or Figure 4 and Figure 5 shown specific examples) is then transmitted to the serial-to-parallel conversion module and then to the serial-to-parallel conversion module in the oscilloscope 200 through the serial-to-parallel conversion module. Thus, both a higher transmission bandwidth can be obtained, the accuracy of data sampling is ensured, and the integration of the product is improved at the same time.

[0090] The embodiment of the present application also provides an oscilloscope, Figure 10 which is a schematic structural diagram of the oscilloscope provided in this embodiment. As shown in the figure, the oscilloscope 200 includes: an analog channel 210, a serial-to-parallel conversion module, and a data processing module 230.

[0091] Here, the received signal conversion module 220 specifically uses a serial-to-parallel conversion module, and the serial-to-parallel conversion module is used to send the first clock signal to the probe 100 based on a high-speed serial protocol, and perform serial-to-parallel conversion on the transmission signal received from the probe 100 based on the analog channel 210 and transmit it to the data processing module 230.

[0092] The clock signal used by the serial-to-parallel conversion module during serial-to-parallel conversion is the second clock signal, and moreover, the second clock signal and the first clock signal are derived from the same clock signal source.

[0093] The serial-parallel conversion module sends a first clock signal to the probe 100, so that the serial-parallel conversion module in the probe 100 operates using the first clock signal.

[0094] The data processing module 230 processes and outputs the signal after serial-parallel conversion via the serial-parallel conversion module. The data processing module 230 performs sampling / decoding, for example; in addition, the data processing module 230 may further include a CPU to perform operations such as statistics, calibration, and configuration (reference can be made to Figure 5 the oscilloscope 200 in

[0095] The embodiment of the present application also provides a digital signal test system. Figure 11 It is a schematic structural diagram of the digital signal test system provided by an embodiment of the present application. As shown in the figure, the digital signal test system 800 includes: an oscilloscope 200 and a probe 100; wherein, the probe 100 is the probe provided by any of the foregoing embodiments.

[0096] It can be understood that the oscilloscope 200 can be an existing oscilloscope or the oscilloscope provided by any of the foregoing embodiments of the present application.

[0097] It should be noted that the probe embodiment, the oscilloscope embodiment, and the digital signal test system embodiment provided by the embodiments of the present application belong to the same concept; among the technical features in the technical solutions recorded in each embodiment, they can be combined arbitrarily without conflict.

[0098] It should be understood that the above embodiments are all exemplary and are not used to cover all possible implementation manners included in the claims. Without departing from the scope of the present disclosure, various deformations and changes can also be made on the basis of the above embodiments. Similarly, the technical features of the above embodiments can also be combined arbitrarily to form additional embodiments of the present invention that may not be clearly described. Therefore, the above embodiments only represent several implementation manners of the present invention and do not limit the protection scope of the present invention patent.

Claims

1. A probe, characterized in that, Including: An input end, a transmission signal conversion module, and an output end; wherein, The input end is used to receive a digital signal to be measured; The transmission signal conversion module is connected between the input end and the output end, and is used to convert the received digital signal to be measured into a transmission signal that can be received by the analog channel of an oscilloscope according to a first clock signal; wherein, the first clock signal and a second clock signal are the same-source clock signals, the second clock signal is the clock signal used when the reception signal conversion module in the oscilloscope works, and the reception signal conversion module is a module connected to the analog channel to receive the transmission signal; the transmission signal conversion module includes a pattern selection unit, and the pattern selection unit is used to obtain the first clock signal and perform the step of selectively outputting an encoded signal of a required pattern according to the first clock signal; The output end is used to output the transmission signal to the analog channel of the oscilloscope.

2. The probe according to claim 1, wherein The probe further includes: a clock signal generation module and a clock signal transmission component; the clock signal generation module is used to generate the first clock signal and the second clock signal; the clock signal transmission component is used to transmit the first clock signal to the transmission signal conversion module and transmit the second clock signal to the reception signal conversion module of the oscilloscope; or, The probe further includes: a clock signal transmission component, which is used to receive the first clock signal sent by the oscilloscope and transmit the first clock signal to the transmission signal conversion module; or, The probe further includes: a clock signal transmission component, which is used to receive the first clock signal generated by a clock signal generation device arranged outside the probe and the oscilloscope and transmit the first clock signal to the transmission signal conversion module.

3. The probe according to claim 1, characterized in that, The first clock signal is sent to the transmission signal conversion module through a high-speed serial protocol.

4. The probe according to claim 1, wherein The input end includes a single-channel digital channel to receive a single digital signal to be measured; The transmission signal conversion module includes a comparator, and the comparator is used to convert the received digital signal to be measured into a binary signal according to the first clock signal; The output end is used to output the binary signal as the transmission signal to the analog channel of the oscilloscope.

5. The probe according to claim 1, characterized in that The input end includes a multi-channel digital channel to receive a single digital signal to be measured or multiple digital signals to be measured; The transmission signal conversion module includes: a comparator and the pattern selection unit; wherein, the comparator is used to convert the received digital signal to be measured into a binary signal; the pattern selection unit is used to selectively output the binary signal of a required pattern; The output end is used to output the binary signal selectively output by the pattern selection unit as the transmission signal to the analog channel of the oscilloscope.

6. The probe according to claim 1, characterized in that, The input end includes a multi-channel digital channel to receive a single digital signal to be measured or multiple digital signals to be measured; The transmission signal conversion module includes: a comparator, an encoding circuit, and the code pattern selection unit; wherein, the comparator is configured to convert the received digital signal to be measured into a binary signal; the encoding circuit is configured to encode the converted binary signal to obtain an encoded signal; the code pattern selection unit is configured to selectively output the encoded signal of a required code pattern; The output terminal is configured to output the encoded signal selectively output by the code pattern selection unit as the transmission signal to the analog channel of the oscilloscope.

7. The probe according to claim 1, characterized in that, The transmission signal conversion module includes a serial-to-parallel conversion module.

8. The probe according to claim 1, characterized in that, The transmission signal conversion module includes a comparator, an encoding circuit, the code pattern selection unit, and a serial-to-parallel conversion module.

9. An oscilloscope, characterized in that, Comprising: An analog channel, a serial-to-parallel conversion module, and a data processing module; wherein, The serial-to-parallel conversion module is configured to send a first clock signal to the probe based on a high-speed serial protocol, so that the serial-to-parallel conversion module in the probe operates using the first clock signal, and is configured to perform serial-to-parallel conversion on the transmission signal received from the probe based on the analog channel and transmit it to the data processing module; the clock signal used by the serial-to-parallel conversion module for serial-to-parallel conversion is a second clock signal, and the second clock signal and the first clock signal are of the same source clock signal; The data processing module processes and outputs the signal after serial-to-parallel conversion by the serial-to-parallel conversion module.

10. A digital signal testing system, characterized in that, Comprising: An oscilloscope and a probe; wherein, The probe is the probe according to any one of claims 1-8.

11. The digital signal test system according to claim 10, characterized in that, The probe is the probe according to claim 7 or 8; the oscilloscope is the oscilloscope according to claim 9.

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