Semiconductor substrate polishing method adjusted according to pad-to-pad variation

Abstract

The present invention relates to a method for polishing a semiconductor substrate by adjusting the polishing sequence based on the pad-to-pad variation of the polishing pad.

Description

[0001] Information about divisional applications

[0002] This case is a divisional application. The parent case of the divisional application is a patent application with an application date of August 23, 2019, an invention title of "Semiconductor substrate polishing method adjusted according to pad-to-pad change amount", and an application number of 201980068792.7.

[0003] Related Applications Cross Reference

[0004] This application claims the benefit of U.S. Provisional Patent Application No. 62 / 729,134, filed on September 10, 2018, which is incorporated herein by reference for all relevant and consistent purposes. Technical Field

[0005] The field of the invention relates to methods for polishing semiconductor substrates, and in particular, to methods of adjusting a finish polishing sequence based on pad-to-pad variation of a polishing pad. Background Art

[0006] Semiconductor wafers are commonly used to produce integrated circuit (IC) chips (circuitry is printed on them). First, the circuit is printed on the surface of the wafer in a miniaturized form. The wafer is then broken down into circuit chips. This miniaturized circuit requires that the front and back surfaces of each wafer are extremely flat and parallel to ensure that the circuit can be properly printed on the entire surface of the wafer. To achieve this, after the wafer is cut from the ingot, grinding and polishing processes are typically used to improve the flatness and parallelism of the front and back surfaces of the wafer. When polishing the wafer in preparation for printing the miniaturized circuit on the wafer by electron beam lithography or optical lithography processes, a particularly good finish is required. The surface of the wafer on which the miniaturized circuit is to be printed should be flat.

[0007] The polishing process may cause the profile of the semiconductor wafer to change near the edge of the structure due to the uneven distribution of mechanical and / or chemical forces near the edge. For example, the thickness profile at the peripheral edge of the structure may be reduced, i.e., "edge roll-off" may be observed. Edge roll-off reduces the portion of the wafer that can be used for device fabrication. While edge roll-off may be controlled by dynamic control methods as disclosed in U.S. Patent Publication No. 2017 / 0178890, variability between polishing pads may result in differences in edge roll-off of polished substrates. This variability may be caused by allowed tolerances within the manufacturing process, and may be caused by variations in pad compressibility and / or thickness.

[0008] What is needed is a method of polishing a semiconductor substrate that improves substrate flatness and / or surface roughness while minimizing edge roll-off while compensating for changes in edge roll-off attributable to pad-to-pad variability.

[0009] This section is intended to introduce the reader to various aspects of the technology described and / or claimed below that may be related to various aspects of the present invention. It is believed that this discussion helps to provide the reader with background information to promote a better understanding of various aspects of the present invention. Therefore, it should be understood that these statements should be read in this perspective, and not as an admission of prior art. Summary of the invention

[0010] One aspect of the present invention relates to a method for polishing semiconductor substrates. Each substrate has a front surface and a rear surface substantially parallel to the front surface. The front surface of a first semiconductor substrate is brought into contact with a polishing pad. A polishing slurry is supplied to the polishing pad to polish the front surface of the first semiconductor substrate and produce a polished first semiconductor substrate. An edge roll-off of the first semiconductor substrate is measured. The front surface of a second semiconductor substrate is brought into contact with the polishing pad. A polishing slurry is supplied to the polishing pad to polish the front surface of the second semiconductor substrate. An amount of the polishing slurry supplied to the polishing pad when the second semiconductor substrate is brought into contact with the polishing pad is controlled based at least in part on the measured edge roll-off of the first semiconductor substrate.

[0011] Another aspect of the present invention relates to a method for finish polishing a semiconductor substrate. Each substrate has a front surface and a rear surface substantially parallel to the front surface. The life of a polishing pad is determined. Only the front surface of a semiconductor substrate is brought into contact with the polishing pad. A polishing slurry is supplied to the polishing pad to polish the front surface of the semiconductor substrate and produce a polished semiconductor substrate. An amount of the polishing slurry supplied to the polishing pad when the semiconductor substrate is brought into contact with the polishing pad is controlled based at least in part on the life of the polishing pad.

[0012] There are various improvements of the proposed features related to the above-mentioned aspects of the present invention. Other features may also be incorporated into the above-mentioned aspects of the present invention. These improvements and additional features may exist individually or in any combination. For example, the various features discussed below with respect to any of the illustrated embodiments of the present invention may be incorporated into any of the above-described aspects of the present invention individually or in any combination. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic diagram of a fine polishing device;

[0014] Figure 2 is a cross-sectional view of a wafer schematically illustrating measurement of a roll-off amount;

[0015] Figure 3 is a graph of the change in the amount of material removed across the radius of the wafer for different finish polishing conditions;

[0016] Figure 4 is a graph showing changes in edge roll-off of a finish-polished wafer when the amount of a first polishing slurry containing silicon dioxide is varied;

[0017] Figure 5 is a graph showing changes in near-edge flatness of a finish-polished wafer when the amount of a first silicon dioxide-containing polishing slurry is varied;

[0018] Figure 6 is a box plot of changes in edge roll-off of a finish-polished wafer when the amount of alkaline polishing slurry is changed;

[0019] Figure 7 is a graph showing changes in edge roll-off of a finish-polished wafer when the time of supplying the first polishing slurry containing silicon dioxide and the second polishing slurry containing silicon dioxide is changed;

[0020] Figure 8 is a graph of the change in edge roll-off of a finish polished wafer as pad life varies; and

[0021] Fig. 9 is a graph of the change in edge roll-off of a fine polished wafer as the global flatness of the wafer varies.

[0022] Corresponding reference characters indicate corresponding parts throughout the drawings. DETAILED DESCRIPTION

[0023] Provisions of the present invention relate to methods for polishing semiconductor substrates. Suitable substrates (which may also be referred to herein as semiconductor "wafers" or "structures") include single crystal silicon substrates, including substrates obtained by cutting wafers from an ingot (formed by the Czochralski process). Each substrate includes a central axis, a front surface, and a rear surface parallel to the front surface. The front and rear surfaces are generally perpendicular to the central axis. A circumferential edge joins the front and rear surfaces, and a radius extends from the central axis to the circumferential edge. The structures polished according to the methods of the present invention can be of any diameter suitable for use by a person skilled in the art, including, for example, 200 mm, 300 mm, greater than 300 mm, or even 450 mm diameter wafers.

[0024] In one or more embodiments of the present invention, a semiconductor substrate is polished (e.g., finish polished) and the polished semiconductor substrate is analyzed to determine edge roll-off. The edge roll-off is used to determine the pad-to-pad variation of the pad (i.e., the deviation from the average roll-off of the same type of pad). The polishing process can be adjusted based at least in part on the measured edge roll-off. In some embodiments, a batch of semiconductor structures is polished and the measured edge roll-off of the batch of wafers is used to adjust the polishing sequence.

[0025] In one or more embodiments of the present invention, the semiconductor substrate may be polished in one or more steps prior to determining the pad-to-pad variation of one of the pads used in the polishing sequence. For example, in some embodiments, a first polishing step is performed in which the front surface and optionally the back surface of the structure are polished (i.e., double-sided polishing is performed). Generally, the polishing is a "rough" polishing that reduces the surface roughness of the wafer to less than about Or even as low as about or even about As measured using an atomic force microscope (AFM) with a scan size of about 1 μm x about 1 μm to about 100 μm x about 100 μm. For the purposes of this specification, surface roughness is expressed as root mean square (RMS) unless otherwise indicated. Rough polishing typically results in about 1 μm to about 20 μm, and more typically, from about 5 μm to about 15 μm of material removed from the surface of the wafer.

[0026] Rough polishing (and fine polishing described below) can be achieved by, for example, chemical mechanical planarization (CMP). CMP typically involves immersing the wafer in an abrasive slurry and polishing the wafer through a polymer pad. The surface of the wafer is smoothed by a combination of chemical and mechanical action. Typically, polishing is performed until a chemically and thermally stable state is achieved, and until the wafer has achieved its target shape and flatness. Rough polishing can be performed on a double-sided polisher, which can be commercially purchased from Peter Wolters (e.g., AC2000 polisher in Rendsburg, Germany) or Fujikoshi (Tokyo, Japan), Speedfam (Kanagawa, Japan). Stock removal pads for silicon polishing are available from Psiloquest (Orlando, FL) and Dow Chemical Company (Midland, MI), and silicon dioxide-based slurries are available from Dow Chemical Company, Cabot (Boston, MA), Nalco (Naperville, IL), Bayer MaterialScience (Leverkusen, Germany), DA NanoMaterials (Tempe, AZ), and Fujimi (Kiyoso, Japan).

[0027] The rough polishing step may be performed at a slurry flow rate of about 50 ml / min to about 300 ml / min (or from about 75 ml / min to about 125 ml / min), within about 300 seconds to about 60 minutes and at a pressure of about 150 g / cm 2 To about 700g / cm 2 However, it should be understood that other polishing times, pad pressures, and slurry flow rates may be used without departing from the scope of the present invention.

[0028] After the rough polishing is completed, the wafer may be rinsed or dried. In addition, the wafer may be subjected to a wet tank or spin cleaning. A wet tank cleaning may include (optionally) contacting the wafer with an SC-1 cleaning solution (i.e., ammonium hydroxide and hydrogen peroxide) at an elevated temperature (e.g., about 50° C. to about 80° C.). Spin cleaning includes contact with an HF solution and ozone water and may be performed at room temperature.

[0029] After cleaning, a second polishing step may be performed. The second polishing step is typically a "finish" or "mirror" polish, in which the front surface of the substrate is contacted with a polishing pad attached to a rotating table or platen. The finish polish reduces the surface roughness of the wafer to less than about As measured by AFM with a scan size of about 10 μm×about 10 μm to about 100 μm×about 100 μm. The fine polishing can even reduce the surface roughness to less than about 10 μm×about 10 μm to about 100 μm×about 100 μm scan size. or less than about Finish polishing typically removes only about 0.5 μm or less of material from the surface.

[0030] refer to Figure 1 , a suitable fine polishing apparatus may include a polishing pad 1 mounted to a polishing table 7. A polishing head 31 holds a substrate 20 by using a holder 25 so that the front surface of the substrate 20 contacts the polishing pad 1. Slurry 38 is supplied to the polishing pad 1. The polishing head 31 oscillates at a high speed to move the substrate 20 relative to the pad 1 to polish the front surface of the substrate.

[0031] Suitable polishers for fine polishing are available from Lapmaster SFT (e.g., LGP-708, Chiyoda-Ku, Japan). Suitable pads include polyurethane-impregnated polyethylene pads, such as SUBA pads available from Dow Chemical Company, suede-type pads (also known as polyurethane foam pads), such as SURFIN pads from Fujimi, CIEGAL pads from Chiyoda KK (Osaka, Japan), and SPM pads from Dow Chemical Company.

[0032] Finish polishing (i.e., the first stage of finish polishing) may occur for at least about 60 seconds or even about 90 seconds, 120 seconds, or 180 seconds. The total slurry flow rate may be in the range of from about 500 ml / min to about 1000 ml / min (total flow rate after mixing) and the pad pressure may be from about 60 g / cm 2 To approximately 200g / cm 2 however, it should be understood that other polishing times, pad pressures, and slurry flow rates may be used without departing from the scope of the present invention.

[0033] Finish polishing may involve several polishing steps. For example, the structure may be exposed to several separate polishing sequences at two or more stations of a finish polishing machine (i.e., different workstations using different polishing pads). The polishing slurry supplied to the polishing pad at the station may also be changed during the polishing sequence.

[0034] One or more polishing slurries may be supplied to the polishing pad at a first station (i.e., first polishing pad) of the polishing apparatus in various sequences. Suitable slurries that may be used alone or in combination in the polishing sequence according to embodiments of the present invention include: a first polishing slurry that includes an amount of silica particles; a second polishing slurry that also includes an amount of silica particles but at a concentration less than the first slurry; a third polishing slurry that is alkaline (i.e., corrosive) and generally does not contain silica particles, and a fourth polishing slurry that is deionized water. In this regard, it should be noted that, as referred to herein, the term "slurry" refers to various suspensions and solutions (including solutions without particles therein, such as corrosive solutions and deionized water) and is not intended to imply the presence of particles in the liquid.

[0035] The silica particles of the first and second slurries can be colloidal silica, and the particles can be encapsulated in a polymer. Suitable first silica-containing polishing slurries include Syton-HT50 (Du Pont Air Products NanoMaterials, Tempe, Arizona) and DVSTS029 (Nalco Water, St. Paul, Minnesota). Suitable second silica-containing polishing slurries include Glanzox-3018 (from Fujimi, Tokyo, Japan) and NP 8020 (Nitta Haas, Osaka, Japan).

[0036] The concentration of silicon dioxide in the first and second polishing slurries can be varied by using fewer silicon dioxide particles in the second slurry. More typically, the concentration is varied by using silicon dioxide particles that contain less silicon dioxide in the particles themselves (ie, more polymer encapsulation and less silicon dioxide).

[0037] In some embodiments, the first polishing slurry contains a first group of silica particles and the second slurry contains a second group of silica particles. The first group of silica particles has a X1 silica content and the second group has a X2 silica content, where X1 is greater than X2. The silica content of the particles can be varied by individually encapsulating at least one group of particles with a polymer, where the degree of encapsulation (i.e., the thickness of the polymer) is different between the two groups. The polymer reduces the silica content within the group of particles. In some embodiments, the ratio of X1 to about X2 is at least about 2:1 or even at least about 3:1, at least about 5:1, at least about 10:1, or even at least about 15:1. The difference between X1 and about X2 (i.e., X1 minus X2) can be about 5 wt%, at least about 10 wt%, at least about 25 wt%, or at least about 50 wt%.

[0038] In some embodiments, a first group of silica particles of the first polishing slurry are individually encapsulated in a polymer, and the first group comprises at least about 50 wt % silica, or at least about 60 wt %, at least about 70 wt %, from about 50 wt % to about 95 wt %, from about 60 wt % to about 95 wt %, or from about 70 wt % to about 90 wt % silica.

[0039] The second set of silica particles of the second polishing slurry may also be individually polymer encapsulated. The second set of polymer encapsulated silica particles may include less than about 25 wt % silica, or as in other embodiments, less than about 15 wt %, less than about 10 wt %, from about 1 wt % to about 25 wt %, from about 1 wt % to about 15 wt %, or from about 1 wt % to about 10 wt % silica.

[0040] The third polishing slurry is alkaline (eg, including KOH, NaOH or NH4 salts) and generally does not contain silicon dioxide particles. The slurry may have a pH greater than 12 (eg, a pH from about 13 to about 14).

[0041] In various polishing sequences, the first, second, third, and fourth polishing slurries may be applied individually or in various combinations. In an exemplary sequence and in accordance with some embodiments of the present invention, finish polishing at a first station of a finish polishing machine begins with a first finish polishing step in which the polishing pad is simultaneously contacted with a first polishing slurry comprising silicon dioxide and an alkaline third polishing slurry. The two slurries may be combined at the polishing machine (i.e., supplied separately at the pad), or may be mixed before being supplied to the pad.

[0042] In the second fine polishing step of the first station, the second polishing slurry containing silicon dioxide and the third alkaline polishing slurry are simultaneously supplied to the polishing pad. In the second step, in addition to or as an alternative to the alkaline third slurry, a fourth slurry comprising deionized water may be used. Generally, the second polishing slurry is supplied to the pad only after the first polishing slurry has been completely supplied in the first step.

[0043] In the third fine polishing step of the first station, a second polishing slurry including silicon dioxide particles and / or a fourth polishing slurry including deionized water is supplied to the polishing pad. Generally, the third slurry does not contain an alkali to prevent the formation of pits.

[0044] After completing the polishing sequence at the first station, the semiconductor substrate may be transferred to a second or even a third station. The second and third stations may include the same or different polishing pads as the polishing pad of the first station. A second polishing slurry (which has a lower concentration of silicon dioxide than the first slurry) and / or a fourth slurry including deionized water may be used at the second and third stations.

[0045] According to an embodiment of the present invention, an already polished (e.g., finish polished) substrate or a batch of substrates is analyzed by measuring the edge roll-off of the structure to provide feedback to adjust the polishing sequence of the finish polisher (e.g., the sequence of the first station). The polished substrate is analyzed to determine the edge roll-off (also called "roll-off amount" or just "ROA").

[0046] Edge roll-off can be measured using a height data profile, as disclosed by M. Kimura et al., "A New Method for the Precise Measurement of Wafer Roll off of Silicon Polished Wafer," Japan Journal of Applied Physics, Vol. 38, pp. 38-39 (1999), which is incorporated herein by reference for all relevant and consistent purposes. Generally, Kimura's method has been standardized by the industry, for example, through "SEMI M69: Practice for Determining Wafer Near-Edge Geometry using Roll-off Amount, ROA (Preliminary) (2007), which is also incorporated herein by reference for all relevant and consistent purposes. Most commercially available wafer inspection instruments are preprogrammed to calculate ROA. For example, the ROA may be determined using a KLA-Tencor wafer inspection system using WaferSight analysis hardware (Milpita, CA).

[0047] refer to Figure 2 , the ROA of the wafer 20 is typically determined by referencing three points (P1, P2, and P3) along the radius of the wafer. A reference line R is fitted between two points (P1, P2). The third point (P3) is near the circumferential edge of the wafer where roll-off is typically observed. The ROA is the distance between the reference line R and the third point P3. The reference line R can be fitted as a first order linear line or a third order polynomial. For purposes of the present invention, unless otherwise stated, the reference line is fitted as a first order linear line.

[0048] In this regard, ROA may be expressed in terms of front surface ROA, back surface ROA, or thickness ROA (i.e., using an average thickness profile). Front surface ROA and back surface ROA measurements involve fitting a best fit reference line R between P1 and P2 along the respective front or back surface, and thickness ROA involves fitting a best fit line for various wafer 20 thicknesses between P1 and P2 (i.e., thickness ROA takes into account both the front and back surfaces).

[0049] While any of the three points may be selected to determine the ROA, one common method used in the art, particularly for 300 mm substrates, includes forming a reference line R using a first point that is approximately 80% of the radius of the wafer from the central axis of the wafer and a second point that is approximately 93.3% of the radius from the central axis of the wafer. In a 300 mm diameter wafer, these points are approximately 120 mm and 140 mm from the central axis of the wafer. A third point that is approximately 98.7% of the radius of the wafer from the central axis (i.e., approximately 148 mm from the central axis for a 300 mm diameter wafer) may be used, with the distance between the reference line and the third point being the ROA. A third point that is approximately 98.0% of the radius of the wafer from the central axis or approximately 99.3% of the radius of the wafer from the central axis (approximately 147 mm and approximately 149 mm, respectively, for a 300 mm diameter wafer) may also be used to determine the ROA.

[0050] The ROA may be measured and averaged across several radii of the wafer. For example, the ROA may be measured and averaged across 2, 4, or 8 radii angularly spaced across the wafer. For example, the ROA may be measured by averaging the ROA at eight radii (e.g., eight radii at 0°, 45°, 90°, 135°, 180°, 225°, 275°, and 315° in an R-θ coordinate system as described in SEMIM69).

[0051] As described above, ROA measurements may involve a front surface profile, a back surface profile, or a thickness profile. In this regard, as used herein, "ROA" refers to the ROA measured using the best fit thickness profile of the wafer (i.e., the thickness ROA rather than the front surface ROA), wherein a linear first order line is established between 80% and 93.3% of the radius of the wafer, and wherein, unless otherwise stated, the reference point of the annular edge portion of the wafer is at 98.7% of the radius.

[0052] It should be understood that the ROA with respect to the thickness profile may be a positive number, where the wafer becomes thicker in its peripheral edge portion, or may be a negative number, where the wafer becomes less thick in its peripheral edge portion. In this regard, the phrase "less than" used herein with respect to the ROA amount (negative or positive) indicates that the ROA is within a range from the stated amount to about 0 (e.g., an ROA of "less than about -700 nm" refers to an ROA range of about -700 nm to about 0, and an ROA of "less than about 700 nm" refers to an ROA in the range of about 700 nm to about 0). In addition, the phrase "greater than" used with respect to the ROA amount (negative or positive) includes a roll-off amount where the edge portion of the wafer is further away from the axial center of the wafer than the stated amount.

[0053] It should also be noted that the differential ROA / ERO (see Figure 4 and6 ) refers to the change in ROA from the previous process condition. For a negative ROA (e.g., -700 nm) where a dip is observed at the edge, a positive delta ROA / ERO indicates an improvement in edge roll-off under the changed conditions (i.e., the edge does not dip as much), while a negative delta ROA / ERO indicates an additional dip at the edge. For a positive ROA (e.g., 700 nm) where a rise is observed at the edge, a positive delta ROA / ERO indicates a further rise at the edge under the changed conditions, while a negative delta ROA indicates less rise at the edge under the changed conditions.

[0054] In some embodiments, after a new polishing pad is installed, one or more (e.g., a batch of) semiconductor substrates are analyzed. The edge roll-off of the polished semiconductor substrate is used to determine the amount of pad-to-pad variation of the pad (e.g., variation from an "average" edge roll-off). The measured edge roll-off of the polished semiconductor substrate (which may be referred to herein as the "first" semiconductor substrate) or a batch of substrates is used to adjust the polishing sequence of a first station of a finishing polisher for a subsequently polished substrate (which may be referred to herein as the "second" semiconductor substrate). For example, the amount of a first polishing slurry supplied to the polishing pad may be controlled. In some embodiments, the volume of the first polishing slurry and / or the volume of the second polishing slurry supplied at the first station is controlled based on the measured edge roll-off of the analyzed substrate. The polishing process may be controlled to adjust the edge roll-off according to one or more of the methods disclosed in U.S. Patent Publication No. 2017 / 0178890, which is incorporated herein by reference for all relevant and consistent purposes.

[0055] According to some embodiments of the present invention, to determine the amount of pad-to-pad variation of a polishing pad, the edge roll-off of a first semiconductor substrate or batch of substrates is compared to an average edge roll-off of a polishing pad of the same type as the polishing pad used to polish the first semiconductor substrate. The amount of polishing slurry (e.g., a first slurry containing silicon dioxide) supplied to the polishing pad when a second semiconductor substrate is contacted with the polishing pad can be based at least in part on the difference between the measured edge roll-off of the first semiconductor substrate and the average edge roll-off of the polishing pad of the same type. The average edge roll-off of a particular type of polishing pad can be determined from previous polishing runs using the same type of pad.

[0056] In embodiments where a first polished semiconductor substrate is analyzed by measuring edge roll-off to determine pad-to-pad variation of the polishing pad, the pad may be a new pad mounted on the polishing table. The semiconductor structure may be (ideally) the first semiconductor structure polished by the new pad or may be one of the first five, first ten, or first twenty substrates polished by the new polishing pad. In embodiments where a new polishing apparatus and / or pad arrangement is used, several wafers (e.g., first 50, first 100, or first 200 wafers) may be initially polished until stable removal is achieved, after which the above-mentioned first polished semiconductor substrate may be analyzed by measuring edge roll-off to determine pad-to-pad variation of the polishing pad.

[0057] In some embodiments, the substrates are analyzed by measuring the edge roll-off of each substrate in a batch of substrates to determine the amount of pad-to-pad variation of a polishing pad (e.g., a new pad) and adjust the polishing process. The batch may include at least 2 semiconductor substrates, or as in other embodiments, at least 5, at least 10, at least 15, or at least 20 semiconductor substrates. The measured edge roll-off of each of the polished semiconductor substrates may be averaged, wherein the amount of polishing slurry supplied to the polishing pad when a second semiconductor substrate is brought into contact with the polishing pad is based at least in part on the averaged roll-off amount of the batch.

[0058] In some embodiments, the ratio of the volume of the first polishing slurry supplied at the first station to the volume of the second polishing slurry supplied at the first station is adjusted. As shown below in Examples 2 and 4, by reducing the amount of the first silica-containing polishing slurry supplied (relative to the second silica-containing slurry), the edge roll-off that occurs during finish polishing is reduced (i.e., the negative ROA that would indicate the presence of roll-off at the edge is made less negative). In instances where the edge roll-off is expected to be larger (i.e., larger due to variations during the manufacture of the pads), as predicted from the measured roll-off of the analyzed structure, the amount of the first silica-containing polishing slurry supplied (relative to the second silica-containing slurry) may be reduced to compensate for the increase in edge roll-off due to pad-to-pad variability. In instances where the edge roll-off is expected to be smaller (i.e., smaller due to variations during the manufacture of the pads), as predicted from the measured roll-off of the analyzed structure, the amount of the first silica-containing polishing slurry supplied (relative to the second silica-containing slurry) may be increased to compensate for the increase in pad-to-pad variability.

[0059] In some embodiments, the ratio of the first slurry to the second slurry is adjusted by varying the length of time that the first silicon dioxide-containing slurry is supplied to the polishing pad and / or varying the amount of time that the second silicon dioxide-containing slurry is supplied to the polishing pad. For example, the total time that the first and second slurries are applied can be kept constant as the time that the first and second slurries are supplied to the pad varies.

[0060] Alternatively, or in addition to adjusting the ratio of the first to second silicon dioxide-containing polishing slurries, the amount of the third alkaline polishing slurry added at the first station is adjusted based on the measured edge roll-off of the analyzed substrate (i.e., the sum of the base added at the first station during each polishing step). In some embodiments, the amount of the third alkaline polishing slurry added simultaneously with the second silicon dioxide-containing polishing slurry is controlled to adjust the edge roll-off. As shown below in Example 3, by increasing the amount of base added during the first station of the finish polisher, the edge roll-off that occurs during the finish polishing is reduced (i.e., the negative ROA that would indicate the presence of roll-off at the edge is made less negative). The amount of alkaline polishing slurry supplied at the first station of the finish polisher may be increased based on a measured increase in roll-off due to pad-to-pad variation or decreased based on a measured decrease in roll-off due to pad-to-pad variation.

[0061] In some embodiments, a target edge roll-off is determined, and process conditions (e.g., the amount of first polishing slurry containing silicon dioxide and / or the amount of alkaline third polishing slurry) are adjusted based on the amount of pad-to-pad variation determined from the edge roll-off of the analyzed structure. In addition to edge roll-off measurements, feedback control methods may also involve evaluation of other parameters (e.g., wafer flatness), and control of polishing parameters such that an improved edge roll-off can be achieved without unacceptable degradation of wafer flatness. Other parameters may be monitored to ensure quality processing (e.g., presence of pits).

[0062] Alternatively, or in addition to controlling the amount of polishing slurry supplied to the polishing pad based on the edge roll-off of the first semiconductor substrate, the amount of polishing slurry subsequently used can be based at least in part on one or more other parameters associated with the polishing process. For example, the amount of polishing slurry supplied to the polishing pad when the second semiconductor substrate is brought into contact with the polishing pad can be based at least in part on the life of the polishing pad.

[0063] The life of the pad may be determined based on the number of substrates polished by the pad, or the number of hours the pad has been used to polish a substrate, or by any other suitable method (e.g., cumulative time multiplied by polishing pressure). The life may be normalized to the average life that the pad is typically used, or to a predetermined life after which the pad is replaced. Figure 8 As shown in , edge roll-off generally increases with increasing pad life. By reducing the amount of the first silicon dioxide-containing polishing slurry supplied, the edge roll-off that occurs during finish polishing can be reduced (i.e., making the negative ROA that would indicate the presence of roll-off at the edge less negative) to compensate for the increased edge roll-off due to the increased life of the pad. Alternatively, the amount of the third slurry (i.e., the alkaline slurry) can be adjusted.

[0064] In some embodiments, the polishing process is adjusted based at least in part on the measured flatness of the second semiconductor wafer. Fig. 9As shown in , an increase in crowning (i.e., the difference in thickness between the center and edge regions of the wafer) results in an increase in edge roll-off. This increase can be compensated for by reducing the amount of the first silicon dioxide-containing polishing slurry supplied to the pad (e.g., relative to the second silicon dioxide-containing slurry), so that the edge roll-off that occurs during finish polishing can be reduced. Alternatively, the amount of alkaline slurry can be adjusted.

[0065] The method of the present invention has several advantages over conventional methods for polishing substrates. By measuring the edge roll-off of a first semiconductor substrate or batch of substrates after a new polishing pad has been installed on a polishing table, pad-to-pad variations of the pad can be determined, which allows the polishing process to be adjusted for subsequently polished substrates. Deviations from the average expected roll-off of the polishing pad can be dynamically compensated within a fine polishing sequence by reducing or increasing the amount of polishing slurry containing silicon dioxide or alkaline polishing slurry. Adjusting the polishing process to take into account the impact of edge roll-off that contributes to the life of the polishing pad and / or the flatness of the semiconductor to be polished allows the polishing process to be further tuned to achieve a more consistent roll-off. The method can be particularly useful for reducing edge roll-off in a single-sided polishing process in which no more than about 0.5 μm or less of material is removed from the surface of the structure (which is typical for polishing a 300 mm diameter wafer).

[0066] Examples

[0067] The process of the present invention is further illustrated by the following examples. These examples should not be considered in a limiting sense.

[0068] Example 1 :The effect of the change of the first and second silicon dioxide slurries on the removal distribution curve during fine polishing

[0069] The rough double-sided polished wafer is finely polished in a single-sided polisher. In the first polishing step of the first station of the final polishing equipment, a first polishing slurry (Syton-HT50) including silica particles and a certain amount of alkaline polishing slurry (KOH) are supplied to the polishing pad. In the second step, a second polishing slurry (a mixture of Glanzox-3018 and NP 8020) including silica particles and an alkali are supplied to the station. The second silica-containing slurry contains less silica than the first silica-containing slurry. In the third step, the second silica-containing slurry and deionized water are supplied to the pad.

[0070] The wafer is transferred to the second station and then to the third station. In both the second and third stations, a second polishing slurry containing silicon dioxide and deionized water are supplied to the pad.

[0071] The amounts of the first and second silicon dioxide containing slurries were varied from conventional polishing methods for several runs of wafers. After processing at the first, second, and third stations, the normalized removal for the various runs was measured. Figure 3 As shown in , using additional first slurry results in an increase in removal at the edge (increase in edge roll-off). Using less first slurry also results in an increase in removal at the edge of the wafer. However, when using additional first slurry, the change in removal (i.e., the extent of removal near 148 mm compared to the fitted line showing the change in removal toward the edge) is larger, indicating a higher edge roll-off with increasing first slurry. Using additional second slurry results in less removal and reduced roll-off toward the edge of the wafer.

[0072] Example 2 : Effect of Variation of the First Silica-Containing Slurry in Finish Polishing

[0073] The polishing process of Example 1 was performed while adjusting the total flow rate of the first silicon dioxide-containing polish at the first station of the fine polishing machine. Figure 4 The change in edge roll-off (measured at 148 mm) before and after fine polishing (fine ROA minus rough ROA) is shown. Figure 4 , polishing with a small volume of the first silica-containing slurry results in less edge roll-off (i.e., the negative ROA becomes less negative). With additional volumes of the first silica-containing polishing slurry, this improvement is less. The right volume intersecting the x-axis indicates the increase in edge roll-off caused by using additional first slurry.

[0074] Figure 5 The change of the near edge flatness (ESFQR) of the wafer is shown. Figure 5 , it is shown that near-edge flatness is degraded where an additional volume of a first silicon dioxide-containing polishing slurry is used at a first station of the finish polisher.

[0075] Example 3 : Effect of varying the amount of alkali in fine polishing

[0076] The ratio of the amount of alkali to the amount of the second silica-containing slurry in the second polishing step of the first station of the finish polishing process described in Example 1 was varied. After the finish polishing, the edge roll-off of the wafer (measured at 148 mm) was measured.

[0077] Figure 6 The box plots of the results are shown in Figure 6 , at 20 ml of the second silica-containing slurry amount (first 5 data points), the edge roll-off improves with increasing amounts of alkali. This can also be seen in the 25 ml of the second silica-containing slurry data points.

[0078] Example 4 :The effect of changing time of first and second silicon dioxide slurries on removal distribution curves during fine polishing

[0079] The rough double-sided polished wafer is finely polished in a single-sided polisher. In the first polishing step of the first station of the final polishing equipment, a first polishing slurry (DVSTS029 from Nalco) including silica particles and a certain amount of alkaline polishing slurry (KOH) are supplied to the polishing pad. In the second step, a second polishing slurry (NP 8020H from Nitta Haas) including silica particles and an alkali are supplied to the station. The second silica-containing slurry contains less silica than the first silica-containing slurry. The relative feed rates in the first and second steps are shown below in Table 1.

[0080] Step 1 Step 2 Duration X Y Nalco 20cc / min - KOH 600cc / min 600cc / min NP8020H - 35cc / min

[0081] Table 1 : The rate of the first and second silica slurries and the base during the first and second steps of the first station (X+Y=35 seconds)

[0082] In the third step, a second silica-containing slurry and deionized water are supplied to the pad.

[0083] The total polishing time for Step 1 and Step 2 was kept constant at 35 seconds. The amount of time for Step 1 ("X") and Step 2 ("Y") as the edge roll-off changed is shown in Figure 7 In. As in Figure 7 As shown in , increasing the time of the first polishing step results in an increase in the roll-off (ie, the negative ROA becomes more negative).

[0084] Example 5 : Effect of pad life on edge roll-off

[0085] Figure 8 The change in edge roll-off before and after fine polishing is shown, showing that pad life increases with normalized life. Figure 8 It can be seen that the edge roll-off increases (ie, becomes more negative) as the pad age increases.

[0086] Example 6 :The influence of wafer flatness on edge roll-off

[0087] The crown of the wafer (i.e., the thickness change between center and edge, where a positioning parameter results in a crowned wafer and a negative number results in a butterfly-shaped wafer) was measured before and after fine polishing ("differential crown"), and the edge roll-off of the wafer was measured before and after fine polishing ("differential roll-off"). Fig. 9 Shows the change in roll-off as the differential crown changes. Fig. 9As shown in , an increase in differential crowning results in a reduced edge roll-off (ie, the negative edge roll-off becomes less negative).

[0088] As used herein, the terms "about," "substantially," "essentially," and "approximately," when used in connection with ranges of size, concentration, temperature, or other physical or chemical properties or characteristics, are meant to encompass variations that may exist in the upper and / or lower limits of a range of a property or characteristic, including variations resulting, for example, from rounding, measurement method, or other statistical variations.

[0089] When introducing elements of the present invention or embodiments thereof, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the elements. The terms "comprising," "including," "containing," and "having" are intended to be inclusive and mean that there may be additional elements in addition to the listed elements. The use of terms indicating a particular orientation (e.g., "top," "bottom," "side," etc.) is for convenience of description and does not require any particular orientation of the items described.

[0090] As various changes could be made in the above constructions and methods without departing from the scope of the invention, it is intended that all matter contained in the above description and shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

Claims

1. A method for polishing semiconductor substrates, each substrate having a front surface and a rear surface substantially parallel to the front surface, the method comprising: contacting the front surface of the first semiconductor substrate with a polishing pad; supplying a first semiconductor substrate polishing slurry to the polishing pad to finish polish the front surface of the first semiconductor substrate and produce a polished first semiconductor substrate; measuring an edge roll-off of the polished first semiconductor substrate; determining a pad-to-pad variation of the polishing pad by comparing a measured edge roll-off of the polished first semiconductor substrate to an average roll-off of a polishing pad that is the same as the polishing pad used to polish the first semiconductor substrate, wherein the first semiconductor substrate is one of the first twenty substrates polished by the polishing pad; contacting the front surface of a second semiconductor substrate with the polishing pad; supplying a second semiconductor substrate polishing slurry to the polishing pad to finish-polish the front surface of the second semiconductor substrate; and Based at least in part on the pad-to-pad variation of the polishing pad, an amount of the second semiconductor substrate polishing slurry supplied to the polishing pad when the second semiconductor substrate is brought into contact with the polishing pad is controlled.

2. The method according to claim 1, wherein the first semiconductor substrate is one of a batch of semiconductor substrates, the method comprising: contacting the front surface of each semiconductor substrate in the batch of semiconductor substrates with the polishing pad; supplying the first semiconductor substrate polishing slurry to the polishing pad of each semiconductor substrate in the batch of semiconductor substrates to finish polish the front surface of each semiconductor substrate in the batch of semiconductor substrates to produce a batch of polished semiconductor substrates; measuring the edge roll-off of each polished semiconductor substrate in the batch of polished semiconductor substrates; and The amount of the second semiconductor substrate polishing slurry supplied to the polishing pad when the second semiconductor substrate is contacted with the polishing pad is controlled based at least in part on the measured edge roll-off of the batch of polished semiconductor substrates.

3. The method of claim 2 , wherein the measured edge roll-off of each polished semiconductor substrate in the batch of polished semiconductor substrates is averaged, and when the second semiconductor substrate is brought into contact with the polishing pad, the amount of the second semiconductor substrate polishing slurry supplied to the polishing pad is based at least in part on the averaged roll-off amount of the batch of polished semiconductor substrates. 4 . The method of claim 2 , wherein the batch of semiconductor substrates comprises at least 2 semiconductor substrates, or at least 5, at least 10, or at least 20 semiconductor substrates.

5. The method of claim 1, wherein the amount of the second semiconductor substrate polishing slurry supplied to the polishing pad when the second semiconductor substrate is brought into contact with the polishing pad is controlled based at least in part on a lifespan of the polishing pad.

6. The method of claim 1, wherein the amount of the second semiconductor substrate polishing slurry supplied to the polishing pad when the second semiconductor substrate is brought into contact with the polishing pad is controlled based at least in part on a flatness of the second semiconductor substrate.

7. The method according to claim 1, wherein the second semiconductor substrate polishing slurry is supplied in at least two steps, the second semiconductor substrate polishing slurry is a first step polishing slurry including silicon dioxide, the first step polishing slurry is supplied to the polishing pad in a first step polishing slurry volume, the method further comprising: A second step polishing slurry is supplied to the polishing pad at a second step polishing slurry volume, the first step polishing slurry comprising a higher concentration of silicon dioxide relative to the second step polishing slurry, wherein the amount of the first step polishing slurry supplied to the polishing pad is controlled by controlling a ratio of the first step polishing slurry volume to the second step polishing slurry volume.

8. The method of claim 7, wherein the second-step polishing slurry comprises silicon dioxide.

9. The method of claim 7, wherein the ratio of the first polishing slurry volume to the second polishing slurry volume is controlled by controlling the time of applying the first polishing slurry and the second polishing slurry to the polishing pad.

10. The method of claim 7, wherein the first-step polishing slurry and the second-step polishing slurry are separately supplied to the polishing pad.

11. The method of claim 1 , wherein the amount of the second semiconductor polishing slurry supplied to the polishing pad is a total amount of the second semiconductor polishing slurry supplied when polishing at a first station of a polishing apparatus, the method comprising transferring the substrate to a second station of the polishing apparatus.

12. The method of claim 1, wherein the back surfaces of the first and second semiconductor substrates are not in contact with a polishing pad when polishing the front surface of the substrate.

13. The method of claim 1, wherein: The finish polishing of the first semiconductor substrate removes 0.5 μm or less of material from the front surface of the first semiconductor substrate; and The finish polishing of the second semiconductor substrate removes 0.5 μm or less of material from the front surface of the second semiconductor substrate.

14. The method of claim 1, wherein the first semiconductor substrate is the first substrate polished by the polishing pad.

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