Coupling architecture for superconducting flux qubits

Abstract

A quantum computing device comprises: a first array of qubits arranged along a first axis; and a second array of qubits arranged along a second axis different from the first axis such that the qubits of the second array intersect with the qubits of the first array to form a lattice structure, wherein each qubit in the first array is offset along the second axis relative to an immediately adjacent qubit in the first array, each qubit in the second array is offset along the first axis relative to an immediately adjacent qubit in the second array, and each intersection in the lattice structure between a qubit from the first array and a qubit from the second array comprises a coupler arranged to inductively couple the qubit from the first array to a qubit from the second array.

Description

[0001] This application is a divisional application of the invention patent application filed on December 30, 2016, with application number 201680086379.X and invention title "Coupled Architecture for Superconducting Flux Quantum Bits". Technical Field

[0002] This disclosure relates to coupling architectures for superconducting flux qubits. Background Technology

[0003] Quantum computing is a relatively new method of computation that leverages quantum effects such as superposition of fundamental states and entanglement to perform certain computations more efficiently than classical digital computers. Unlike digital computers, which store and manipulate information in the form of bits (e.g., "1" or "0"), quantum computing systems can manipulate information using qubits. A qubit can refer to a quantum device that enables a superposition of multiple states (e.g., data in both "0" and "1" states) and / or to the superposition of data in multiple states itself. In conventional terms, a superposition of "0" and "1" states in a quantum system can be represented, for example, α│0> + β│1>. The "0" and "1" states of a digital computer are analogous to the │0> and │1> fundamental states of a qubit, respectively. 2 represents the probability that a qubit is in the |0> state, while the value |β| represents the probability that the qubit is in the |0> state. 2 This represents the probability that a qubit is in the |1> fundamental state.

[0004] Quantum annealing is a simulation scheme for quantum computing. Using quantum annealing, also known as adiabatic quantum computing, the initial Hamiltonian H0 is encoded in the interactions between multiple qubits. The set of encoded qubits is then slowly annealed to the final problem Hamiltonian H. f The lowest energy configuration. This lowest energy configuration represents the solution to the encoded problem. This model is sometimes referred to as the adiabatic model of quantum computing. Summary of the Invention

[0005] In some embodiments, a quantum computing device includes: a qubit cell superlattice comprising a plurality of spliced ​​qubit cells, wherein each qubit cell comprises at least two qubit arrays having different respective array orientations, wherein a plurality of qubits within each qubit array are arranged along their respective array orientations, and the angle between the array orientations of each qubit array is equal to or less than 90°, and wherein, within each qubit array, adjacent qubits are offset from each other along an offset direction, and the offset direction is different from the corresponding array orientation of the qubit array.

[0006] In some embodiments, a qubit cell includes: at least two qubit arrays having different respective array orientations, a plurality of qubits within each qubit array being arranged along their respective array orientations, and the angle between the array orientations of each qubit array being equal to or less than 90°, and wherein, within each qubit array, adjacent qubits are offset from each other along an offset direction, and the offset direction is different from the corresponding array orientation of the qubit array.

[0007] Generally, in some aspects, the subject matter of this disclosure can be embodied in a quantum computing device comprising: a first array of qubits arranged along a first axis; and a second array of qubits arranged along a second axis other than the first axis, such that the qubits of the second array intersect with the qubits of the first array to form a lattice structure, wherein each qubit in the first array is offset along the second axis relative to its directly adjacent qubit in the first array, each qubit in the second array is offset along the first axis relative to its directly adjacent qubit in the second array, and each intersection in the lattice structure between the qubits from the first array and the qubits from the second array includes a coupler arranged to inductively couple the qubits from the first array to the qubits from the second array.

[0008] Implementations of quantum computing devices may include one or more of the following features. For example, in some implementations, each qubit of the lattice structure includes a coplanar waveguide electrically coupled to a superconducting quantum interference device (SQUID).

[0009] In some implementations, the first array includes N qubits, the second array includes N qubits, where N is greater than or equal to 2, each qubit in the first array is offset along a second axis by a first distance relative to its directly adjacent qubit in the first array, the first distance being approximately equal to √N equally spaced qubits oriented in the same direction, and each qubit in the second array is offset along a first axis by a first distance relative to its directly adjacent qubit in the second array.

[0010] In some implementations, the first axis is orthogonal to the second axis.

[0011] In some implementations, each intersection of qubits from a first array and qubits from a second array in the lattice structure includes two couplers arranged to inductively couple qubits from the first array to qubits from the second array.

[0012] In some implementations, couplers at each intersection between qubits from the first array and qubits from the second array are arranged to inductively couple the coplanar waveguide of the qubits from the first array to the coplanar waveguide of the qubits from the second array.

[0013] In some implementations, the unit cell is arranged to provide c-way coupling, where c is greater than or equal to 2.

[0014] In some embodiments, the quantum computing device further includes a third array of qubits arranged along a third axis different from the first and second axes, such that the qubits of the third array intersect with the qubits of the first and second arrays to form a lattice structure.

[0015] In some implementations, a first qubit in the first array is offset by a first amount along a second axis relative to a directly adjacent second qubit in the first array, and a third qubit in the first array is offset by a second amount along the second axis relative to a directly adjacent fourth qubit in the first array, different from the first amount.

[0016] Generally, in some aspects, the subject matter of this disclosure can be embodied in a quantum computing device having multiple cells, wherein each cell of the multiple cells comprises: a first array of qubits arranged along a first axis; and a second array of qubits arranged along a second axis other than the first axis, such that the qubits of the second array intersect with the qubits of the first array to form a lattice structure, wherein each qubit in the first array is offset along the second axis relative to its directly adjacent qubit in the first array, each qubit in the second array is offset along the first axis relative to its directly adjacent qubit in the second array, and each intersection point in the lattice structure between the qubits from the first array and the qubits from the second array comprises a coupler arranged to inductively couple a qubit from the first array to a qubit from the second array. The multiple cells are tiled such that each cell of the multiple cells is operatively coupled to its neighboring cell.

[0017] Implementations of quantum computing devices may have one or more of the following features. For example, in some implementations, each qubit in each cell includes a coplanar waveguide electrically coupled to a superconducting quantum interference device (SQUID).

[0018] In some implementations, for each of the multiple cells, a first array of cells includes N qubits, a second array of cells includes N qubits, where N is greater than or equal to 2, each qubit in the first array of cells is offset along a second axis by a first distance relative to its directly adjacent qubit in the first array, the first distance being approximately equal to √N equally spaced qubits oriented in the same direction, and each qubit in the second array of cells is offset along a first axis by a first distance relative to its directly adjacent qubit in the second array.

[0019] In some implementations, for each of the multiple cells, the first axis is orthogonal to the second axis.

[0020] In some implementations, for each of the plurality of cells, each intersection between qubits from the first array and qubits from the second array in the lattice structure includes two couplers arranged to inductively couple qubits from the first array to qubits from the second array.

[0021] In some implementations, for each of the plurality of cells, a coupler at each intersection between qubits from the first array and qubits from the second array is arranged to inductively couple a coplanar waveguide from the qubits from the first array to a coplanar waveguide from the qubits from the second array.

[0022] In some implementations, multiple cells are joined together such that, for each of the multiple cells, at least one coplanar waveguide from a qubit in that cell is coupled to at least one other coplanar waveguide from a qubit in a different cell. For example, for each of the multiple cells, each coplanar waveguide from each qubit in that cell is coupled to at least one other coplanar waveguide from a qubit in a different cell.

[0023] In some implementations, the tiles are arranged along a grid of U rows and U columns, where U is greater than or equal to 2.

[0024] In some implementations, the diameter of the mesh is 2U.

[0025] In some implementations, each of the multiple cells is arranged to provide c-way coupling, where c is greater than or equal to 2.

[0026] In some implementations, multiple cells comprise approximately 2U 2 c qubits.

[0027] In some implementations, the quantum computing device includes a resonator, wherein a first end of the resonator is coupled to a first qubit, and a second end of the resonator is coupled to a second qubit different from the first qubit.

[0028] Generally, in another aspect, the subject matter of this disclosure can be embodied in a quantum computing device comprising: a plurality of qubits; at least one coupler, each coupler being positioned adjacent to a corresponding qubit pair of the plurality of qubits such that one qubit in the qubit pair is operatively coupled to another qubit in the qubit pair; and a resonator, wherein a first portion of the resonator is positioned near a first qubit of the plurality of qubits for operative coupling to the first qubit, and a second portion of the resonator is positioned near a second qubit of the plurality of qubits for operative coupling to the second qubit.

[0029] Implementations of quantum computing devices may have one or more of the following features. For example, in some implementations, multiple qubits, at least one coupler, and a resonator can collectively be in any of at least two configurations, including a first configuration characterized by an initial Hamiltonian H0 and a second configuration characterized by a problem Hamiltonian H0. P The second configuration, characterized by the Hamiltonian having a ground state, is such that each corresponding qubit among a plurality of qubits and the corresponding other qubits among a plurality of qubits define the associated qubit-to-qubit coupling strength, the first qubit and the resonator define the first qubit-to-resonator coupling strength, the second qubit and the resonator define the second qubit-to-resonator coupling strength, and the qubit-to-qubit coupling strength between each corresponding qubit and the corresponding other qubits, the first qubit-to-resonator coupling strength, and the second qubit-to-resonator coupling strength together define the computational problem to be solved.

[0030] In some implementations, the multiple qubits include multiple superconducting coplanar waveguide flux qubits, multiple ring flux qubits, or multiple charge qubits.

[0031] In some implementations, a first portion of the resonator includes a first end of the resonator, a second portion includes a second end of the resonator, and the second end is opposite to the first end.

[0032] In some implementations, the third portion of the resonator is positioned near the third qubit among a plurality of qubits in order to be operatively coupled to the third qubit and to define the effective coupling strength from the first to the second to the third qubit.

[0033] In some implementations, the frequency of the resonator is approximately equal to the frequency of the first qubit and / or the second qubit.

[0034] In some implementations, the length of the resonator is between approximately 1000 µm and approximately 15000 µm.

[0035] The foregoing and other embodiments may offer one or more of the following advantages. For example, in some embodiments, the architecture disclosed herein provides an increase in qubit density. With increased qubit density, a wider range of complex problems can be represented and solved. In some embodiments, the increased qubit density can be achieved using less hardware (e.g., couplers) between qubits compared to other coupling architectures that achieve the same or fewer qubit densities. The less hardware between qubits, the less "stiff" the quantum system is considered to be, meaning that transitions between different quantum states are easier and the likelihood of falling into unwanted states is lower. In some embodiments, the increase in density can be achieved by uniformly spacing the qubits within the coupling architecture. By equally spacing the qubits, crosstalk between different qubits is more symmetrical, thereby simplifying the computation and compensation of crosstalk in the system. With the reduced computational requirements for computation and crosstalk compensation, a larger amount of crosstalk can be accommodated, allowing the qubits to be placed more closely together. In some embodiments, the coupling architecture disclosed herein provides greater interconnectivity between qubits, enabling potentially more powerful quantum computers.

[0036] Details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features and advantages will become apparent from the specific embodiments and the drawings. Attached Figure Description

[0037] Figure 1A This is a top view schematic diagram showing an example of a coplanar waveguide flux qubit.

[0038] Figure 1B It shows from Figure 1A A schematic close-up view of an example superconducting quantum interference device (SQUID) used in coplanar waveguide flux qubits.

[0039] Figure 1C It is shown that... Figure 1A A schematic diagram of the circuit diagram of a coplanar waveguide flux qubit.

[0040] Figure 2 This is a schematic diagram illustrating examples of two different coupling arrangements possible using coplanar waveguide flux qubits.

[0041] Figure 3This is a schematic diagram illustrating a simplified representation of a coplanar waveguide flux qubit.

[0042] Figure 4A This is a schematic diagram illustrating an example of cell design, where... Figure 3 The simplified coplanar waveguide flux qubit representation shown is used to depict the qubit of a cell.

[0043] Figure 4B It is shown Figure 4A A schematic diagram illustrating an example of the arrangement of multiple cells.

[0044] Figure 5 It is shown Figure 4A A diagram illustrating an example of a modified version of the cell.

[0045] Figure 6 It is shown Figure 5 A schematic diagram illustrating an example of the arrangement of multiple cells.

[0046] Figures 7 to 8 This is a schematic diagram illustrating an example of a quantum bit coupling structure.

[0047] Figure 9 This is a schematic diagram illustrating an example of a resonator in the main loop coupled to two coplanar waveguide flux qubits.

[0048] Figure 10 This is a schematic diagram showing the band gap E1 - E0.

[0049] Figure 11 This is a schematic diagram showing the toroidal flux qubit inductively coupled to the resonator.

[0050] Figure 12 This is a schematic diagram showing charge qubits coupled to a resonator using capacitance.

[0051] Figure 13 This is a schematic diagram showing a long-distance resonator that couples together three separate coplanar waveguide flux qubits. Detailed Implementation

[0052] In adiabatic quantum computing devices, also known as quantum annealers, the qubits of an annealer are operably coupled together in a controllable manner within a coupled architecture, such that the quantum state of each qubit affects the corresponding quantum state of the qubits it is coupled to.

[0053] Various parameters can be used to characterize the benefits and / or advantages of a particular qubit coupling architecture. Examples of such qubit coupling architecture parameters include the number of coupled qubits, the graph diameter, the graph tree width, the graph conductance, and the spin glass transition temperature. In some implementations, the computational power of a quantum annealer can be significantly increased by increasing the number of other qubits coupled to each qubit within the qubit coupling architecture. Typically, the graph diameter can be understood as the maximum eccentricity of any vertex in the graph. To find the diameter of the graph, the shortest paths between each pair of vertices are determined such that any maximum length of these paths corresponds to the diameter of the graph. Regarding a qubit coupling architecture, each qubit within the architecture corresponds to a vertex of the graph, such that the diameter of the coupling architecture can be expressed as the maximum eccentricity of any qubit within the architecture. A smaller diameter indicates a shorter path from the initial state of the system to any state that can correspond to the global optimum or optimal solution. For a qubit coupling architecture, the graph tree width can be understood as a measure of the interconnectivity between qubits within the architecture. A large tree width indicates increased interconnectivity between qubits, and as a result, computationally powerful architectures are capable of solving (or at least more efficiently) more complex problems than graphs with smaller tree widths or those solved by classical computing architectures. Graph conductance can be understood as a measure of the lack of bottlenecks within the graph. For example, in some cases, coupled architectures require a relatively large number of couplers that must traverse between qubits, which can increase the stiffness of the system. That is, transitions between different quantum states become more difficult in the chosen system. Therefore, a larger conductance indicates fewer bottlenecks and easier transitions between quantum states. In the context of qubit coupled architectures, the spin glass transition temperature is an indicator of how difficult a problem is, as represented by the coupled graph. Therefore, architectures with higher spin glass transition temperatures are capable of solving more difficult problems.

[0054] Generally, in some aspects, the subject matter of this disclosure relates to quantum annealers employing architectures for coupling qubits, wherein in certain embodiments, the coupling architecture provides increased qubit coupling, low pattern diameter, large tree width, high conductivity, high spin glass transition temperature, and / or a reduction in the amount of quantum hardware required to implement the architecture. Furthermore, in some embodiments, the processor architectures disclosed herein provide a highly flexible and fundamental design that can be easily scaled as more qubits are added to the system.

[0055] Coplanar waveguide flux qubit

[0056] The architecture disclosed in this paper relies on the use of qubits, which, due to their structure, can provide a higher number of tunable interactions with other similar qubits compared to other qubit types such as continuous current flux qubits. An example of a qubit that can provide a higher number of tunable interactions is the coplanar waveguide flux qubit. Before providing a description of the quantum processor architecture, refer to... Figures 1A to 1C and Figure 2 An overview of coplanar waveguide flux qubits and how to perform qubit coupling is provided. Figure 1A This is a schematic top view illustrating an example of a coplanar waveguide flux qubit 100. The qubit 100 includes a coplanar waveguide 102 coupled to a quantum device 104. The quantum device 104 may include, but is not limited to, superconducting quantum interference devices (SQUIDS). In this example, the quantum device 104 is a DC superconducting quantum interference device (DC-SQUID), although other SQUID devices may also be used. The coplanar waveguide 102 and the DC-SQUID 104 are surrounded by and electrically contacted with a ground plane 106. Each of the coplanar waveguide 102, the DC-SQUID 104, and the ground plane 106 is formed of a superconducting thin film material using standard thin-film fabrication processes on a dielectric substrate (e.g., sapphire or SiO2, or a semiconductor such as Si).

[0057] A coplanar waveguide 102 is disposed as an elongated thin film on a substrate, wherein one end 108 of the film is electrically contacted with a ground plane 106, and the other end 110 of the film is electrically contacted with a DC-SQUID 104. In other embodiments, both ends of the coplanar waveguide 102 are electrically contacted with the ground plane 106, and a quantum device 104 is electrically coupled between the two ends of the waveguide (e.g., at or near the midpoint of the coplanar waveguide 102). The elongated sides of the coplanar waveguide 102 are separated from the ground plane 106 by corresponding and co-extended gaps 105. In this example, the width of each corresponding gap 105 is constant along the length of the elongated waveguide, for example, to avoid unwanted reflections of electromagnetic waves. The desired mode profile of the waveguide is a symmetric coplanar waveguide (CPW) mode, wherein the two ground planes on either side of the central trace maintain the same voltage. In some embodiments, the coplanar waveguide 102 may have a length of up to several thousand micrometers or more (measured along the elongated side) and a width of up to several tens of micrometers (measured laterally to the length). The thickness of the deposited films (multiple deposited films) forming the coplanar waveguide 102 (and the ground plane 106 and the DC-SQUID portion) may be between tens and several thousand nanometers, for example, on the order of about 100 to 200 nm.

[0058] In some embodiments, the end 108 of the coplanar waveguide 102 has a bend or hook shape to provide a region for inductively coupling a qubit to a readout device (not shown) or for inductively coupling another qubit. Figure 1B This is a schematic close-up view of a DC-SQUID 104 coupled to a coplanar waveguide 102. The DC-SQUID 104 includes a loop 112 of superconducting material interrupted by two Josephson junctions 114, each of which can be formed of a thin-film non-superconducting / insulating material. For example, the Josephson junction 114 can be formed of three layers of Al / Al₂O₃ / Al thin films. Therefore, the Josephson junctions 114 are coupled in parallel to each other, with a first common node electrically contacting the coplanar waveguide 102 and a second common node electrically contacting a ground plane 106. The Josephson junctions 114 are electrically connected to the loop 112 via contact pads 115 formed of the same or different superconducting material as the loop 112. In some embodiments, there are no contact pads 115, and the Josephson junction 114 is in direct physical and electrical contact with the loop 112. The thickness of loop 112, contact pad 115, and Josephson junction can range from tens to thousands of nanometers, for example, on the order of about 100 to 200 nm. Each of the coplanar waveguide 102, DC-SQUID 104, and ground plane 106 can be formed of a material that exhibits superconducting properties at or below the superconducting critical temperature (such as aluminum (superconducting critical temperature of 1.2 Kelvin) or niobium (superconducting critical temperature of 9.3 Kelvin)). The substrate on which the coplanar waveguide 102, DC-SQUID 104, and ground plane 106 are formed comprises a dielectric material such as sapphire, SiO2, or Si. In some embodiments, sapphire has the advantage of low dielectric loss, thus resulting in a higher decoherence time.

[0059] In some implementations, the coplanar waveguide flux qubit 100 can operate in a manner similar to that of a continuous current flux qubit. That is, when magnetic flux is introduced into the coplanar waveguide, two continuous current states circulating in opposite directions within the coplanar waveguide loop can be generated. This magnetic flux can be introduced, for example, via an on-chip flux bias line. This flux bias line can be a thin-film superconductor and can be inductively coupled to the coplanar waveguide when activated by supplying current to it. The coplanar waveguide 102 also acts as a resonator, through which strong and long-distance coupling to other qubits can be achieved. Figure 1CThis is a schematic diagram of circuit diagram 116 representing qubit 100. As shown in circuit diagram 116, qubit 100 is associated with both capacitor 118 and inductor 120, which are coupled in parallel to two Josephson junctions 114 provided by DC-SQUID 104. Ground 122 in circuit diagram 116 is provided by ground plane 106. The capacitance and inductance values ​​of the waveguide are determined based on the film thickness, width, length, gap spacing to the coplanar ground plane, and substrate. Therefore, for a coplanar waveguide flux qubit such as qubit 100, the capacitance 118 and inductance 120 of the resonator portion of the qubit are provided by coplanar waveguide 102; however, for a continuous current flux qubit, a third Josephson junction within a superconducting loop is used to establish the capacitance and inductance.

[0060] Compared to continuous current flux qubits, coplanar waveguide flux qubit designs can offer several advantages. For example, coplanar waveguide flux qubits may exhibit relatively long decoherence times. Without being bound by theory, it is believed that the improved decoherence time is partly due to the use of a single layer of superconducting material to form the flux qubit. By using a single layer of superconducting material on the substrate, decoherence sources that otherwise exist due to additional material layers are removed. Similarly, the dielectric material typically used to form Josephson junctions in flux qubits is believed to be a strong decoherence source. Therefore, by replacing the third Josephson junction in a continuous current flux qubit with a coplanar waveguide, additional decoherence sources are eliminated, and the decoherence time associated with the qubit can be significantly increased.

[0061] Furthermore, coplanar waveguide flux qubits allow for coupling to a greater number of qubits. Increasing the number of qubits coupled to a typical continuous current flux qubit requires increasing the area of ​​the superconducting loop associated with the qubit. However, as the loop area increases, the inductance associated with the qubit increases rapidly, potentially limiting the qubit's usability. Moreover, quantum processors may also be limited by the complexity of the so-called embedding problem, given the constraints of the Chimera graph architecture typically used when employing continuous current qubits.

[0062] Conversely, coupling with coplanar waveguide flux qubits is achieved through inductive coupling to the coplanar waveguide portion of the qubit. Since the waveguide distributes its inductance and capacitance over a macroscopic length (e.g., a few millimeters), the inductance does not increase rapidly with increasing wavelength, and therefore the number of qubits that can be coupled can be significantly increased. Furthermore, in some implementations, the coplanar waveguide simplifies the embedding problem by establishing more direct paths between qubits.

[0063] Figure 2 This is a schematic diagram illustrating examples of two different coupling arrangements possible using coplanar waveguide flux qubits. Specifically, three different coplanar waveguide flux qubits (first qubit 202, second qubit 204, and third qubit 206) are coupled in... Figure 2 As shown, the first qubit 202 is coupled to the second qubit 204 in an "end-to-end" manner, while the second qubit 204 is coupled to the third qubit 206 in an "orthogonal" manner. Although other coupling orientations are possible, Figure 2 The two arrangements shown will be used in the qubit coupling architecture to be described. For ease of observation, the flux bias line, other control lines for operating the qubits, and the ground plane are shown in... Figure 2 Omitted in .

[0064] Each qubit (first qubit 202, second qubit 204, or third qubit 206) includes a component coupled to a quantum device (212a, 212b, or 212c) (e.g., as...). Figure 2 The DC-SQUID shown has coplanar waveguides (first coplanar waveguide 210a, second coplanar waveguide 210b, or third coplanar waveguide 210c). Each DC-SQUID has a Josephson junction consisting of... Figure 2 The 'X' in the diagram represents the parallel coupling. The ends of the coplanar waveguides (first coplanar waveguide 210a, second coplanar waveguide 210b, third coplanar waveguide 210c) and the quantum devices (212a, 212b, 212c) are coupled to ground plane 216. The design of the coplanar waveguide flux qubits and... Figures 1A to 1B The arrangement shown is slightly different. Compared to... Figure 1A In contrast to the design shown, each qubit's DC-SQUID is electrically coupled to the waveguide at or near the midpoint, while the ends of the waveguide are coupled to ground.

[0065] exist Figure 2 In the illustrated end-to-end arrangement, the first qubit 202 and the second qubit 204 are positioned relative to each other such that the coplanar waveguide portions of each qubit are aligned approximately collinear. For example, as Figure 2 As shown, a large portion of the first coplanar waveguide 210a section of the first qubit 202 is arranged collinear with a large portion of the second coplanar waveguide 210b section of the second qubit 204 along the same horizontal path. In an "orthogonal" arrangement, a large portion of the second coplanar waveguide 210b section of the second qubit 204 is arranged orthogonal to a large portion of the third coplanar waveguide 210c section of the third qubit 206. In both types of arrangements, the ends of the coplanar waveguides can be bent or deviated in different directions. Bending the ends of the coplanar waveguides allows coupling between the qubits.

[0066] Each qubit can be operatively coupled to another qubit via a superconducting coupler 218. That is, during qubit operation, the quantum state of the first qubit can be entangled with the quantum state of the second qubit by allowing inductive coupling between the waveguides of the first and second qubits via coupler 218. Positive or negative coupling between qubits can be achieved by adjusting the flux through each coupler 218 using the placement of a pair of couplers 218. Each coupler 218 includes a loop of, for example, a superconducting thin film material (e.g., aluminum), wherein a first portion of the loop extends along the coplanar waveguide of the first qubit in a first direction, and a second portion of the loop extends along the coplanar waveguide of the second qubit in a second direction (e.g., an orthogonal direction). For example, Figure 2 The coupler 218 shown has a right-angle bend where the first coplanar waveguide 210a and the second coplanar waveguide 210b intersect, or where the second coplanar waveguide 210b and the third coplanar waveguide 210c intersect. Each coupler 218 is laterally separated from the adjacent waveguide by a thin gap (e.g., on the order of a few micrometers). Each coupler 218 is also physically separated from the coplanar ground plane. During operation, energy from one waveguide (e.g., 210a) can be inductively coupled to the superconducting thin-film coupler 218, which in turn is inductively coupled to another waveguide (e.g., the second coplanar waveguide 210b) disposed near the coupler 218.

[0067] Although the coplanar waveguides of adjacent qubits are Figure 2 The waveguides are shown overlapping each other near the coupler pairs, but they are not actually electrically connected at these crossings. Instead, they are separated from each other using jumpers (such as cross-over air-bridges that allow one waveguide to cross over the other at a crossing without making contact). Alternatively, other designs can be used to allow the waveguides to cross each other without electrical contact.

[0068] To simplify the drawing of complex qubit coupling architectures, coplanar waveguide flux qubits can also be used. Figure 3 The diagram illustrates this. Quantum devices with coplanar waveguide flux qubits are... Figure 3 The center is replaced by a square 302 coupled at or near the midpoint of waveguide 304. Waveguide 304 is shown as a slender line with a slight bend at either end. For clarity, the ground connection and Josephson junction are omitted.

[0069] Improved qubit coupling architecture

[0070] Using superconducting coplanar waveguide flux qubits and Figure 2The different coupling arrangements shown make it possible to construct scalable quantum processor architectures for long-distance qubit coupling. Such architectures can offer various advantages. For example, in some embodiments, the architectures disclosed herein provide an increase in qubit density. With higher qubit density, a greater range and complexity of problems can be represented and solved. In some embodiments, the increased qubit density can be achieved using less hardware (e.g., couplers) between qubits compared to other coupling architectures that achieve the same or fewer qubit densities. The less hardware between qubits, the higher the conductivity of the quantum system is considered, or the less "rigid," meaning it transitions more easily between different quantum states and is less likely to fall into unwanted states. In some embodiments, the increase in density can be achieved by uniformly spacing the qubits within the coupling architecture. By uniformly spacing the qubits, crosstalk between different qubits is more symmetrical, thus simplifying the computation and compensation of crosstalk in the system. As the computational requirements for calculating and compensating for crosstalk decrease, a larger amount of crosstalk can be accommodated, allowing the qubits to be placed more closely together. The limit on how closely the qubits can be spaced can be determined by the acceptable level of crosstalk. For example, in some cases, the qubits are spaced too close together, resulting in high crosstalk, making crosstalk compensation a challenging problem. Examples of acceptable crosstalk limits include, for instance, 1% of the signal from the qubit being measured. In some implementations, the coupling architectures disclosed herein provide greater interconnectivity between qubits, thereby enabling potentially more powerful quantum computers. The coupling architectures that achieve the aforementioned advantages can be understood as having high tree width and low diameter.

[0071] Furthermore, since the exact number of other qubits that can be coupled may vary depending on the computational problem to be solved, it can be advantageous if the quantum processor architecture design offers flexibility in accommodating different numbers of qubits. That is, if the quantum processor architecture is scalable, then theoretically the design can be used to solve problems requiring an arbitrary number of qubits.

[0072] The following describes examples of scalable quantum processor architectures capable of coupling to a relatively large number of qubits with high conductivity, high tree width, and low diameter, as well as the process for generating them. Generally, the process may include providing a basic cell design comprising two or more overlapping arrays of qubits, wherein the qubits of the cells are coupled to each other. The positions of the qubits in each array are then shifted by a certain amount, resulting in modified qubit cells. Depending on the shift applied to each qubit, in some implementations, the modified qubit cells may be stitched together to form a larger pattern of interconnected qubits.

[0073] The first step in constructing a quantum processor architecture involves starting with a basic cell that takes into account the variable number of qubits that each qubit can be coupled to. Figure 4A This is a schematic diagram illustrating an example of this basic cell 400 design, where... Figure 3 The simplified coplanar waveguide flux qubit representation shown is used to depict qubit 402. For clarity, the ground plane has been omitted. Figure 4A In the view shown, it is assumed that the qubits are formed and arranged on a substrate (e.g., sapphire, SiO2, or Si). To provide electrical control and operation on the qubit 402, flux bias lines and other control lines may be formed in one or more separate layers located above or below the plane in which the qubit 402 is formed. The one or more layers containing the flux bias lines and other control lines may be formed and attached to the qubit 402 using semiconductor fabrication and chip bonding techniques.

[0074] Cell 400 includes a first array of qubits 402 arranged along a first axis or direction 401, and a second array of qubits 402 arranged along a second axis or direction 403 different from the first axis 401, such that the qubits 402 of the two arrays form a lattice structure, wherein each intersection of the lattice or intersection between the coplanar waveguide of the first qubit and the coplanar waveguide of the second qubit corresponds to a coupling point. In this specific example, the first axis is orthogonal to the second axis, although other arrangements are possible. Given an orthogonal arrangement of the two arrays, each qubit 402 within cell 400 is coupled to multiple other qubits within cell 400 based on the “orthogonal” coupling described herein.

[0075] Although the waveguide of qubit 402 is in Figure 4A The waveguides appear to overlap at lattice intersections, but they are not actually electrically connected at these intersections. Instead, they are separated from each other using jumpers (such as bridging air bridges that allow one waveguide to cross over the other at an intersection without creating contact). See also... Figure 2 As described above, the waveguides of each qubit are operatively coupled at the intersections using one or more superconducting coupler elements. For clarity, Figure 4A and Figure 4B The one or more superconducting coupler elements are omitted in the text.

[0076] Example cell 400 is constructed for c-path coupling, where c = 10. That is, qubit 402 within the cell is arranged such that it can be operatively directly coupled to 10 other qubits (e.g., other qubits within the cell). However, by splicing cells 400, it is possible to provide each qubit of cell 400 with direct coupling at the end of the coplanar waveguide via an "end-to-end" coupling 404 to two additional qubits, as shown below. Figure 4B As shown in the diagram. To facilitate observation of the cell splicing, gaps are shown between the ends of the coplanar waveguide at the "end-to-end" coupling position 404; however, it should be understood that the ends from each cell can be operatively coupled together, such as... Figure 2 The first qubit 202 and the second qubit 204 are shown in the diagram. Although Figure 4A Cell 400 is depicted as c-path coupling with c = 10, but other values ​​of c can also be chosen, with the smallest cell possibly having c = 2.

[0077] By piecing together cell 400, the resulting quantum processor architecture simply corresponds to a slightly larger version of the Chimera diagram (Chimera has the same structure with c = 4). That is, the arrangement of cell 400 will only provide two-part units with weakly connected, fully interconnected cells. Therefore, a given qubit will not be strongly entangled with its neighboring qubits in all directions. Furthermore, this arrangement of cells will include regions through which areas with a small number of couplers can be cut out, indicating relatively poor interconnectivity and thus potentially less robust coupling architecture.

[0078] Relative qubit position from Figure 4A The configuration shown is vertically and horizontally offset to improve cell interconnectivity. Figure 5 An example spacing adjustment of 2N qubits arranged in N×N cells 500 is shown, where N equals 10, and is described below.

[0079] from Figure 4A Beginning with a first array of qubits 402 (arranged along axis 401), each qubit 402 in the first array is offset along a second axis 403 by a first distance relative to its directly adjacent qubits 402 in the first array. This first distance is approximately equal to √N equally spaced and consecutive qubits oriented in the same direction. For example, as... Figure 5As shown, qubit 402a in the first array is offset by a distance 501 along axis 403 from its directly adjacent qubit 402b in the first array, where distance 501 is large enough to accommodate 3 qubits (i.e., approximately √N, for N = 10). Therefore, three consecutive qubits (qubits a, b, and c) oriented in the same direction from the second array can be fitted within the offset distance 501 between qubits 402a and 402b. In this example, the size of the individual qubit used to determine the offset distance is the width of the coplanar waveguide plus the width of one side of the DC-SQUID (see example...). Figure 3 The width (305) shown is used to define the qubit size. However, the qubit size can be defined differently, as long as the defined qubit size is consistently used to determine each offset distance.

[0080] To maintain coupling with the qubits from the second array and provide uniform cells (so that cells can be pieced together into a larger structure), the pattern established by offsetting the qubits within the first array can be repeated. However, the offset of 501 can be divided between the last qubit of the previous pattern and the first qubit of the next pattern. For example, refer again... Figure 5 Qubit 402c is the last qubit in the offset qubit pattern, while the directly adjacent qubit 402d is the first qubit in the new offset qubit pattern. However, qubit 402d is not aligned at the exact same starting position as qubit 402a. Instead, qubit 402d is shifted slightly to the right in cell 500 compared to qubit 402a. This is because an offset of approximately √N (e.g., 3 for N=10) of 501 has already been divided between qubits 402c and 402d. Specifically, offset 501 roughly accommodates the width of the vertically oriented qubit “d” (to the right of the DC-SQUID of qubit 402c) and the widths of the vertically oriented qubits “e” and “a” (to the left of the DC-SQUID of qubit 402d).

[0081] Once all the qubits in the first array have been offset according to the design parameters described above, the qubits in the second array are offset in a similar manner. For example, qubit 402e (in Figure 5The qubit "e" is offset by a distance 503 along axis 401 from its direct neighboring qubit 402f in the second array, where distance 503 is large enough to accommodate 3 qubits (i.e., approximately √N, for N = 10). Again, to maintain coupling with the qubits from the first array and provide uniform cells, the pattern established by offsetting the qubits within the second array can be repeated. Furthermore, the offset between directly adjacent qubits within the second array can be divided between the last qubit of the previous pattern and the first qubit of the next pattern.

[0082] After obtaining modified cell 500 in which the qubits have been transferred relative to each other, the modified cell 500 can be stitched together to create a larger connected graph for scaling up systems with a large number of qubits. Scaling is possible in part due to the uniformity of the cell 500 structure. Figure 6 The image shows a quantum processor architecture 600 consisting of 16 cells stitched together in a 4×4 superlattice structure. The cells of the superlattice structure are connected in a manner similar to... Figure 5 Cell 500 shown is constructed using coplanar waveguide flux qubits in the same manner. The panels are arranged such that the qubits in each cell are operatively coupled to the qubits in other adjacent cells (e.g., through the placement of inductive couplers at the intersections of waveguides from different cells). Qubits located adjacent to the outer periphery of the quantum processor architecture 600 can be coupled to fewer qubits than those located closer to the center of the quantum processor architecture 600. Furthermore, portions of the coplanar waveguides can extend from the bulk of the lattice. To reduce the amount of exposed and unused portions of the coplanar waveguides in the panelized lattice, the waveguides can be bent (e.g., bent at a 90° angle) and extended so that they intersect with and can couple to as many other qubits as possible within the lattice structure.

[0083] Using a lattice, it is possible to quickly reach other qubits in the lattice from any point by following straight horizontal and vertical segments. The cells are constructed so that no space is wasted. A spliced ​​cell structure with a U×U cell layout, where each cell is associated with c-path coupling, where c is greater than or equal to 2 and U is greater than or equal to 2, has a diameter approximately equal to 2U, and contains approximately 2U qubits within each spliced ​​cell. 2 c.

[0084] Figures 4A to 6 A specific type of cell and its corresponding spliced ​​lattice structure for providing long-distance qubit coupling are illustrated. Specifically, Figure 4AThe qubits in the cell 400 design shown are arranged in two arrays, wherein the elongated portions (e.g., coplanar waveguide portions) of N qubits in the first array are oriented perpendicular to the elongated portions of N qubits in the second array. However, other cell designs are possible, and thus can form the basis for different lattice structures. For example, in some embodiments, a cell may comprise an array of more than two qubits. In some embodiments, the arrays may be oriented relative to each other at angles other than 90°. Therefore, the lattice formed by splicing modified cells can also exhibit arrays of more than two qubits oriented along different directions and / or arrays of qubits oriented relative to each other at angles other than 90°. Alternatively, or additionally, the number of qubits within each array of the cell may be different. In some embodiments, the distance each qubit is transferred relative to its neighboring qubits within the array may be different. For example, in an array of N qubits, the first qubit can be offset by approximately √N from a second qubit that is parallel and directly adjacent to it along a first direction, while the second qubit can be offset by a different amount (e.g., approximately (√N) / 2) from a third qubit that is parallel and directly adjacent to it. Other variations in the offset between directly adjacent qubits within the array are also possible.

[0085] Figure 7 This is a schematic diagram illustrating an example of a qubit coupling architecture 700 based on an overlapping array of qubits arranged to form a rhomboid cell 702. Figure 7 In the example, for ease of observation, the representation of qubits is further simplified. Specifically, each coplanar waveguide flux qubit is simply represented as a grayscale line. The point where two grayscale lines of different intensities meet (or establish a new path direction) corresponds to a point where an inductive coupler can be formed to operatively couple two different qubits together. For example, qubit 710a (dark grayscale line) is coupled to qubit 710b (bright grayscale line) via an inductive coupler, and qubit 710b is coupled to qubit 710c (dark grayscale line). Each of qubits 710b and 710c is also coupled to qubits 710d (dark grayscale line) and qubit 710e (dark grayscale line).

[0086] like Figure 7As shown, the qubit coupling architecture 700 consists of three separate arrays (first array 704, second array 706, and third array 708) of qubits oriented along different directions from each other. For example, the qubit coupling architecture 700 includes a first array 704, in which the qubits of the first array 704 are parallelly spaced along direction 701. The second array 706 includes qubits parallelly spaced along direction 703, and the third array 708 includes qubits parallelly spaced along direction 705. Each angle formed between the different directions (701, 703, 705) is less than 90°. Furthermore, each qubit within each array of the qubit coupling architecture 700 is offset by a distance 712 relative to its directly adjacent and parallel qubits within the array. This distance 712 can be variable. Figure 5 As shown in the modified cell, the direction of the offset distance 712 is different from the direction in which the qubits are aligned within the array. Figure 7 The coupling structure shown can also be called a triangular connected graph because a triangle is formed when the qubits from each of the three different qubit arrays overlap each other.

[0087] In some implementations, the coupling structure may further include additional long-distance coupling connections. For example, in some implementations, one or more resonator lines may be included in the patterned architecture, wherein each of the one or more resonator lines within the coupling architecture is coupled to at least two qubits. Coupled resonators allow two distant qubits to be coupled together as a single logical qubit. Therefore, introducing long-distance coupling can reduce the diameter of the coupling architecture, increase conductivity, increase tree width, and / or increase the spin glass transition temperature.

[0088] Figure 8This is a schematic diagram illustrating an example of a qubit coupling architecture 800, which includes two resonators, namely a first resonator 802 and a second resonator 804, to provide long-distance coupling. Again, for simplicity, the coplanar waveguide flux qubit is represented as a simple grayscale line, where different grayscale intensities correspond to different qubits. As shown in the example, the first end of the first resonator 802 extends from a coupling point between four qubits near the upper left corner of the coupling pattern to a second end at a coupling point between four different qubits near the lower right corner of the coupling pattern. Similarly, the first end of the second resonator 804 extends from a coupling point between four qubits near the upper right corner of the coupling pattern to a second end at a coupling point between four different qubits near the lower left corner of the pattern. Although the first resonator 802 and the second resonator 804 are shown as intersecting, they do not necessarily need to be coupled at the overlapping point. The first resonator 802 and the second resonator 804 can be formed from elongated pieces of, for example, a conductive material, such as superconducting aluminum. Each of the first resonator 802 and the second resonator 804 includes a capacitor at its end. For example, at each end of an elongated conductive material, a gap containing, for example, air or a dielectric can separate a second conductive material, such as a superconducting ground plane. In some embodiments, the resonator does not include a capacitor. During operation of a quantum processor using a qubit coupling architecture 800, each resonator couples one or more qubits at a first end to one or more different qubits at a second end of the resonator (e.g., via inductive coupling).

[0089] The first resonator 802 and the second resonator 804 can be formed in the same plane as the qubits locally coupled together within the architecture. To avoid unwanted electrical connections with some qubits, air bridges can be formed at each region where the qubits need to overlap. Alternatively, the resonators can be fabricated such that they extend around the perimeter of the qubit coupling architecture 800 to avoid having to form air bridges on the qubits. In some embodiments, the first resonator 802 and the second resonator 804 can be formed in one or more layers or planes different from the qubits to which the resonators are connected. For example, using semiconductor 3D integration techniques (e.g., bump bonding and layer stacking), the first resonator 802 and the second resonator 804 can be formed on or below the layer forming the qubits and coupled to the qubits via vertical interconnects (e.g., vias and / or bump bonding).

[0090] Figure 8The resonators shown are not limited to use with the architectures and coplanar waveguide flux qubits disclosed herein; alternatively, the resonators can be used with any quantum annealer architecture and / or any qubit design. In gated quantum computing, the quantum bus (long resonator) is responsible for applying gates between qubits that are far apart. Here we discuss later how resonators (also called “quantum buses”) can be used for long-distance coupling in quantum annealers. This form differs from the gated model of quantum computers because the latter employs virtual coupling in the dispersion region, which is useless for annealing. Here, we need to consider the Hamiltonian in the laboratory framework as a dispersion transformation that introduces various unwanted system resonator terms.

[0091] Figure 9 This is a schematic diagram illustrating an example of a resonator in the main loop coupled to two coplanar waveguide flux qubits. Again, although coplanar waveguide flux qubits are shown, the resonator can be combined with other qubit designs. The quantum bus is an auxiliary system that should achieve efficient ZZ coupling between qubits, meaning that the ground state of the qubit plus resonator system should be described as the ground state of a Hamiltonian with long-range ZZ terms. We first write down the total Hamiltonian of a qubit system with Ising interactions, where two qubits are coupled through a single resonator, as shown... Figure 9 As shown:

[0092]

[0093] Where H S Ising Hamiltonian , and It is the coupling strength of the quantum bit resonator, ω r It is the resonator frequency.

[0094] Next, we must construct the appropriate ground-state subspace for this system. Given different values... Rewrite Hamiltonian

[0095]

[0096] Using the resonator operator and its diagonal decomposition:

[0097]

[0098] If we ensure that the ground state subspace of the qubit and the resonator is spanned by the lowest energy level, then we achieve efficient ZZ coupling between the qubits:

[0099] This can be achieved by having, for example Figure 10This is achieved using the large bandgap E1-E0 shown. This bandgap should be chosen to be larger than the relevant low-energy spectrum of the Hamiltonian. In this case, we have the Hamiltonian in the low energy spectrum:

[0100]

[0101] And the effective system Hamiltonian will be:

[0102]

[0103] Programmability: Energy value E0 is g1, g2, and ω r Since Z1Z2 is a function of Z1, we can obtain programmable coefficients by having tunable resonator frequencies and / or qubit resonator coupling. It is believed that the coupling strength between the resonator and the qubit depends on the frequency difference between the qubit and the resonator. That is, the smaller this frequency difference, the stronger the coupling. For example, in some implementations, the frequencies of the resonators coupled to the first and second qubits can be approximately the same as the frequencies of the first and / or second qubits to which the resonator is coupled. The resonator length, in turn, depends in part on the resonator frequency. For example, for qubit frequencies covering a range of several GHz to tens of GHz, resonators with a similar frequency range can have lengths between approximately 1000 µm and approximately 15000 µm.

[0104] Figure 9 The diagram illustrates the inductive coupling between a resonator and a coplanar waveguide flux qubit (“fluxmon”). The same principle can be applied to other types of qubits. For example, Figure 11 This is a schematic diagram showing two toroidal flux qubits inductively coupled to a resonator. Figure 12 This is a schematic diagram showing two charged qubits using capacitive coupling to a resonator.

[0105] Multi-qubit coupling: In quantum annealing, the Hamiltonian with multiple qubit terms greatly enhances the programmability of the annealer. Above, we showed how to create efficient two-qubit interactions Z1Z2. Multi-qubit interactions, such as three-qubit ZZZ or four-qubit ZZZ, or long-distance interactions, can be implemented by coupling three or more qubits to a single resonator. Figure 13 This is a schematic diagram showing a long-distance resonator that couples together three separate coplanar waveguide flux qubits.

[0106] The digital and quantum themes described in this specification, as well as embodiments of digital functional operations and quantum operations, can be implemented in digital electronic circuits, suitable quantum circuits, or more generally in quantum computing systems, in digital or quantum computer software or firmware in a tangible form, in digital or quantum computer hardware including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. The term "quantum computing system" can include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0107] The embodiments of the digital and quantum themes described in this specification can be implemented as one or more digital or quantum computer programs, i.e., one or more modules of digital or quantum computer program instructions encoded on a tangible, non-transitory storage medium, for use by a data processing device to run or control the operation of a data processing device. The digital or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits, or a combination of one or more of these. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagation signal capable of encoding digital or quantum information, such as a machine-generated electrical, optical, or electromagnetic signal generated to encode digital or quantum information for transmission to a suitable receiver device for operation by the data processing device.

[0108] The terms quantum information and quantum data refer to information or data carried, stored, or held in quantum systems, the smallest nontrivial system being a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can appropriately be approximately two-level systems in the corresponding context. Such quantum systems can include multi-level systems, for example, having two or more levels. For example, such systems can include atomic, electron, photon, ionic, or superconducting qubits. In many implementations, the fundamental computational states are identified using the ground state and the first excited state; however, it should be understood that other arrangements where computational states are identified using higher-level excited states are also possible. The term "data processing device" refers to digital or quantum data processing hardware and encompasses various devices, apparatuses, and machines for processing digital or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, multi-digital and quantum processors or computers, and combinations thereof. The device may also be, or further include, dedicated logic circuitry such as an FPGA (field-programmable gate array), an ASIC (application-specific integrated circuit), or a quantum simulator—a quantum data processing device designed to simulate or generate information about a specific quantum system. Specifically, a quantum simulator is a dedicated quantum computer and does not have the capability to perform general-purpose quantum computing. In addition to the hardware, the device may optionally include code that creates the runtime environment for digital or quantum computer programs, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of these.

[0109] Digital computer programs can also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code. They can be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and can be deployed in any form, including as standalone programs, or as modules, components, subroutines, or other units suitable for use in a digital computing environment. Quantum computer programs can also be referred to or described as programs, software, software applications, modules, software modules, scripts, or code. They can be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and translated into a suitable quantum programming language, or can be written in a quantum programming language, such as QCL or Quipper.

[0110] Digital or quantum computer programs can, but do not necessarily, correspond to files in a file system. Programs can be stored in sections of files that store other programs or data; for example, in markup language documents, in a single file dedicated to the program in question, or in one or more scripts within multiple coordinating files (e.g., files storing one or more modules, subroutines, or code sections). Digital or quantum computer programs can be deployed to run on a single digital or quantum computer, or to execute on multiple digital or quantum computers located at one site or distributed across multiple sites and interconnected via digital or quantum data communication networks. A quantum data communication network is understood as a network that can transmit quantum data using quantum systems (e.g., qubits). Typically, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum and digital data.

[0111] The processes and logic described in this specification can be executed by one or more programmable digital or quantum computers, operating where appropriate with one or more digital or quantum processors, running one or more digital or quantum computer programs to perform functions by manipulating input digital and quantum data and generating outputs. The processes and logic can also be executed by dedicated logic circuitry (e.g., FPGA or ASIC) or a quantum simulator, or by a combination of dedicated logic circuitry or a quantum simulator and one or more programmable digital or quantum computers, and the apparatus can also be implemented as such dedicated logic circuitry or a quantum simulator.

[0112] For a system of one or more digital or quantum computers, being "configured" to perform a specific operation or action means that the system has software, firmware, hardware, or a combination thereof installed on it, which, in operation, causes the system to perform those operations or actions. For one or more digital or quantum computer programs, being configured to perform a specific operation or action means that the one or more programs include instructions that, when run by a digital or quantum data processing device, cause that device to perform an operation or action. A quantum computer can receive instructions from a digital computer that, when run by a quantum computing device, cause that device to perform an operation or action.

[0113] A digital or quantum computer suitable for running digital or quantum computer programs can be based on a general-purpose or special-purpose digital or quantum processor, or both, or any other kind of central digital or quantum processing unit. Typically, the central digital or quantum processing unit receives instructions and digital or quantum data from read-only memory, random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons), or a combination thereof.

[0114] The fundamental components of a digital or quantum computer are a central processing unit (CPU) for executing or running instructions and one or more memory devices for storing instructions and digital or quantum data. The CPU and memory may be supplemented by or incorporated into a dedicated logic circuit or quantum simulator. Typically, a digital or quantum computer will also include one or more mass storage devices (e.g., magneto-optical, magneto-optical, optical disc, or quantum systems suitable for storing quantum information) for storing digital or quantum data, or operatively coupled to receive or transfer digital or quantum data to such mass storage devices. However, digital or quantum computers do not require such devices.

[0115] Digital or quantum computer-readable media suitable for storing digital or quantum computer program instructions and digital or quantum data include all forms of non-volatile digital or quantum memories, media, and memory devices, including, for example: semiconductor memory devices (e.g., EPROM, EEPROM, and flash memory devices); magnetic disks (e.g., internal hard disks or removable hard disks); magneto-optical disks; CD-ROMs and DVD-ROMs; and quantum systems (e.g., trapped atoms or electrons). It should be understood that quantum memory is a device capable of storing quantum data with high fidelity and efficiency for extended periods, such as a light-matter interface where light is used for transmission and matter is used for storage and retention of quantum characteristics (such as superposition or quantum coherence) of quantum data.

[0116] Control of the various systems or portions thereof described in this specification may be implemented in a digital or quantum computer program product comprising instructions stored on one or more non-transitory machine-readable storage media and operable on one or more digital or quantum processing devices. Each of the systems or portions thereof described in this specification may be implemented as an apparatus, method, or system, which may include one or more digital or quantum processing devices and a memory for storing operable instructions that perform the operations described in this specification.

[0117] Although this specification contains numerous specific details of implementation, these should not be construed as limiting the scope of the claims, but rather as descriptions of features that may be specific to particular embodiments. Certain features described herein in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented separately or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations, or even claimed on their own, in some cases one or more features from a claimed combination may be removed from that combination, and a claimed combination may refer to a sub-combination or a variation of a sub-combination.

[0118] Similarly, although operations are described in a specific order in the accompanying drawings, this should not be construed as requiring these operations to be performed in the specific order or sequence shown, or to perform all of the shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated into a single software product or packaged into multiple software products.

[0119] Specific embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. Various modifications can be made without departing from the spirit and scope of the invention. For example, the actions recited in the claims can be performed in a different order and still achieve the desired result. As an example, the processes described in the drawings do not necessarily require a specific order or sequence to achieve the desired result. In some cases, multitasking and parallel processing can be advantageous.

[0120] Several embodiments have been described. However, it should be understood that various modifications can be made without departing from the spirit and scope of the invention. Other embodiments are within the scope of the following claims.

Claims

1. A quantum computing device, comprising: A quantum bit cell superlattice consists of multiple spliced ​​quantum bit cells. Each qubit cell comprises at least two qubit arrays, the two qubit arrays having different array orientations, and the plurality of qubits within each qubit array arranged along their respective array orientations, with the angle between the array orientations of each qubit array being equal to or less than 90°. In each qubit array, adjacent qubits are offset from each other along an offset direction, and this offset direction is different from the corresponding array orientation of the qubit array. Each qubit cell comprises 2N qubits, and within each qubit array, the offset spacing between adjacent qubits along the offset direction is approximately [missing information].

2. The quantum computing device according to claim 1, wherein the qubit cell superlattice comprises U 2 Each qubit cell has a grid diameter of 2U.

3. The quantum computing device according to claim 1, wherein, In each qubit array, the offset spacing between the first pair of adjacent qubits along the offset direction is different from the offset spacing between the second pair of adjacent qubits.

4. The quantum computing device according to claim 1, wherein, Within each qubit array of the qubit cell, the offset spacing between the first pair of adjacent qubits along the offset direction is the same as the offset spacing between the second pair of adjacent qubits.

5. The quantum computing device of claim 1, wherein the qubits of each qubit cell are operatively coupled to the qubits of other qubit cells within the superlattice of the qubit cell.

6. The quantum computing device according to claim 1, wherein, The qubit cell superlattice includes a long-distance coupler arranged to couple a first qubit cell to a second qubit cell, wherein the long-distance coupler spans at least one qubit unit lattice between the first qubit cell and the second qubit cell.

7. The quantum computing device of claim 1, wherein the qubit cell superlattice includes a long-distance coupler arranged to couple a first qubit cell to a second qubit cell, wherein the long-distance coupler extends around the periphery of the qubit cell superlattice.

8. The quantum computing device of claim 6 or 7, wherein the long-distance coupler is arranged in a layer above or below the layer providing the qubit cell superlattice.

9. The quantum computing device according to claim 1, wherein, Within each qubit cell, the first qubit array overlaps with the second qubit array.

10. The quantum computing device of claim 1, comprising a plurality of control lines arranged to control qubits within a qubit cell superlattice, wherein the plurality of control lines are arranged in a layer above or below the plane forming the qubits within the qubit cell superlattice.

11. A quantum bit cell, comprising: At least two qubit arrays, the at least two qubit arrays having different array orientations, a plurality of qubits within each qubit array being arranged along their respective array orientations, and the angle between the array orientations of each qubit array being equal to or less than 90°, and In each qubit array, adjacent qubits are offset from each other along an offset direction, and this offset direction is different from the corresponding array orientation of the qubit array. The qubit cell comprises 2N qubits, and within each qubit array of the qubit cell, the offset spacing between adjacent qubits along the offset direction is approximately [missing information].

12. The quantum bit cell according to claim 11, wherein, Within each qubit array of the qubit cell, the offset spacing between the first pair of adjacent qubits along the offset direction is the same as the offset spacing between the second pair of adjacent qubits.

13. The quantum bit cell according to claim 11, wherein, Within each qubit array of the qubit cell, the offset spacing between the first pair of adjacent qubits along the offset direction is different from the offset spacing between the second pair of adjacent qubits.

14. The quantum bit cell according to claim 11, wherein, Within a qubit cell, the first qubit array overlaps with the second qubit array.

15. The qubit cell of claim 11, comprising a plurality of control lines configured to control qubits within the qubit cell, wherein the plurality of control lines are arranged in a layer above or below the plane forming the qubits within the qubit cell.

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