A high-gain Boost converter for photovoltaic power generation

The high-gain Boost converter addresses efficiency limitations in traditional Boost converters by using coupled inductors and soft switching techniques, achieving high voltage gain with low switch stress and reduced losses, suitable for photovoltaic systems.

CN114785151BActive Publication Date: 2025-07-15JIANGNAN UNIV
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Patent Information

Application Number
CN202210568691.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-24
Publication Date
2025-07-15
Estimated Expiration
2042-05-24

AI Technical Summary

Technical Problem

The voltage gain of traditional Boost converters is limited by parasitic parameters such as capacitors, inductors, switching devices, etc., and as the duty cycle increases, the ripple stress of the device current and input current increase, resulting in lower converter efficiency.

Method used

The coupling inductor and clamp circuit design is adopted to form an interlaced parallel structure, combined with soft switching technology and three-level converter circuit, and the coupling inductor primary and secondary windings and clamp circuit are used to reduce the voltage spike of the switching tube, realize zero voltage switching and current sharing capabilities, and reduce switching losses.

Benefits of technology

It improves the voltage gain and device stress of the converter, reduces switching losses, enhances the efficiency and safety of the converter, reduces the output voltage ripple, and improves the core utilization and system life.

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Abstract

The present invention discloses a high-gain Boost converter for photovoltaic power generation, which relates to the field of photovoltaic technology. The input circuit of the high-gain Boost converter for photovoltaic power generation forms an interleaved parallel structure, which can better adapt to the occasions of low-voltage and large-current input and high-voltage output, and has excellent natural current sharing ability. Moreover, a first clamping circuit and a second clamping circuit are arranged in the input circuit to provide a loop for the release of the leakage inductance energy of the coupled inductor, so as to reduce the voltage spike of the switching tube, and can suppress the reverse recovery current of semiconductor devices, improve the converter efficiency, and make the Boost converter have the characteristics of high voltage gain, low device stress, small switching loss, continuous input current and low current ripple. The performance is excellent and can meet the application requirements in the photovoltaic field.
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Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a high-gain Boost converter for photovoltaic power generation. Background Art

[0002] In recent years, the continuous intensification of the fossil energy crisis and global environmental pollution has made photovoltaic power generation one of the research hotspots. More and more photovoltaic distributed power generations are connected to the low-voltage distribution network through inverters. However, the output DC voltage of the photovoltaic array is lower than the input DC voltage of the grid-connected inverter. Therefore, a high-efficiency and high-gain DC / DC converter is indispensable in the photovoltaic power generation system.

[0003] The Boost converter is a commonly used DC / DC converter, but the traditional Boost converter has the following problems: the voltage gain is limited by parasitic parameters such as capacitors, inductors, and switching devices, and as the duty cycle increases, the device current and the input current ripple stress increase accordingly, and the reverse recovery loss of the diode becomes more prominent, resulting in a lower efficiency of the converter. Summary of the Invention

[0004] In view of the above problems and technical requirements, the inventor of the present invention proposes a high-gain Boost converter for photovoltaic power generation. The technical solution of the present invention is as follows:

[0005] A high-gain Boost converter for photovoltaic power generation, the high-gain Boost converter for photovoltaic power generation includes an input circuit and an output circuit. The primary winding L 1a and the secondary winding L 1b of the coupled inductor form a set of coupled inductors. The primary winding L 2a and the secondary winding L 2b of the coupled inductor form another set of coupled inductors. The primary winding L 1a and the primary winding L 2a of the coupled inductor are arranged in the input circuit. The secondary winding L 1b and the secondary winding L 2b of the coupled inductor are arranged in the output circuit;

[0006] In the input circuit, the positive pole of the input power supply V in is connected to the first end of the primary winding L 1a of the coupled inductor and the first end of the primary winding L 2a of the coupled inductor. The second end of the primary winding L 1a is connected to the drain of the first switch tube S1. The second end of the primary winding L 2a is connected to the drain of the second switch tube S2. The source of the first switch tube S1 and the source of the second switch tube S2 are connected and connected to the input power supply V inThe negative electrode; an anti-parallel diode and a switching capacitor C are connected across both ends of the first switching transistor S1 S1 An anti-parallel diode and a switching capacitor C are connected across both ends of the second switching transistor S2 S2 ;

[0007] The duty cycles of the first switching transistor S1 and the second switching transistor S2 are equal and differ by 180° and are interleaved. A first clamping circuit is connected across both ends of the primary winding L of the coupled inductor 1a A second clamping circuit is connected across both ends of the primary winding L of the coupled inductor 2a ;

[0008] A further technical solution thereof is that the first clamping circuit includes a clamping switching transistor S C1 and a clamping capacitor C C1 The source electrode of the clamping switching transistor S C1 is connected to the drain electrode of the first switching transistor S1. The drain electrode of the clamping switching transistor S C1 is connected to the positive electrode of the input power supply V C1 through the clamping capacitor C in The second clamping circuit includes a clamping switching transistor S C2 and a clamping capacitor C C2 The source electrode of the clamping switching transistor S C2 is connected to the drain electrode of the second switching transistor S2. The drain electrode of the clamping switching transistor S C2 is connected to the positive electrode of the input power supply V C2 through the clamping capacitor C in Anti-parallel diodes are connected across both ends of the clamping switching transistor S C1 Anti-parallel diodes are connected across both ends of the clamping switching transistor S C2 The clamping switching transistor S C1 and the clamping switching transistor S C2 conduct alternately.

[0009] A further technical solution thereof is that during the process of the first switching transistor S1 conducting and the second switching transistor S2 turning off, the clamping switching transistor S C2 conducts; during the process of the second switching transistor S2 conducting and the first switching transistor S1 turning off, the clamping switching transistor S C1 conducts.

[0010] A further technical solution thereof is that the conduction time of the clamping switching transistor S C2 is shorter than the turn-off time of the second switching transistor S2, the conduction time of the clamping switching transistor S C1 is shorter than the turn-off time of the first switching transistor S1, and the conduction time of the clamping switching transistor S C1 is equal to the conduction time of the clamping switching transistor S C2 ;

[0011] Its further technical solution is that within one working cycle of the high-gain Boost converter for photovoltaic power generation, from t0 to t1, the first switching tube S1 is turned on, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are both turned off. From t1 to t4, the first switching tube S1 is turned on, the second switching tube S2 is turned off, and the two clamping switching tubes S C1 and S C2 are both turned off. From t4 to t5, the first switching tube S1 is turned on, the second switching tube S2 is turned off, the clamping switching tube S C2 is turned on, and the clamping switching tube S C1 is turned off. From t5 to t7, the first switching tube S1 is turned on, the second switching tube S2 is turned off, and the two clamping switching tubes S C1 and S C2 are both turned off. From t7 to t8, the first switching tube S1 is turned on, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are both turned off;

[0012] From t8 to t9, the first switching tube S1 is turned on, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are both turned off. From t9 to t 12 , the first switching tube S1 is turned off, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are both turned off. From t 12 to t 13 , the first switching tube S1 is turned off, the second switching tube S2 is turned on, the clamping switching tube S C1 is turned on, and the clamping switching tube S C2 is turned off. From t 13 to t 15 , the first switching tube S1 is turned off, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are both turned off. From t 15 to t 16 , the first switching tube S1 is turned on, the second switching tube S2 is turned on, and the two clamping switching tubes S C1 and S C2 are turned off.

[0013] Its further technical solution is that within the time range from t3 to t4, the anti-parallel diode at both ends of the clamping switching tube S C2 is in the conducting state, the voltage at both ends of the clamping switching tube S C2 is zero, and the clamping switching tube S C2 is turned on with zero voltage within the time range from t4 to t5; within the time range from t4 to t5, the clamping capacitor C C2 and the primary winding L of the coupled inductor2a leakage inductance L K2 resonant absorption leakage inductance L K2 The energy of leakage inductance L, under the action of resonance, the current I of leakage inductance L K2 current I L2 reverses. When the current I reverses at time t5, the clamping switch tube S L2 turns off, and under the action of the clamping capacitor C, the clamping switch tube S C2 realizes zero-voltage turn-off. C2 under the action of the clamping capacitor C, the clamping switch tube S C2 realizes zero-voltage turn-off.

[0014] Its further technical solution is that within the time range of t 11 ~t 12 The anti-parallel diode at both ends of the clamping switch tube S C1 is in the conducting state, and the voltage at both ends of the clamping switch tube S C1 is zero. Drive the clamping switch tube S 12 ~t 13 to turn on with zero voltage within the time range; within the time range of t C1 ~t 12 ~t 13 The clamping capacitor C C1 resonantly absorbs the energy of the leakage inductance L of the primary winding L of the coupled inductor 1a leakage inductance L K1 resonant absorption leakage inductance L K1 The energy of leakage inductance L, under the action of resonance, the current I of leakage inductance L K1 current I L1 reverses. When the current I reverses at time t L1 at time t 13 the clamping switch tube S C1 turns off, and under the action of the clamping capacitor C, the clamping switch tube S C1 realizes zero-voltage turn-off. C1 realizes zero-voltage turn-off.

[0015] Its further technical solution is that under the action of the resonance of the leakage inductance L of the primary winding L of the coupled inductor, the second switch tube S2 realizes zero-voltage turn-on and zero-voltage turn-off; under the action of the resonance of the leakage inductance L of the primary winding L of the coupled inductor, the first switch tube S1 realizes zero-voltage turn-on and zero-voltage turn-off. 2a leakage inductance L K2 and the switching capacitor C S2 resonates, the second switch tube S2 realizes zero-voltage turn-on and zero-voltage turn-off; under the action of the resonance of the leakage inductance L of the primary winding L of the coupled inductor 1a leakage inductance L K1 and the switching capacitor C S1 resonates, the first switch tube S1 realizes zero-voltage turn-on and zero-voltage turn-off.

[0016] Its further technical solution is that in the output circuit, the first end of the secondary winding L of the coupled inductor 1b is connected to the first end of the secondary winding L of the coupled inductor 2b the first end of the secondary winding L of the coupled inductor 1bThe second ends are respectively connected to the first end of capacitor C1 and the first end of capacitor C2. The second end of capacitor C1 is connected to the cathode of freewheeling diode D1 and the anode of freewheeling diode D2. The anode of freewheeling diode D1 is connected to the first end of capacitor C o1 and one end of load R. The second end of capacitor C o1 is connected to the cathode of freewheeling diode D2, the secondary winding L 2b of the coupled inductor, the anode of freewheeling diode D3 and the first end of capacitor C o2 The second end of capacitor C2 is connected to the cathode of freewheeling diode D3 and the anode of freewheeling diode D4. The cathode of freewheeling diode D4 is connected to the second end of capacitor C o2 and the other end of load R.

[0017] A further technical solution thereof is that, under the action of the parasitic parameters of the devices in the high-gain Boost converter for photovoltaic power generation, the voltage difference between capacitor C o1 and capacitor C o2 is 0.

[0018] The beneficial technical effects of the present invention are:

[0019] The present application discloses a high-gain Boost converter for photovoltaic power generation. The input circuit forms an interleaved parallel structure, which can better adapt to the occasions of low-voltage and large-current input and high-voltage output, and has excellent natural current sharing ability. And a first clamping circuit and a second clamping circuit are arranged in the input circuit to provide a loop for the release of the leakage inductance energy of the coupled inductor, so as to reduce the voltage spike of the switching tube, and can suppress the reverse recovery current of the semiconductor device, improve the converter efficiency, so that the Boost converter has the characteristics of high voltage gain, low device stress, small switching loss, continuous input current and low current ripple, and has excellent performance, and can meet the application requirements of the photovoltaic field.

[0020] Furthermore, the high-gain Boost converter for photovoltaic power generation adopts soft-switching technology, designs the switching capacitor to resonate with the leakage inductance, realizes zero-voltage turn-on and zero-voltage turn-off of the switching tube, reduces the switching loss, so that the Boost converter also has the characteristic of small switching loss, and further improves the converter efficiency.

[0021] The output circuit adopts an isolated three-level converter circuit structure. The use of the isolation structure further improves the safety of the converter; by using the three-level converter structure, the two output capacitors C o1 、C o2The voltage balance between them is completely immune to the parasitic parameters of the output power supply, coupled inductor, and diode. Therefore, the two output capacitor voltages of the three-level converter have a very strong self-balancing ability, reducing the ripple of the output voltage. And the magnetic core flux density is designed to work in the first and third quadrants, improving the utilization rate of the magnetic core and reducing the volume of the coupled inductor magnetic core. And the output capacitors C o1 and C o2 can use CBB capacitors instead of electrolytic capacitors, effectively improving the service life of the system and enhancing the performance of the converter. Description of the Drawings

[0022] Figure 1 is the circuit structure diagram of the high-gain Boost converter for photovoltaic power generation in an embodiment.

[0023] Figure 2 is Figure 1 the waveform diagram of the high-gain Boost converter for photovoltaic power generation shown in one working cycle.

[0024] Figure 3 is Figure 1 the simplified equivalent circuit diagram of the circuit structure diagram shown.

[0025] Figure 4 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the first mode with the

[0026] Figure 5 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the second mode with the

[0027] Figure 6 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the third mode with the

[0028] Figure 7 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the fourth mode with the

[0029] Figure 8 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the fifth mode with the

[0030] Figure 9 is based on Figure 3 the circuit modal schematic diagram of the high-gain Boost converter for photovoltaic power generation in the sixth mode with the

[0031] Figure 10is based on Figure 3 Schematic diagram of the circuit mode of the high-gain Boost converter for photovoltaic power generation based on the Figure 3 structure in the seventh mode.

[0032] Figure 11 is based on Figure 3 Schematic diagram of the circuit mode of the high-gain Boost converter for photovoltaic power generation based on the Figure 3 structure in the eighth mode. Detailed implementation manners

[0033] The following further describes the detailed implementation manners of the present invention with reference to the accompanying drawings.

[0034] This application discloses a high-gain Boost converter for photovoltaic power generation. Please refer to Figure 1 The high-gain Boost converter for photovoltaic power generation includes an input circuit and an output circuit. An input power supply V in is connected in the input circuit, and a load R is connected in the output circuit. The Boost converter includes a set of coupled inductors composed of a primary winding L 1a of the coupled inductor and a secondary winding L 1b of the coupled inductor, and another set of coupled inductors composed of a primary winding L 2a of the coupled inductor and a secondary winding L 2b of the coupled inductor. Among them, the primary winding L 1a of the coupled inductor and the primary winding L 2a of the coupled inductor are arranged in the input circuit, and the secondary winding L 1b of the coupled inductor and the secondary winding L 2b of the coupled inductor are arranged in the output circuit. In this application, the turns ratio of the primary winding L 1a of the coupled inductor to the secondary winding L 1b of the coupled inductor, and the turns ratio of the primary winding L 2a of the coupled inductor to the secondary winding L 2b of the coupled inductor are equal, both being N. The coupling coefficient of the primary winding L 1a of the coupled inductor to the secondary winding L 1b of the coupled inductor, and the coupling coefficient of the primary winding L 2a of the coupled inductor to the secondary winding L 2b of the coupled inductor are equal, both being K.

[0035] In the input circuit, the positive pole of the input power supply V in is connected to the first end of the primary winding L 1a of the coupled inductor and the first end of the primary winding L 2a of the coupled inductor. The second end of the primary winding L 1a of the coupled inductor is connected to the drain of the first switching tube S1. The second end of the primary winding L 2aThe second terminal is connected to the drain of the second switching transistor S2. The sources of the first switching transistor S1 and the second switching transistor S2 are connected together and connected to the input power supply V in The negative pole. An anti-parallel diode and a switching capacitor C are connected across the two ends of the first switching transistor S1 S1 An anti-parallel diode and a switching capacitor C are connected across the two ends of the second switching transistor S2 S2 The duty cycles of the first switching transistor S1 and the second switching transistor S2 are equal and both are D. That is, the conduction time of the first switching transistor S1 accounts for a proportion of D in a working cycle of the Boost converter, and the conduction time of the second switching transistor S2 accounts for a proportion of D in a working cycle of the Boost converter. The control waveforms of the first switching transistor S1 and the second switching transistor S2 differ by 180° and are interleaved. The input circuit in this application forms an interleaved parallel boost structure, which can better adapt to the occasions of low-voltage and large-current input and high-voltage output, and has excellent natural current sharing ability.

[0036] The primary winding L of the coupled inductor 1a A first clamping circuit is connected across the two ends of the primary winding L of the coupled inductor 2a A second clamping circuit is connected across the two ends of the primary winding L of the coupled inductor 1a The leakage inductance L of the primary winding L of the coupled inductor K1 The first clamping circuit is used to provide a loop for the energy release of the leakage inductance L of the primary winding L of the coupled inductor, and reduce the voltage spike of the first switching transistor S1. The second clamping circuit is used to provide a loop for the energy release of the leakage inductance L of the primary winding L of the coupled inductor, and reduce the voltage spike of the second switching transistor S2. 2a The leakage inductance L of the primary winding L of the coupled inductor K2 The first clamping circuit is used to provide a loop for the energy release of the leakage inductance L of the primary winding L of the coupled inductor, and reduce the voltage spike of the first switching transistor S1. The second clamping circuit is used to provide a loop for the energy release of the leakage inductance L of the primary winding L of the coupled inductor, and reduce the voltage spike of the second switching transistor S2.

[0037] Please refer to Figure 1 The first clamping circuit includes a clamping switching transistor S C1 and a clamping capacitor C C1 An anti-parallel diode is connected across the two ends of the clamping switching transistor S C1 The source of the clamping switching transistor S C1 is connected to the drain of the first switching transistor S1. The drain of the clamping switching transistor S C1 is connected to the positive pole of the input power supply V through the clamping capacitor C C1 . The second clamping circuit includes a clamping switching transistor S in and a clamping capacitor C C2 An anti-parallel diode is connected across the two ends of the clamping switching transistor S C2 The source of the clamping switching transistor S C2 is connected to the drain of the second switching transistor S2. The drain of the clamping switching transistor S C2 is connected to the positive pole of the input power supply V through the clamping capacitor C C2 . C2 is connected to the positive pole of the input power supply V in .

[0038] In one embodiment, the first switching transistor S1, the second switching transistor S2, the clamping switching transistor S C1 and the clamping switching transistor S C2 are MOS transistors or IGBT transistors. Capacitors C o1 and C o2 can be implemented by CBB capacitors.

[0039] The clamping switching transistor S C1 and the clamping switching transistor S C2 conduct alternately. Specifically, during the process when the first switching transistor S1 conducts and the second switching transistor S2 turns off, the clamping switching transistor S C2 conducts. During the process when the second switching transistor S2 conducts and the first switching transistor S1 turns off, the clamping switching transistor S C1 conducts. And the conduction duration of the clamping switching transistor S C2 is shorter than the turn-off duration of the second switching transistor S2, and the conduction duration of the clamping switching transistor S C1 is shorter than the turn-off duration of the first switching transistor S1. And the conduction duration of the clamping switching transistor S C1 is equal to the conduction duration of the clamping switching transistor S C2 .

[0040] Please refer to Figure 2 the waveform diagram of the high-gain Boost converter for photovoltaic power generation within one working cycle as shown. From t0 to t1, the first switching transistor S1 conducts, the second switching transistor S2 conducts, and both clamping switching transistors S C1 and S C2 turn off. From t1 to t4, the first switching transistor S1 conducts, the second switching transistor S2 turns off, and both clamping switching transistors S C1 and S C2 turn off. From t4 to t5, the first switching transistor S1 conducts, the second switching transistor S2 turns off, the clamping switching transistor S C2 conducts, and the clamping switching transistor S C1 turns off. From t5 to t7, the first switching transistor S1 conducts, the second switching transistor S2 turns off, and both clamping switching transistors S C1 and S C2 turn off. From t7 to t8, the first switching transistor S1 conducts, the second switching transistor S2 conducts, and both clamping switching transistors S C1 and S C2 turn off. From t8 to t9, the first switching transistor S1 conducts, the second switching transistor S2 conducts, and both clamping switching transistors S C1 and S C2 turn off. From t9 to t 12 , the first switching transistor S1 turns off, the second switching transistor S2 conducts, and both clamping switching transistors S C1 and S C2 turn off. From t 12 to t 13Inside, the first switching transistor S1 is turned off, the second switching transistor S2 is turned on, and the clamping switching transistor S C1 is turned on, and the clamping switching transistor S C2 is turned off. At t 13 ~t 15 inside, the first switching transistor S1 is turned off, the second switching transistor S2 is turned on, and the two clamping switching transistors S C1 , S C2 are both turned off. At t 15 ~t 16 inside, the first switching transistor S1 is turned on, the second switching transistor S2 is turned on, and the two clamping switching transistors S C1 , S C2 are turned off.

[0041] In one embodiment, in the output circuit, the first end of the secondary winding L 1b of the coupled inductor is connected to the first end of the secondary winding L 2b of the coupled inductor. The second end of the secondary winding L 1b is respectively connected to the first end of the capacitor C1 and the first end of the capacitor C2. The second end of the capacitor C1 is connected to the cathode of the freewheeling diode D1 and the anode of the freewheeling diode D2. The anode of the freewheeling diode D1 is connected to the first end of the capacitor C o1 and one end of the load R. The second end of the capacitor C o1 is connected to the cathode of the freewheeling diode D2, the second end of the secondary winding L 2b of the coupled inductor, the anode of the freewheeling diode D3 and the first end of the capacitor C o2 . The second end of the capacitor C2 is connected to the cathode of the freewheeling diode D3 and the anode of the freewheeling diode D4. The cathode of the freewheeling diode D4 is connected to the second end of the capacitor C o2 and the other end of the load R.

[0042] During the operation of the high-gain Boost converter for photovoltaic power generation, it will be affected by the parasitic parameters of each device. Please refer to Figure 3 the simplified equivalent circuit diagram of the high-gain Boost converter for photovoltaic power generation shown in Figure 3 . Only the influence of the parasitic parameters of the primary winding L 1a and the primary winding L 2a of the coupled inductor is shown in 1a . That is, the primary winding L 1a of the coupled inductor can be equivalent to a series structure of the parallel connection of the primary winding L K1 of the coupled inductor and its exciting inductor and the leakage inductance L 2a . And the primary winding L 2a of the coupled inductor can be equivalent to a series structure of the parallel connection of the primary winding L K2The series structure. The equivalent circuit structures of other devices affected by parasitic parameters are not shown in detail.

[0043] Based on Figure 3 the simplified equivalent circuit diagram shown, combined with Figure 2 the working waveform diagram shown, the working process of this high-gain Boost converter for photovoltaic power generation is introduced as follows. One working cycle of this high-gain Boost converter for photovoltaic power generation includes the first half cycle within the time duration from t0 to t8 and the second half cycle within the time duration from t8 to t 16 duration. The working processes of the high-gain Boost converter for photovoltaic power generation in the first half cycle and the second half cycle are similar. Specifically:

[0044] (1) In the time range of t0 - t1, the first mode: Both the first switching tube S1 and the second switching tube S2 remain in the conducting state, and the two clamping switching tubes S C1 、S C2 are in the off state. The polarities of the secondary windings of the two coupled inductors are opposite, and the freewheeling diodes D1, D2, D3, and D4 are all in the cut-off state. The input power supply V in charges the primary windings L 1a and L 2a of the two coupled inductors, and the capacitors C o1 and C o2 supply power to the load R. Based on Figure 3 the circuit mode schematic diagram is as shown in Figure 4 where the dashed line indicates the current flow direction.

[0045] (2) In the time range of t1 - t2, the second mode: After the second switching tube S2 turns off at t1, the voltage across the second switching tube S2 rises, and the voltage V S2 across the second switching tube S2 starts to linearly rise from zero and realizes zero-voltage turn-off. The freewheeling diodes D1, D2, D3, and D4 all remain in the cut-off state, and the capacitors C S2 and C o1 and C o2 supply power to the load R. Based on Figure 3 the circuit mode schematic diagram is as shown in Figure 5 where the dashed line indicates the current flow direction.

[0046] (3) In the time range of t2 - t3, the third mode: When the voltage across the second switching tube S2 exceeds the voltage of the clamping capacitor C C2 , the anti-parallel diode at both ends of the clamping switching tube S C2 conducts, and the voltage across the second switching tube S2 is clamped by the second clamping circuit. The freewheeling diodes D1, D2, D3, and D4 all remain in the cut-off state, and the capacitors C o1 and C o2 supply power to the load R. Based on Figure 3The schematic diagram of the circuit mode is as follows Figure 6 shown, and the dotted line indicates the current flow direction.

[0047] (4) In the time range of t3 - t4, the fourth mode: At the moment of t3, the leakage inductance L 2a of the primary winding L of the coupled inductor K2 resonates with the clamping capacitor C C2 , the voltage of the primary winding L of the coupled inductor 2a reverses and starts to transfer energy to the secondary winding. The primary winding L of the coupled inductor 1a continues to charge. At the same time, the freewheeling diodes D1 and D3 start to conduct, and the freewheeling diodes D2 and D4 remain in the cut-off state. The current I D1 of the freewheeling diode D1 and the current I D3 of the freewheeling diode D3 start to increase. The two secondary windings L 1b 、L 2b of the coupled inductor are connected in series to charge the capacitors C2 and C o1 . At the same time, the capacitors C1 and C o2 and the two secondary windings L 1b 、L 2b of the coupled inductor are connected in series to supply power to the load R. The current I 2a flowing through the primary winding L of the coupled inductor and the leakage inductance L K2 starts to decrease linearly, and the current I L2 flowing through the primary winding L of the coupled inductor and the leakage inductance L 1a starts to increase linearly. Based on K1 the schematic diagram of the circuit mode is as follows L1 shown, and the dotted line indicates the current flow direction. Figure 3 The schematic diagram of the circuit mode is as follows Figure 7 shown, and the dotted line indicates the current flow direction.

[0048] (5) In the time range of t4 - t5, the fifth mode: At the moment of t4, the clamping switch tube S C2 is turned on. Due to resonance, the direction of the current I K2 flowing through the leakage inductance L and the current of the clamping capacitor C L2 will reverse, causing the energy in the clamping capacitor C C2 to transfer to the secondary side, and the clamping switch tube S C2 realizes zero-voltage turn-on. Based on C2 the schematic diagram of the circuit mode is as follows Figure 3 shown, and the dotted line indicates the current flow direction. Figure 8 shown, and the dotted line indicates the current flow direction.

[0049] (6) In the time range of t5 - t6, the sixth mode: At the moment of t5, the clamping switch tube S C2 is turned off, forcibly stopping the resonance of the leakage inductance L K2 and the clamping capacitor C C2 , and the clamping switch tube S C2Zero-voltage turn-off is achieved. Meanwhile, the leakage inductance L K2 and the switching capacitor C S2 start to resonate, and the energy stored in the switching capacitor C S2 begins to transfer. The voltage V across the second switching transistor S2 S2 starts to drop. The current I flowing through the primary winding L 2a of the coupled inductor and the leakage inductance L K2 begins to increase linearly. The current I L2 of the freewheeling diode D1 and the current I D1 of the freewheeling diode D3 D3 start to drop. Meanwhile, due to the existence of the leakage inductance in the secondary winding, the drop rate of the current I D1 of the freewheeling diode D1 and the current I D3 of the freewheeling diode D3 is less than the predetermined rate threshold, which is the drop rate of the current of the corresponding freewheeling diode in a conventional Boost converter, thereby effectively suppressing the reverse recovery current of the freewheeling diode. Based on Figure 3 The circuit mode schematic diagram is as shown in Figure 9 , and the dotted line indicates the current flow direction.

[0050] (7) In the time range of t6 to t7, the seventh mode: At time t6, the switching capacitor C S2 completes discharging and its voltage drops to zero. The voltage V across the second switching transistor S2 S2 is also zero to achieve zero-voltage turn-on. The anti-parallel diode of the second switching transistor S2 starts to conduct. The current I flowing through the primary winding L 2a of the coupled inductor and the leakage inductance L K2 continues to increase linearly. Based on L2 The circuit mode schematic diagram is as shown in Figure 3 , and the dotted line indicates the current flow direction. Figure 10

[0051] (8) In the time range of t7 to t8, the eighth mode: Since the anti-parallel diode of the second switching transistor S2 conducts, the voltage V across the second switching transistor S2 S2 drops to zero. Therefore, a driving signal can be given to the second switching transistor S2 in the time range of t7 to t8 to achieve zero-voltage turn-on of the second switching transistor S2. The current I D1 of the freewheeling diode D1 and the current I D3 of the freewheeling diode D3 are reduced to zero and then turn off under the action of the leakage inductance L K2 . The capacitors C o1 and C o2 start to supply power to the load R. Based on Figure 3 The circuit mode schematic diagram is as shown in Figure 11 , and the dotted line indicates the current flow direction.

[0052] ​(9) In the time range of t8 to t9, the ninth mode: both the first switching transistor S1 and the second switching transistor S2 remain in the on state, and the two clamping switching transistors S C1 , S C2 are in the off state. The polarities of the secondary windings of the two coupled inductors are opposite, and the freewheeling diodes D1, D2, D3, and D4 are all in the cut-off state. The input power supply V in charges the primary windings L 1a and L 2a of the two coupled inductors, and the capacitors C o1 and C o2 supply power to the load R.

[0053] (10) In the time range of t9 to t 10 : In the tenth mode, after the first switching transistor S1 is turned off at the moment of t9, the voltage across the first switching transistor S1 rises, and the voltage V S1 across the first switching transistor S1 starts to rise linearly from zero and realizes zero-voltage turn-off. The freewheeling diodes D1, D2, D3, and D4 all remain in the cut-off state, and the capacitors C S1 and C o1 and C o2 supply power to the load R.

[0054] (11) In the time range of t 10 to t 11 : In the eleventh mode, when the voltage V S1 across the first switching transistor S1 exceeds the voltage of the clamping capacitor C C1 , the anti-parallel diode across the clamping switching transistor S C1 conducts, and the voltage V S1 across the first switching transistor S1 is clamped by the first clamping circuit. The freewheeling diodes D1, D2, D3, and D4 all remain in the cut-off state, and the capacitors C o1 and C o2 supply power to the load R.

[0055] (12) In the time range of t 11 to t 12 : In the twelfth mode, at the moment of t 11 , the leakage inductance L 1a of the primary winding L K1 of the coupled inductor resonates with the clamping capacitor C C1 , the voltage of the primary winding L 1a of the coupled inductor reverses and starts to transfer energy to the secondary winding, and the primary winding L 2a of the coupled inductor continues to be charged. At the same time, the freewheeling diodes D2 and D4 start to conduct, the freewheeling diodes D1 and D3 remain in the cut-off state, and the current I D2 of the freewheeling diode D2 and the current I D4The current starts to rise. The secondary windings L 1b and L 2b are connected in series to charge capacitors C1 and C o2 . Meanwhile, capacitors C2 and C o1 and the secondary windings L 1b and L 2b are connected in series to supply power to the load R. The current I 1a flowing through the primary winding L K1 of the coupled inductor and the leakage inductance L L1 starts to decrease linearly, and the current I 2a flowing through the primary winding L 2a of the coupled inductor and the leakage inductance L L2 starts to increase linearly.

[0056] (13)t 12 to t 13 time range, the thirteenth mode: at time t 12 the clamping switch tube S C1 is turned on. Due to resonance, the current direction of the current I K1 flowing through the leakage inductance L L1 and the clamping capacitor C C1 will reverse, causing the energy in the clamping capacitor C C1 to transfer to the secondary side, and the clamping switch tube S C1 achieves zero-voltage turn-on.

[0057] (14)t 13 to t 14 time range, the fourteenth mode: at time t 13 the clamping switch tube S C1 is turned off, forcibly stopping the resonance between the leakage inductance L K1 and the clamping capacitor C C1 , and the clamping switch tube S C1 achieves zero-voltage turn-off. Meanwhile, the leakage inductance L K1 and the switching capacitor C S1 start to resonate, and the energy stored in the switching capacitor C S1 starts to transfer, and the voltage V S1 across the first switch tube S1 starts to drop. The current I D2 of the freewheeling diode D2 and the current I D4 of the freewheeling diode D4 start to drop.

[0058] (15)t 14 to t 15 time range, the fifteenth mode: at time t 14 the switching capacitor C S1 finishes discharging and the voltage drops to zero, and the voltage V S1The anti-parallel diode of the first switch tube S1 starts to conduct, and the current flows through the primary winding L of the coupled inductor. 1a and leakage inductance L K1 The current I L1 At the same time, due to the leakage inductance of the secondary winding, the current I D2 and the current I of the freewheeling diode D4 D4 The decreasing rate of the current is less than a predetermined threshold value, and the predetermined rate threshold value is the decreasing rate of the current of the corresponding freewheeling diode in the conventional Boost converter, thereby effectively suppressing the reverse recovery current of the freewheeling diode.

[0059] (16)t 15 ~t 16 In the time range, the sixteenth mode: due to the conduction of the anti-parallel diode of the first switch tube S1, the voltage V S1 drops to zero, so at t 15 ~t 16 The first switch tube S1 can be turned on at zero voltage by giving a driving signal to the first switch tube S1 within the time range. D2 and the current I of the freewheeling diode D4 D4 In the leakage inductance L K1 After it is turned off, the capacitor C o1 and C o2 Start to supply power to load R.

[0060] Since the ninth to sixteenth modes of the second half cycle correspond to the first to eighth modes of the first half cycle respectively and have similar working processes, the present application no longer separately shows the circuit mode schematic diagrams of the ninth to sixteenth modes.

[0061] From the above modal analysis, it can be seen that the circuit structure of the present application adopts soft switching technology to achieve leakage inductance L in the first half cycle. K2 With the switch capacitor C S2 The resonance and leakage inductance L K2 With the clamping capacitor C C2 , in the second half cycle to achieve leakage inductance L K1 With the switch capacitor C S1 The resonance and leakage inductance L K1 With the clamping capacitor C C1 Therefore, within the time range of t3 to t4, the clamp switch tube S C2 The anti-parallel diodes at both ends are in the on state, clamping the switch tube S C2 The voltage at both ends is zero, and the clamp switch tube S is driven within the time range of t4 to t5. C2 Zero voltage turn-on. Clamping capacitor C is between t4 and t5. C2With the leakage inductance L of the primary winding L of the coupled inductor 2a of the leakage inductance L K2 resonantly absorbs the energy of the leakage inductance L K2 Under the resonance effect, the current I of the leakage inductance L K2 reverses. When the current I L2 reverses at time t5, the clamping switch tube S L2 turns off, and under the action of the clamping capacitor C C2 the clamping switch tube S C2 achieves zero-voltage turn-off. In the time range of t C2 ~t 11 ~t 12 the anti-parallel diode at both ends of the clamping switch tube S C1 is in the conducting state, and the voltage at both ends of the clamping switch tube S C1 is zero. In the time range of t 12 ~t 13 the clamping switch tube S C1 is driven for zero-voltage turn-on; in the time range of t 12 ~t 13 the clamping capacitor C C1 and the leakage inductance L of the primary winding L of the coupled inductor 1a of the leakage inductance L K1 resonantly absorbs the energy of the leakage inductance L K1 Under the resonance effect, the current I of the leakage inductance L K1 reverses. When the current I L1 reverses at time t L1 the clamping switch tube S 13 turns off, and under the action of the clamping capacitor C C1 the clamping switch tube S C1 achieves zero-voltage turn-off. In addition, under the resonance of the leakage inductance L of the primary winding L of the coupled inductor and the switching capacitor C, the second switch tube S2 achieves zero-voltage turn-on and zero-voltage turn-off; under the resonance of the leakage inductance L of the primary winding L of the coupled inductor and the switching capacitor C, the first switch tube S1 achieves zero-voltage turn-on and zero-voltage turn-off. C1 That is, the first switch tube S1, the second switch tube S2, the clamping switch tube S 2a of the leakage inductance L K2 and the clamping switch tube S S2 and the clamping switch tube S 1a of the leakage inductance L K1 and the switching capacitor C S1 and the switching capacitor C

[0062] can all achieve zero-voltage turn-on and zero-voltage turn-off, thus reducing the switching loss and improving the converter efficiency. C1 and the clamping switch tube S C2 All can achieve zero-voltage turn-on and zero-voltage turn-off, thus reducing the switching loss and improving the converter efficiency.

[0063] Only considering the first mode, the fourth mode and the fifth mode of this high-gain Boost converter for photovoltaic power generation, it can be obtained that:

[0064]

[0065] is the voltage of the leakage inductance L of the primary winding of the coupled inductor in the first mode 2a of the leakage inductance L K2 of the voltage is the voltage of the leakage inductance L of the primary winding of the coupled inductor in the fourth and fifth modes 2a of the leakage inductance L K2 of the voltage is the voltage of the magnetizing inductance of the primary winding of the coupled inductor in the first mode 2a of the magnetizing inductance is the voltage of the magnetizing inductance of the primary winding of the coupled inductor in the fourth and fifth modes 2a of the magnetizing inductance

[0066] According to the modal analysis, the voltage stresses of the clamping capacitors C C1 and C C2 , capacitors C1, C2, capacitors C o1 and C o2 , the first switch tube S1, the second switch tube S2 and the voltage gain of the converter are as follows

[0067]

[0068] Among them, is the voltage of the clamping capacitor C C1 of the voltage is the voltage of the clamping capacitor C C2 of the voltage. V C1 is the voltage of capacitor C1, V C2 is the voltage of capacitor C2, V out is the output voltage across the load R, V Co1 is the voltage of capacitor C o1 of the voltage, V Co2 is the voltage of capacitor C o2 of the voltage, V D1 is the voltage of the freewheeling diode D1, V D2 is the voltage of the freewheeling diode D2, V D3 is the voltage of the freewheeling diode D3, V D4 is the voltage of the freewheeling diode D4. M CCM represents the voltage gain of the converter

[0069] The clamping capacitors C C1 and C C2Its function is to completely absorb the energy stored in the leakage inductance of the primary windings of the two coupled inductors, avoiding the influence of voltage spikes on the first switching transistor S1 and the second switching transistor S2. Taking large capacitance values for the two clamping capacitors will not affect the clamping effect, but will increase the volume of the entire DC converter. To achieve a balance between a better clamping effect and volume, the half of the resonance period of the leakage inductance and the clamping capacitor is taken to be greater than the turn-off time of the main switch, ensuring that the leakage inductance energy is transferred to the clamping capacitor, that is L LK1 is the inductance value of the leakage inductance L K1 and L LK2 is the inductance value of the leakage inductance L K2 and f S is the resonance frequency of the DC converter and

[0070] Considering the role of the parasitic parameters of the devices in the circuit, the voltage expressions of the capacitor C o1 and the capacitor C o2 are as follows:

[0071]

[0072] It can be seen from this that under the action of the parasitic parameters of the devices in this high-gain Boost converter for photovoltaic power generation, the voltage difference between the capacitor C o1 and the capacitor C o2 is 0. Among them, are the voltages of the primary winding L 1a of the coupled inductor, the leakage inductance L K1 , the primary winding L 2a of the coupled inductor, and the leakage inductance L K2 in the first mode. are the voltages of the primary winding L 1a of the coupled inductor, the leakage inductance L K1 , the primary winding L 2a of the coupled inductor, and the leakage inductance L K2 in the fourth and fifth modes. are the voltages of the primary winding L 1a of the coupled inductor and the primary winding L 2a of the coupled inductor in the first mode. is the voltage of the primary winding L 1a of the coupled inductor in the fourth and fifth modes. are the equivalent internal resistances of the primary winding L 1a of the coupled inductor and the primary winding L 2a of the coupled inductor. V d and R d are the voltage drops and on-resistances of the respective freewheeling diodes.

[0073] The above are only the preferred embodiments of the present application, and the present invention is not limited to the above embodiments. It can be understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present invention shall be considered to be included within the protection scope of the present invention.

Claims

1. A high-gain Boost converter for photovoltaic power generation, characterized in that, The high-gain Boost converter for photovoltaic power generation includes an input circuit and an output circuit, and the primary winding of the coupled inductor and the secondary winding of the coupled inductor constitute a set of coupled inductors. The primary winding of the coupled inductor and the secondary winding of the coupled inductor constitute another set of coupled inductors. The primary winding of the coupled inductor and the primary winding of the coupled inductor are arranged in the input circuit, and the secondary winding of the coupled inductor and the secondary winding of the coupled inductor are arranged in the output circuit; In the input circuit, the input power supply has its positive pole connected to the first end of the primary winding of the coupled inductor and the first end of the primary winding of the coupled inductor . The second end of the primary winding of the coupled inductor is connected to the drain of the first switching transistor . The second end of the primary winding of the coupled inductor is connected to the drain of the second switching transistor . The source of the first switching transistor and the source of the second switching transistor are connected together and connected to the negative pole of the input power supply . Anti-parallel diodes and a switching capacitor are connected across the two ends of the first switching transistor , and anti-parallel diodes and a switching capacitor are connected across the two ends of the second switching transistor ; The first switching transistor and the second switching transistor have equal duty cycles and are staggered by 180°. A first clamping circuit is connected across both ends of the primary winding of the coupled inductor, and a second clamping circuit is connected across both ends of the primary winding of the coupled inductor; In the output circuit, the secondary winding of the coupled inductor has its first end connected to the first end of the secondary winding of the coupled inductor ; the second end of the secondary winding of the coupled inductor is respectively connected to the first end of capacitor and the first end of capacitor ; the second end of the capacitor is connected to the cathode of the freewheeling diode and the anode of the freewheeling diode ; the anode of the freewheeling diode is connected to the first end of capacitor and one end of the load ; the second end of the capacitor is connected to the cathode of the freewheeling diode , the second end of the secondary winding of the coupled inductor , the anode of the freewheeling diode and the first end of capacitor ; the second end of the capacitor is connected to the cathode of the freewheeling diode and the anode of the freewheeling diode ; the cathode of the freewheeling diode is connected to the second end of capacitor and the other end of the load .

2. The high-gain Boost converter for photovoltaic power generation according to claim 1, wherein The first clamping circuit includes a clamping switch transistor and a clamping capacitor . The source of the clamping switch transistor is connected to the drain of the first switch transistor . The drain of the clamping switch transistor is connected to the positive pole of the input power supply through the clamping capacitor . The second clamping circuit includes a clamping switch transistor and a clamping capacitor . The source of the clamping switch transistor is connected to the drain of the second switch transistor . The drain of the clamping switch transistor is connected to the positive pole of the input power supply through the clamping capacitor . Anti-parallel diodes are connected across both ends of the clamping switch transistor . Anti-parallel diodes are connected across both ends of the clamping switch transistor . The clamping switch transistor and the clamping switch transistor conduct alternately.

3. The high-gain Boost converter for photovoltaic power generation according to claim 2, wherein During the conduction of the first switching transistor and the turn-off of the second switching transistor , the clamping switching transistor conducts; during the conduction of the second switching transistor and the turn-off of the first switching transistor , the clamping switching transistor conducts.

4. The high-gain Boost converter for photovoltaic power generation according to claim 3, wherein The clamping switch tube has a shorter conduction time than that of the second switch tube , and the clamping switch tube has a shorter conduction time than that of the first switch tube . Moreover, the conduction time of the clamping switch tube is equal to the conduction time of the clamping switch tube .

5. The high-gain Boost converter for photovoltaic power generation according to claim 2, wherein During one working cycle of the high-gain Boost converter for photovoltaic power generation, the first switching transistor is turned on, the second switching transistor is turned on, and the two clamping switching transistors are both turned off. the first switching transistor is turned on, the second switching transistor is turned off, and the two clamping switching transistors are both turned off. the first switching transistor is turned on, the second switching transistor is turned off, the clamping switching transistor is turned on, and the clamping switching transistor is turned off. the first switching transistor is turned on, the second switching transistor is turned off, and the two clamping switching transistors are both turned off. the first switching transistor is turned on, the second switching transistor is turned on, and the two clamping switching transistors are both turned off; The first switching transistor inside conducts, the second switching transistor conducts, and two clamping switching transistors are all turned off, The first switching transistor inside turns off, the second switching transistor conducts, and two clamping switching transistors are all turned off, The first switching transistor inside turns off, the second switching transistor conducts, a clamping switching transistor conducts, a clamping switching transistor turns off, The first switching transistor inside turns off, the second switching transistor conducts, and two clamping switching transistors are all turned off, The first switching transistor inside conducts, the second switching transistor conducts, and two clamping switching transistors turns off.

6. The high-gain Boost converter for photovoltaic power generation according to claim 5, characterized in that, exist Within the time range, the clamp switch tube The anti-parallel diodes at both ends are in the on state, clamping the switch tube The voltage across the two ends is zero. The time range drives the clamp switch tube Zero voltage switch on; Time range clamping capacitor With coupled inductor primary winding Leakage inductance Resonant absorption leakage inductance The energy of the leakage inductance is Current Reverse current occurs exist Clamping switch tube when the moment is reversed shutdown, and the clamp capacitor Under the action of Achieve zero voltage shutdown.

7. The high-gain Boost converter for photovoltaic power generation according to claim 5, characterized in that, Within the time range, the anti-parallel diode at both ends of the clamping switch tube is in the conducting state, and the voltage across the clamping switch tube is zero. Within the time range, the clamping switch tube is turned on with zero voltage; within the time range, the clamping capacitor resonantly absorbs the energy of the leakage inductance of the primary winding of the coupled inductor . Under the action of resonance, the current of the leakage inductance reverses. When the current reverses at the moment , the clamping switch tube turns off, and under the action of the clamping capacitor , the clamping switch tube achieves zero-voltage turn-off. ​ 8. The high-gain Boost converter for photovoltaic power generation according to claim 5, characterized in that In the primary winding of the coupled inductor with leakage inductance and the resonant action of the switched capacitor the second switching transistor realizes zero-voltage turn-on and zero-voltage turn-off; in the primary winding of the coupled inductor with leakage inductance and the resonant action of the switched capacitor the first switching transistor realizes zero-voltage turn-on and zero-voltage turn-off.

9. The high-gain Boost converter for photovoltaic power generation according to claim 1, wherein Under the action of the parasitic parameters of the devices in the high-gain Boost converter for photovoltaic power generation, the capacitor and the capacitor have a voltage difference of 0.

Citation Information

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