Low-density parity-check code decoding method, system, device, apparatus and medium

Abstract

The present application discloses a low-density parity-check code decoding method, system, equipment, device and medium, which are applied to decoding, and the method includes obtaining a target codeword to be decoded; determining reorganization information for reorganizing the target codeword; performing low-density parity-check code decoding on the target codeword based on the reorganization information to obtain a target decoding result. In the present application, a reorganization operation is introduced in the low-density parity-check code decoding method, and the target codeword is decoded into a low-density parity-check code with the help of the reorganization operation, which can improve the success rate of obtaining the target decoding result. A low-density parity-check code decoding system, equipment, device and computer-readable storage medium provided by the present application also solves corresponding technical problems.

Description

Technical Field

[0001] The present application relates to the field of decoding technology, and more specifically, to a low-density parity-check code decoding method, system, equipment, device and medium. Background Art

[0002] In the traditional error control code system using low-density parity check code, bit flipping (BitFlipping: BF), combined product (Sum-Product) or minimum-sum (Min-Sum) decoding algorithms are often used. The bit flipping algorithm has the characteristics of fast implementation, small area and low power consumption, but it is not as good as the product algorithm or the minimum-sum algorithm in terms of decoding success rate. However, the product algorithm or the minimum-sum algorithm has to pay a lot in terms of area, speed and power consumption. Therefore, the decoding method often selects a decoding algorithm or combines several decoding algorithms based on the number of errors generated, the distribution state, and the system resources.

[0003] Usually when combining decoding algorithms, the bit flip decoding method is used first. If the decoding fails, the minimum-sum decoding method is used. However, this combined decoder requires two decoder circuits. Although this mode has better power consumption performance when the number of errors is relatively small, the overall decoding success rate will not increase, and is only the same as the minimum-sum decoding algorithm used alone.

[0004] In addition, the length of the low-density parity check code is often shortened in the information part or punctured in the check part. In the case of puncturing the check part, when the received codeword enters the decoder, it is customary to fill the punctured part with all-zero data. In other words, it can also be regarded as bringing more concentrated errors in the check part, making the decoding failure rate of the low-density parity check code higher.

[0005] In summary, how to improve the success rate of the low-density parity-check code decoding method is a problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0006] The purpose of the present application is to provide a low-density parity check code decoding method, which can solve the technical problem of how to improve the success rate of the low-density parity check code decoding method to a certain extent. The present application also provides a low-density parity check code decoding system, device, apparatus and computer-readable storage medium.

[0007] In order to achieve the above objectives, this application provides the following technical solutions:

[0008] A low-density parity-check code decoding method, comprising:

[0009] Obtaining a target codeword to be decoded;

[0010] Determining reorganization information for reorganizing the target codeword;

[0011] The target codeword is decoded by low-density parity check code based on the reorganization information to obtain a target decoding result.

[0012] Preferably, the determining of the reorganization information for reorganizing the target codeword includes:

[0013] Obtaining a maximum decoding recursion number of the target codeword;

[0014] Obtaining the number of reorganizations and the reorganization method of the target codeword;

[0015] Determining a target decoding recursion number for reorganizing the target codeword based on the highest decoding recursion number and the number of reorganization times;

[0016] The target decoding recursive number and the reorganization method are used as the reorganization information.

[0017] Preferably, performing low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result includes:

[0018] generating a syndrome value of the target codeword;

[0019] Determining whether the symptom values ​​are all zero;

[0020] If the syndrome values ​​are all zero, the decoding is successful and the target decoding result is obtained;

[0021] If the syndrome values ​​are not all zero, the initial decoding recursion number corresponding to the highest decoding recursion number is used as the current decoding recursion number, and it is determined whether the current decoding recursion number is equal to the target decoding recursion number;

[0022] If the current decoding recursion number is equal to the target decoding recursion number, reorganize the target codeword, calculate the flip function value based on the syndrome value, flip the bit, and update the syndrome value;

[0023] If the current decoding recursion number is not equal to the target decoding recursion number, then calculating a flip function value based on the syndrome, flipping bits, and updating the syndrome;

[0024] Update the current decoding recursion number, and determine whether the current decoding recursion number is less than the maximum decoding recursion number;

[0025] If the current decoding recursion number is less than the highest decoding recursion number, the process returns to the step of determining whether all syndrome values ​​are zero.

[0026] Preferably, the reorganization method includes a method of combining the target codeword with a flip codeword, and the flip codeword includes a codeword obtained by flipping the target codeword.

[0027] Preferably, the reorganization method includes combining a part of the target codeword with another part of the flipped codeword.

[0028] A low-density parity-check code decoding system, comprising:

[0029] A first acquisition module, used to acquire a target codeword to be decoded;

[0030] A first determining module, used to determine reorganization information for reorganizing the target codeword;

[0031] The first decoding module is used to perform low-density parity check code decoding on the target codeword based on the reorganization information to obtain a target decoding result.

[0032] A low-density parity-check code decoding device, comprising:

[0033] Memory for storing computer programs;

[0034] A processor is used to implement the steps of any of the above-mentioned low-density parity-check code decoding methods when executing the computer program.

[0035] A computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-mentioned low-density parity-check code decoding methods.

[0036] A low-density parity-check code decoding device, comprising:

[0037] An input register is used to obtain a target codeword to be decoded;

[0038] a reorganization information determiner, configured to determine reorganization information for reorganizing the target codeword;

[0039] A decoder is used to perform low-density parity check code decoding on the target codeword based on the reorganization information to obtain a target decoding result.

[0040] Preferably, the decoder comprises:

[0041] A flip multiplexer, configured to receive the target codeword from the input register;

[0042] a bit flip and syndrome update module, configured to receive the target codeword from the flip multiplexer, calculate a flip function value, flip bits, and update syndrome values;

[0043] A syndrome value register, used for receiving and caching the syndrome value from the bit flip and syndrome value update module;

[0044] a flipped codeword register, for receiving a flipped codeword from the bit flip and syndrome update module;

[0045] A decoding termination state determination module, configured to receive the syndrome value from the syndrome value register and generate a first signal for continuing decoding or terminating decoding based on the syndrome value;

[0046] A determination module, used for generating a second signal for controlling whether to perform reorganization based on the reorganization information;

[0047] a reorganization multiplexer, configured to receive the second signal from the determination module, and if the second signal indicates that reorganization is to be performed, transmit the codeword generated by the codeword reorganization module to the flip multiplexer; if the second signal indicates that reorganization is not to be performed, transmit the codeword stored in the flipped codeword register to the flip multiplexer;

[0048] The codeword reorganization module is connected to the input register and the data register, and is used to combine the codewords in the input register and the flipped codeword register based on a third signal provided by the reorganized codeword selection set;

[0049] The recombinant codeword selection set is used to generate the third signal for controlling the recombinant method.

[0050] The present application provides a low-density parity check code decoding method, which obtains a target codeword to be decoded; determines reorganization information for reorganizing the target codeword; and performs low-density parity check code decoding on the target codeword based on the reorganization information to obtain a target decoding result. In the present application, a reorganization operation is introduced in the low-density parity check code decoding method, and the target codeword is decoded into a low-density parity check code with the help of the reorganization operation, which can improve the success rate of obtaining the target decoding result. The low-density parity check code decoding system, device, apparatus and computer-readable storage medium provided by the present application also solve the corresponding technical problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0052] Figure 1 A first flow chart of a low-density parity check decoding method provided in an embodiment of the present application;

[0053] Figure 2 A second flow chart of a low-density parity check decoding method provided in an embodiment of the present application;

[0054] Figure 3 A schematic diagram of the structure of a low-density parity check decoding system provided in an embodiment of the present application;

[0055] Figure 4 A schematic diagram of the structure of a low-density parity-check code decoding device provided in an embodiment of the present application;

[0056] Figure 5 Another structural schematic diagram of a low-density parity-check code decoding device provided in an embodiment of the present application;

[0057] Figure 6 A first structural schematic diagram of a low-density parity check decoding device provided in an embodiment of the present application;

[0058] Figure 7 A second structural schematic diagram of a low-density parity-check decoding device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0059] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0060] See also Figure 1 , Figure 1 A first flow chart of a low-density parity-check decoding method provided in an embodiment of the present application.

[0061] A low-density parity-check code decoding method provided in an embodiment of the present application may include the following steps:

[0062] Step S101: Obtain a target codeword to be decoded.

[0063] In practical applications, the target codeword to be decoded may be obtained first, and the type and content of the target codeword may be determined according to actual needs, and this application does not make any specific limitations thereon.

[0064] Step S102: Determine reorganization information for reorganizing the target codeword.

[0065] In practical applications, after obtaining the target codeword to be decoded, the reorganization information for reorganizing the target codeword can be determined. The reorganization information may include the time, number, method, etc. of the reorganization, which is not specifically limited in this application.

[0066] In a specific application scenario, in the process of determining the reorganization information for reorganizing the target codeword, because decoding will be performed multiple times, the corresponding reorganization information can be determined based on the decoding recursion number, that is, the highest decoding recursion number of the target codeword is obtained; the number of reorganizations and the reorganization method of the target codeword are obtained; based on the highest decoding recursion number and the reorganization number, the target decoding recursion number for reorganizing the target codeword is determined; and the target decoding recursion number and the reorganization method are used as the reorganization information. For ease of understanding, assuming that the highest decoding recursion number is 100 and the number of reorganization times is 3, the target decoding recursion number can be 5, 15, 100, etc., that is, the target codeword needs to be reorganized during the 5th, 15th, and 100th decoding processes, etc., and the representation method of the target decoding recursion number can be determined according to the specific application scenario. For example, the target decoding recursion number can be directly represented by specific decoding recursion numbers such as 5, 15, and 100, or it can be represented by 5, 10, and 85, where 5 represents the initial target decoding recursion number, and 10 and 85 represent the difference between the subsequent target decoding recursion number and the previous target decoding recursion number, etc.

[0067] In a specific application scenario, the type of reorganization method may be determined according to actual needs. For example, the reorganization method may include a method of combining a target codeword with a flipped codeword, and the flipped codeword includes a codeword obtained by flipping the target codeword.

[0068] In a specific application scenario, the reorganization method may include combining a part of the target codeword with another part of the flip codeword. For ease of understanding, assume that the target codeword is R = [r0, r1, ..., rN-2, rN-1], the flip codeword corresponding to the target codeword is F = [f0, f1, ..., fN-2, fN-1], and the reorganized codeword obtained after reorganization is W = [w0, w1, ..., wN-1]. Assume that 4 bytes are used as the unit for each reorganization, and the reorganization is performed in order from the lowest bit to the highest bit. If three reorganizations are performed, the reorganization data selection set is: data_sel_set = {0, 4, 8}, then the corresponding first reorganized codeword is taken out from data_sel_set {0}, that is, 4 bytes are replaced from the last bit forward, so [rN-32, rN-31, ..., rN-1] in the target codeword is replaced by [fN-32, fN-3 1,…,fN-1] is replaced to form W1 as follows: W1 = [r0,r1,…,rN-33,fN-32,…,fN-1]; similarly, in the second reorganization, {4} is taken out from data_sel_set, that is, the 4 bytes starting from the 4th byte after replacement, so [rN-64,rN-63,…,rN-33] in the target codeword is replaced by [fN-64,fN-63,…,fN-33] in the flipped codeword to form W2 as follows: W2 = [r0,r1,…,rN-65,fN-64,…,fN-33,rN-32,…,rN-1]; accordingly, W3 obtained after the third reorganization is as follows: W3 = [r0,r1,…,rN-97,fN-96,…,fN-65,rN-64,…,rN-1].

[0069] Step S103: performing low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result.

[0070] In practical applications, after the reorganization information for reorganizing the target codeword is determined, the target codeword can be decoded using a low-density parity check code based on the reorganization information to obtain a target decoding result.

[0071] It should be noted that the low density parity check code (LDPC code) C in this application is a linear code, N is the codeword length, K is the transmission information length. A LDPC code is defined by a parity check matrix H. The dimension of H is M×N, and the received codeword R (received word) has a length of N. R is represented as [r 0 , r 1 ,…,r (N-1) ] The symptom value (syndrome) is calculated by the formula Get, R T represents the transpose matrix of R, and Its dimension is M×1. The traditional bit flipping method includes calculating the syndrome value, calculating the flip function value of each bit, comparing the flip function value with the inversion threshold flipping bit, and recursively outputting the decoding state and a flipped codeword each time. The specific information can be referred to the prior art, and this application will not be repeated here.

[0072] The present application provides a low-density parity check code decoding method, which obtains a target codeword to be decoded; determines reorganization information for reorganizing the target codeword; and performs low-density parity check code decoding on the target codeword based on the reorganization information to obtain a target decoding result. In the present application, a reorganization operation is introduced in the low-density parity check code decoding method, and the target codeword is decoded into a low-density parity check code with the help of the reorganization operation, which can improve the success rate of obtaining the target decoding result.

[0073] See also Figure 2 , Figure 2 A second flow chart of a low-density parity-check decoding method provided in an embodiment of the present application.

[0074] A low-density parity-check code decoding method provided in an embodiment of the present application may include the following steps:

[0075] Step S201: Obtain a target codeword to be decoded.

[0076] Step S202: Determine reorganization information for reorganizing the target codeword.

[0077] Step S203: Generate a syndrome value of the target codeword.

[0078] In practical applications, in the process of performing low-density parity-check code decoding on the target codeword based on the reorganized information to obtain the target decoding result, the syndrome value of the target codeword can be generated first, so as to determine whether the decoding is successful based on the syndrome value. The interpretation and generation method of the syndrome value can be determined according to actual needs, and this application does not make specific limitations here.

[0079] Step S204: Determine whether all symptom values ​​are zero; if all symptom values ​​are zero, execute step S205; if not all symptom values ​​are zero, execute step S206.

[0080] Step S205: The decoding is successful and the target decoding result is obtained.

[0081] Step S206: taking the initial decoding recursion number corresponding to the highest decoding recursion number as the current decoding recursion number, and executing step S207.

[0082] In actual applications, after generating the symptom values ​​of the target codeword, it can be determined whether the symptom values ​​are all zero. If the symptom values ​​are all zero, it indicates that the decoding is successful and the corresponding target decoding result is obtained. If the symptom values ​​are not all zero, the target codeword needs to be decoded further, and the initial decoding recursion number corresponding to the highest decoding recursion number can be used as the current decoding recursion number, so that decoding can be performed multiple times based on the current decoding recursion number and the highest decoding recursion number.

[0083] Step S207: Determine whether the current decoding recursion number is equal to the target decoding recursion number; if the current decoding recursion number is equal to the target decoding recursion number, execute step S208; if the current decoding recursion number is not equal to the target decoding recursion number, execute step S209.

[0084] Step S208: reorganize the target codeword, calculate the flip function value based on the syndrome, flip the bits, and update the syndrome.

[0085] Step S209: Calculate the flip function value based on the syndrome, flip the bits, and update the syndrome.

[0086] In actual applications, after taking the initial decoding recursion number corresponding to the highest decoding recursion number as the current decoding recursion number, it is necessary to determine whether the current decoding recursion number is equal to the target decoding recursion number. If the current decoding recursion number is equal to the target decoding recursion number, it is necessary to reorganize the target codeword, and calculate the flip function value based on the syndrome value, flip the bits of the reorganized target codeword, and update the syndrome value; if the current decoding recursion number is not equal to the target decoding recursion number, it means that the target codeword does not need to be reorganized. At this time, the flip function value is directly calculated based on the syndrome value, the bits of the target codeword are flipped, and the syndrome value is updated.

[0087] Step S210: Update the current decoding recursion number, and determine whether the current decoding recursion number is less than the highest decoding recursion number; if the current decoding recursion number is less than the highest decoding recursion number, return to execute step S204.

[0088] In actual applications, after updating the symptom value, it is necessary to update the current decoding recursion number and determine whether the current decoding recursion number is less than the maximum decoding recursion number. If the current decoding recursion number is less than the maximum decoding recursion number, it means that the target codeword can continue to be decoded. At this time, return to execute step S204 and subsequent steps. If the current decoding recursion number is greater than or equal to the maximum decoding recursion number, it means that the target codeword cannot be decoded. At this time, the subsequent operations can be terminated, or the reorganization information can be re-determined, and the target codeword can be re-decoded with a low-density parity check code based on the reorganization information, etc. This application does not make specific limitations here.

[0089] For ease of understanding, assume that the current decoding recursion number is represented by T*. When the target decoding recursion number Iter_num is divisible by T* (Iter_num%T*=0), the reorganized data is selected. And each time the reorganized data is selected, the current decoding recursion number T_BF of the next bit flip decoding is accumulated, that is, T*=T*+T_BF. If the decoding method predicts that the maximum decoding recursion number does not exceed 100, and the codeword is reorganized three times, the execution recursion number of the first bit flip is T_BF1=5, the execution recursion number of the second bit flip is T_BF2=10, and the execution recursion number of the third bit flip is T_BF3=85. Then the initial T*=T_BF1=5, when the recursion number Iter_num=5, the condition Iter_num=T* is established, and the target codeword is selected for reorganization, and T*=T*+T_BF2=15. When the total recursive number Iter_num of the bit-flipping decoder reaches the final T*=T_BF1+T_BF2+T_BF3=100, the decoding process is terminated.

[0090] See also Figure 3 , Figure 3 A schematic diagram of the structure of a low-density parity-check decoding system provided in an embodiment of the present application.

[0091] An embodiment of the present application provides a low-density parity-check code decoding system, comprising:

[0092] A first acquisition module 101 is used to acquire a target codeword to be decoded;

[0093] A first determining module 102, configured to determine reorganization information for reorganizing a target codeword;

[0094] The first decoding module 103 is used to perform low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result.

[0095] In a low-density parity-check code decoding system provided in an embodiment of the present application, the first determination module may include:

[0096] A first acquisition unit, used for acquiring a maximum decoding recursion number of a target codeword;

[0097] A second acquisition unit, used to acquire the number of reorganizations and the reorganization method of the target codeword;

[0098] A first determining unit, configured to determine a target decoding recursion number for reorganizing a target codeword based on a maximum decoding recursion number and a reorganization number;

[0099] The second determining unit is used to use the target decoding recursive number and the reorganization method as reorganization information.

[0100] An embodiment of the present application provides a low-density parity-check code decoding system, wherein the first decoding module may include:

[0101] A first generating unit, used for generating a syndrome value of a target codeword;

[0102] The first judgment unit is used to judge whether the syndrome values ​​are all zero; if the syndrome values ​​are all zero, the decoding is successful and the target decoding result is obtained; if the syndrome values ​​are not all zero, the initial decoding recursion number corresponding to the highest decoding recursion number is used as the current decoding recursion number, and it is judged whether the current decoding recursion number is equal to the target decoding recursion number; if the current decoding recursion number is equal to the target decoding recursion number, the target codeword is reorganized, and the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; if the current decoding recursion number is not equal to the target decoding recursion number, the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; the current decoding recursion number is updated, and it is judged whether the current decoding recursion number is less than the highest decoding recursion number; if the current decoding recursion number is less than the highest decoding recursion number, it returns to execute the step of judging whether the syndrome values ​​are all zero.

[0103] An embodiment of the present application provides a low-density parity-check code decoding system, wherein the reorganization method includes combining a target codeword with a flipped codeword, and the flipped codeword includes a codeword obtained by flipping the target codeword.

[0104] An embodiment of the present application provides a low-density parity-check code decoding system, wherein a reorganization method includes combining a part of a target codeword with another part of a flipped codeword.

[0105] The present application also provides a low-density parity check code decoding device and a computer-readable storage medium, both of which have the corresponding effects of the low-density parity check code decoding method provided in the embodiment of the present application. Figure 4 , Figure 4 A schematic diagram of the structure of a low-density parity-check code decoding device provided in an embodiment of the present application.

[0106] An embodiment of the present application provides a low-density parity-check code decoding device, including a memory 201 and a processor 202. The memory 201 stores a computer program. When the processor 202 executes the computer program, the steps of the low-density parity-check code decoding method described in any of the above embodiments are implemented.

[0107] See also Figure 5, another low-density parity check code decoding device provided in the embodiment of the present application may also include: an input port 203 connected to the processor 202, used to transmit commands input from the outside to the processor 202; a display unit 204 connected to the processor 202, used to display the processing results of the processor 202 to the outside; a communication module 205 connected to the processor 202, used to realize the communication between the low-density parity check code decoding device and the outside. The display unit 204 can be a display panel, a laser scanning display, etc.; the communication mode adopted by the communication module 205 includes but is not limited to mobile high-definition link technology (HML), universal serial bus (USB), high-definition multimedia interface (HDMI), wireless connection: wireless fidelity technology (WiFi), Bluetooth communication technology, low-power Bluetooth communication technology, and communication technology based on IEEE802.11s.

[0108] An embodiment of the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the low-density parity-check code decoding method described in any of the above embodiments are implemented.

[0109] The computer-readable storage medium involved in the present application includes random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the technical field.

[0110] See also Figure 6 , Figure 6 A first structural schematic diagram of a low-density parity-check decoding device provided in an embodiment of the present application.

[0111] A low-density parity-check code decoding device provided in an embodiment of the present application may include:

[0112] An input register 11 is used to obtain a target codeword to be decoded;

[0113] A reorganization information determiner 12, for determining reorganization information for reorganizing a target codeword;

[0114] The decoder 13 is used to perform low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result.

[0115] See also Figure 7 , Figure 7 A second structural schematic diagram of a low-density parity-check decoding device provided in an embodiment of the present application.

[0116] An embodiment of the present application provides a low-density parity-check code decoding device, and the decoder may include:

[0117] A flip multiplexer 131 is used to receive a target codeword from an input register;

[0118] A bit flip and syndrome update module 132 for receiving a target codeword from a flip multiplexer, calculating a flip function value, flipping bits, and updating syndrome values;

[0119] The syndrome value register 133 is used to receive and cache syndrome values ​​from the bit flip and syndrome value update module;

[0120] The flipped codeword register 134 is used to receive the flipped codeword from the bit flip and syndrome update module;

[0121] The decoding termination state determination module 135 is used for receiving the syndrome value from the syndrome value register and generating a first signal for continuing decoding or terminating decoding based on the syndrome value;

[0122] A determination module 136, configured to generate a second signal for controlling whether to perform reorganization based on the reorganization information;

[0123] The reorganization multiplexer 137 is used to receive the second signal from the determination module, and if the second signal indicates that reorganization is to be performed, the codeword generated by the codeword reorganization module is transmitted to the flip multiplexer, and if the second signal indicates that reorganization is not to be performed, the codeword stored in the flipped codeword register is transmitted to the flip multiplexer;

[0124] A codeword reorganization module 138 is connected to the input register and the data register, and is used to combine the codewords in the input register and the flipped codeword register based on the third signal provided by the reorganized codeword selection set;

[0125] The reorganization codeword selection set 139 is used to generate a third signal for controlling the reorganization method, such as the codeword position to be transplanted.

[0126] It should be noted that the types of the first signal, the second signal and the third signal can be determined according to actual needs. For example, they can all be 0, 1, etc., and 0 represents the corresponding confirmed signal, 1 represents the corresponding uncertain signal, etc., so as to promote the information exchange rate between each device in the low-density parity-check code decoding device of the present application.

[0127] For the description of the relevant parts of a low-density parity-check code decoding system, device, apparatus, and computer-readable storage medium provided in the embodiment of the present application, please refer to the detailed description of the corresponding parts in the low-density parity-check code decoding method provided in the embodiment of the present application, which will not be repeated here. In addition, the parts of the above-mentioned technical solutions provided in the embodiment of the present application that are consistent with the implementation principles of the corresponding technical solutions in the prior art are not described in detail to avoid excessive elaboration.

[0128] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0129] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A low-density parity-check code decoding method, characterized in that: include: Obtaining a target codeword to be decoded; Determining reorganization information for reorganizing the target codeword; Performing low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result; The step of determining the reorganization information for reorganizing the target codeword includes: Obtaining a maximum decoding recursion number of the target codeword; Obtaining the number of reorganizations and the reorganization method of the target codeword; Determining a target decoding recursion number for reorganizing the target codeword based on the highest decoding recursion number and the number of reorganization times; Using the target decoding recursive number and the reorganization method as the reorganization information; The step of performing low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result includes: generating a syndrome value of the target codeword; Determining whether the symptom values ​​are all zero; If the syndrome values ​​are all zero, the decoding is successful and the target decoding result is obtained; If the syndrome values ​​are not all zero, the initial decoding recursion number corresponding to the highest decoding recursion number is used as the current decoding recursion number, and it is determined whether the current decoding recursion number is equal to the target decoding recursion number; If the current decoding recursion number is equal to the target decoding recursion number, reorganize the target codeword, calculate the flip function value based on the syndrome value, flip the bit, and update the syndrome value; If the current decoding recursion number is not equal to the target decoding recursion number, then calculating a flip function value based on the syndrome, flipping bits, and updating the syndrome; Update the current decoding recursion number, and determine whether the current decoding recursion number is less than the maximum decoding recursion number; If the current decoding recursion number is less than the highest decoding recursion number, the process returns to the step of determining whether all syndrome values ​​are zero.

2. The method according to claim 1, characterized in that The reorganization method includes a method of combining the target codeword with a flip codeword, and the flip codeword includes a codeword obtained by flipping the target codeword.

3. The method according to claim 2, characterized in that The reorganization method includes combining a part of the target codeword with another part of the flipped codeword.

4. A low-density parity-check code decoding system, characterized in that: include: A first acquisition module, used to acquire a target codeword to be decoded; A first determining module, used to determine reorganization information for reorganizing the target codeword; A first decoding module, configured to perform low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result; Wherein, the first determining module includes: A first acquisition unit, used for acquiring a maximum decoding recursion number of the target codeword; A second acquisition unit, used to acquire the number of reorganizations and the reorganization method of the target codeword; A first determining unit, configured to determine a target decoding recursion number for reorganizing the target codeword based on the highest decoding recursion number and the number of reorganization times; A second determining unit, configured to use the target decoding recursive number and the reorganization method as the reorganization information; Wherein, the first decoding module includes: A first generating unit, configured to generate a syndrome value of the target codeword; The first judgment unit is used to judge whether the syndrome values ​​are all zero; if the syndrome values ​​are all zero, the decoding is successful and the target decoding result is obtained; if the syndrome values ​​are not all zero, the initial decoding recursion number corresponding to the highest decoding recursion number is used as the current decoding recursion number to judge whether the current decoding recursion number is equal to the target decoding recursion number; if the current decoding recursion number is equal to the target decoding recursion number, the target codeword is reorganized, and the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; if the current decoding recursion number is not equal to the target decoding recursion number, the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; the current decoding recursion number is updated, and it is judged whether the current decoding recursion number is less than the highest decoding recursion number; if the current decoding recursion number is less than the highest decoding recursion number, the step of judging whether the syndrome values ​​are all zero is returned.

5. A low-density parity-check code decoding device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the low-density parity-check code decoding method according to any one of claims 1 to 3 when executing the computer program.

6. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the low-density parity-check code decoding method according to any one of claims 1 to 3 are implemented.

7. A low-density parity-check code decoding device, characterized in that: include: An input register is used to obtain a target codeword to be decoded; a reorganization information determiner, configured to determine reorganization information for reorganizing the target codeword; A decoder, configured to perform low-density parity check code decoding on the target codeword based on the reorganized information to obtain a target decoding result; The reorganization information determiner is used to: obtain the highest decoding recursion number of the target codeword; obtain the number of reorganizations and the reorganization method of the target codeword; determine the target decoding recursion number for reorganizing the target codeword based on the highest decoding recursion number and the reorganization number; and use the target decoding recursion number and the reorganization method as the reorganization information; Wherein, the decoder is used to: generate the syndrome value of the target codeword; determine whether the syndrome value is all zero; if the syndrome value is all zero, the decoding is successful and the target decoding result is obtained; if the syndrome value is not all zero, the initial decoding recursion number corresponding to the highest decoding recursion number is used as the current decoding recursion number, and it is determined whether the current decoding recursion number is equal to the target decoding recursion number; if the current decoding recursion number is equal to the target decoding recursion number, the target codeword is reorganized, and the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; if the current decoding recursion number is not equal to the target decoding recursion number, the flip function value is calculated based on the syndrome value, the bits are flipped, and the syndrome value is updated; the current decoding recursion number is updated, and it is determined whether the current decoding recursion number is less than the highest decoding recursion number; if the current decoding recursion number is less than the highest decoding recursion number, the step of determining whether the syndrome values ​​are all zero is returned.

8. The low-density parity-check code decoding device according to claim 7, characterized in that: The decoder comprises: A flip multiplexer, configured to receive the target codeword from the input register; a bit flip and syndrome update module, configured to receive the target codeword from the flip multiplexer, calculate a flip function value, flip bits, and update syndrome values; A syndrome value register, used for receiving and caching the syndrome value from the bit flip and syndrome value update module; a flipped codeword register, for receiving a flipped codeword from the bit flip and syndrome update module; A decoding termination state determination module, configured to receive the syndrome value from the syndrome value register and generate a first signal for continuing decoding or terminating decoding based on the syndrome value; A determination module, used for generating a second signal for controlling whether to perform reorganization based on the reorganization information; a reorganization multiplexer, configured to receive the second signal from the determination module, and if the second signal indicates that reorganization is to be performed, transmit the codeword generated by the codeword reorganization module to the flip multiplexer; if the second signal indicates that reorganization is not to be performed, transmit the codeword stored in the flipped codeword register to the flip multiplexer; The codeword reorganization module is connected to the input register and the data register, and is used to combine the codewords in the input register and the flipped codeword register based on a third signal provided by the reorganized codeword selection set; The recombinant codeword selection set is used to generate the third signal for controlling the recombinant method.

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