Test structure and forming method thereof, and detection method of overlay accuracy

Abstract

A test structure and a method for forming the same, and a method for detecting overlay accuracy, wherein the detection method comprises: providing a test structure, the test structure comprising: a first conductive structure; a second conductive structure; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure; performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance; obtaining an overlay accuracy detection result of the conductive structure according to the first resistance, wherein the overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between the first conductive structure and the second conductive structure. Thus, the overlay accuracy detection result between adjacent conductive structures can be obtained without damaging the semiconductor structure, so as to improve the reliability of the semiconductor structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a test structure and a forming method thereof, and a method for detecting overlay accuracy. Background Art

[0002] Overlay (OVL) refers to the accuracy of the overlap between the current layer pattern and the previous layer pattern in the photolithography manufacturing process. Since the integrated circuit chip is manufactured by stacking multiple circuit layers, if the current layer and the previous layer are not aligned, the chip will not work properly. Therefore, in the process of forming the current layer, it is extremely important to reduce the overlay accuracy and ensure that the overlay accuracy is within the deviation range.

[0003] However, the detection of overlay accuracy in the prior art still needs to be improved. Summary of the invention

[0004] The technical problem solved by the present invention is to provide a test structure and a method for forming the same, and a method for detecting overlay accuracy, so as to obtain overlay accuracy detection results between adjacent conductive structures without destroying the semiconductor structure, thereby improving the reliability of the semiconductor structure.

[0005] To solve the above technical problems, the technical solution of the present invention provides a test structure, including: a first conductive structure, the first conductive structure extends along a first direction; a second conductive structure, the second conductive structure extends along the first direction, the first conductive structure and the second conductive structure are arranged along the second direction, and the first conductive structure and the second conductive structure are separated from each other, and the first direction and the second direction are perpendicular to each other; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure.

[0006] Optionally, a first contact area is provided between the first detection conductive structure and the first conductive structure, a second contact area is provided between the second detection conductive structure and the first conductive structure, the first contact area and the second contact area are arranged along the first direction, and the first contact area and the second contact area have a first spacing in the first direction.

[0007] Optionally, the number of the first conductive structures, the first detection conductive structures, and the second detection conductive structures are all 2, each first conductive structure is respectively connected to 1 first detection conductive structure and 1 second detection conductive structure, and the 2 first conductive structures are respectively located on both sides of the second conductive structure in the second direction.

[0008] Optionally, the first detection conductive structure includes: a first detection conductive plug connected to the first conductive structure, and a first detection conductive layer connected to the first detection conductive plug.

[0009] Optionally, the second detection conductive structure includes: a second detection conductive plug connected to the first conductive structure, and a second detection conductive layer connected to the second detection conductive plug.

[0010] Accordingly, the technical solution of the present invention provides a method for forming a test structure, including: performing a first patterning process to form a first area; after the first patterning process, performing a second patterning process to form a second area; forming a first conductive structure and a second conductive structure according to the first area and the second area, the first conductive structure and the second conductive structure both extend along a first direction, the first conductive structure and the second conductive structure are arranged along a second direction, and the first conductive structure and the second conductive structure are separated from each other, and the first direction and the second direction are perpendicular to each other; after forming the first conductive structure and the second conductive structure, forming a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure.

[0011] Optionally, a first patterning process is performed to form a first region, the method comprising: providing a substrate and a sacrificial layer located on a surface of the substrate; forming a first patterned layer on the surface of the sacrificial layer, wherein the first patterned layer exposes a portion of the surface of the sacrificial layer; using the first patterned layer as a mask, ion implanting the sacrificial layer to form a first doped region in the sacrificial layer, the first region being a region of the first doped region.

[0012] Optionally, after the first patterning treatment, a second patterning treatment is performed, and the method for forming the second region includes: forming a second patterning layer on the surface of the sacrificial layer, the second patterning layer exposing a portion of the surface of the first doped region; using the second patterning layer as a mask, etching the first doped region until the substrate surface is exposed, forming an initial second opening in the sacrificial layer, and the second region is the region of the initial second opening.

[0013] Optionally, a method for forming a first conductive structure and a second conductive structure according to a first region and a second region includes: forming a side wall on a side wall of the initial second opening to form a second opening; after forming the side wall, etching the first doped region until the substrate surface is exposed, forming a first opening in the sacrificial layer, and the first opening and the second opening are separated by the side wall; after forming the first opening, etching the substrate using the sacrificial layer and the side wall as a mask to form a first conductive opening corresponding to the first opening and a second conductive opening corresponding to the second opening in the substrate; forming a first conductive structure in the first conductive opening, and forming a second conductive structure in the second conductive opening.

[0014] Accordingly, the technical solution of the present invention provides a method for detecting overlay accuracy, comprising: providing a test structure, the test structure comprising: a first conductive structure, the first conductive structure extending along a first direction; a second conductive structure, the second conductive structure extending along the first direction, the first conductive structure and the second conductive structure arranged along the second direction, and the first conductive structure and the second conductive structure are separate from each other, and the first direction and the second direction are perpendicular to each other; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure; performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance; obtaining an overlay accuracy detection result of the conductive structure according to the first resistance, the overlay accuracy detection result of the conductive structure being an overlay accuracy detection result between the first conductive structure and the second conductive structure.

[0015] Optionally, a method for obtaining an overlay accuracy detection result of a conductive structure based on a first resistor includes: providing a preset first resistance range; when the first resistance is within the preset first resistance range, the overlay accuracy of the conductive structure is qualified; when the first resistance is outside the preset first resistance range, the overlay accuracy of the conductive structure is unqualified.

[0016] Optionally, a first contact area is provided between the first detection conductive structure and the first conductive structure, a second contact area is provided between the second detection conductive structure and the first conductive structure, the first contact area and the second contact area are arranged along the first direction, and the first contact area and the second contact area have a first spacing in the first direction.

[0017] Optionally, the method for obtaining an overlay accuracy detection result of a conductive structure according to a first resistor includes: obtaining a first detection width according to the first resistor and a first spacing, wherein the first detection width is a detected width of the first conductive structure along a second direction.

[0018] Optionally, the method for obtaining the first detection width includes: providing the thickness D of the first conductive structure, the resistivity ρ of the material of the first conductive structure, and the first detection width W1=(ρ×L) / (R1×D), wherein L is the first spacing and R1 is the first resistance.

[0019] Optionally, the method for obtaining the overlay accuracy detection result of the conductive structure based on the first resistor also includes: providing a preset width range; when the first detection width is within the preset width range, the overlay accuracy of the conductive structure is qualified; when the first detection width is outside the preset width range, the overlay accuracy of the conductive structure is unqualified.

[0020] Optionally, the method for obtaining the overlay accuracy detection result of the conductive structure based on the first resistor also includes: providing a preset width; obtaining the deviation between the first detection width and the preset width; and obtaining the overlay accuracy of the conductive structure based on the deviation between the first detection width and the preset width.

[0021] Optionally, the number of the first conductive structures, the first detection conductive structures, and the second detection conductive structures are all 2, each first conductive structure is respectively connected to 1 first detection conductive structure and 1 second detection conductive structure, and the 2 first conductive structures are respectively located on both sides of the second conductive structure in the second direction.

[0022] Optionally, the method of performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance includes: detecting two first conductive structures respectively to obtain a first resistance corresponding to each first conductive structure.

[0023] Optionally, a method for obtaining an overlay accuracy detection result of a conductive structure based on a first resistor includes: providing a preset resistance deviation range; when a deviation between two of the first resistors is within the preset resistance deviation range, the overlay accuracy of the conductive structure is qualified; when a deviation between the two first resistors is outside the preset resistance deviation range, the overlay accuracy of the conductive structure is unqualified.

[0024] Optionally, the method for obtaining an overlay accuracy detection result of a conductive structure based on a first resistor further includes: providing a preset width; and obtaining the overlay accuracy of the conductive structure based on the two first resistors and the preset width.

[0025] Optionally, the overlay accuracy of the conductive structure , wherein WP is the preset width, and R1 and R2 are two of the first resistors respectively.

[0026] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0027] In the detection method of overlay accuracy provided by the technical solution of the present invention, the first conductive structure is subjected to resistance detection through the first detection conductive structure and the second detection conductive structure to obtain the first resistance. On the one hand, since the material of the first conductive structure is determined, the material resistivity of the first conductive structure is constant, and therefore, the change of the first resistance is mainly related to the change of the shape of the first conductive structure, so that the overlay accuracy judgment result between the first conductive structure and the second conductive structure can be obtained according to the first resistance, that is, the overlay accuracy judgment result of the conductive structure. On the other hand, since the first detection conductive structure and the second detection conductive structure can be formed after the interlayer dielectric layer is formed on the first conductive structure and the second conductive structure, the detection of the first resistance is less affected by the process steps of forming the interlayer dielectric layer, that is, after the interlayer dielectric layer is formed, the first resistance can still be detected. Therefore, by detecting the first resistance, the overlay accuracy judgment result of the conductive structure is obtained without destroying the semiconductor structure, thereby improving the reliability of the semiconductor structure.

[0028] Furthermore, when the deviation between the two first resistors is within the preset resistance deviation range, the overlay accuracy of the conductive structure is qualified; when the deviation between the two first resistors is outside the preset resistance deviation range, the overlay accuracy of the conductive structure is unqualified. Therefore, the deviation between the two first resistors is compared with the preset resistance deviation range to obtain the overlay accuracy detection result of the conductive structure, thereby amplifying the detection signal used to judge the overlay accuracy of the conductive structure and improving the accuracy of the overlay accuracy detection result of the conductive structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figures 1 to 5 It is a schematic structural diagram of each step in a method for forming a semiconductor structure;

[0030] Figures 6 to 22 is a structural schematic diagram of each step of a method for forming a test structure according to an embodiment of the present invention;

[0031] Fig.23 is a schematic structural diagram of a test structure according to another embodiment of the present invention;

[0032] Fig.24 It is a flow chart of a method for detecting overlay accuracy according to an embodiment of the present invention. DETAILED DESCRIPTION

[0033] As described in the background art, the detection of overlay accuracy in the prior art still needs to be improved.

[0034] Figures 1 to 5 The present invention is a structural schematic diagram of each step in a method for forming a semiconductor structure.

[0035] Please refer to Figure 1 and Figure 2 , Figure 2 yes Figure 1 Schematic diagram of the cross-sectional structure along the A1-A1 direction, Figure 1 yes Figure 2 A schematic diagram of the structure viewed from above along direction B is provided, wherein a layer to be etched 100 is provided, and the layer to be etched 100 includes a conductive structure region C; a sacrificial material layer (not shown) is formed on the layer to be etched 100; and an ion implantation process is performed on the sacrificial material layer to form an initial sacrificial layer 110 having a doped region 111, and the doped region 111 is located on the conductive structure region C.

[0036] Please refer to Figure 3 , a photoresist pattern layer (not shown) is formed on the initial sacrificial layer 110, and the photoresist pattern layer exposes a portion of the surface of the doped region 111; the doped region 111 is etched using the photoresist pattern as a mask until the surface of the layer to be etched 100 is exposed, and a third mask opening 123 is formed in the doped region 111.

[0037] The boundary of the doped region 111 and the boundary of the third mask opening 123 jointly define the pattern and position of the first conductive structure and the second conductive structure to be formed subsequently.

[0038] Please refer to Figure 4 , forming a sidewall 130 on the sidewall surface of the third mask opening 123; after forming the sidewall 130, the initial sacrificial layer 110 is etched back until the doping region 111 is removed to form a sacrificial layer 140, wherein the sacrificial layer 140 has a first mask opening 121, a third mask opening 123 and a second mask opening 122 arranged along the first direction X, wherein the first mask opening 121 and the third mask opening 123, as well as the second mask opening 122 and the third mask opening 123 are separated respectively by the sidewall 130.

[0039] The thickness of the third mask opening 123 and the sidewall spacer 130 together define the pattern and position of the third conductive structure to be formed subsequently.

[0040] Please refer to Figure 5 , using the sidewall 130 and the sacrificial layer 140 as masks, the layer to be etched 100 is etched to form a first conductive opening (not shown), a second conductive opening (not shown) and a third conductive opening (not shown) in the layer to be etched 100, respectively; a first conductive structure 151 is formed in the first conductive opening; a second conductive structure 152 is formed in the second conductive opening; and a third conductive structure 153 is formed in the third conductive opening.

[0041] In order to avoid damaging the semiconductor structure, an optical method is usually used to detect the overlay accuracy of the semiconductor structure.

[0042] However, on the one hand, since the doped region 111 is a doped region rather than an actual structure, it is impossible to detect the overlay accuracy between the photoresist pattern layer and the doped region 111 by an optical method, and thus it is impossible to predict the overlay accuracy between the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153. On the other hand, in order to prevent the surfaces of the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153 from being oxidized and contaminated, after forming the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153, it is necessary to form an interlayer dielectric layer on the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153 within a very short interval to protect the surfaces of the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153. Since the method of detecting the overlay accuracy by an optical method is relatively complex and takes a long time, the length of the interval is not enough to detect the overlay accuracy between the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153 by an optical method. As a result, it is impossible to detect the overlay accuracy between the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153 by optical methods without causing damage to the semiconductor structure. As a result, it is impossible to determine the overlay accuracy between the first conductive structure 151, the second conductive structure 152 and the third conductive structure 153, resulting in poor reliability of the formed semiconductor structure.

[0043] In order to solve the above technical problems, an embodiment of the present invention provides a test structure and a method for forming the same, and a method for detecting overlay accuracy, wherein the method for detecting overlay accuracy performs resistance detection on the first conductive structure to obtain a first resistance, and obtains an overlay accuracy detection result of the conductive structure based on the first resistance, thereby obtaining an overlay accuracy detection result between adjacent conductive structures without destroying the semiconductor structure, thereby improving the reliability of the semiconductor structure.

[0044] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0045] Figures 6 to 22 It is a structural schematic diagram of each step of a method for forming a test structure according to an embodiment of the present invention.

[0046] First, perform the first patterning process to form the first area. For specific steps of performing the first patterning process to form the first area, please refer to Figures 6 to 10 .

[0047] Please refer to Figure 6 , providing a substrate 200 and a sacrificial layer 300 located on a surface of the substrate 200 .

[0048] In this embodiment, the substrate 200 includes: a base 210 and a mask material layer 220 located on the surface of the base 210 .

[0049] The material of the substrate 210 and the material of the mask material layer 220 are different.

[0050] In this embodiment, the material of the substrate 210 includes a low-K dielectric layer (K ​​is less than or equal to 3.9).

[0051] In other embodiments, the material of the substrate includes silicon oxide.

[0052] In other embodiments, the material of the substrate includes aluminum oxide.

[0053] In the present embodiment, the material of the mask material layer 220 includes one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride and silicon carbon oxynitride.

[0054] In this embodiment, the material of the sacrificial layer 300 includes silicon.

[0055] Please refer to Figure 7 and Figure 8 , Figure 8 yes Figure 7 Schematic diagram of the top view of the structure along the middle direction A, Figure 7 yes Figure 8 In the schematic cross-sectional structure diagram along the direction B1 - B2 , a first patterned layer 310 is formed on the surface of the sacrificial layer 300 , and the first patterned layer 310 exposes a portion of the surface of the sacrificial layer 300 .

[0056] The first patterned layer 310 is used to define an area of ​​a first region to be formed subsequently.

[0057] Please refer to Fig. 9 and Fig.10 , Fig.10 yes Fig. 9 Schematic diagram of the top view of the structure along the middle direction A, Fig. 9 yes Fig.10 Schematic diagram of the cross-sectional structure along the direction B1-B2, using the first patterned layer 310 as a mask, ion implantation is performed on the sacrificial layer 300 to form a first doped region 301 in the sacrificial layer 300 to form a first region I.

[0058] Specifically, the first region I is a region of the first doping region 301 .

[0059] By forming the first doped region 301, it is possible to have different etching rates between the material of the first doped region 301 and the material of the sacrificial layer 300 in the subsequent etching process for forming the first opening, so that when the material of the first doped region 301 is etched, the sacrificial layer 300 outside the first doped region 301 is retained, thereby realizing the formation of the first opening.

[0060] In this embodiment, after the first region I is formed, the first patterned layer 310 is removed.

[0061] Next, after the first patterning process, a second patterning process is performed to form the second area. For specific steps of performing the second patterning process to form the second area, please refer to Figures 11 to 14 .

[0062] Please refer to Fig.11 and Fig.12 , Fig.12 yes Fig.11 Schematic diagram of the top view of the structure along the middle direction A, Fig.11 yes Fig.12 In the cross-sectional structural diagram along the direction B1 - B2 , a second patterned layer 320 is formed on the surface of the sacrificial layer 300 , and the second patterned layer 320 exposes a portion of the surface of the first doped region 301 .

[0063] The second patterned layer 320 is used to define an area of ​​a second region to be formed subsequently.

[0064] Please refer to Fig.13 and Fig.14 , using the second patterned layer 320 as a mask, etching the first doped region 301 until the surface of the substrate 200 is exposed, and forming an initial second opening 302 in the sacrificial layer 300 to form a second region II.

[0065] Specifically, the second region II is the region of the initial second opening 302 .

[0066] In this embodiment, after the second region II is formed, the second patterned layer 320 is removed.

[0067] Next, a first conductive structure and a second conductive structure are formed according to the first region I and the second region II. For specific steps of forming the first conductive structure and the second conductive structure, please refer to Figures 15 to 21 .

[0068] Please refer to Fig.15 and Fig.16 , Fig.16 yes Fig.15 Schematic diagram of the top view of the structure along the middle direction A, Fig.15 yes Fig.16A schematic cross-sectional structure diagram along the direction B1-B2, in which the initial second opening 302 (such as Fig.13 and Fig.14 A sidewall 330 is formed on the sidewall of the structure (as shown) to form a second opening 304.

[0069] In this embodiment, the method for forming the side wall 330 includes: forming a side wall material layer (not shown) on the inner wall surface of the initial second opening 302, the surface of the first doping region 301 and the surface of the sacrificial layer 300; etching the side wall material layer using an anisotropic etching process until the side wall material layer on the bottom surface of the initial second opening 302, the surface of the first doping region 301, and the surface of the sacrificial layer 300 is removed, so as to form the side wall 330 on the side wall surface of the initial second opening 302.

[0070] Please refer to Fig.17 , Fig.17 and Fig.16 In accordance with the viewing direction, after forming the sidewall 330 , the first doping region 301 is etched until the surface of the substrate 200 is exposed, and a first opening 303 is formed in the sacrificial layer 300 , and the first opening 303 and the second opening 304 are separated by the sidewall 330 .

[0071] Next, after forming the first opening 303, the substrate 200 is etched using the sacrificial layer 300 and the sidewall as masks to form a first conductive opening corresponding to the first opening 303 and a second conductive opening corresponding to the second opening 304 in the substrate 200. For specific steps of forming the first conductive opening and the second conductive opening, please refer to Fig.18 and Fig. 20 .

[0072] Please refer to Fig.18 , Fig.18 and Fig.17 In accordance with the viewing direction, after forming the first opening 303 , the mask material layer 220 is etched with the sacrificial layer 300 and the sidewall 330 as masks until the surface of the substrate 210 is exposed, and a mask layer 221 is formed on the substrate 210 .

[0073] In this embodiment, after the mask layer 221 is formed, the sacrificial layer 300 and the sidewall spacer 330 are removed.

[0074] Please refer to Fig.19 and Fig. 20 , Fig. 20 yes Fig.19 Schematic diagram of the top view of the structure along the middle direction A, Fig.19 yes Fig. 20A schematic diagram of the cross-sectional structure along the direction B1-B2 shows that after the mask layer 221 is formed, the substrate 210 is etched using the mask layer 221 as a mask until a first conductive opening 211 corresponding to the first opening 303 and a second conductive opening 212 corresponding to the second opening 304 are formed in the substrate 210.

[0075] The first conductive opening 211 provides space for subsequently forming a first conductive structure.

[0076] The second conductive opening 212 provides space for subsequently forming a second conductive structure.

[0077] In this embodiment, after the first conductive opening 211 and the second conductive opening 212 are formed, the mask layer 221 is removed.

[0078] Please refer to Fig.21 , Fig.21 and Fig. 20 In the same viewing direction, a first conductive structure 231 is formed in the first conductive opening 211 , and a second conductive structure 232 is formed in the second conductive opening 212 .

[0079] Specifically, after forming the first conductive opening 211 and the second conductive opening 212, a conductive material layer (not shown) is formed in the first conductive opening 211, the second conductive opening 212 and on the surface of the substrate 210; the conductive material layer is flattened until the surface of the substrate 210 is exposed to form the first conductive structure 231 and the second conductive structure 232.

[0080] The first conductive structure 231 and the second conductive structure 232 both extend along a first direction X. The first conductive structure 231 and the second conductive structure 232 are arranged along a second direction Y. The first conductive structure 231 and the second conductive structure 232 are separated from each other. The first direction X and the second direction Y are perpendicular to each other.

[0081] In this embodiment, two first conductive structures 231 are formed, and the two first conductive structures 231 are located on two sides of the second conductive structure 232 in the second direction Y, respectively.

[0082] In other embodiments, according to design requirements, a first conductive structure located on one side of the second conductive structure may be formed.

[0083] Please refer to Fig. 22 After the first conductive structure 231 and the second conductive structure 232 are formed, a first detection conductive structure 241 and a second detection conductive structure 242 respectively connected to the first conductive structure 231 are formed.

[0084] In this embodiment, the first detection conductive structure 241 includes: a first detection conductive plug (not shown) connected to the first conductive structure 231 , and a first lead-out conductive structure (not shown) connected to the first detection conductive plug.

[0085] In this embodiment, the second detecting conductive structure 242 includes: a second detecting conductive plug (not shown) connected to the first conductive structure 231 , and a second lead-out conductive structure (not shown) connected to the second detecting conductive plug.

[0086] In this embodiment, the method for forming the first detection conductive plug and the second detection conductive plug includes: forming a first dielectric layer (not shown) on the surfaces of the substrate 210, the first conductive structure 231 and the second conductive structure 232; forming a first plug opening (not shown) and a second plug opening (not shown) in the first dielectric layer, wherein the first plug opening and the second plug opening respectively expose a portion of the surface of the first conductive structure 231; filling the first plug opening and the second plug opening with conductive material to form the first detection conductive plug in the first plug opening and the second detection conductive plug in the second plug opening.

[0087] In this embodiment, the method for forming the first lead-out conductive structure and the second lead-out conductive structure includes: forming a second dielectric layer (not shown) on the surface of the first dielectric layer; forming a first lead-out opening (not shown) and a second lead-out opening (not shown) in the second dielectric layer, the first lead-out opening exposing the top surface of the first detection conductive plug, and the second lead-out opening exposing the top surface of the second detection conductive plug; filling the first lead-out opening and the second lead-out opening with conductive material to form the first lead-out conductive structure in the first lead-out opening, and to form the second lead-out conductive structure in the second lead-out opening.

[0088] It should be noted that Fig. 22 Schematically showing two first detection conductive structures 241 and two second detection conductive structures 242, so that each first conductive structure 231 is respectively connected to one first detection conductive structure 241 and one second detection conductive structure 242. In the actual formation process, one first detection conductive structure 241 and one second detection conductive structure 242 connected to one of the two first conductive structures 231 may also be formed according to the requirements of the first detection conductive structure 241 and the second detection conductive structure 242 in the subsequent overlay accuracy detection method.

[0089] Correspondingly, an embodiment of the present invention further provides a test structure formed by the above method, please continue to refer to Fig. 22, including: a first conductive structure 231, the first conductive structure 231 extends along a first direction X; a second conductive structure 232, the second conductive structure 232 extends along the first direction X, the first conductive structure 231 and the second conductive structure 232 are arranged along a second direction Y, and the first conductive structure 231 and the second conductive structure 232 are separated from each other, and the first direction X and the second direction Y are perpendicular to each other; a first detection conductive structure 241 and a second detection conductive structure 242 are respectively connected to the first conductive structure 231.

[0090] In this embodiment, the number of the first conductive structures 231, the first detection conductive structures 241, and the second detection conductive structures 242 are all two, each first conductive structure 231 is connected to one first detection conductive structure 241 and one second detection conductive structure 242, respectively, and the two first conductive structures 241 are located on both sides of the second conductive structure 232 in the second direction Y.

[0091] In other embodiments, according to design requirements, the number of the first conductive structure may be one, and the first conductive structure may be located on one side of the second conductive structure.

[0092] In another embodiment, if Fig.23 As shown, the number of the first conductive structures 231 is two, and the number of the first detection conductive structure 241 and the second detection conductive structure 242 are respectively one, and are respectively connected to one of the two first conductive structures 231 .

[0093] In this embodiment, a first contact area (not shown) is provided between the first detecting conductive structure 241 and the first conductive structure 231, a second contact area (not shown) is provided between the second detecting conductive structure 242 and the first conductive structure 231, the first contact area and the second contact area are arranged along the first direction X, and the first contact area and the second contact area have a first spacing in the first direction X.

[0094] Specifically, since the first detecting conductive structure 241 is connected to the first conductive structure 231 , part of the first detecting conductive structure 241 is in contact with part of the first conductive structure 231 , and the first contact area is the area where the first detecting conductive structure 241 is in contact with part of the first conductive structure 231 .

[0095] Similarly, since the second detecting conductive structure 242 is connected to the first conductive structure 231 , part of the second detecting conductive structure 242 is in contact with part of the first conductive structure 231 , and the second contact area is the area where the second detecting conductive structure 242 is in contact with part of the first conductive structure 231 .

[0096] In this embodiment, the first detection conductive structure 241 includes: a first detection conductive plug (not shown) connected to the first conductive structure 231 , and a first lead-out conductive structure (not shown) connected to the first detection conductive plug.

[0097] In each first detection conductive structure 241 , the number of the first detection conductive plugs may be one or more.

[0098] In this embodiment, the second detecting conductive structure 242 includes: a second detecting conductive plug (not shown) connected to the first conductive structure 231 , and a second lead-out conductive structure (not shown) connected to the second detecting conductive plug.

[0099] In each second detection conductive structure 242 , the number of the second detection conductive plugs may be one or more.

[0100] Fig.24 It is a flow chart of a method for detecting overlay accuracy according to an embodiment of the present invention.

[0101] Correspondingly, an embodiment of the present invention further provides a method for detecting overlay accuracy, please refer to Fig.24 ,include:

[0102] Step S100, providing a test structure, the test structure comprising: a first conductive structure, the first conductive structure extending along a first direction; a second conductive structure, the second conductive structure extending along the first direction, the first conductive structure and the second conductive structure arranged along the second direction, the first conductive structure and the second conductive structure separated from each other, the first direction and the second direction perpendicular to each other; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure;

[0103] Step S110, performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance;

[0104] Step S120 , obtaining an overlay accuracy detection result of the conductive structure according to the first resistor, wherein the overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between the first conductive structure and the second conductive structure.

[0105] The first conductive structure is subjected to resistance detection by the first detection conductive structure and the second detection conductive structure to obtain the first resistance. On the one hand, since the material of the first conductive structure is determined and the material resistivity of the first conductive structure is constant, the change of the first resistance is mainly related to the change of the shape of the first conductive structure, so that the overlay accuracy judgment result between the first conductive structure and the second conductive structure can be obtained according to the first resistance, that is, the overlay accuracy judgment result of the conductive structure. On the other hand, since the first detection conductive structure and the second detection conductive structure can be formed after the interlayer dielectric layer is formed on the first conductive structure and the second conductive structure, the detection of the first resistance is less affected by the process steps of forming the interlayer dielectric layer, that is, the first resistance can still be detected after the interlayer dielectric layer is formed. Therefore, by detecting the first resistance, the overlay accuracy judgment result of the conductive structure is obtained without destroying the semiconductor structure, thereby improving the reliability of the semiconductor structure.

[0106] The following is a detailed description with reference to the accompanying drawings.

[0107] Please refer to Fig. 22 , providing a test structure, the test structure comprising: a first conductive structure 231, the first conductive structure 231 extending along a first direction X; a second conductive structure 232, the second conductive structure 232 extending along the first direction X, the first conductive structure 231 and the second conductive structure 232 are arranged along a second direction Y, and the first conductive structure 231 and the second conductive structure 232 are separated from each other, and the first direction X and the second direction Y are perpendicular to each other; a first detection conductive structure 241 and a second detection conductive structure 242 respectively connected to the first conductive structure 231.

[0108] In this embodiment, the number of the first conductive structures 231, the first detection conductive structures 241, and the second detection conductive structures 242 are all two, each first conductive structure 231 is connected to one first detection conductive structure 241 and one second detection conductive structure 242, respectively, and the two first conductive structures 241 are located on both sides of the second conductive structure 232 in the second direction Y.

[0109] In other embodiments, according to design requirements, the number of the first conductive structure may be one, and the first conductive structure may be located on one side of the second conductive structure.

[0110] In another embodiment, please refer to Fig.23 The number of the first conductive structures 231 is two, and the number of the first detection conductive structure 241 and the second detection conductive structure 242 are one respectively, and are respectively connected to one of the two first conductive structures 231.

[0111] The specific structures of the first detection conductive structure 241 and the second detection conductive structure 242 are as described in the above test structure, which will not be repeated here.

[0112] In this embodiment, a first contact area (not shown) is provided between the first detecting conductive structure 241 and the first conductive structure 231, a second contact area (not shown) is provided between the second detecting conductive structure 242 and the first conductive structure 231, the first contact area and the second contact area are arranged along the first direction X, and the first contact area and the second contact area have a first spacing in the first direction X.

[0113] Please continue to refer to Fig. 22 , resistance detection is performed on the first conductive structure 231 through the first conductive detection structure 241 and the second conductive detection structure 242 to obtain a first resistance.

[0114] In this embodiment, the first conductive structure 231 is subjected to resistance detection through the first detection conductive structure 241 and the second detection conductive structure 242 , and a method for obtaining a first resistance R includes: detecting two first conductive structures 232 respectively, and obtaining a first resistance corresponding to each first conductive structure 232 .

[0115] For the sake of distinction, in this embodiment, the two first resistors R obtained are respectively referred to as the first resistor R1 and the first resistor R2.

[0116] In another embodiment, please refer to Fig.23 The number of the first detection conductive structure 241 and the second detection conductive structure 242 are 1 respectively, and they are respectively connected to one of the two first conductive structures 231. Therefore, after the resistance detection of the first conductive structure 231 is performed, a first resistance R is obtained.

[0117] Please continue to refer to Fig. 22 The method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor includes: providing a preset width WP; and obtaining the overlay accuracy of the conductive structure according to the two first resistors (the first resistor R1 and the first resistor R2) and the preset width WP.

[0118] The overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between the first conductive structure 231 and the second conductive structure 232 .

[0119] Likewise, the overlay accuracy of the conductive structure is the overlay accuracy between the first conductive structure 231 and the second conductive structure 232 .

[0120] Specifically, the preset width WP is a preset width of the first conductive structure 231 in the second direction Y.

[0121] because ,and , wherein ρ is the resistivity of the material of the first conductive structure, D is the thickness of the first conductive structure, and L is the first distance, is the overlay accuracy of the conductive structure.

[0122] Specifically, is the deviation between the actual width of the first conductive structure 231 in the second direction Y and the preset width WP. At the same time, it is the overlay accuracy of the conductive structure that reflects the offset between the first conductive structure 231 and the second conductive structure 232 .

[0123] Therefore, the actual offset of the two first conductive structures 231 in the second direction Y can be obtained through the first resistor R1 , the second resistor R2 and the preset width WP.

[0124] Specifically, the overlay accuracy of the conductive structure .

[0125] Since the first resistor R1 and the first resistor R2 are obtained by detecting the two first conductive structures 231, and the overlay accuracy of the conductive structure is obtained by the first resistor R1, the second resistor R2 and the preset width WP , thus reducing the number of parameters required and simplifying the acquisition of overlay accuracy of conductive structures , and also reduces the deviation between the actual value and the preset value of each parameter (resistivity ρ of the material of the first conductive structure, thickness D of the first conductive structure, first spacing L), and improves the overlay accuracy of the obtained conductive structure. The accuracy of the conductive structure is improved. Moreover, since the detection result of the overlay accuracy of the conductive structure is obtained by using the deviation between the two first resistors, that is, the deviation between the first resistor R1 and the first resistor R2, the overlay accuracy of the conductive structure is magnified. The detection signal is thus improved, thereby improving the overlay accuracy of the conductive structure accuracy.

[0126] In another embodiment, please refer to Fig.23 The test structure shown, the method for obtaining the overlay accuracy detection result of the conductive structure based on the first resistance includes: providing a preset first resistance range; when the first resistance is within the preset first resistance range, the overlay accuracy of the conductive structure is qualified; when the first resistance is outside the preset first resistance range, the overlay accuracy of the conductive structure is unqualified.

[0127] Therefore, after detecting the first resistor, it is possible to quickly determine whether the overlay accuracy of the conductive structure is qualified. At the same time, the number of the first conductive structure 231, the first detection conductive structure 241, and the second detection conductive structure 242 is low, thereby improving the structural freedom of the test structure and reducing the cost of the test structure.

[0128] In another embodiment, please continue to refer to Fig. 22 The test structure shown, the method for obtaining the overlay accuracy detection result of the conductive structure based on the first resistor includes: providing a preset resistance deviation range; when the deviation between the two first resistors, that is, the deviation between the first resistor R1 and the first resistor R2 is within the preset resistance deviation range, the overlay accuracy of the conductive structure is qualified; when the deviation between the two first resistors, that is, the deviation between the first resistor R1 and the first resistor R2 is outside the preset resistance deviation range, the overlay accuracy of the conductive structure is unqualified.

[0129] Therefore, after detecting the first resistor R1 and the first resistor R2, it is possible to quickly determine whether the overlay accuracy of the conductive structure is qualified. Moreover, when the deviation between the two first resistors is within the preset resistance deviation range, the overlay accuracy of the conductive structure is qualified; when the deviation between the two first resistors is outside the preset resistance deviation range, the overlay accuracy of the conductive structure is unqualified, therefore, by comparing the deviation between the two first resistors with the preset resistance deviation range to obtain the overlay accuracy detection result of the conductive structure, the detection signal used to determine the overlay accuracy of the conductive structure is amplified, thereby improving the accuracy of the overlay accuracy detection result of the conductive structure.

[0130] In another embodiment, please refer to Fig.23 The method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor includes: obtaining a first detection width W1 according to the first resistor R and the first spacing, wherein the first detection width W1 is the detected width of the first conductive structure 231 along the second direction Y. Moreover, the method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor R also includes: providing a preset width W; obtaining a deviation M between the first detection width W1 and the preset width W; and obtaining the overlay accuracy of the conductive structure according to the deviation M between the first detection width W1 and the preset width W.

[0131] Specifically, the deviation M is a parameter reflecting the overlay accuracy of the conductive structure.

[0132] Thus, after detecting the first resistor R, the parameters of the overlay accuracy of the specific conductive structure can be obtained. At the same time, the number of the first conductive structure 231, the first detection conductive structure 241, and the second detection conductive structure 242 is low, thereby improving the structural freedom of the test structure and reducing the cost of the test structure.

[0133] Specifically, in another embodiment, the method for obtaining the first detection width W1 includes: providing the thickness D of the first conductive structure 231 and the resistivity ρ of the material of the first conductive structure 231, and the first detection width W1=(ρ×L) / (R1×D), wherein L is the first spacing and R1 is the first resistance.

[0134] In yet another embodiment, please refer to Fig.23 In the test structure shown, the method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor includes: obtaining a first detection width W1 according to the first resistor R and the first spacing, and the first detection width W1 is the detection width of the first conductive structure 231 along the second direction Y. In addition, the method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor also includes: providing a preset width range K; when the first detection width W1 is within the preset width range K, the overlay accuracy of the conductive structure is qualified; when the first detection width W1 is outside the preset width range K, the overlay accuracy of the conductive structure is unqualified.

[0135] Therefore, after detecting the first resistor R, it is possible to quickly determine whether the overlay accuracy of the conductive structure is qualified, and it is possible to roughly determine the offset of the first conductive structure 231 and the second conductive structure 232 in the second direction Y. At the same time, the number of the first conductive structure 231, the first detection conductive structure 241, and the second detection conductive structure 242 is required to be low, thereby improving the structural freedom of the test structure and reducing the cost of the test structure.

[0136] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A test structure, characterized in that: include: a first conductive structure extending along a first direction; a second conductive structure, the second conductive structure extends along a first direction, the first conductive structure and the second conductive structure are formed based on a first region and a second region, wherein the first region is formed by a first patterning process, the second region is formed by a second patterning process performed after the first patterning process, the second region is located in the first region, the first conductive structure and the second conductive structure are arranged along a second direction, the first conductive structure and the second conductive structure are located in the same layer, the first conductive structure and the second conductive structure are separated from each other, and the first direction and the second direction are perpendicular to each other; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure, the first detection conductive structure and the second detection conductive structure are configured to perform resistance detection on the first conductive structure to obtain a first resistance, the first resistance is configured to obtain an overlay accuracy detection result of the conductive structure, the overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between the first conductive structure and the second conductive structure, wherein the method for obtaining the overlay accuracy detection result of the conductive structure includes: providing a preset first resistance range; When the first resistance is within the preset first resistance range, the overlay accuracy of the conductive structure is qualified.

2. The test structure according to claim 1, characterized in that A first contact area is provided between the first detection conductive structure and the first conductive structure, a second contact area is provided between the second detection conductive structure and the first conductive structure, the first contact area and the second contact area are arranged along the first direction, and the first contact area and the second contact area have a first spacing in the first direction.

3. The test structure according to claim 1, characterized in that: The number of the first conductive structures, the first detection conductive structures, and the second detection conductive structures are all 2, each first conductive structure is respectively connected to 1 first detection conductive structure and 1 second detection conductive structure, and the 2 first conductive structures are respectively located on both sides of the second conductive structure in the second direction.

4. The test structure according to claim 1, characterized in that: The first detection conductive structure includes: a first detection conductive plug connected to the first conductive structure, and a first detection conductive layer connected to the first detection conductive plug.

5. The test structure according to claim 1, characterized in that: The second detection conductive structure includes: a second detection conductive plug connected to the first conductive structure, and a second detection conductive layer connected to the second detection conductive plug.

6. A method for forming a test structure, characterized in that: include: Performing a first patterning process to form a first area; After the first patterning process, a second patterning process is performed to form a second area located within the first area; A first conductive structure and a second conductive structure are formed according to the first area and the second area, the first conductive structure and the second conductive structure both extend along a first direction, the first conductive structure and the second conductive structure are arranged along a second direction, the first conductive structure and the second conductive structure are located in the same layer, the first conductive structure and the second conductive structure are separated from each other, and the first direction and the second direction are perpendicular to each other; After forming the first conductive structure and the second conductive structure, forming a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure, the first detection conductive structure and the second detection conductive structure are configured to perform resistance detection on the first conductive structure to obtain a first resistance, the first resistance is configured to obtain an overlay accuracy detection result of the conductive structure, the overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between the first conductive structure and the second conductive structure, wherein the method for obtaining the overlay accuracy detection result of the conductive structure includes: providing a preset first resistance range; When the first resistance is within the preset first resistance range, the overlay accuracy of the conductive structure is qualified.

7. The method for forming a test structure according to claim 6, wherein: The method of performing a first patterning process to form a first region includes: providing a substrate and a sacrificial layer located on the surface of the substrate; forming a first patterned layer on the surface of the sacrificial layer, wherein the first patterned layer exposes a portion of the surface of the sacrificial layer; using the first patterned layer as a mask, ion implanting the sacrificial layer to form a first doped region in the sacrificial layer, wherein the first region is the area of ​​the first doped region.

8. The method for forming a test structure according to claim 7, wherein: After the first patterning treatment, a second patterning treatment is performed, and the method for forming the second area includes: forming a second patterning layer on the surface of the sacrificial layer, the second patterning layer exposing a portion of the surface of the first doped area; using the second patterning layer as a mask, etching the first doped area until the substrate surface is exposed, forming an initial second opening in the sacrificial layer, and the second area is the area of ​​the initial second opening.

9. The method for forming a test structure according to claim 8, wherein: The method for forming a first conductive structure and a second conductive structure according to a first region and a second region includes: forming a sidewall on a sidewall of the initial second opening to form a second opening; after forming the sidewall, etching the first doped region until the substrate surface is exposed, forming a first opening in the sacrificial layer, and the first opening and the second opening are separated by the sidewall; after forming the first opening, etching the substrate using the sacrificial layer and the sidewall as a mask, forming a first conductive opening corresponding to the first opening and a second conductive opening corresponding to the second opening in the substrate; forming a first conductive structure in the first conductive opening, and forming a second conductive structure in the second conductive opening.

10. A method for detecting overlay accuracy, characterized in that: include: A test structure is provided, the test structure comprising: a first conductive structure, the first conductive structure extending along a first direction; a second conductive structure, the second conductive structure extending along the first direction, the first conductive structure and the second conductive structure being formed based on a first region and a second region, wherein the first region is formed by a first patterning process, the second region is formed by a second patterning process performed after the first patterning process, the second region is located in the first region, the first conductive structure and the second conductive structure are arranged along a second direction, the first conductive structure and the second conductive structure are located in the same layer, and the first conductive structure and the second conductive structure are separated from each other, and the first direction and the second direction are perpendicular to each other; a first detection conductive structure and a second detection conductive structure respectively connected to the first conductive structure; Performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance; An overlay accuracy detection result of a conductive structure is obtained according to a first resistor, wherein the overlay accuracy detection result of the conductive structure is an overlay accuracy detection result between a first conductive structure and a second conductive structure, wherein a method for obtaining an overlay accuracy detection result of a conductive structure according to a first resistor comprises: providing a preset first resistance range; when the first resistance is within the preset first resistance range, the overlay accuracy of the conductive structure is qualified.

11. The method for detecting overlay accuracy according to claim 10, characterized in that: The method for obtaining an overlay accuracy detection result of a conductive structure according to a first resistor further includes: when the first resistor is outside the preset first resistance range, the overlay accuracy of the conductive structure is unqualified.

12. The method for detecting overlay accuracy according to claim 10, characterized in that: A first contact area is provided between the first detection conductive structure and the first conductive structure, a second contact area is provided between the second detection conductive structure and the first conductive structure, the first contact area and the second contact area are arranged along the first direction, and the first contact area and the second contact area have a first spacing in the first direction.

13. The method for detecting overlay accuracy according to claim 12, characterized in that: The method for obtaining an overlay accuracy detection result of a conductive structure according to a first resistor includes: obtaining a first detection width according to the first resistor and a first spacing, wherein the first detection width is a detection width of the first conductive structure along a second direction.

14. The method for detecting overlay accuracy according to claim 13, characterized in that: The method for obtaining the first detection width includes: providing the thickness D of the first conductive structure, the resistivity ρ of the material of the first conductive structure, and the first detection width W1=(ρ×L) / (R1×D), wherein L is the first spacing and R1 is the first resistance.

15. The method for detecting overlay accuracy according to claim 13, characterized in that: The method for obtaining the overlay accuracy detection result of the conductive structure based on the first resistor also includes: providing a preset width range; when the first detection width is within the preset width range, the overlay accuracy of the conductive structure is qualified; when the first detection width is outside the preset width range, the overlay accuracy of the conductive structure is unqualified.

16. The method for detecting overlay accuracy according to claim 13, characterized in that: The method for obtaining the overlay accuracy detection result of the conductive structure according to the first resistor also includes: providing a preset width; obtaining the deviation between the first detection width and the preset width; and obtaining the overlay accuracy of the conductive structure according to the deviation between the first detection width and the preset width.

17. The method for detecting overlay accuracy according to claim 10, characterized in that: The number of the first conductive structures, the first detection conductive structures, and the second detection conductive structures are all 2, each first conductive structure is respectively connected to 1 first detection conductive structure and 1 second detection conductive structure, and the 2 first conductive structures are respectively located on both sides of the second conductive structure in the second direction.

18. The method for detecting overlay accuracy according to claim 17, characterized in that: The method of performing resistance detection on the first conductive structure through the first detection conductive structure and the second detection conductive structure to obtain a first resistance includes: detecting two first conductive structures respectively to obtain a first resistance corresponding to each first conductive structure.

19. The method for detecting overlay accuracy according to claim 18, characterized in that: A method for obtaining an overlay accuracy detection result of a conductive structure based on a first resistor includes: providing a preset resistance deviation range; when the deviation between two of the first resistors is within the preset resistance deviation range, the overlay accuracy of the conductive structure is qualified; when the deviation between the two first resistors is outside the preset resistance deviation range, the overlay accuracy of the conductive structure is unqualified.

20. The method for detecting overlay accuracy according to claim 18, characterized in that: The method for obtaining an overlay accuracy detection result of a conductive structure based on a first resistor also includes: providing a preset width; and obtaining the overlay accuracy of the conductive structure based on the two first resistors and the preset width.

21. The method for detecting overlay accuracy according to claim 20, characterized in that: The overlay accuracy of the conductive structure , wherein WP is the preset width, and R1 and R2 are two of the first resistors respectively.

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